Power module substrate and power module equipped with said substrate

Abstract

To provide a power module substrate with high corrosion resistance. [Solution] The power module substrate 10 comprises a ceramic layer 12 and at least a first metal layer 14a and a second metal layer 14b. The ceramic layer is positioned between the first metal layer and the second metal layer. In the case of the first metal layer, the side edge 16a of the first metal layer and a region 18 adjacent to the side edge on the surface 20a of the first metal layer opposite the ceramic layer are covered with a coating 22. In the case of the second metal layer, the side edge 16b of the second metal layer is covered with a coating, and the surface 20b of the second metal layer opposite the ceramic layer is not covered with a coating.

Description

Technical Field

[0001] Technical Field The present invention relates to a substrate for a power module.

[0002] The present invention further relates to a power module including the substrate.

Background Art

[0003] Background Metal-ceramic substrates, particularly copper-ceramic substrates, are increasingly being used as base substrates or circuit boards in power modules intended for higher operating voltages, for example, operating voltages of 600 V or higher.

[0004] Typically, such a substrate includes a ceramic layer, and metallization is provided on each of the two surface sides of this ceramic layer. The upper metallization can be configured to form conductors, contact surfaces, and / or others for the circuit, for example, by using etching techniques.

[0005] Another essential component of a metal-ceramic substrate is an insulating layer formed by the ceramic layer. Due to its relatively high insulation strength, the insulating layer made of ceramic has been found to be particularly advantageous in power electronics.

[0006] A prerequisite for providing a metal-ceramic substrate is that the metal layer is permanently joined to the ceramic layer. In addition to so-called direct bonding methods, that is, the DCB (direct copper bonding) method or the DAB (direct aluminum bonding) method, it is known to use brazing materials to join the metal layer to the ceramic layer (AMB method: active metal brazing).

[0007] Differences in the thermal expansion coefficients of the metal in the metal layer and the ceramic material in the ceramic layer, as well as differences in the thickness and / or structure of these layers, can periodically generate thermomechanical stresses, which can even cause bending of the metal-ceramic substrate. Furthermore, corrosion resistance can become a problem, especially when the moisture content of the substrate is high. [Overview of the project] [Problems that the invention aims to solve]

[0008] explanation An advancement from prior art, the object of the present invention is to provide a power module substrate with high corrosion resistance, which has a reduced tendency to bend, reduced thermomechanical stress, and / or high heat resistance, especially during repeated temperature changes. [Means for solving the problem]

[0009] This objective is achieved by the power module substrate described in claim 1 and the power module described in claim 15. Further advantages and characteristics will become apparent from the dependent claims, this specification, and the accompanying drawings.

[0010] According to the present invention, a substrate for a power module is provided, which comprises a ceramic layer and at least a first metal layer and a second metal layer, wherein the ceramic layer is disposed between the first metal layer and the second metal layer, and in the case of the first metal layer, the side edge of the first metal layer and the region adjacent to the side edge on the surface of the first metal layer opposite the ceramic layer are covered with a coating, and in the case of the second metal layer, its side edge is covered with a coating, and the surface of the second metal layer opposite the ceramic layer is not covered with a coating.

[0011] The side edges of the metal layer are, in particular, edges of the metal layer that do not extend parallel to the ceramic layer. Instead, the side edges of the metal layer preferably connect the metal layer surface opposite the ceramic layer, which extends substantially parallel to the ceramic layer, to the metal layer surface facing the ceramic layer, which also preferably extends substantially parallel to the ceramic layer. Preferably, the side edges extend substantially perpendicular to the ceramic layer and may be further chamfered. Furthermore, the side edges may have a concave or convex shape.

[0012] Thus, in one aspect of the present invention, the side edges of the first metal layer and the side edges of the second metal layer are at least partially covered with a coating. Furthermore, while the surface of the second metal layer opposite the ceramic layer is uncoated, the surface of the first metal layer opposite the ceramic layer is not completely uncoated. Rather, a certain region on the surface of the first metal layer opposite the ceramic layer, specifically a region directly adjacent to the side edge, is also covered with a coating. Preferably, the surface of the first metal layer is not completely covered but only partially covered. In other words, preferably, the surface region of the first metal layer located near the edge is covered in this way, while the region located further from the edge is not covered.

[0013] Thus, a substrate is provided that is asymmetrically coated based on a first metal layer and a second metal layer. On the one hand, this substrate has an advantage in terms of corrosion resistance because the particularly corroded edges are covered with a coating. On the other hand, the overall stress on the substrate is reduced. Therefore, this substrate has high thermal durability, especially during repeated temperature changes.

[0014] This substrate further has the advantage that, by using the manufacturing process, the side edges of the first metal layer are completely covered in a simple manner, and that no gaps are created in the covering of the side edges of the first metal layer as a result of the manufacturing process. This substrate further has advantages during further processing, especially during high-temperature processes such as brazing.

[0015] In addition, the absence of a coating on the surface of the second metal layer results in improved workability of the substrate in certain processes such as ultrasonic welding and / or brazing, which is another advantage. Furthermore, the uncoated surface of the second metal layer allows for optimal heat dissipation to the cooler. Also, the lifespan of brazed joints that can be provided on the first and / or second metal layers for mounting power semiconductors, for example, is increased, especially during temperature changes.

[0016] Therefore, this substrate is particularly suitable for power modules containing power semiconductors designed for voltage ranges of 3.3kV and above.

[0017] In the substrate, the ceramic layer can be positioned precisely between two metal layers, i.e., between a first metal layer and a second metal layer. Alternatively, the ceramic layer can be positioned between three or more metal layers. For example, in addition to the first metal layer, further metal layers can be positioned on the first side of the ceramic layer where the first metal layer is located. These further metal layers are preferably positioned planarly on the first side in addition to the first metal layer. An intermediate space may exist between the first metal layer and the further metal layers on the first side. Similarly, the first metal layer can have recesses. In other words, the first metal layer does not need to extend across the entire surface of the ceramic layer. Therefore, according to a preferred improved embodiment of the present invention, the substrate has a conductive pattern on the side of the first metal layer. Preferably, the conductive pattern means that the first metal layer does not continuously cover the entire surface of the ceramic layer, or that further metal layers are present in addition to the first metal layer, resulting in regions in the ceramic layer where the first metal layer or further metal layers are absent.

[0018] The above coating pattern, i.e., a coating pattern in which the side edge of the first metal layer and the region of the first metal layer on the surface opposite the ceramic layer, adjacent to the side edge, are covered with a coating, can also be realized for other metal layers on the first side. Alternatively, other metal layers can be coated in different ways.

[0019] Similar to the first metal layer, in addition to the second metal layer, further metal layers can be placed on the second side of the ceramic layer where the second metal layer is located. These further metal layers are preferably arranged planarly on the second side in addition to the second metal layer. An intermediate space may exist between the second metal layer and the further metal layers. The above coating pattern, i.e., in which the side edge of the second metal layer is at least partially covered with a coating and the surface of the second metal layer opposite the ceramic layer is not covered with a coating, can also be realized for the further metal layers on the second side. Alternatively, the further metal layers on the second side may be covered in a different manner. Furthermore, instead, the second side of the ceramic layer may contain strictly only the second metal layer.

[0020] According to a preferred improved embodiment of the present invention, the coating comprises nickel, preferably nickel and phosphorus. Alternatively or in addition, the coating preferably comprises silver, palladium and / or gold. These coatings have been found to be particularly suitable for enabling the provision of corrosion-resistant substrates. The coating preferably comprises nickel.

[0021] In this regard, more preferably, the coating is a chemical nickel coating. In other words, the coating is therefore preferably applied by electroless chemical nickel plating. The difference from galvanic nickel plating is, in particular, that external current from a rectifier is not used for deposition, but the electrons necessary for depositing nickel ions are generated by oxidation-reduction reactions within the plating chamber itself. This makes it possible to obtain a coating that conforms to the contour. The chemical nickel coating is preferably a nickel-phosphorus coating, and properties such as the hardness or brittleness of the coating are controlled by the phosphorus content. The coating preferably has a phosphorus content of less than 14% by mass, more preferably more than 3% by mass.

[0022] As an alternative to the chemical coating process, there is also the option of applying a coating by means of a galvanic coating method and / or vapor deposition technology and / or sputtering.

[0023] According to a preferred improvement form of the present invention, each of the first and second metal layers is joined to the ceramic layer via an intermediate layer, and the coating covering the side ends of the metal layer shall extend over the intermediate layer. Further, in this regard, preferably, the intermediate layer contains silver.

[0024] In order to join the metal layer to the ceramic layer, it is known to employ a so-called DCB (direct copper bonding) method, more specifically, to use a metal foil or metal sheet that forms a metallization, which includes, at least on the surface side facing the ceramic layer, a molten-on layer or a film composed of a compound of a metal and a reactive gas, preferably oxygen. During the manufacture of the substrate, the molten layer or film forms a eutectic having a melting temperature lower than the melting temperature of the metal of the metal layer. As a result, by placing the foil on the ceramic layer and heating all the layers, they are joined to each other. The drawback of this process is that process-induced defects may occur between each metallization and the ceramic layer, which can adversely affect the partial discharge resistance of the substrate.

[0025] As an alternative to the DCB method, the substrate can also be manufactured by an active soldering method, particularly preferably by active brazing. Thus, in this improvement form of the present invention, preferably, the first metal layer and / or the second metal layer are joined to the ceramic layer by active brazing. During active soldering, the metal layer is joined to the ceramic layer by solder. The solder preferably forms an intermediate layer. The solder more preferably contains silver.

[0026] Regardless of the manufacturing method, due to this process, the intermediate layer between the metal layer and the ceramic layer has a slightly larger planar spread than the metal layer and can thus project onto the side edges of the metal layer. The projection of the intermediate layer also has the advantage of establishing a complete bond between the ceramic layer and the metal layer, in which case voids can be avoided and thus it can help reduce stress. The intermediate layer projecting beyond the metal layer further reduces local stress, which can have a positive impact on the partial discharge resistance of the substrate. In addition, the risk of cracks forming in the ceramic layer can be reduced, which can have a beneficial effect not only on the service life but also on the partial discharge resistance. To enhance the corrosion resistance of the substrate, it is particularly preferred that this projection of the intermediate layer is also coated with a film. In other words, the film thus extends to cover the intermediate layer.

[0027] In this regard, according to a further preferred improvement of the present invention, the planar spread of the first metal layer and / or the second metal layer is smaller than the planar spread of the ceramic layer, such that the ceramic layer projects and the film covering the side edges of the metal layer extends to the surface of the projecting ceramic layer. In other words, the film on the side edges of the metal layer thus extends downward to the ceramic layer and preferably abuts directly against the ceramic layer.

[0028] Regarding the side edges, according to a further preferred improvement, the side edges of the first metal layer and / or the second metal layer can be chamfered and / or extend in a concave and / or convex shape. This is particularly advantageous when applying the film.

[0029] Regarding the material of the metal layer, according to a further preferred improvement of the present invention, the first metal layer and / or the second metal layer includes copper, aluminum, a copper alloy and / or an aluminum alloy. More preferably, the first metal layer and / or the second metal layer consists of copper, aluminum, a copper alloy or an aluminum alloy. Particularly preferably, the metal layer contains copper or consists of copper.

[0030] With respect to the ceramic layer, according to a more preferred improved embodiment of the present invention, the ceramic layer comprises aluminum oxide, aluminum nitride, and / or silicon nitride. More preferably, the ceramic layer consists of aluminum oxide, aluminum nitride, and / or silicon nitride. Particularly preferably, the ceramic layer comprises aluminum oxide and / or aluminum nitride, and more preferably consists of aluminum oxide or aluminum nitride.

[0031] More preferably, the ceramic layer is bonded to a metal layer containing or made of copper via an intermediate layer containing silver, and the coating is a chemical nickel coating.

[0032] As previously stated, the surface of the first metal layer opposite the ceramic layer is not completely uncoated, but rather a region on the surface directly adjacent to the side edge is coated. In this regard, according to a further preferred improved embodiment of the present invention, the region on the surface of the first metal layer adjacent to the side edge has an extension of at least 0.05 mm, preferably at least 0.1 mm, perpendicular to the side edge.

[0033] In connection with this, preferably, the region on the surface of the first metal layer adjacent to the side edge shall have an extension of up to 2 mm perpendicular to the side edge. Specifically, the extension should be understood to mean an extension of the region on the surface measured from the side edge toward the center of the surface.

[0034] The surface of the first metal layer may, and preferably, include a coating region around the periphery of the entire area located near the edge. In other words, according to a preferred improved embodiment of the present invention, this region on the surface of the first metal layer extends along the side edge, around the periphery, preferably around the entire periphery. Alternatively, the surface of the first metal layer in the edge region may have points on this surface where no coating exists.

[0035] More preferably, the coating is formed using a mask on the side edges of the first metal layer, the side edges of the second metal layer, and the region on the surface of the first metal layer adjacent to the side edges. The mask, or the varnish (resist) applied using the mask, prevents the coating from covering, in particular, the region on the surface of the first metal layer adjacent to the surface region located near the edges. The mask or resist further prevents the surface of the second metal layer from being covered with the coating. Alternatively, the coating can be given using a complete coating with a subsequent etching process.

[0036] More preferably, the film thickness is 1 μm or more. More preferably, the film thickness is 15 μm or less. Such film thicknesses can be achieved particularly well by using chemical nickel.

[0037] Alternatively, especially when nickel-free coatings are used, the coating thickness may be 50 nm or more. This is particularly advantageous for gold or silver.

[0038] As previously mentioned, the substrate may have a conductor pattern on the first metal layer side. In this regard, more preferably, all resulting side edges of the conductor pattern are covered with a coating. Alternatively, only some side edges may be covered. More preferably, the entire surface area adjacent to the side edges and extending vertically from the side edges up to 2 mm is covered with a coating. Alternatively, only the conductor portion connected to the power semiconductor may have a coating on the surface area located near the side edges. Even more preferably, a conductor pattern having a planar extent of up to 4 mm is completely covered with a coating in this dimension. Furthermore, localized uncovered windows may exist within the covered area. Similarly, localized coatings may exist within larger uncovered areas. It is also possible to place contact windows for connecting power semiconductors, for example, for the placement of chips or terminals, in the fully covered area.

[0039] More preferably, according to yet another preferred improved embodiment of the present invention, the substrate has no conductive pattern on the second metal layer side and / or the second metal layer is completely continuous. In other words, preferably, the second metal layer does not include any region where the ceramic layer is not covered by the second metal layer, except for the edge regions where the ceramic layer protrudes. Thus, the second metal layer enables particularly good heat transport. Alternatively, the substrate may have a conductive pattern on the second metal layer side.

[0040] As previously stated, the present invention also relates to a power module comprising the above-mentioned substrate. In connection therewith, the object can also be achieved by a power module comprising a substrate and one or more power semiconductors, wherein the substrate comprises a ceramic layer and at least a first metal layer and a second metal layer, the ceramic layer being positioned between the first metal layer and the second metal layer, and in the case of the first metal layer, the side edge of the first metal layer and the region of the first metal layer adjacent to the side edge on the surface opposite to the ceramic layer are covered with a coating, and in the case of the second metal layer, its side edge is covered with a coating, and the surface of the second metal layer opposite to the ceramic layer is uncovered, and one or more power semiconductors are positioned on the first metal layer.

[0041] Particularly preferable, the power module is suitable for voltages of 3.3kV or higher. The present invention will be described in more detail below based on preferred exemplary embodiments with reference to the attached drawings. [Brief explanation of the drawing]

[0042] [Figure 1] A schematic plan view of a substrate according to a preferred exemplary embodiment of the present invention is shown. [Figure 2] Figure 1 shows a schematic cross-sectional view of the substrate at the point identified by AA. [Modes for carrying out the invention]

[0043] Detailed description of exemplary embodiments Figure 1 shows a plan view of a power module substrate 10 according to a preferred exemplary embodiment of the present invention, and Figure 2 shows a cross-sectional view of the substrate 10 in Figure 1 at the point identified by AA.

[0044] As is clear from Figure 1, and especially from Figure 2, the substrate 10 comprises a ceramic layer 12, a first metal layer 14a, and a second metal layer 14b, with the ceramic layer 12 positioned between the first metal layer 14a and the second metal layer 14b.

[0045] The side edge 16a of the first metal layer 14a and the region 18 adjacent to the side edge 16a on the surface 20a of the first metal layer 14a opposite to the ceramic layer 12 are covered with the coating 22.

[0046] Similarly, the side edge 16b of the second metal layer 14b is also covered with the coating 22. On the other hand, in the case of the second metal layer 14b, the surface 20b of the second metal layer 14b opposite to the ceramic layer 12 does not have the coating 22.

[0047] From the plan view of Figure 1, it is also easily visible that the substrate 10 has a conductor pattern on the side of the first metal layer 14a. As a result, another metal layer is positioned next to the first metal layer 14a, and in this plan view, the ceramic layer 12 appears to be next to the metal layer 14a. The other metal layers can be coated with the coating 22 in the same way as the metal layer 14a as described above. Alternatively or in addition, they may be coated in different ways. Clearly, the surface 20a of the other metal layers is completely covered with the coating 22, particularly in the area of ​​the centrally located conductor pattern.

[0048] In this example, the ceramic layer 12 is made of aluminum nitride, and the metal layers 14a and 14b are made of copper. In this exemplary embodiment, the coating 22 is a chemical nickel coating 22 having a phosphorus content of 3% to 14% by mass. In this example, the thickness of the coating 22 is 5 μm.

[0049] Furthermore, as is clear from Figure 2, the side edges 16a and 16b of the first metal layer 14a and the second metal layer 14b are chamfered. In addition, each of the first metal layer 14a and the second metal layer 14b is bonded to the ceramic layer 12 via an intermediate layer 24. In this example, the intermediate layer 22 contains silver and functions as solder during the manufacturing of the substrate 10, thus enabling the bonding of the metal layers 14a and 14b to the ceramic layer 12 by active brazing. Since the planar extent of the first metal layer 14a and the second metal layer 14b is smaller than the planar extent of the intermediate layer 24, the intermediate layer 24 protrudes slightly beyond the metal layers 14a and 14b. In particular, the coating 22 covering the side edges 16a and 16b of the metal layers 14a and 14b extends over the intermediate layer 24.

[0050] Similarly, as is clear from Figure 2, the planar extent of the first metal layer 14a and the second metal layer 14b is smaller than the planar extent of the ceramic layer 12, so the ceramic layer 12 protrudes. In particular, the coating 22 covering the side edges 16a and 16b of the metal layers 14a and 14b extends to the surface of the protruding ceramic layer 12.

[0051] As is particularly clear in Figure 1, which shows a plan view, the region 18 on the surface 20a of the first metal layer 14a extends along the side edge 16a and around the periphery. Therefore, in this exemplary embodiment, there are no spots on the surface 20a where the coating 22 is absent, and these spots are not in the edge regions. Thus, it is clear that the surface 20a of the first metal layer 14a is not completely but only partially covered, with the region 18 located near the edge of the surface 20a being covered, and the region further from the edge being uncovered.

[0052] In this exemplary embodiment, the region 18 adjacent to the side edge 16a on the surface 20a of the first metal layer 14a has an extension 26 extending 0.1 mm to 0.4 mm perpendicularly from the side edge 16a. Specifically, the extension 26 should be understood as the extent of the region 18 on the surface 14a, measured from the side edge 16a toward the center of the surface 14a. As is clear from Figure 1, the extension 26 of region 18 in the upper region of Figure 1 is smaller than the extension in the lateral region of the substrate 10.

[0053] The above exemplary embodiments are merely examples and can be modified and / or supplemented in various ways within the scope of the claims. Each feature described for a particular exemplary embodiment may be used alone or in combination with other features in any other exemplary embodiment. Each feature described for a particular category of exemplary embodiments may also be used in a corresponding manner in an exemplary embodiment of another category. [Explanation of Symbols]

[0054] List of reference numbers 10 circuit boards 12 Ceramic Layers 14a First metal layer 14b Second metal layer 16a Side edge of the first metal layer 16b Side edge of the second metal layer 18 Region on the surface of the first metal layer 20a Surface of the first metal layer 20b Surface of the second metal layer 22 Coating 24 Middle Class 26 Extension

Claims

1. A circuit board (10) for a power module, The substrate (10) comprises a ceramic layer (12) and at least a first metal layer (14a) and a second metal layer (14b), The ceramic layer (12) is placed between the first metal layer (14a) and the second metal layer (14b). In the case of the first metal layer (14a), the side edge (16a) of the first metal layer (14a) and the region (18) adjacent to the side edge (16a) on the surface (20a) of the first metal layer (14a) opposite to the ceramic layer (12) are covered with a coating (22). In the case of the second metal layer (14b), the side edge (16b) of the second metal layer (14b) is covered with a coating (22), and the surface (20b) of the second metal layer (14b) opposite to the ceramic layer (12) is not covered with the coating (22), the substrate.

2. The substrate (10) according to claim 1, wherein the coating (22) contains nickel, preferably nickel and phosphorus, and / or the coating (22) contains silver, palladium and / or gold.

3. The substrate (10) according to claim 1 or 2, wherein the coating (22) is a chemical nickel coating.

4. The substrate (10) according to claim 1 or 2, wherein each of the first metal layer (14a) and the second metal layer (14b) is bonded to the ceramic layer (12) via an intermediate layer (24), and the coating (22) covering the side edges (16a, 16b) of the first and second metal layers (14a, 14b) extends over the intermediate layer (24).

5. The substrate (10) according to claim 4, wherein the intermediate layer (24) contains silver.

6. The substrate (10) according to claim 1 or 2, wherein the first metal layer (14a) and / or the second metal layer (14b) are bonded to the ceramic layer (12) by active brazing.

7. The substrate (10) according to claim 1 or 2, wherein the planar extent of the first metal layer (14a) and / or the second metal layer (14b) is smaller than the planar extent of the ceramic layer (12), causing the ceramic layer (12) to protrude, and the coating (22) covering the side edges (16a, 16b) of the first and second metal layers (14a, 14b) extends to the surface of the protruding ceramic layer (12).

8. The substrate (10) according to claim 1 or 2, wherein the side edges (16a, 16b) of the first metal layer (14a) and / or the second metal layer (14b) are chamfered and / or have a concave and / or convex shape.

9. The substrate (10) according to claim 1 or 2, wherein the first metal layer (14a) and / or the second metal layer (14b) comprises copper, aluminum, a copper alloy and / or an aluminum alloy, preferably consisting of copper, aluminum, a copper alloy or an aluminum alloy.

10. The substrate (10) according to claim 1 or 2, wherein the ceramic layer (12) comprises aluminum oxide, aluminum nitride and / or silicon nitride, preferably consisting of aluminum oxide, aluminum nitride or silicon nitride, and particularly preferably consisting of aluminum nitride.

11. The substrate (10) according to claim 1 or 2, wherein the region (18) adjacent to the side end (16a) on the surface (20a) of the first metal layer (14a) has an extension (26) of at least 0.05 mm, preferably at least 0.1 mm, in the direction perpendicular to the side end (16a).

12. The substrate (10) according to claim 1 or 2, wherein the region (18) adjacent to the side end (16a) on the surface (20a) of the first metal layer (14a) has an extension (26) extending up to 2 mm vertically from the side end (16a).

13. The substrate (10) according to claim 1 or 2, wherein the region (18) on the surface (20a) of the first metal layer (14a) extends along the side edge (16a), around the periphery, preferably around the entire periphery.

14. The substrate (10) according to claim 1 or 2, wherein the first metal layer (14a) has a conductive pattern and / or the second metal layer (14b) does not have a conductive pattern and / or the second metal layer (14b) is completely continuous.

15. The substrate (10) according to claim 1 or 2, wherein the thickness of the coating (22) is 1 μm or more, and / or the thickness of the coating (22) is 15 μm or less.

16. A power module comprising a substrate (10) according to claim 1 or 2 and one or more power semiconductors, wherein the one or the plurality of power semiconductors are arranged on the first metal layer (14a).

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