LAMINATE AND METHOD FOR MANUFACTURING LAMINATE

Abstract

Provided is a laminate for promoting high-quality crystal growth of a GaN layer, and a method for manufacturing said laminate. This laminate includes an amorphous glass substrate and an AlN layer formed on the amorphous glass substrate, and the c-axis of the AlN layer is oriented on the amorphous glass substrate. The glass transition temperature (Tg) of the amorphous glass substrate is 720°C to 810°C, inclusive, the coefficient of thermal expansion (CTE) of the amorphous glass substrate is 3.5×10-6[1 / K] to 4.0×10-6[1 / K], inclusive, and the softening point of the amorphous glass substrate is 950°C to 1050°C, inclusive.

Description

[Technical field]

[0001] The present disclosure relates to a laminate and a method for making the laminate. [Background technology]

[0002] It is known that when growing GaN on a sapphire substrate, an AlN buffer layer is interposed between the sapphire substrate and GaN (for example, see Non-Patent Document 1). This technique has problems in that the film formation temperature is high and the substrate is expensive. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 11-243229 [Patent Document 2] JP 2000-124140 A [Patent Document 3] International Publication No. 2020 / 188851 [Non-patent literature]

[0004] [Non-Patent Document 1] H. Amano, N. Sawaki, I. Akasaki and Y. Toyoda: Appl. Phys. Lett. 48 363, (1986). Summary of the Invention [Problem to be solved by the invention]

[0005] Therefore, attempts have been made to grow GaN using glass as a substrate (see, for example, Patent Documents 1, 2 and 3).

[0006] However, the GaN film formed on the glass substrate needs to have its crystallinity improved to the point where it has a c-axis orientation. To improve the crystallinity of GaN, the AlN underlayer needs to have a c-axis orientation.

[0007] An object of the present disclosure is to provide a stack that promotes high-quality crystal growth of a GaN layer and a method for manufacturing the stack. [Means for solving the problem]

[0008] A laminate according to an embodiment of the present disclosure includes an amorphous glass substrate and an AlN layer formed on the amorphous glass substrate, the AlN layer being c-axis oriented on the amorphous glass substrate, the amorphous glass substrate having a glass transition temperature (Tg) of 720° C. or more and 810° C. or less, and a coefficient of thermal expansion (CTE) of 3.5×10 -6 [1 / K] or more 4.0×10 -6 [1 / K] or less, and the softening point of the amorphous glass substrate is 950° C. or more and 1050° C. or less.

[0009] A method for producing a laminate according to another embodiment of the present disclosure is a method for producing a laminate having a glass transition temperature (Tg) of 720° C. or more and 810° C. or less and a coefficient of thermal expansion (CTE) of 3.5×10 -6 [1 / K] or more 4.0×10 -6 The method includes a first step of preparing an amorphous glass substrate having a softening point of 950°C or more and 1050°C or less, and a second step of forming an AlN layer on the amorphous glass substrate at a film formation temperature of 400°C or more and 600°C or less. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is an explanatory diagram showing a method for producing a laminate according to the first embodiment. [Diagram 2] FIG. 2 is a cross-sectional view of the laminate according to the first embodiment. [Diagram 3] FIG. 3 is a schematic diagram illustrating the first film-forming step of the first embodiment. [Figure 4] FIG. 4 is a table showing the evaluation results of the evaluation example of the first embodiment. [Diagram 5] FIG. 5 is a diagram showing an XRD spectrum of Example 1. [Figure 6]FIG. 6 is a diagram showing an XRD spectrum of Example 1. [Figure 7] FIG. 7 is a diagram showing an XRD spectrum of Comparative Example 1. [Figure 8] FIG. 8 is a diagram showing an XRD spectrum of Comparative Example 2. [Figure 9] FIG. 9 is a cross-sectional view of a semiconductor device including the stack according to the second embodiment. [Figure 10] FIG. 10 is an explanatory diagram showing a method for manufacturing a semiconductor device including the stack according to the second embodiment. [Figure 11] FIG. 11 is a cross-sectional view of a semiconductor device including the stack according to the third embodiment. [Figure 12] FIG. 12 is an explanatory diagram showing a method for manufacturing a semiconductor device including the stack according to the third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] The form (embodiment) for carrying out the present disclosure will be described in detail with reference to the drawings. The present disclosure is not limited by the contents described in the following embodiments. In addition, the components described below include those that a person skilled in the art can easily imagine and those that are substantially the same. Furthermore, the components described below can be appropriately combined. Note that the disclosure is merely an example, and those that a person skilled in the art can easily imagine appropriate modifications while maintaining the gist of the invention are naturally included in the scope of the present disclosure. In addition, in order to make the explanation clearer, the drawings may be schematic in terms of the width, thickness, shape, etc. of each part compared to the actual embodiment, but they are merely examples and do not limit the interpretation of the present disclosure. In addition, in this specification and each figure, elements similar to those described above with respect to the previously mentioned figures may be given the same reference numerals, and detailed explanations may be omitted as appropriate.

[0012] (Embodiment 1) Fig. 1 is an explanatory diagram showing a method for producing a laminate according to embodiment 1. Fig. 2 is a cross-sectional view of the laminate according to embodiment 1. Fig. 3 is a schematic diagram illustrating a first film-forming step in embodiment 1.

[0013] As shown in FIG. 1, in the substrate preparation step, an amorphous glass substrate 1 is prepared as a substrate for the laminate 10 shown in FIG. 2 (step ST1). In the present disclosure, the substrate preparation step is defined as the first step. The amorphous glass substrate 1 has a glass transition temperature (Tg) of 720° C. or more and 810° C. or less. The coefficient of thermal expansion (CTE) of the amorphous glass substrate 1 is 3.5×10 -6 [1 / K] or more 4.0×10 -6 [1 / K] or less. The softening point of the amorphous glass substrate 1 is 950° C. or more and 1050° C. or less.

[0014] In the first film formation step (step ST2), as shown in Fig. 2, an AlN layer 2 is formed in direct contact with an amorphous glass substrate 1. In the present disclosure, the first film formation step is referred to as a second step. In the first film formation step (step ST2), the AlN layer 2 is formed as a thin film not by metal organic chemical vapor deposition (MOCVD) but by a sputtering apparatus 51 shown in Fig. 3. This increases the film formation speed of the AlN layer, and reduces the manufacturing cost of the laminate 10.

[0015] 3, an amorphous glass substrate 1 is attached to an anode 53 of a sputtering apparatus 51, and an Al target 55 is attached to a cathode 52 of the sputtering apparatus. The anode 53 and the cathode 52 are each connected to a power supply 54. The sputtering apparatus 51 closes an exhaust valve 59, and argon gas and nitrogen gas are enclosed in the sputtering apparatus 51 via an argon introduction valve and a nitrogen introduction valve.

[0016] In the first film formation process (step ST2), the AlN layer 2 is formed directly on the amorphous glass substrate 1 by magnetron sputtering at a film formation temperature of 400° C. or more and 600° C. or less. If the film formation temperature is lower than 400° C., the AlN layer 2 is unlikely to be c-axis oriented, and if the film formation temperature exceeds 600° C., the AlN layer 2 is unlikely to be c-axis oriented due to outgassing from the film formation chamber. Since the AlN layer 2 is formed at a temperature of 400° C. or more and 600° C. or less, the AlN layer 2 can be formed on the amorphous glass in a c-axis oriented state. Here, the coefficient of thermal expansion (CTE) of the formed AlN layer 2 is 4.2×10 -6 [1 / K] or more 5.3×10 -6 Even if the deposition temperature rises and the amorphous glass substrate 1 thermally expands, the coefficient of thermal expansion (CTE) of the amorphous glass substrate 1 is close to the coefficient of thermal expansion (CTE) of the AlN layer 2, so that mismatch in thermal expansion is unlikely to occur, and the AlN layer 2 is likely to be c-axis oriented.

[0017] The amorphous glass substrate 1 has a glass transition temperature (Tg) of 720°C or more and 810°C or less, and a softening point of 950°C or more and 1050°C or less. Since the deposition temperature is low, the stability of the amorphous glass substrate 1 during deposition can be maintained at a high level. If the amorphous glass substrate 1 has a glass transition temperature (Tg) lower than 720°C and a softening point lower than 950°C, the deposited AlN layer 2 is difficult to be c-axis oriented. If the amorphous glass substrate 1 has a glass transition temperature (Tg) higher than 810°C and a softening point higher than 1050°C, the deposition temperature can be set high, but the deposited AlN is difficult to be c-axis oriented.

[0018] The thickness of the amorphous glass substrate 1 is 0.4 mm or more and 1.0 mm or less. If the thickness of the amorphous glass substrate 1 is less than 0.4 mm, the amorphous glass substrate 1 tends to warp due to the film stress of the AlN layer 2 caused by the film formation temperature. If the thickness of the amorphous glass substrate 1 exceeds 1.0 mm, the substrate tends to become difficult to transport in the process after the film formation process of the AlN layer 2 when forming a semiconductor device, which is not preferable for reducing product costs and manufacturing costs. The film thickness of the AlN layer 2 is 20 nm or more and 400 nm or less. If the film thickness of the AlN layer 2 is less than 20 nm, it is difficult to achieve c-axis orientation. If the film thickness of the AlN layer exceeds 400 nm, the substrate is likely to warp due to the film stress of the AlN layer 2.

[0019] (Evaluation example) 4 is a table showing the evaluation results of the evaluation examples of embodiment 1. Substrates for example 1, example 2, example 3, comparative example 1, and comparative example 2 were prepared.

[0020] The composition of the substrate in Example 1 is alkaline earth aluminoborosilicate glass.

[0021] The composition of the substrate in Example 2 is non-alkali aluminosilicate glass.

[0022] The composition of the substrate in Example 3 is a non-alkali aluminosilicate glass different from that in Example 2.

[0023] Comparative Example 1 is a highly heat-resistant borosilicate crown glass called BK7.

[0024] Comparative Example 2 is quartz.

[0025] The thickness of the substrate is 0.50 mm in each of Example 1, Example 2, Example 3, Comparative Example 1, and Comparative Example 2. The glass transition temperature (Tg), coefficient of thermal expansion (CTE), softening point, and density of each of Example 1, Example 2, Example 3, Comparative Example 1, and Comparative Example 2 are shown in FIG.

[0026] The arithmetic mean roughness (Ra) of the substrate surfaces of Examples 1, 2, and 3 was measured and is shown in Figure 4. The arithmetic mean roughness (Ra) was measured by an atomic force microscope (AFM).

[0027] As shown in Examples 1 to 3, the arithmetic mean roughness (Ra) of the surface of the amorphous glass substrate 1 is 3 nm or less. If the arithmetic mean roughness (Ra) of the surface of the amorphous glass substrate 1 exceeds 3 nm, it is desirable to perform a polishing treatment.

[0028] On the surface of each of the substrates of Example 1, Example 2, Example 3, Comparative Example 1 and Comparative Example 2, a 200 nm AlN layer was formed at a film formation temperature of 500° C. by magnetron sputtering.

[0029] X-ray diffraction (XRD) measurement of the laminate 10 was performed for the laminates of Example 1, Example 2, Example 3, Comparative Example 1, and Comparative Example 2 on which the AlN layer was formed. FIG. 5 is a diagram showing the XRD spectrum of Example 1. FIG. 6 is a diagram showing the XRD spectrum of Example 1. FIG. 5 is an enlarged view of the vicinity of the rotation angle 2θ / ω 36 [deg] in FIG. 6. FIG. 7 is a diagram showing the XRD spectrum of Comparative Example 1. FIG. 8 is a diagram showing the XRD spectrum of Comparative Example 2. In the XRD spectra of FIG. 5 to FIG. 8, the vertical axis is the X-ray diffraction intensity (arbitrary unit) and the horizontal axis is the rotation angle 2θ [deg]. The XRD spectrum was measured using an X-ray diffractometer manufactured by Rigaku Corporation. The X-ray source used was CuKα characteristic X-rays (wavelength: 1.5418 Å), and the XRD spectrum was measured by X-ray diffraction measurement in 2θ-ω mode (or ω mode).The peak intensity at a rotation angle of 2θ / ω [deg] near 36 [deg] was estimated to be due to the c-axis orientation of the AlN layer, and is listed in Table 1.

[0030] 5 to 8, the vertical axis represents the X-ray diffraction intensity (arbitrary unit) and the horizontal axis represents the rotation angle 2θ [deg]. The XRD spectra were measured using an X-ray diffractometer manufactured by Rigaku Corporation.

[0031] It can be seen that the peak intensity near 36 [deg] shown in FIG. 5 is clearly greater than the peak intensity near 36 [deg] shown in FIGS.

[0032] 6, the substrate of Example 1 exhibits a broad XRD spectrum, and is therefore an amorphous glass substrate. Although not shown, the substrates of Examples 2 and 3 also exhibit broad XRD spectra, and are therefore amorphous glass substrates.

[0033] The peak intensity PI near 22 deg in the XRD spectrum shown in Figure 6 indicates the presence of a localized Si-O crystal structure. It was confirmed that the presence of this Si-O crystal structure facilitates the c-axis orientation of the AlN layer 2. The regular Si-O crystal structure present on the surface of the amorphous glass substrate 1 facilitates the c-axis orientation of the AlN layer 2.

[0034] (Embodiment 2) Fig. 9 is a cross-sectional view of a semiconductor device including the laminate according to embodiment 2. Fig. 10 is an explanatory diagram showing a method for manufacturing a semiconductor device including the laminate according to embodiment 2. In embodiment 2, the same configurations and steps as those in embodiment 1 are denoted by the same reference numerals, and detailed description thereof will be omitted. The semiconductor device 30 shown in Fig. 9 is an LED (Light Emitting Diode), which is a light emitting element.

[0035] 9, in the semiconductor device 30, the electrode 35 is electrically connected to the cathode, and the electrode 36 is electrically connected to the anode. The semiconductor device 30 is formed on the laminate 10 of the first embodiment. The semiconductor device 30 has a bonding layer 31, an n-type cladding layer 32, an emission layer 33, and a p-type cladding layer 34. In addition, the emission layer 33 has a multiple quantum well structure (MQW structure) in which well layers and barrier layers each consisting of several atomic layers are periodically laminated to improve efficiency.

[0036] 10, after the above-mentioned first film formation step (step ST2), a second film formation step is performed. In the second film formation step, a bonding layer 31 is formed on the AlN layer 2 (step ST3). The bonding layer 31 is an undoped GaN layer.

[0037] After the second film formation step (step ST3), a third film formation step is performed. In the third film formation step, an n-type cladding layer 32 made of gallium nitride (GaN) doped with silicon (Si) is formed on the bonding layer 31 (step ST4).

[0038] After the third film formation process (step ST4), a fourth film formation process is performed. In the fourth film formation process, a light emitting layer 33 is formed on the n-type cladding layer 32, in which multiple layers of indium gallium nitride (InxGa(1-x)N) and gallium nitride (GaN) are repeatedly stacked (step ST5).

[0039] After the fourth film formation step (step ST5), a fifth film formation step is performed in which a p-type cladding layer 34 made of gallium nitride (GaN) doped with magnesium (Mg) is formed on the n-type cladding layer 32 (step ST6).

[0040] After the fifth film formation step (step ST6), in a photolithography step (step ST7), patterning is performed by plasma etching or the like.

[0041] After the photolithography process (step ST7), an n-type electrode formation process is performed, in which an electrode 35 is formed from indium (In) (step ST8).

[0042] After the n-type electrode formation process (step ST8), a p-type electrode formation process is performed in which a palladium-gold alloy (PdAu) electrode 36 is formed (step ST9).

[0043] (Embodiment 3) Fig. 11 is a cross-sectional view of a semiconductor device including the laminate according to embodiment 3. Fig. 12 is an explanatory diagram showing a method for manufacturing a semiconductor device including the laminate according to embodiment 3. In embodiment 3, the same configurations and steps as those in embodiment 1 are denoted by the same reference numerals, and detailed description thereof will be omitted. The semiconductor device 40 shown in Fig. 11 is a HEMT (High Electron Mobility Transistor) device.

[0044] 11, a semiconductor device 40 has an electron transit layer 41, an electron supply layer 42, a barrier layer 43, a gate electrode 44, a source electrode 45, and a drain electrode 46. The gate electrode 44 sandwiched between the source electrode 45 and the drain electrode 46 forms a Schottky contact with the barrier layer 43.

[0045] 12, after the above-mentioned first film formation step (step ST2), a second film formation step is performed. In the second film formation step, an electron transit layer 41 is formed on the AlN layer 2 (step ST11). The electron transit layer 41 is an undoped GaN layer.

[0046] After the second film formation process (step ST11), a third film formation process is performed. In the third film formation process, an electron supply layer 42 is formed on the electron transit layer 41 (step ST12). The electron supply layer 42 is made of undoped indium gallium nitride (InxGa(1-x)N).

[0047] After the third film formation step (step ST12), a fourth film formation step is performed. In the fourth film formation step, a barrier layer 43 is formed on the electron supply layer 42 (step ST13). The barrier layer 43 is made of gallium nitride (GaN) doped with magnesium (Mg).

[0048] After the fourth film formation step (step ST13), a fifth film formation step is performed. In the fifth film formation step, the gate electrode 44 is formed on the barrier layer 43 (step ST14).

[0049] After the fifth film formation step (step ST14), in a photolithography step (step ST15), the shapes of the barrier layer 43 and the gate electrode 44 are patterned by plasma etching or the like.

[0050] After the photolithography process (step ST15), an electrode film forming process is performed in which metal layers that become the source electrode 45 and the drain electrode 46 are formed (step ST16).

[0051] After the electrode film forming step (step ST16), in a photolithography step (step ST17), the shape of the metal layer formed in the electrode film forming step (step ST16) is patterned by plasma etching or the like to form source electrode 45 and drain electrode 46.

[0052] Although the preferred embodiment of the present disclosure has been described above, the present disclosure is not limited to such an embodiment. The contents disclosed in the embodiment are merely examples, and various modifications are possible within the scope of the present disclosure. Appropriate modifications made within the scope of the present disclosure naturally belong to the technical scope of the present disclosure. At least one of various omissions, substitutions, and modifications of components can be made within the scope of the gist of each of the above-mentioned embodiments and each modified example. [Explanation of symbols]

[0053] 1. Amorphous glass substrate 2 AlN layer 2θ rotation angle 10 Laminate 30 Semiconductor Devices 31 Bonding layer 32 n-type cladding layer 33 Light-emitting layer 34 p-type cladding layer 35 electrodes 36 electrodes 40 Semiconductor Devices 41 Electron transport layer 42 Electron supply layer 43 Barrier Layer 44 Gate electrode 45 Source electrode 46 Drain electrode 51 Sputtering Equipment 52 Cathode 53 Anode 54 Power supply 55Al target 59 Exhaust valve

Claims

1. an amorphous glass substrate; an AlN layer formed on the amorphous glass substrate; the AlN layer is c-axis oriented on the amorphous glass substrate; The glass transition temperature (Tg) of the amorphous glass substrate is 720° C. or more and 810° C. or less; The coefficient of thermal expansion (CTE) of the amorphous glass substrate is 3.5×10 －６ [1 / K] or more 4.0×10 －６ [1 / K] or less, The softening point of the amorphous glass substrate is 950° C. or higher and 1050° C. or lower.

2. The laminate according to claim 1 , wherein the amorphous glass substrate has a surface having an arithmetic mean roughness (Ra) of 3 nm or less.

3. 2. The laminate according to claim 1, wherein the amorphous glass substrate has a Si--O crystal structure locally present.

4. The laminate according to claim 1 , wherein the AlN layer is a thin film formed on the amorphous glass substrate.

5. The laminate according to claim 4 , wherein the AlN layer is formed on the amorphous glass substrate at a film formation temperature of 400° C. or more and 600° C. or less.

6. The laminate according to claim 5 , wherein the AlN layer has a thickness of 20 nm or more and 400 nm or less.

7. The laminate of claim 6 , wherein the AlN layer is in direct contact with the amorphous glass substrate.

8. 8. The laminate according to claim 1, wherein the amorphous glass substrate has a thickness of 0.4 mm or more and 1.0 mm or less.

9. Glass transition temperature (Tg) is 720°C or higher and 810°C or lower, and coefficient of thermal expansion (CTE) is 3.5 x 10 －６ [1 / K] or more 4.0×10 －６ A first step of preparing an amorphous glass substrate having a softening point of 950° C. or more and 1050° C. or less; A second step of forming an AlN layer on the amorphous glass substrate at a film formation temperature of 400° C. or more and 600° C. or less. A method for manufacturing a laminate.

10. 10. The method for manufacturing a laminate according to claim 9, wherein in the second step, the AlN layer is formed on the amorphous glass substrate so as to have a c-axis orientation and a thickness of 20 nm to 400 nm.

11. The method for manufacturing a laminate according to claim 10 , wherein the AlN layer is formed on the amorphous glass substrate by sputtering.

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