Optical Sensor

Abstract

To provide a light sensor capable of transferring an electric charge at a high speed even if it has a large light-receiving region.SOLUTION: A light sensor 1 comprises: an electric charge generation region 29 for generating an electric charge in accordance with incident light; an electric charge collection region 33 to which the electric charge thus generated in the electric charge generation region 29 is transferred; and at least one transfer gate electrode 41 which is disposed on a transfer area 35 located between the electric charge generation region 29 and the electric charge collection region 33. The electric charge generation region 29 includes: an avalanche multiplication region 23 for causing avalanche multiplication; and a ramp potential formation region 59 for forming, in the electric charge generation region 29, a ramp potential whose potential is ramped down toward the transfer area 35.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to an optical sensor. [Background technology]

[0002] There is known an optical sensor that includes a charge generation region that generates charges in response to incident light, a charge collection region to which the charges generated in the charge generation region are transferred, and a transfer gate electrode disposed on a region between the charge generation region and the charge collection region (see, for example, Patent Document 1). In such an optical sensor, charges can be transferred from the charge generation region to the charge collection region at high speed. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2015-5752 A Summary of the Invention [Problem to be solved by the invention]

[0004] In some cases, the above-described optical sensor requires a larger area for the charge generation region in order to expand the light receiving region. However, if the area of ​​the charge generation region is large, it may take time for charges to move within the charge generation region, which may slow down the transfer of charges from the charge generation region to the charge collection region.

[0005] An object of the present invention is to provide an optical sensor capable of transferring charges at high speed even when the area of ​​the light receiving region is large. [Means for solving the problem]

[0006] The optical sensor of the present invention comprises a charge generation region that generates charges in response to incident light, a charge collection region to which the charges generated in the charge generation region are transferred, and at least one transfer gate electrode arranged on a transfer region between the charge generation region and the charge collection region, and the charge generation region includes an avalanche multiplication region that generates avalanche multiplication, and a gradient potential forming region that forms a gradient potential in the charge generation region such that the potential becomes lower approaching the transfer region.

[0007] In this optical sensor, the charge generation region includes an avalanche multiplication region that generates avalanche multiplication. This allows avalanche multiplication to occur in the charge generation region, thereby achieving high sensitivity. The charge generation region also includes a gradient potential forming region that forms a gradient potential in the charge generation region such that the potential becomes lower as the charge approaches the transfer region. This allows a gradient potential to be formed in the charge generation region such that the potential becomes lower as the charge approaches the transfer region, thereby increasing the movement speed of charges in the charge generation region. Therefore, this optical sensor allows charges to be transferred at high speed even when the area of ​​the light receiving region is large.

[0008] At least one of the transfer gate electrodes may include a first transfer gate electrode and a second transfer gate electrode disposed on the charge generating region side of the first transfer gate electrode, which makes it possible to suppress noise generation and expand the dynamic range, as described later.

[0009] In a charge transfer process for transferring charges generated in the charge generation region to the charge collection region, potentials may be applied to the first transfer gate electrode and the second transfer gate electrode so that a first potential, which is the potential of the region immediately below the first transfer gate electrode, and a second potential, which is the potential of the region immediately below the second transfer gate electrode, become higher than the potential of the boundary between the charge generation region and the transfer region after becoming equal to or lower than the potential of the boundary. In this case, charges can be transferred at high speed from the charge generation region to the charge collection region using the first transfer gate electrode and the second transfer gate electrode, and charges can be prevented from moving from the charge generation region to the charge collection region after the charge transfer.

[0010] In the charge transfer process, potentials may be applied to the first transfer gate electrode and the second transfer gate electrode so that the second potential is higher than the first potential. In this case, it is possible to prevent the charge from returning from the region immediately below the first transfer gate electrode to the charge generation region, thereby suppressing the generation of noise. In addition, it is possible to increase the amount of charge readout by utilizing the capacitance of the region immediately below the first transfer gate electrode, thereby widening the dynamic range.

[0011] In a state in which the potential of the first transfer gate electrode and the potential of the second transfer gate electrode are equal to each other, the second potential may be higher than the first potential. In this case, the second potential can be made higher than the first potential by applying the same potential to the first transfer gate electrode and the second transfer gate electrode. As a result, the configuration for applying the potential can be simplified compared to the case in which the second potential is made higher than the first potential by applying potentials of different magnitudes to the first transfer gate electrode and the second transfer gate electrode.

[0012] The transfer region may include a potential adjustment layer for making the second potential higher than the first potential. In this case, the potential adjustment layer can make the second potential higher than the first potential.

[0013] In a state in which the first potential and the second potential in the charge transfer process are equal to or lower than the potential of the boundary portion, the second potential may be equal to the potential of the boundary portion and the first potential may be lower than the potential of the boundary portion. In this case, it is possible to suppress accumulation of charges in the region immediately below the second transfer gate electrode, and to suppress generation of noise caused by charges returning from the region immediately below the second transfer gate electrode to the charge generation region.

[0014] In the charge transfer process, from a state in which the first potential and the second potential are equal to or lower than the potential of the boundary portion, the second potential may become higher than the potential of the boundary portion, and then the first potential may become higher than the potential of the boundary portion. In this case, it is possible to reliably prevent the charges from returning from the region directly below the first transfer gate electrode to the charge generating region, and therefore it is possible to reliably prevent the generation of noise.

[0015] The avalanche multiplication region is formed in a layer shape along a predetermined plane, and the side where the transfer gate electrode is located relative to the avalanche multiplication region in a direction perpendicular to the plane is defined as a first side, and the opposite side to the first side is defined as a second side, and the gradient potential forming region may be located on the first side relative to the avalanche multiplication region. In this case, the proportion of charges present in the region close to the transfer gate electrode increases, and it becomes possible to transfer the charges at a higher speed. In addition, it becomes possible to transfer the charges at a higher speed by forming the gradient potential near the transfer gate electrode.

[0016] The gradient potential forming region may include a plurality of semiconductor regions arranged so that the impurity concentration increases toward the transfer region, in which case a gradient potential can be suitably formed in the charge generating region.

[0017] The gradient potential forming region may include a first semiconductor region including a first portion and a second portion, and a second semiconductor region having a higher impurity concentration than the first semiconductor region, disposed between the first portion and the second portion, and having a width that increases toward the transfer region. In this case, a gradient potential can be suitably formed in the charge generating region.

[0018] The avalanche multiplication region is formed in a layer shape along a predetermined plane, and the side where the transfer gate electrode is located relative to the avalanche multiplication region in a direction perpendicular to the plane is defined as a first side, and the opposite side to the first side is defined as a second side, and the gradient potential forming region may be located on the second side relative to the avalanche multiplication region. In this case, since restrictions on the gradient height of the gradient potential are unlikely to occur, the gradient of the gradient potential can be made large, and charges can be transferred at a higher speed. In addition, since the charges collected by the gradient potential are multiplied in the avalanche multiplication region, the location where multiplication occurs can be limited, and the uniformity of multiplication can be improved.

[0019] The gradient potential forming region may include a first semiconductor layer and a second semiconductor layer located on a second side of the first semiconductor layer, and a step portion may be formed between the first semiconductor layer and the second semiconductor layer, thereby forming the gradient potential. In this case, the gradient potential can be suitably formed in the charge generating region.

[0020] A through hole may be formed in the first semiconductor layer, and the through hole may overlap a boundary portion of the charge generation region with the transfer region in a direction perpendicular to the plane, in which case the charges guided by the gradient potential can be collected at the boundary portion of the charge generation region with the transfer region.

[0021] The charge generating region may have a buried photodiode structure, in which case generation of dark current in the charge generating region can be suppressed. Effect of the Invention

[0022] According to the present invention, it is possible to provide an optical sensor capable of transferring charges at high speed even when the area of ​​the light receiving region is large. [Brief description of the drawings]

[0023] [Figure 1] 1 is a configuration diagram of a light detection device according to an embodiment. [Diagram 2] FIG. 2 is a cross-sectional view taken along line II-II in FIG. [Diagram 3] 5(a) and 5(b) are potential distribution diagrams for explaining an example of the operation of the optical sensor. [Figure 4] 5(a) and 5(b) are potential distribution diagrams for explaining an example of the operation of the optical sensor. [Diagram 5] FIG. 13 is a potential distribution diagram for explaining an example of operation of the optical sensor according to the first modified example. [Figure 6] FIG. 13 is a plan view of an optical sensor according to a second modified example. [Figure 7] FIG. 13 is a cross-sectional view of an optical sensor according to a third modified example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0024] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. In the following description, the same or corresponding elements are designated by the same reference numerals, and duplicated description will be omitted. [Photodetector]

[0025] 1, the light detection device 100 includes a light sensor (image sensor) 1 and a control unit 70. The control unit 70 controls the light sensor 1. The control unit 70 is configured, for example, by an on-chip integrated circuit mounted on a semiconductor substrate that constitutes the light sensor 1, but may be configured separately from the light sensor 1.

[0026] As shown in FIG. 1 and FIG. 2, the optical sensor 1 includes a semiconductor layer 2, an electrode layer 4, and a protective layer 6. The semiconductor layer 2 has a first surface 2a and a second surface 2b. The second surface 2b is a surface opposite to the first surface 2a. The optical sensor 1 includes a plurality of pixels 10 arranged along the first surface 2a. The plurality of pixels 10 are, for example, two-dimensionally arranged along the first surface 2a. Hereinafter, the thickness direction of the semiconductor layer 2 is referred to as the Z direction, one direction perpendicular to the Z direction is referred to as the X direction, and a direction perpendicular to both the Z direction and the X direction is referred to as the Y direction. In addition, one side in the Z direction is referred to as the first side, and the other side in the Z direction (opposite to the first side) is referred to as the second side. In FIG. 1, some configurations (such as a part of the electrode layer 4 and the protective layer 6) are omitted from the illustration.

[0027] Each pixel 10 has a semiconductor region 21, a semiconductor region 22, an avalanche multiplication region 23, a charge accumulation region 24, an intervening region 25, well regions 31 and 32, a charge collection region 33, and a channel region 34 in the semiconductor layer 2. Each of the regions 21 to 26 and 31 to 34 is formed by carrying out various processes (e.g., etching, film formation, impurity injection, etc.) on a semiconductor substrate (e.g., a silicon substrate).

[0028] The semiconductor region 21 is a p-type (first conductivity type) region, and is formed in a layer shape along the second surface 2b of the semiconductor layer 2. The carrier concentration of the semiconductor region 21 is higher than the carrier concentration of the semiconductor region 22. It is desirable that the thickness of the semiconductor region 21 is as thin as possible. As an example, the semiconductor region 21 has a carrier concentration of 1×10 16 cm -3 It is a p-type region having the above carrier concentration (impurity concentration), and its thickness is about 1 μm. Note that the semiconductor region 21 may be formed by accumulation using a transparent electrode formed on the second surface 2b via an insulating film.

[0029] The semiconductor region 22 is a p-type region, is formed in a layer shape in the semiconductor layer 2, and is located on the first side with respect to the semiconductor region 21. As an example, the semiconductor region 22 has a dopant concentration of 1×10 15 cm -3The p-type region has a carrier concentration of 2 μm or more, and its thickness is, for example, about 10 μm.

[0030] The avalanche multiplication region 23 includes a first multiplication region 23a and a second multiplication region 23b. The first multiplication region 23a is a p-type region, is formed in a layer shape in the semiconductor layer 2, and is located on the first side with respect to the semiconductor region 22. As an example, the first multiplication region 23a has a dopant concentration of 1×10 16 cm -3 The second multiplication region 23b is a p-type region having a carrier concentration of 1×10 or more and a thickness of about 1 μm. The second multiplication region 23b is an n-type (second conductivity type) region, formed in a layer shape in the semiconductor layer 2, and located on the first side with respect to the first multiplication region 23a. As an example, the second multiplication region 23b has a carrier concentration of 1×10 16 cm -3 It is an n-type region having a carrier concentration of 1 μm or more, and its thickness is about 1 μm. The first multiplication region 23a and the second multiplication region 23b form a pn junction. The avalanche multiplication region 23 is a region that causes avalanche multiplication.

[0031] The charge accumulation region 24 is an n-type region, formed in a layer shape in the semiconductor layer 2, and located on the first side with respect to the avalanche multiplication region 23. As an example, the thickness of the charge accumulation region 24 is about 1 μm. Details of the charge accumulation region 24 will be described later.

[0032] The intermediate region 25 is a p-type region, which is formed in a layer shape along the first surface 2a in the semiconductor layer 2, and is located on the first side with respect to the charge accumulation region 24. In other words, the intermediate region 25 has a different conductivity type from the charge accumulation region 24. The semiconductor region 21, the semiconductor region 22, the first multiplication region 23a, the second multiplication region 23b, the charge accumulation region 24, and the intermediate region 25 are formed in a layer shape along the XY plane (a plane perpendicular to the Z direction), and are arranged in this order along the Z direction. As an example, the intermediate region 25 has a capacitance of 1×10 15 cm -3 The p-type region has a carrier concentration of 1000 or more and a thickness of about 0.2 μm.

[0033] The charge accumulation region 24 and the intermediate region 25 form a pn junction and configure a buried photodiode. That is, the charge generation region 29 has a buried photodiode structure. The semiconductor regions 21 and 22, the avalanche multiplication region 23, the charge accumulation region 24, and the intermediate region 25 function as a charge generation region (light absorption region, photoelectric conversion region) 29 that generates charges in response to incident light. In other words, the charge generation region 29 includes the semiconductor regions 21 and 22, the avalanche multiplication region 23, the charge accumulation region 24, and the intermediate region 25.

[0034] The well regions 31 and 32 are p-type regions and are formed in layers along the first surface 2a of the semiconductor layer 2. The well regions 31 and 32 are located on the first side with respect to the avalanche multiplication region 23. The well region 31 is disposed so as to be adjacent to the charge accumulation region 24 and the intermediate region 25 in the X direction. The well region 32 is disposed so as to surround the charge accumulation region 24, the intermediate region 25, and the well region 31 when viewed from the Z direction. As an example, the well regions 31 and 32 have a capacitance of 1×10 16 ~5×10 17 cm -3 The well regions 31 and 32 are p-type regions having a carrier concentration of about 1 μm, and have a thickness of about 1 μm. The well regions 31 and 32 constitute a plurality of readout circuits (e.g., a source follower amplifier, a reset transistor, etc.). The plurality of readout circuits are electrically connected to the charge collecting region 33.

[0035] A charge collecting region 33 and a channel region 34 are formed in the well regions 31 and 32. The charge collecting region 33 is an n-type region, and is formed in a layer shape along the first surface 2a of the semiconductor layer 2, and is disposed at the boundary between the well regions 31 and 32. As an example, the charge collecting region 33 has a size of 1×10 18 cm -3The charge collecting region 33 is an n-type region having a carrier concentration of 0.1 μm or more, and its thickness is about 0.2 μm. The charge collecting region 33 functions as a floating diffusion. The channel region 34 is an n-type region, and is formed in a layer shape along the first surface 2a in the semiconductor layer 2, and is disposed in the well region 32. The intervening region 25, the charge collecting region 33, and the channel region 34 are arranged in this order along the X direction. In the example of FIG. 1, the width (length along the Y direction) of the charge collecting region 33 is smaller than the width (length along the Y direction) of the fourth region 54, but the width of the charge collecting region 33 may be approximately the same as the width of the fourth region 54. In this case, charges are transferred smoothly through a transfer path of the same width.

[0036] The electrode layer 4 is provided on the first surface 2a of the semiconductor layer 2. Each pixel 10 has a transfer gate electrode 41 and an exhaust gate electrode 42 in the electrode layer 4. The transfer gate electrode 41 and the exhaust gate electrode 42 are formed in the electrode layer 4 and disposed on the first surface 2a of the semiconductor layer 2 via an insulating layer 49. The insulating layer 49 is, for example, a silicon nitride film, a silicon oxide film, or the like. The transfer gate electrode 41 and the exhaust gate electrode 42 are formed of, for example, polysilicon.

[0037] The transfer gate electrode 41 is disposed on a transfer region 35 between the intermediate region 25 and the charge collecting region 33 in the well region 31. The transfer region 35 is a region directly below the transfer gate electrode 41. The transfer gate electrode 41 has a first transfer gate electrode 43 and a second transfer gate electrode 44. The second transfer gate electrode 44 is disposed on the intermediate region 25 side with respect to the first transfer gate electrode 43. In this specification, the term "region directly below a certain electrode" refers to a region overlapping with the electrode in the Z direction.

[0038] The second transfer gate electrode 44 is formed so as to ride up on the first transfer gate electrode 43, and has a ride-up portion 44a disposed on the first transfer gate electrode 43. An insulating layer 45 is formed on the surface of the first transfer gate electrode 43, and the first transfer gate electrode 43 is electrically isolated from the second transfer gate electrode 44 by the insulating layer 45. When viewed from the Z direction, each of the first transfer gate electrode 43 and the second transfer gate electrode 44 has a rectangular shape with long sides parallel to the Y direction.

[0039] A potential adjustment layer 36 is formed in the transfer region 35. The potential adjustment layer 36 is disposed so as to overlap with the second transfer gate electrode 44 in the Z direction, and is adjacent to the intermediate region 25 in the X direction. As an example, the potential adjustment layer 36 has a thickness of 1×10 15 ~1×10 18 cm -3 It is a P-type region having a carrier concentration of about 1000 nm and a thickness of about 0.1 μm.

[0040] Due to the formation of the potential adjustment layer 36, as shown in Fig. 3(a), the second potential φ44, which is the potential of the region immediately below the second transfer gate electrode 44, is higher than the first potential φ43, which is the potential of the region immediately below the first transfer gate electrode 43. Fig. 3(a) shows a potential distribution diagram along the X direction. In the state shown in Fig. 3(a), the potential of the first transfer gate electrode 43 and the potential of the second transfer gate electrode 44 are equal to each other.

[0041] The exhaust gate electrode 42 is disposed on a region between the charge collecting region 33 and the channel region 34 in the well region 32. The exhaust gate electrode 42 has, for example, a rectangular shape having two sides facing each other in the X direction and two sides facing each other in the Y direction. The electrode layer 4 is covered with a protective layer 6. The protective layer 6 is, for example, an insulating layer such as a BPSG (Boro-phospho silicate glass) film.

[0042] As shown in FIGS. 1 and 2, the charge accumulation region 24 has a first region 51, a second region 52, a third region 53, and a fourth region 54. Each of the regions 51 to 54 is an n-type region. The impurity concentrations of the regions 51 to 54 increase in the order of the first region 51, the second region 52, the third region 53, and the fourth region 54. That is, the second region 52 has a higher impurity concentration than the first region 51, the third region 53 has a higher impurity concentration than the second region 52, and the fourth region 54 has a higher impurity concentration than the third region 53. The impurity concentration of the first region 51 is 1×10 13 ~1×10 16 cm -3 The impurity concentrations of the second region 52, the third region 53, and the fourth region 54 are about 1×10 16 ~1×10 19 cm -3 The first region 51 may be a p-type region. Even in this case, a depletion layer generated between the second region 52, the third region 53, and the fourth region 54 increases the potential in a part of the first region 51, allowing electric charges to be accumulated.

[0043] The first region 51 has a rectangular shape when viewed from the Z direction. The second region 52, the third region 53, and the fourth region 54 are arranged in this order along the X direction. The fourth region 54 is adjacent to the transfer region 35 in the X direction. That is, the second region 52, the third region 53, and the fourth region 54 are arranged so that the impurity concentration increases toward the transfer region 35. When viewed from the Z direction, the second region 52, the third region 53, the fourth region 54, the second transfer gate electrode 44, the first transfer gate electrode 43, and the charge collecting region 33 are arranged in this order along the X direction. The second region 52, the third region 53, and the fourth region 54 are arranged between the first portion 51a and the second portion 51b of the first region 51 in the Y direction.

[0044] When viewed from the Z direction, the width (length along the Y direction) W1 of the region defined by the second region 52, the third region 53, and the fourth region 54 increases continuously toward the transfer region 35. When viewed from the Z direction, each of the second region 52, the third region 53, and the fourth region 54 has a trapezoidal shape. The width W1 increases linearly in each of the second region 52, the third region 53, and the fourth region 54. The width W1 is continuous at each of the boundaries between the second region 52 and the third region 53 and between the third region 53 and the fourth region 54.

[0045] Since the charge storage region 24 has the first region 51, the second region 52, the third region 53, and the fourth region 54, as shown in FIG. 3 and FIG. 4, a gradient potential A is formed in the charge storage region 24 such that the potential becomes lower as the charge storage region 24 approaches the transfer region 35. FIG. 3 and FIG. 4 show potential distribution diagrams along the X direction. In this example, the potential φ24 of the charge storage region 24 decreases linearly as the charge storage region 24 approaches the transfer region 35. In this manner, the first region 51, the second region 52, the third region 53, and the fourth region 54 (charge storage region 24) function as a gradient potential forming region 59 that forms the gradient potential A. The gradient potential forming region 59 is located on a first side with respect to the avalanche multiplication region 23 in the Z direction. The first side is the side where the transfer gate electrode 41 is located with respect to the avalanche multiplication region 23 in the Z direction. [Light detection method]

[0046] 3 and 4, an example of the light detection operation by the optical sensor 1 will be described. The following operation is realized by the control unit 70 controlling the optical sensor 1. More specifically, the operation of the optical sensor 1 is realized by the control unit 70 controlling the voltages applied to the transfer gate electrode 41 and the exhaust gate electrode 42. Below, the operation will be described focusing on one pixel 10, but the operation of the other pixels 10 is similar.

[0047] First, a charge accumulation process is performed to accumulate charges in the charge accumulation region 24. In the charge accumulation process, a negative voltage (e.g., −50 V) is applied to the semiconductor region 21 with respect to the potential of the intermediate region 25. In other words, a reverse bias is applied to the pn junction formed in the avalanche multiplication region 23. As a result, a charge of 3×10 5 ~4×10 5 An electric field strength of V / cm is generated. In this state, when light is incident on the semiconductor layer 2 from the second surface 2b, electrons (charges) are generated in the semiconductor regions 21, 22 due to absorption of the light. The generated charges are multiplied in the avalanche multiplication region 23 and move to the charge accumulation region 24. In the optical sensor 1, the region of the charge generation region 29 that overlaps with the charge accumulation region 24 in the Z direction functions as the light receiving region. Note that the intermediate region 25 is electrically connected to a ground electrode and is grounded.

[0048] 3(a), the charge that has moved to the charge accumulation region 24 is accumulated in the charge accumulation region 24. As described above, a gradient potential A is formed in the charge accumulation region 24 such that the potential becomes lower as the charge approaches the transfer region 35. Therefore, the charge moves at high speed within the charge accumulation region 24 toward the transfer region 35.

[0049] During the charge accumulation process, potentials are applied to the first transfer gate electrode 43 and the second transfer gate electrode 44 so that the first potential φ43 in the region directly below the first transfer gate electrode 43 and the second potential φ44 in the region directly below the second transfer gate electrode 44 are higher than the potential Pa at the lower end of the gradient potential A. The potential Pa at the lower end of the gradient potential A corresponds to the potential at the boundary between the charge accumulation region 24 and the transfer region 35. As a result, the charges do not move from the charge accumulation region 24 to the charge collection region 33, but are accumulated in the charge accumulation region 24.

[0050] In this example, the control unit 70 controls the voltage applied to the first transfer gate electrode 43 and the second transfer gate electrode 44 in two stages, on and off. During the charge accumulation process, the voltage applied to the first transfer gate electrode 43 and the second transfer gate electrode 44 is turned off. The off voltage applied to the first transfer gate electrode 43 is equal to the off voltage applied to the second transfer gate electrode 44, and is, for example, 0 V. As shown in FIG. 3(a), in a state in which the voltages applied to the first transfer gate electrode 43 and the second transfer gate electrode 44 are off, the second potential φ44 is higher than the first potential φ43. Note that, as shown in FIG. 3(a), at the start of the charge accumulation process, a certain amount of charge B remains in the charge collecting region 33 and the channel region 34. The charge B is a charge remaining in the charge collecting region 33 and the channel region 34 during a reset process described later.

[0051] Then, a charge transfer process is performed to transfer the charges to the charge collecting region 33. In the charge transfer process, potentials are applied to the first transfer gate electrode 43 and the second transfer gate electrode 44 so that the first potential φ43 and the second potential φ44 become higher than the potential Pa at the lower end of the gradient potential A after becoming equal to or lower than the potential Pa.

[0052] More specifically, first, as shown in FIG. 3(b), the voltage applied to the first transfer gate electrode 43 and the second transfer gate electrode 44 is turned on, and the first potential φ43 and the second potential φ44 become equal to or lower than the potential Pa at the lower end of the gradient potential A. In this state, the second potential φ44 is equal to the potential Pa, and the first potential φ43 is lower than the potential Pa. As a result, the charge stored in the charge storage region 24 moves to the region directly below the first transfer gate electrode 43 and the charge collecting region 33. No charge is stored in the region directly below the second transfer gate electrode 44. In the state shown in FIG. 3(b), the first potential φ43 is equal to the potential φ33 of the charge collecting region 33. Note that the potential φ33 of the charge collecting region 33 and the potential φ34 of the channel region 34 are lower than the potential Pa.

[0053] In this example, the on-voltages of the first transfer gate electrode 43 and the second transfer gate electrode 44 are equal to each other. As shown in Fig. 3(b), in a state in which the voltages applied to the first transfer gate electrode 43 and the second transfer gate electrode 44 are on, the second potential φ44 is higher than the first potential φ43.

[0054] 4(a), while the voltage applied to the first transfer gate electrode 43 is kept on, the voltage applied to the second transfer gate electrode 44 is turned off, and the second potential φ44 becomes higher than the potential Pa at the lower end of the gradient potential A. At this time, since no charge is stored in the region directly below the second transfer gate electrode 44, no charge transfer occurs.

[0055] 4(b), the voltage applied to the first transfer gate electrode 43 is turned off, and the first potential φ43 becomes higher than the potential Pa at the lower end of the gradient potential A. As a result, the charge stored in the region directly below the first transfer gate electrode 43 moves to the charge collecting region 33. In this manner, in the charge transfer process, from a state in which the first potential φ43 and the second potential φ44 are equal to or lower than the potential Pa (FIG. 3(b)), the second potential φ44 becomes higher than the potential Pa (FIG. 4(a)), and then the first potential φ43 becomes higher than the potential Pa (FIG. 4(b)).

[0056] 3(b), 4(a), and 4(b), the second potential φ44 is higher than the first potential φ43. This makes it possible to suppress the charge from returning from the region directly below the first transfer gate electrode 43 to the charge accumulation region 24.

[0057] Next, a read process is performed to read out the charges accumulated in the charge collecting region 33. The charges accumulated in the charge collecting region 33 are read out by the read circuit described above. Next, a reset process is performed to reset the charge collecting region 33. In the reset process, the potential of the exhaust gate electrode 42 is controlled so that the potential φ42 of the region directly below the exhaust gate electrode 42 is lowered. As a result, the charges in the charge collecting region 33 are discharged to the outside via the channel region 34, and the charge collecting region 33 is reset. After the reset process is completed, the potential φ42 is returned to its original state. [Action and Effects]

[0058] In the optical sensor 1, the charge generation region 29 includes the avalanche multiplication region 23 that generates avalanche multiplication. This allows avalanche multiplication to occur in the charge generation region 29, and high sensitivity can be achieved. The charge generation region 29 also includes a gradient potential forming region 59 that forms in the charge generation region 29 a gradient potential A that is inclined so that the potential becomes lower as the charge generation region approaches the transfer region 35. This allows a gradient potential A that is inclined so that the potential becomes lower as the charge generation region approaches the transfer region 35 to be formed in the charge generation region 29, and the movement speed of the charges in the charge generation region 29 can be increased. Therefore, according to the optical sensor 1, charges can be transferred at high speed even when the area of ​​the light receiving region is large.

[0059] The photosensor 1 includes a first transfer gate electrode 43 and a second transfer gate electrode 44 disposed on the charge generating region 29 side with respect to the first transfer gate electrode 43. This makes it possible to suppress noise generation and expand the dynamic range, as described later.

[0060] In a charge transfer process for transferring charges generated in the charge generation region 29 to the charge collection region 33, a potential is applied to the first transfer gate electrode 43 and the second transfer gate electrode 44 so that the first potential φ43, which is the potential of the region immediately below the first transfer gate electrode 43, and the second potential φ44, which is the potential of the region immediately below the second transfer gate electrode 44, become higher than the potential Pa after becoming equal to or lower than the potential Pa (the potential of the boundary between the charge generation region 29 and the transfer region 35). This makes it possible to transfer charges from the charge generation region 29 to the charge collection region 33 at high speed using the first transfer gate electrode 43 and the second transfer gate electrode 44, and also makes it possible to suppress the movement of charges from the charge generation region 29 to the charge collection region 33 after the charge transfer.

[0061] In the charge transfer process, a potential is applied to the first transfer gate electrode 43 and the second transfer gate electrode 44 so that the second potential φ44 is higher than the first potential φ43. This makes it possible to prevent the charge from returning from the region directly below the first transfer gate electrode 43 to the charge accumulation region 24 (charge generation region 29), thereby making it possible to suppress the generation of noise. In addition, the amount of charge readout can be increased by utilizing the capacitance of the region directly below the first transfer gate electrode 43, thereby making it possible to widen the dynamic range.

[0062] This point will be further described with reference to FIG. 5. FIG. 5 is a potential distribution diagram for explaining an operation example of the photosensor according to the first modification. The transfer gate electrode 41A of the first modification is composed of only a single electrode. In the first modification, too, charge transfer can be performed by applying a potential to the transfer gate electrode 41A so that the potential φ41A, which is the potential of the region directly below the transfer gate electrode 41A, becomes higher than the potential Pa at the lower end of the gradient potential A after it becomes equal to or lower than the potential Pa. Therefore, similar to the above embodiment, high sensitivity can be achieved, and charges can be transferred at high speed even when the area of ​​the light receiving region is large.

[0063] However, in the first modified example, as shown in Fig. 5, the amount of charge read out corresponds to the difference DF between the potential Pa at the lower end of the gradient potential A and the potential φ33 of the charge collecting region 33. On the other hand, in the above embodiment, the capacitance of the region directly below the first transfer gate electrode 43 can be used as the amount of charge read out, so that the amount of charge read out is larger by the capacitance of the region directly below the first transfer gate electrode 43 as shown by the arrows AR in Figs. 4(a) and 4(b) compared to the first modified example. In this way, according to the above embodiment, the amount of charge read out can be increased by utilizing the capacitance of the region directly below the first transfer gate electrode 43, and the dynamic range can be expanded.

[0064] In a state in which the potential of the first transfer gate electrode 43 and the potential of the second transfer gate electrode 44 are equal to each other, the second potential φ44 is higher than the first potential φ43. This makes it possible to make the second potential φ44 higher than the first potential φ43 by applying the same potential to the first transfer gate electrode 43 and the second transfer gate electrode 44. As a result, the configuration for applying the potential can be simplified compared to the case in which the second potential φ44 is made higher than the first potential φ43 by applying potentials of different magnitudes to the first transfer gate electrode 43 and the second transfer gate electrode 44, for example.

[0065] The transfer region 35 includes a potential adjustment layer 36 for making the second potential φ44 higher than the first potential φ43. This allows the potential adjustment layer 36 to make the second potential φ44 higher than the first potential φ43.

[0066] In a state in which the first potential φ43 and the second potential φ44 in the charge transfer process are equal to or lower than the potential Pa at the lower end of the gradient potential A, the second potential φ44 is equal to the potential Pa, and the first potential φ43 is lower than the potential Pa. This makes it possible to suppress the accumulation of charges in the region directly below the second transfer gate electrode 44, and to suppress the generation of noise caused by charges returning from the region directly below the second transfer gate electrode 44 to the charge accumulation region 24 (charge generation region 29).

[0067] In the charge transfer process, from a state in which the first potential φ43 and the second potential φ44 are equal to or lower than the potential Pa at the lower end of the gradient potential A, the second potential φ44 becomes higher than the potential Pa, and then the first potential φ43 becomes higher than the potential Pa. This makes it possible to reliably prevent the charges from returning from the region directly below the first transfer gate electrode 43 to the charge accumulation region 24 (charge generation region 29), and to reliably suppress the occurrence of noise. This is because the potential barrier between the region directly below the first transfer gate electrode 43 and the charge accumulation region 24 can be made higher than when the first potential φ43 and the second potential φ44 are simultaneously made higher.

[0068] When the charge generation region 29 is configured to include the avalanche multiplication region 23 and the gradient potential A is formed in the charge generation region 29, it is difficult to ensure the gradient height of the gradient potential A for the following reasons. First, in order to increase the gradient height, it is possible to increase the potential Pb at the upper end of the gradient potential A. However, in order to prevent a short circuit from occurring between the intervening region 25 and the semiconductor region 21, the potential Pb needs to be lower than the punch-through line PL shown in FIG. 5. In addition, in order to increase the potential Pb, the potential at the upper end of the gradient potential A needs to be lowered. In that case, there is a risk of a leak current occurring between the intervening region 25 and the semiconductor region 21 at the upper end of the gradient potential A. Therefore, there is a limit to increasing the potential Pb. In addition, since the reverse bias voltage is low at the upper end of the gradient potential A where the potential is low, there is a risk of the multiplication factor decreasing in the part of the avalanche multiplication region 23 corresponding to the upper end of the gradient potential A.

[0069] Secondly, in order to increase the gradient height, it is possible to lower the potential Pa (depletion potential) at the lower end of the gradient potential A. However, if the potential Pa is lowered, the difference DF (FIG. 5) between the potential Pa and the potential φ33 of the charge collecting region 33 becomes smaller, and the amount of charge readout decreases. Therefore, there is a limit to lowering the potential Pa.

[0070] In contrast, in the photosensor 1 of the above embodiment, as described above, the first transfer gate electrode 43 and the second transfer gate electrode 44 are used to transfer the charges to the charge collecting region 33, so that the generation of noise can be suppressed, and the amount of charge readout can be increased by utilizing the capacitance of the region directly below the first transfer gate electrode 43, thereby widening the dynamic range. As a result, the gradient height of the gradient potential A can be ensured to be large while ensuring a wide dynamic range.

[0071] The gradient potential forming region 59 is located on the first side with respect to the avalanche multiplication region 23. This increases the ratio of charges present in the region close to the transfer gate electrode 41, making it possible to transfer the charges at a higher speed. In addition, the gradient potential A is formed close to the transfer gate electrode 41, making it possible to transfer the charges at a higher speed.

[0072] The gradient potential forming region 59 includes the second region 52, the third region 53, and the fourth region 54 arranged so that the impurity concentration increases toward the transfer region 35. This makes it possible to suitably form the gradient potential A in the charge generating region 29.

[0073] The charge generation region 29 has a buried photodiode structure, which makes it possible to suppress the generation of dark current in the charge generation region 29. [Variations]

[0074] The charge accumulation region 24A of the second modified example shown in FIG. 6 includes a first region (first semiconductor region) 55 and a second region (second semiconductor region) 56. The first region 55 includes a first portion 55a and a second portion 55b. The second region 56 is disposed between the first portion 55a and the second portion 55b in the Y direction. The first region 55 and the second region 56 are n-type regions. The second region 56 has a higher impurity concentration than the first region 55. The impurity concentration of the first region 55 is 1×10 13 ~1×10 16 cm -3 The impurity concentration of the second region 56 is about 1×10 16 ~1×10 19 cm -3 The first region 55 may be a p-type region.

[0075] The second region 56 is adjacent to the transfer region 35 in the X direction. The width (length along the Y direction) W2 of the second region 56 increases toward the transfer region 35. The charge accumulation region 24A having the first region 55 and the second region 56 functions as a gradient potential forming region 59A that forms a gradient potential A that is inclined so that the potential decreases toward the transfer region 35. The gradient potential forming region 59A is located on the first side with respect to the avalanche multiplication region 23 in the Z direction. As with the above embodiment, the second modified example also achieves high sensitivity and allows high-speed charge transfer even when the area of ​​the light receiving region is large.

[0076] 7, a gradient potential forming region 59B is located on the second side with respect to the avalanche multiplication region 23. The gradient potential forming region 59B includes a first semiconductor layer 61 and a second semiconductor layer 62 located on the second side with respect to the first semiconductor layer 61. A through hole 63 is formed in the first semiconductor layer 61, penetrating the first semiconductor layer 61 along the Z direction.

[0077] The first semiconductor layer 61 and the second semiconductor layer 62 are p-type regions. The impurity concentrations of the first semiconductor layer 61 and the second semiconductor layer 62 are 1×10 14 ~1×10 16 cm -3 The first semiconductor layer 61 and the second semiconductor layer 62 can also be considered to configure the first multiplication region 23a of the avalanche multiplication region 23. In other words, the avalanche multiplication region 23 can also be considered to have the first semiconductor layer 61 and the second semiconductor layer 62.

[0078] In the third modified example, a step portion 64 is formed between the first semiconductor layer 61 and the second semiconductor layer 62, thereby forming a gradient potential A. The step portion 64 is formed between the first semiconductor layer 61 and the second semiconductor layer 62, because a portion of the surface of the first semiconductor layer 61 is not covered by the second semiconductor layer 62. In this example, a pair of step portions 64 are provided, each extending along the Y direction. The through hole 63 is disposed between the pair of step portions 64 in the X direction.

[0079] The charge generation region 29 further includes a charge accumulation region 24B provided on the first side with respect to the avalanche multiplication region 23, in addition to the gradient potential forming region 59B. The charge accumulation region 24B is an n-type region. The impurity concentration of the charge accumulation region 24B is 1×10 16 ~1×10 19 cm -3 That's about it.

[0080] The through hole 63 overlaps the boundary between the charge generation region 29 and the transfer region 35 in the Z direction. In this example, the through hole 63 overlaps with the charge accumulation region 24B in the Z direction. In the third modified example, the charge collected by the gradient potential A reaches the avalanche multiplication region 23 through the through hole 63. The charge multiplied in the avalanche multiplication region 23 is accumulated in the charge accumulation region 24B. The charge accumulated in the charge accumulation region 24B is transferred to the charge collection region 33 using the transfer gate electrode 41. Note that, although the transfer gate electrode 41 is depicted as being composed of a single electrode in FIG. 7, the transfer gate electrode 41 may have a first transfer gate electrode 43 and a second transfer gate electrode 44 as in the above embodiment. In FIG. 7, a part of the electrode layer 4, the protective layer 6, and the like are omitted from the illustration. The ground electrode 46 arranged on the intermediate region 25 is illustrated.

[0081] In the third modified example, as in the above embodiment, it is possible to achieve high sensitivity and transfer charges at high speed even when the area of ​​the light receiving region is large. In addition, the gradient potential forming region 59B is located on the second side of the avalanche multiplication region 23. In such a structure, the above-mentioned restriction on the gradient height of the gradient potential A is unlikely to occur. Therefore, the gradient of the gradient potential A can be made large, and charges can be transferred at a higher speed. In addition, since the charges collected by the gradient potential A are multiplied in the avalanche multiplication region 23, the location where multiplication occurs can be limited, and the uniformity of the multiplication can be improved.

[0082] In the gradient potential forming region 59B, a step portion 64 is formed between the first semiconductor layer 61 and the second semiconductor layer 62, thereby forming a gradient potential A. This allows the gradient potential A to be suitably formed in the charge generating region 29.

[0083] The through-holes 63 formed in the first semiconductor layer 61 overlap with the boundary between the charge generation region 29 and the transfer region 35 in the Z direction. This allows the charges guided by the gradient potential A to be collected at the boundary between the charge generation region 29 and the transfer region 35.

[0084] The present invention is not limited to the above-described embodiment and modified examples. For example, the materials and shapes of the components are not limited to those described above, and various materials and shapes can be adopted.

[0085] In the above embodiment, the second potential φ44 is made higher than the first potential φ43 by applying the same potential to the first transfer gate electrode 43 and the second transfer gate electrode 44, but the second potential φ44 may be made higher than the first potential φ43 by providing an additional bias circuit and applying potentials of different magnitudes to the first transfer gate electrode 43 and the second transfer gate electrode 44. In this case, the first potential φ43 and the second potential φ44 may be equal at the start and end of the charge transfer process.

[0086] The transfer gate electrode 41 may be formed of a single electrode. Even in this case, the second potential φ44 can be made higher than the first potential φ43 by forming the potential adjustment layer 36 as in the above embodiment. For example, the potential adjustment layer 36 can be formed below a portion of the transfer gate electrode 41 formed of a single electrode that corresponds to the second transfer gate electrode 44.

[0087] The first potential φ43 and the second potential φ44 may simultaneously become higher than the potential Pa from a state in which the first potential φ43 and the second potential φ44 are equal to or lower than the potential Pa at the lower end of the gradient potential A. The p-type and n-type conductivity types may be reversed to those described above. The pixels 10 may be arranged one-dimensionally along the first surface 2a of the semiconductor layer 2. The optical sensor 1 may have only a single pixel 10. The optical sensor 1 may be a distance measurement sensor that acquires a distance image of an object (an image including information about a distance d to the object) using an indirect TOF method. The optical sensor 1 may include two or more charge collection regions 33 in each pixel 10. The optical sensor 1 may include two or more transfer gate electrodes 41 in each pixel 10.

[0088] In the above embodiment and modified examples, the avalanche multiplication region 23 may not be formed. That is, the charge generation region 29 may not include the avalanche multiplication region 23. Even with such a configuration, like the above embodiment, charges can be transferred at high speed even when the area of ​​the light receiving region is large. [Explanation of symbols]

[0089] 1, 1B...photosensor, 23...avalanche multiplication region, 29...charge generation region, 33...charge collection region, 35...transfer region, 36...potential adjustment layer, 41, 41A...transfer gate electrode, 43...first transfer gate electrode, 44...second transfer gate electrode, 52...second region (semiconductor region), 53...third region (semiconductor region), 54...fourth region (semiconductor region), 55...first region (first semiconductor region), 55a...first portion, 55b...second portion, 56...second region (second semiconductor region), 59, 59A, 59B...graded potential formation region, 61...first semiconductor layer, 62...second semiconductor layer, 63...through hole, 64...step portion, A...graded potential, Pa...potential at the lower end of the gradient potential (potential at the boundary between the charge generation region and the transfer region), W2...width, φ43...first potential, φ44...second potential.

Claims

1. a charge generating region that generates charges in response to incident light; a charge collecting region to which the charges generated in the charge generating region are transferred; at least one transfer gate electrode disposed on a transfer region between the charge generating region and the charge collecting region; The charge generating region is an avalanche multiplication region for generating avalanche multiplication; a gradient potential forming region that forms a gradient potential in the charge generating region such that the potential becomes lower toward the transfer region, the at least one transfer gate electrode includes a first transfer gate electrode and a second transfer gate electrode disposed on a side of the first transfer gate electrode facing the charge generating region; In a charge transfer process for transferring charges generated in the charge generation region to the charge collection region, a potential is applied to the first transfer gate electrode and the second transfer gate electrode so that a first potential, which is a potential of a region immediately below the first transfer gate electrode, and a second potential, which is a potential of a region immediately below the second transfer gate electrode, become higher than the potential of the boundary between the charge generation region and the transfer region after becoming equal to or lower than the potential of the boundary; In the charge transfer process, a process is executed to make the second potential higher than the potential of the boundary portion without changing the first potential from a state in which the first potential and the second potential are lower than the potential of the boundary portion, and after completion of this process, a process is executed to make the first potential higher than the potential of the boundary portion.

2. 2 . The optical sensor according to claim 1 , wherein in the charge transfer process, potentials are applied to the first transfer gate electrode and the second transfer gate electrode such that the second potential is higher than the first potential.

3. 3. The optical sensor according to claim 2, wherein the second potential is higher than the first potential in a state in which the potential of the first transfer gate electrode and the potential of the second transfer gate electrode are equal to each other.

4. The photosensor of claim 3 , wherein the transfer region includes a potential adjustment layer for making the second potential higher than the first potential.

5. The optical sensor according to any one of claims 1 to 4, wherein, in a state in which the first potential and the second potential in the charge transfer process are equal to or lower than the potential of the boundary portion, the second potential is equal to the potential of the boundary portion, and the first potential is lower than the potential of the boundary portion.

6. The avalanche multiplication region is formed in a layer shape along a predetermined plane, The optical sensor of any one of claims 1 to 5, wherein the side where the transfer gate electrode is located relative to the avalanche multiplication region in a direction perpendicular to the plane is defined as a first side, and the side opposite the first side is defined as a second side, and the gradient potential formation region is located on the first side relative to the avalanche multiplication region.

7. 7. The optical sensor according to claim 6, wherein the gradient potential forming region includes a plurality of semiconductor regions arranged so that the impurity concentration increases with approach to the transfer region.

8. 8. The optical sensor according to claim 6, wherein the gradient potential forming region includes a first semiconductor region including a first portion and a second portion, and a second semiconductor region having a higher impurity concentration than the first semiconductor region, disposed between the first portion and the second portion, and having a width that increases toward the transfer region.

9. The avalanche multiplication region is formed in a layer shape along a predetermined plane, The optical sensor according to any one of claims 1 to 5, wherein the side where the transfer gate electrode is located relative to the avalanche multiplication region in a direction perpendicular to the plane is defined as a first side, and the side opposite the first side is defined as a second side, and the gradient potential formation region is located on the second side relative to the avalanche multiplication region.

10. the gradient potential forming region includes a first semiconductor layer and a second semiconductor layer located on the second side with respect to the first semiconductor layer, The photosensor according to claim 9 , wherein the gradient potential is generated by forming a step portion between the first semiconductor layer and the second semiconductor layer.

11. A through hole is formed in the first semiconductor layer, The optical sensor according to claim 10 , wherein the through hole overlaps a boundary between the charge generating region and the transfer region in a direction perpendicular to the plane.

12. A charge generating region that generates charges in response to incident light; a charge collecting region to which the charges generated in the charge generating region are transferred; at least one transfer gate electrode disposed on a transfer region between the charge generating region and the charge collecting region; The charge generating region is an avalanche multiplication region for generating avalanche multiplication; a gradient potential forming region that forms a gradient potential in the charge generating region such that the potential becomes lower toward the transfer region, The avalanche multiplication region is formed in a layer shape along a predetermined plane, an optical sensor, in which the side on which the transfer gate electrode is located relative to the avalanche multiplication region in a direction perpendicular to the plane is defined as a first side, and the side opposite the first side is defined as a second side, and the gradient potential formation region is located on the second side relative to the avalanche multiplication region.

13. The gradient potential formation region includes a first semiconductor layer and a second semiconductor layer located on the second side with respect to the first semiconductor layer, The optical sensor according to claim 12 , wherein the gradient potential is formed by forming a step portion between the first semiconductor layer and the second semiconductor layer.

14. The first semiconductor layer has a through hole formed therein, The optical sensor according to claim 13 , wherein the through-hole overlaps a boundary between the charge generation region and the transfer region in a direction perpendicular to the plane.

15. The photosensor of any one of claims 1 to 14, wherein the charge generation region has a buried photodiode structure.

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