Image Sensor

Abstract

To provide a pixel image sensor that can be mounted even in a small area, that has small dips in signal-to-noise ratio generated when low-illuminance and high-illuminance images are merged and that has a wide dynamic range, and to provide a method of operating the same.SOLUTION: A method of driving an image sensor includes the following steps of: integrating overflow electric charges from a photodiode to a floating diffusion region and a dynamic range capacitor; sampling a first voltage formed in the floating diffusion region by the integrated overflow electric charges; resetting the photodiode, the floating diffusion region and the dynamic range capacitor; sampling a reset level of the reset floating diffusion region; transferring electric charges accumulated in the photodiode to the floating diffusion region; and sampling a second voltage formed in the floating diffusion region.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] The present invention relates to an image sensor, and more particularly to a wide dynamic range image sensor and a driving method thereof. [Background technology]

[0002] One of the important criteria for expressing the quality of an image sensor is the dynamic range. Dynamic range generally indicates the maximum range in which an input signal can be processed without distorting it. In the case of an image sensor, the wider the dynamic range, the clearer the image can be obtained within a wider range of illumination.

[0003] In general, image sensors have a narrow dynamic range and are limited in that they cannot express the original color of an image well when a certain color becomes saturated. In order to overcome the drawback of a narrow dynamic range, various technologies are being attempted to realize Wide Dynamic Range (WDR) pixels. For example, there is a technology that realizes a Wide Dynamic Range (WDR) by adjusting the light irradiation time in the image sensor, and a method that increases the capacity of the floating diffusion (FD).

[0004] However, the above-mentioned technologies require a relatively large area or are not free from the problem of signal-to-noise ratio dip (SNR dip) that occurs when high-illumination and low-illumination images are merged. Therefore, there is a strong demand for wide dynamic range (WDR) technologies that can be implemented in a small area and do not have the signal-to-noise ratio dip that occurs when low-illumination and high-illumination images are merged. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] US Patent Application Publication No. 2018 / 0182807 [Patent Document 2] US Patent Application Publication No. 2017 / 0324916 [Patent Document 3] US Patent Application Publication No. 2017 / 0347049 [Patent Document 4] US Patent Application Publication No. 2014 / 0203956 [Patent Document 5] US Patent Application Publication No. 2017 / 0317061 [Patent Document 6] US Patent Application Publication No. 2010 / 0276572 [Patent Document 7] US Patent Application Publication No. 2004 / 0141079 [Patent Document 8] US Patent Application Publication No. 2017 / 0332022 [Patent Document 9] U.S. Pat. No. 9,077,922 [Patent Document 10] U.S. Pat. No. 9,607,971 [Patent Document 11] U.S. Pat. No. 9,337,228 [Patent Document 12] U.S. Patent No. 10,026,771 [Patent Document 13] U.S. Pat. No. 9,613,994 [Patent Document 14] U.S. Pat. No. 9,749,569 [Patent Document 15] U.S. Patent No. 6,975,355 [Patent Document 16] U.S. Patent No. 6,927,796 [Patent Document 17] U.S. Patent No. 10,021,331 [Patent Document 18] U.S. Pat. No. 9,774,801 [Non-patent literature]

[0006] [Non-Patent Document 1] David Schor, “IEDM 2017: Sony's 3-layer stacked CMOS image sensor technology”, https: / / fuse.wikichip.org / news / 763 / iedm-2017-sonys-3-layer-stacked-cmos-image-sensortechnology,February 3, 2018 Summary of the Invention [Problem to be solved by the invention]

[0007] The present invention has been made in consideration of the above-mentioned conventional problems, and an object of the present invention is to provide a wide dynamic range (WDR) pixel image sensor and an operating method thereof that can be implemented in a small area and has a small signal-to-noise ratio dip that occurs when low-illumination and high-illumination images are merged. [Means for solving the problem]

[0008] In order to achieve the above-mentioned object, according to one aspect of the present invention, a method for driving an image sensor including a dynamic range capacitor formed between a floating diffusion region and a power supply voltage includes the steps of: integrating overflow charge from a photodiode in the floating diffusion region and the dynamic range capacitor; sampling a first voltage formed in the floating diffusion region by the integrated overflow charge; resetting the photodiode, the floating diffusion region, and the dynamic range capacitor by connecting them to the power supply voltage; sampling a reset level of the reset floating diffusion region; transferring the charge accumulated in the photodiode to the floating diffusion region; and sampling a second voltage formed in the floating diffusion region.

[0009] In order to achieve the above object, an image sensor according to one aspect of the present invention includes a photodiode that generates and accumulates charges in response to incident light, a floating diffusion region that stores charges transferred from the photodiode, a transfer transistor that connects the photodiode to the floating diffusion region in response to a transfer signal, a dynamic range capacitor for expanding a capacity of the floating diffusion region, a dual conversion gain transistor that connects the dynamic range capacitor to the floating diffusion region when operating in a high illumination mode and isolates the floating diffusion region from the dynamic range capacitor when operating in a low illumination mode, and a reset transistor that connects the dual conversion gain transistor to a power supply voltage in response to a reset signal, wherein the dynamic range capacitor is formed of a cylindrical electrode and a dielectric in a semiconductor layer different from the floating diffusion region.

[0010] In order to achieve the above object, a method of driving an image sensor according to another aspect of the present invention includes the steps of: integrating overflow charges from a photodiode into a first full well capacity; sampling a first voltage formed by the overflow charges integrated in the first full well capacity; sampling a reset level of a floating diffusion region; integrating charges accumulated in the photodiode into a second full well capacity smaller than the first full well capacity; sampling a second voltage formed by the charges integrated in the second full well capacity; generating a high illumination image signal using the first voltage and the reset level, and processing the second voltage and the reset level in a correlated double sampling manner to generate a low illumination image signal. Effect of the Invention

[0011] According to the present invention, it is possible to realize an image sensor which can be mounted in a small area, which is advantageous for reducing the size of pixels, and which can provide a high-sensitivity image with a small dip in the signal-to-noise ratio. [Brief description of the drawings]

[0012] [Figure 1] 1 is a block diagram illustrating an image sensor according to one embodiment of the present invention. [Diagram 2] 2 is a cross-sectional view showing the vertical structure of a pixel sensor constituting the pixel array of FIG. 1. [Diagram 3] FIG. 2 is a circuit diagram showing the configuration of one pixel sensor according to an embodiment of the present invention. [Figure 4] FIG. 4 is a timing diagram illustrating an example of a method for driving a pixel sensor according to an embodiment of the present invention. [Diagram 5] FIG. 2 illustrates characteristics of a pixel sensor operating in high illumination mode according to one embodiment of the present invention. [Figure 6] FIG. 2 illustrates characteristics of a pixel sensor operating in high illumination mode according to one embodiment of the present invention. [Figure 7] FIG. 2 illustrates characteristics of a pixel sensor operating in low light mode according to one embodiment of the present invention. [Figure 8] FIG. 2 illustrates characteristics of a pixel sensor operating in low light mode according to one embodiment of the present invention. [Figure 9] 4 is a flowchart illustrating a method of operating an image sensor that achieves a wide dynamic range (WDR) using a pixel sensor according to an embodiment of the present invention. [Figure 10] 4 is a graph illustrating the extended dynamic range of an image sensor according to an embodiment of the present invention. [Figure 11] 1 is a graph simply illustrating the effect of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Hereinafter, specific examples of the embodiment of the present invention will be described in detail with reference to the drawings. Both the above general description and the following detailed description should be understood as examples and should be considered as providing additional explanations of the claimed invention. Reference symbols are described in the embodiments of the present invention, examples of which are shown in the drawings. In some cases, the same reference symbols are used in the description and drawings to refer to the same or similar parts.

[0014] Hereinafter, an image sensor is used as an example to describe the features and functions of the present invention. However, those familiar with the technical field can easily understand other advantages and performances of the present invention based on the contents described herein. The present invention can be realized or applied through other embodiments. Furthermore, the detailed description may be modified or changed according to the viewpoint and application without departing from the scope, technical idea, and other objects of the present invention.

[0015] 1 is a block diagram showing an image sensor according to an embodiment of the present invention. Referring to FIG. 1, the image sensor 100 includes a pixel array 110, a row decoder 120, an analog-to-digital converter (ADC) 130, an output buffer 140, and a timing controller 150.

[0016] The pixel array 110 includes a plurality of pixel sensors arranged two-dimensionally. Each pixel sensor converts an optical signal into an electrical signal. The pixel array 110 is controlled by sensor drive signals, such as a selection signal SEL, a reset signal RG, a dual conversion gain control signal DCG, and a transfer signal TG, from a row decoder 120. In response to the sensor drive signals, the electrical signals detected by each pixel sensor are provided to an analog / digital converter 130 via a plurality of column lines CLm.

[0017] The pixel array 110 includes a plurality of pixel sensors each having a dynamic range capacitor C DRThe pixel sensor includes a dynamic range capacitor C DR The charge that overflows from the photodiode (PD) is stored using a capacitance C FD and dynamic range capacitor C DR For example, the dynamic range capacitor C DR Preferably, the pixel sensor is a cylindrical capacitor that provides sufficient capacitance within a limited area. The structure and operation of each of the pixel sensors will be described in detail with reference to the drawings below.

[0018] The row decoder 120 selects one of the rows of the pixel array 110 under the control of the timing controller 150. The row decoder 120 generates a selection signal SEL to select one of the rows. The row decoder 120 then sequentially activates a reset signal RG and a transfer signal TG for pixels corresponding to the selected row. Then, the high illuminance sensing signal S1, the reset level R, and the low illuminance sensing signal S2 generated from each of the pixel sensors of the selected row are sequentially transmitted to the analog / digital converter 130 (see FIG. 4).

[0019] The analog / digital converter 130 converts the high illuminance sensing signal S1, the reset level R, and the low illuminance sensing signal S2 into digital signals and outputs them. Although not shown, the analog / digital converter 130 samples the high illuminance sensing signal S1, the reset level R, and the low illuminance sensing signal S2 by a correlated double sampling method, and then converts them into digital signals. For this purpose, a correlated double sampler (CDS) is included in the front stage of the analog / digital converter 130.

[0020] The output buffer 140 latches and outputs the image data for each column provided by the analog / digital converter 130. The output buffer 140 temporarily stores the image data output from the analog / digital converter 130 under the control of the timing controller 150, and then sequentially outputs the latched image data through a column decoder (not shown).

[0021] The timing controller 150 controls the pixel array 110, the row decoder 120, the analog-to-digital converter (ADC) 130, the output buffer 140, etc. The timing controller 150 provides control signals such as a clock signal, a timing control signal, etc. for the operation of the pixel array 110, the row decoder 120, the analog-to-digital converter 130, the output buffer 140, etc. The timing controller 150 includes a logic control circuit, a phase lock loop (PLL) circuit, a timing control circuit, a communication interface circuit, etc.

[0022] The configuration of the image sensor 100 according to an embodiment of the present invention has been briefly described above. In particular, each pixel sensor constituting the pixel array 110 is stackable within the pixel sensor, and has a cylindrical dynamic range capacitor C that simplifies the configuration of the signal line. DR Includes the dynamic range capacitor C DR Each pixel sensor via provides sufficient capacitance within a limited area. In addition, the dynamic range capacitor C DR When a pixel sensor including the above-mentioned is driven in a low illumination mode and a high illumination mode, a wide dynamic range (WDR) can be realized with a small signal-to-noise ratio dip that occurs when low illumination and high illumination images are merged.

[0023] Fig. 2 is a cross-sectional view showing a vertical structure of a pixel sensor constituting the pixel array of Fig. 1. Referring to Fig. 2, the pixel sensor 110a is composed of a stacked plate structure. For example, one pixel sensor includes a lower plate 111, an upper plate 112, a transparent electrode layer 113, a color filter 114, and a microlens 115.

[0024] Various logic circuits including an analog / digital converter (ADC) are formed on the lower plate 111. The configuration of the image sensor formed on the lower plate 111 is not limited to that shown in the figure. For example, an output buffer 140 (see FIG. 1) and a memory are formed on the lower plate 111. Alternatively, the analog / digital converter (ADC) may be provided from outside the pixel sensor, not on the lower plate 111.

[0025] The upper plate 112 includes a photodiode PD, a floating diffusion region FD, a transistor, and a dynamic range capacitor C. DRA basic structure for constructing a pixel sensor is formed on the upper plate 112. The photodiode PD is made of a material such as an organic material, a quantum dot (QD), a-Si, or a compound semiconductor, and is manufactured in the form of a thin film. Photocharges accumulated in the photodiode PD are transferred to a floating diffusion region (FD) through a structure such as a via and a transfer transistor TX. In particular, when the pixel sensor is driven in a high illumination mode, the photocharges accumulated in the photodiode PD overflow and are transferred to a dynamic range capacitor C. DR and is transferred to the floating diffusion region FD.

[0026] In high-illumination mode, a dynamic range capacitor C is used to accommodate the large amount of photocharge that overflows from the photodiode PD. DR As shown in the figure, the capacitance of a capacitor is generally proportional to the effective surface area of ​​the capacitor and the dielectric constant of the dielectric. In order to provide a capacitance for storing the overflowed photocharge in the high illumination mode, the dynamic range capacitor C of the present invention is DR has a significantly increased effective surface area of ​​the capacitor. For example, the dynamic range capacitor C DR is formed in the form of a memory capacitor for DRAM. That is, the dynamic range capacitor C DR is formed of at least one cylindrical capacitor.

[0027] Dynamic range capacitor C DR uses polysilicon for the top and bottom electrodes and SiO for the dielectric film. 2 / SiN X This type of capacitor corresponds to the capacitor of a typical DRAM cell. However, the dynamic range capacitor CDR The structure is not limited to this disclosure, and can be modified into various forms in response to changes in design rules and various changes in conditions.

[0028] A transparent electrode layer 113, a color filter 114, and a microlens 115 are formed on the upper plate 112. The transparent electrode layer 113 is formed of, for example, a thin metal, graphene, a transparent conducting oxide (TCO), etc. The color filter 114 transmits light of different wavelengths. The color filter 114 includes multiple filters for any one pixel sensor according to the structure of the pixel array 110. Furthermore, a microlens 115 is included on the upper side of the color filter 114.

[0029] The pixel sensor of the present invention exemplified above has a dynamic range capacitor C DR Includes the dynamic range capacitor C DR is preferably formed of at least one cylindrical capacitor structure.

[0030] 3 is a circuit diagram showing the configuration of a pixel sensor according to an embodiment of the present invention. Referring to FIG. 3, the pixel sensor 112a includes a photodiode PD, five NMOS transistors (TX, RX, DX, SX, DCGX), and a dynamic range capacitor C DR The pixel sensor 112a corresponds to the circuit configuration formed on the top plate 112 of FIG.

[0031] Dynamic range capacitor C DR One end of the dynamic range capacitor C is connected between the reset transistor RX and the dual conversion gain transistor DCGX. DR One end of the dynamic range capacitor C is connected to the source of the reset transistor RX or the drain of the dual conversion gain transistor DCGX.DR The other end is connected to the power supply voltage V PIX is linked to.

[0032] In the high illumination mode, the reset transistor RX is turned off and the dual conversion gain transistor DCGX is turned on, and the dynamic range capacitor C DR is connected to the floating diffusion region FD. In the high illumination mode, the charge that overflows from the photodiode PD to the floating diffusion region FD is transferred to the dynamic range capacitor C DR In high illumination mode, a large amount of charge overflows from the photodiode PD and is shared by the dynamic range capacitor C DR That is, a large amount of charge that overflows from the photodiode PD is not discarded but is used as image information detected under relatively high illumination.

[0033] In low light mode, the dual conversion gain transistor DCGX) is turned off, and the dynamic range capacitor C DR is electrically isolated from the floating diffusion region FD. Therefore, the charge transferred from the photodiode PD to the floating diffusion region FD in the low illumination mode is stored only in the floating diffusion region FD. Since the charge is stored in the capacitance provided by the floating diffusion region FD, a higher conversion gain and low noise characteristics are provided.

[0034] Dynamic range capacitor C DR The structure of the dynamic range capacitor C is formed in a cylindrical shape similar to the memory capacitor of the above-mentioned DRAM. DR can sufficiently accommodate a large amount of charge overflowing from the photodiode PD in the high illumination mode.

[0035] A photodiode PD is a light detection element that generates and accumulates electric charges according to the amount of incident light or the intensity of the light. The photodiode PD can also be realized by a phototransistor, a photogate, a pinned photodiode (PPD), or the like.

[0036] The transfer transistor TX transfers the charge accumulated in the photodiode PD to the floating diffusion region FD. The transfer transistor TX is generally configured as one transistor and is switched in response to a transfer signal TG provided from the row decoder 120. The transfer transistor TX of the present invention effectively transfers the charge overflowing from the photodiode PD to the floating diffusion region FD and the dynamic range capacitor C during the high illumination mode. DR That is, the transfer transistor TX is tuned so as to have a potential barrier at a level at which the charge overflowing from the photodiode PD is effectively transferred to the floating diffusion region FD in the high illuminance mode.

[0037] The floating diffusion region FD has a function of detecting charges corresponding to the amount of incident light. The floating diffusion region FD accumulates charges provided by the photodiode PD while the transfer signal TG is activated. The floating diffusion region FD is connected to the gate terminal of the drive transistor DX, which operates as a source follower amplifier. The floating diffusion region FD is connected to the gate terminal of the drive transistor DX, which operates as a source follower amplifier. A power supply voltage V PIX is provided.

[0038] The reset transistor RX resets the floating diffusion region FD in response to a reset signal RG. The source of the reset transistor RX is connected to the drain of the dual conversion gain transistor DCGX. The source of the dual conversion gain transistor DCGX is connected to the floating diffusion region FD. When the reset signal RG and the dual conversion gain control signal DCG are activated, the reset transistor RX and the dual conversion gain transistor DCGX are turned on. Then, the power supply voltage V PIX is transferred to the floating diffusion region FD. In this case, the charge accumulated in the floating diffusion region FD is PIX The voltage of the floating diffusion region FD is equal to the power supply voltage V PIX is reset to the level

[0039] The dual conversion gain transistor DCGX varies the conversion gain of the pixel sensor in response to the dual conversion gain control signal DCG. The dual conversion gain transistor DCGX is turned on in the high illumination mode and turned off in the low illumination mode. That is, in the high illumination mode, when the dual conversion gain control signal DCG is activated to turn on the dual conversion gain transistor DCGX, the dynamic range capacitor C DR is connected to the floating diffusion region FD and accumulates the charge overflowing from the photodiode PD. Meanwhile, in the low illumination mode, when the dual conversion gain control signal DCG is inactivated and the dual conversion gain transistor DCGX is turned off, the dynamic range capacitor C DR is isolated from the floating diffusion region FD. Thus, the dual conversion gain transistor DCGX provides different conversion gains for the high and low illumination modes.

[0040] The drive transistor DX acts as a source follower amplifier for the floating diffusion region FD. The drive transistor DX amplifies the change in the electric potential of the floating diffusion region FD and transmits it to the column line CLi via the selection transistor SX.

[0041] The selection transistor SX is used to select pixel sensors to be read out on a row-by-row basis. The selection transistor SX is driven by a selection signal SEL provided on a row-by-row basis. When the selection transistor SX is turned on, the potential of the floating diffusion region FD is amplified through the drive transistor DX and transferred to the drain of the selection transistor SX. The drive signal lines (TG, RG, SEL) of the transfer transistor TX, reset transistor RX, and selection transistor SX are extended in the row direction (horizontal direction) so that unit pixels in the same row are driven simultaneously.

[0042] The structure of the pixel sensor 112a according to an embodiment of the present invention has been described above as an example. DR provides a large capacitance that cannot be provided by metal-oxide-semiconductor (MOS) or metal-insulator-metal (MIM) capacitors. Thus, the dynamic range capacitor C DR By using this, it is possible to integrate the charge that overflows from the photodiode PD in the high illumination mode.

[0043] 4 is a timing diagram illustrating an example of a method for driving a pixel sensor according to an embodiment of the present invention. Referring to FIG. 4, the pixel sensor 112a is in high illumination mode, and the dynamic range capacitor C DR By using this, sensing can be performed without loss of overflow charge.

[0044] At time T0, the reset signal RG, the dual conversion gain control signal DCG, and the transfer signal TG provided to the pixel sensor 112a are turned on, so that the reset transistor RX, the transfer transistor TX, and the dual conversion gain transistor DCGX are turned on, and the floating diffusion region FD and the photodiode PD are connected to the power supply voltage V PIX The charge present in the floating diffusion region FD and the photodiode PD is coupled to the power supply voltage V PIX As a result, the floating diffusion region FD and the photodiode PD are reset.

[0045] At time T1, the high illumination mode is started. That is, after time T1, the dual conversion gain control signal DCG maintains a high level, and the reset signal RG and the transfer signal TG maintain a low level. With the dual conversion gain control signal DCG at a high level, the reset signal RG is provided at a low level, and the dynamic range capacitor C DR is connected to the floating diffusion region FD. That is, the capacitor C FD and the dynamic range capacitor C DR are connected in parallel. In addition, the transfer transistor TX is turned off due to the low level state of the transfer signal TG. Under this condition, when a large amount of light is incident on the photodiode PD, photoelectric conversion occurs in the photodiode PD. The charge generated by the photoelectric conversion starts to be preferentially accumulated in the photodiode.

[0046] At the time T2, the charge stored in the photodiode PD starts to overflow. The charge that overflows over the gate potential barrier of the transfer transistor TX based on charge generation and charge storage by photoelectric conversion in the photodiode PD is transferred to the floating diffusion region FD. That is, the overflowed charge is transferred to the floating diffusion region FD and the dynamic range capacitor C. DR When integrated into the floating diffusion region FD, the voltage V FD is the power supply voltage V PIX starts to decrease gradually from

[0047] Before the high-illuminance mode ends (indicated by (3)), sampling in the high-illuminance mode is performed. That is, the floating diffusion region FD and the dynamic range capacitor C are charged by the charge overflowing from the photodiode PD due to sampling in the high-illuminance mode. DR A first voltage S1 corresponding to the amount of charge stored in the capacitor is sampled.

[0048] At time T3, when the reset signal RG transitions to a high level, the reset transistor RX is turned on. In the high illumination mode, the floating diffusion region FD and the dynamic range capacitor C DR The charge stored in is transferred to the power supply voltage V through the reset transistor RX. PIX This causes the voltage V of the floating diffusion region FD to FD is the power supply voltage V PIX is reset to the level

[0049] At time T4, when the reset signal RG and the dual conversion gain control signal DCG each transition to a low level, the dual conversion gain transistor DCGX is turned off and the floating diffusion region FD and the dynamic range capacitor C DR In addition, the floating diffusion region FD is electrically isolated from the power supply voltage V PIX This means that the high brightness mode is over.

[0050] Between time T4 and time T5, after reset, the stabilized voltage of the floating diffusion region FD is sampled as a reset level R. That is, the reset level R is sampled at the point in time (indicated by (4)) when the floating diffusion region FD maintains a stable reset state.

[0051] At time T5, the transfer signal TG transitions to a high level. At time T5, the low illumination mode begins. The transfer transistor TX is turned on, and the charge stored in the photodiode PD is transferred to the floating diffusion region FD. At this time, the dynamic range capacitor C DR is cut off from the floating diffusion region FD. Therefore, the charge accumulated in the photodiode PD moves only to the floating diffusion region FD.

[0052] When the transfer signal TG transitions to a low level at time T6, the transfer transistor TX is turned off, and the transfer of the charge stored in the photodiode PD to the floating diffusion region FD is blocked.

[0053] Between time points T6 and T7 (indicated by (5)), low-illumination mode sampling is performed. That is, the second voltage S2 corresponding to the amount of charge stored in the floating diffusion region FD by the low-illumination mode sampling is sampled.

[0054] At time T7, when the reset signal RG and the dual conversion gain control signal DCG transition to a high level, the charge stored in the floating diffusion region FD is transferred to the power supply voltage V PIX This causes the voltage V of the floating diffusion region FD to FD is the power supply voltage V PIX is reset to the level

[0055] As explained in the above timing diagram, the image sensor of the present invention has a dynamic range capacitor C DR In the high illumination mode using the dynamic range capacitor C, a low conversion gain is provided. DRIn a low illumination mode in which the RGB signal is not used, a high conversion gain is provided to perform low noise and high sensitivity sampling. Therefore, a wide dynamic range (WDR) function can be efficiently realized through the image sensor of the present invention.

[0056] 5-6 are diagrams illustrating the characteristics of a pixel sensor operating in high illumination mode according to an embodiment of the present invention. DR 6 is a circuit diagram illustrating the low conversion gain condition achieved by: Figure 6 is a diagram illustrating the potential states of the pixel sensor 112a of the present invention in high illumination mode.

[0057] Referring to FIG. 5, in high illumination mode, the floating diffusion region FD of the pixel sensor 112a is connected to the dynamic range capacitor C DR That is, in the high illumination mode of the present invention, the charge overflowing from the photodiode PD is not discharged but is stored in an expanded full well capacity (FWC). The change in potential of the floating diffusion region FD due to the expanded full well capacity FWC is relatively small compared to the amount of overflowing charge. That is, in the high illumination mode, the conversion gain of the pixel sensor 112a is reduced. To this end, the dual conversion gain control signal DCG provided to the pixel sensor 112a is activated, and the dual conversion gain transistor DCGX is turned on. The dual conversion gain transistor DCGX is always maintained in a turned-on state during the period in which the high illumination mode is operated. The turn-on period of the dual conversion gain transistor DCGX corresponds to the time period (T1 to T3) of FIG. 4 described above.

[0058] The charge that overflows from the photodiode PD due to the turn-on of the dual conversion gain transistor DCGX is transferred to the floating diffusion region FD and the dynamic range capacitor C DRThe dynamic range provided by the cylindrical capacitor is stored in the capacitor C DR Therefore, the full well capacitance FWC of the pixel sensor 112a is equal to the capacitance C provided by the floating diffusion region FD. FD The dynamic range of the dynamic range capacitor C DR Through the use of this, the charge overflowing from the photodiode PD is not discarded but contributes to detecting and sampling high-intensity light.

[0059] 6 illustrates a high illumination mode sensing operation using an increased full well capacitance FWC with the dual conversion gain transistor DCGX turned on. The full well capacitance FWC of the pixel sensor 112a in the high illumination mode is the capacitance C FD and the dynamic range capacitor C DR Therefore, in the high illumination mode, the capacitance C of the floating diffusion region FD is FD A much larger full well capacity FWC is provided than in the conventional high illumination mode. Under the condition of such an increase in full well capacity FWC, the operation in the high illumination mode can be roughly divided into three stages. These three stages correspond to the respective points ((1), (2), and (3)) in FIG. 4 described above.

[0060] First, at point (1), the charge accumulation stage of the photodiode PD, which is the initial operation of the high illumination mode, progresses. In general, in the photodiode PD, photoelectric conversion occurs in response to incident light, and the generated charge is accumulated until the transfer transistor TX is turned on. The charge accumulated in the photodiode PD is blocked from moving to the floating diffusion region FD due to the potential barrier of the channel of the transfer transistor TX. Here, the floating diffusion region FD and the dynamic range capacitor C DRIt can be seen that the full well capacity FWC is greatly increased by the connection between the floating diffusion region FD and the dynamic range capacitor C. DR The sum of the capacitances (C FD +C DR ) is confirmed to correspond to

[0061] At the time point (2), the charge that has overflowed from the photodiode PD is transferred to the floating diffusion region FD and the dynamic range capacitor C DR 1 shows the overflow stage in which the charge is stored in the photodiode PD. Generally, when charge exceeding the maximum capacitance value that can be accommodated in the photodiode PD is generated, the charge overflows beyond the channel potential barrier of the transfer transistor TX in the off state. This phenomenon is called the blooming phenomenon. Due to the blooming phenomenon, the overflowed charge spreads to the photodiode PD of another pixel sensor beyond the channel potential barrier of the transfer transistor TX in the off state. In order to prevent this blooming phenomenon, the overflowed charge needs to be discharged and discarded.

[0062] The pixel sensor 112a of the present invention does not discharge the overflowed charge from the photodiode PD, but instead uses the floating diffusion region FD and the dynamic range capacitor C DR The dynamic range capacitor C of the present invention is DR The size of the full well capacity FWC secured through the photodiode PD can sufficiently accommodate the charge overflowing from the photodiode PD. As shown in the figure, the potential of the floating diffusion region FD becomes lower due to the accumulation of the overflowed charge.

[0063] At time (3), the voltage of the floating diffusion region FD formed by the charge overflowing in the high illumination mode is sampled (or read out). That is, the potential of the floating diffusion region F corresponding to the amount of charge overflowing in the high illumination mode is sampled. The operation of sampling the voltage S1 of the floating diffusion region FD in the high illumination mode is referred to as the first sampling.

[0064] The operation of the high illumination mode in the present invention has been described above with reference to FIGS. 5 and 6. In the high illumination mode, the pixel sensor 112a of the present invention transfers the charge overflowing from the photodiode PD to the dynamic range capacitor C. DR The present invention achieves a wide dynamic range (WDR) in which high-intensity light is sensed without saturation by sampling at a low conversion gain without discharging overflowing charges.

[0065] 7-8 are diagrams illustrating the characteristics of a pixel sensor operating in low light mode according to an embodiment of the present invention. DR 8 is a circuit diagram showing a high conversion gain (HCG) condition achieved by isolating the floating diffusion region FD from the pixel sensor 112a of the present invention in a low illumination mode.

[0066] Referring to FIG. 7, in low light mode, the floating diffusion region FD of the pixel sensor 112a is connected to the dynamic range capacitor C DR1. That is, in the low illumination mode of the present invention, the charge accumulated in the photodiode PD is stored only in the floating diffusion region FD. By sampling using the floating diffusion region FD with a relatively small capacity, a high conversion gain (HCG) can be provided in the low illumination mode. For this purpose, the dual conversion gain control signal DCG provided to the pixel sensor 112a is inactivated, and the dual conversion gain transistor DCGX is turned off. Meanwhile, the reset signal RG is activated, and the reset transistor RX is turned on. The dual conversion gain transistor DCGX is always maintained in a turned-off state during the period in which the low illumination mode is operated. The period in which the dual conversion gain transistor DCGX is turned on corresponds to the time period (T6 to T7) in FIG. 4 described above.

[0067] The charge accumulated in the photodiode PD due to the turn-on of the reset transistor RX and the turn-off of the dual conversion gain transistor DCGX is stored in the floating diffusion region FD when the transfer transistor TX is turned on. In the low illumination mode, the dynamic range capacitor C DR Due to the blocking from the illuminance, the full well capacity FWC of the pixel sensor 112a is rapidly reduced compared to that in the high illumination mode. Through sampling in the low illumination mode, low noise and high sensitivity image sensing is possible.

[0068] Figure 8 shows the potential states at two points (4) and (5) shown in Figure 4. First, at point (4), an operation is performed to reset the floating diffusion region FD and to sample the reset level R of the reset floating diffusion region FD. At point (5), a second sampling operation is performed to sample the voltage level S2 of the floating diffusion region FD in the low illumination mode.

[0069] When the first sampling in the high illumination mode is completed, the floating diffusion region FD of the pixel sensor 112a is reset. That is, the dual conversion gain transistor DCGX and the reset transistor RX are turned on, and the charge stored in the floating diffusion region FD is reset to the power supply voltage V PIX When the reset of the floating diffusion region FD is completed, sampling is performed for the reset level R. The sampling of the reset level R is performed in a state in which the transfer transistor TX and the reset transistor RX are turned off.

[0070] After the reset operation and the sampling of the reset level R are completed, the transfer transistor TX is turned on between the time T5 and the time T6. Then, the charge stored in the photodiode PD in the low illumination mode flows into the floating diffusion region FD. In the low illumination mode, the floating diffusion region (FD) is connected to the dynamic range capacitor C DR In the low illumination mode, the charge accumulated in the photodiode PD is stored only in the floating diffusion region FD. The full well capacity FWC of the pixel sensor 112a in the low illumination mode is calculated by multiplying the capacitance C FD Therefore, when the transfer transistor TX is turned on, charge is charged in the floating diffusion region FD at a relatively high speed.

[0071] When the charge transfer from the photodiode PD to the floating diffusion region FD is completed, the transfer transistor TX is turned off. Then, in the low illumination mode, a second sampling S2 is performed to sample the potential level S2 of the floating diffusion region FD formed by the amount of integrated charge. In the low illumination mode, the pixel sensor 112a operates with relatively low noise and high sensitivity due to the reduction in the full well capacity FWC.

[0072] The above briefly describes the potential state of a pixel sensor at each time according to an embodiment of the present invention. In the present invention, a wide dynamic range (WDR) can be achieved by providing different full well capacities (FWC) for high and low illumination.

[0073] 9 is a flow chart illustrating a method of operating an image sensor that achieves wide dynamic range (WDR) using a pixel sensor according to an embodiment of the present invention. Referring to FIG. 9, the image sensor (100, see FIG. 1) of the present invention is capable of sampling a wide dynamic range (WDR) image without losing charge.

[0074] In step S110, the image sensor 100 is in the high illumination mode and the dynamic range capacitor C DR The dynamic range capacitor C is used to store the charge overflowing from the photodiode PD without losing it. DR is connected to the floating diffusion region FD. In this state, the charge accumulated in the photodiode PD starts to overflow. The overflowed charge is transferred to the dynamic range capacitor C DR and the capacitance provided by the floating diffusion region FD (C FD +C DR Due to the accumulation of the overflowed charge (e.g., negative charge), the potential of the floating diffusion region FD increases to the power supply voltage V PIX gradually becomes lower than

[0075] In step S120, a first sampling in high illumination mode is performed. That is, the sampling in high illumination mode causes the floating diffusion region FD and the dynamic range capacitor C to be charged by the charge overflowing from the photodiode PD. DR A first voltage S1 corresponding to the amount of charge integrated on the sensor is sampled.

[0076] In step S130, the floating diffusion region FD and the dynamic range capacitor C DR In other words, in the high illumination mode, the potential of the floating diffusion region FD and the dynamic range capacitor C DR The charge accumulated in is transferred to the power supply voltage V PIX This causes the voltage V of the floating diffusion region FD to FD is the power supply voltage V PIX The level is reset.

[0077] In step S140, the reset level R of the floating diffusion region FD is sampled. After the reset, when the dual conversion gain transistor DCGX is turned off, the floating diffusion region FD and the dynamic range capacitor C DR is electrically cut off. This causes the potential of the floating diffusion region FD to be stabilized at the reset level R. Then, the reset level R is sampled.

[0078] In step S150, the low illumination mode is started. The transfer transistor TX is turned on, and the charge stored in the photodiode PD is transferred to the floating diffusion region FD. At this time, the dynamic range capacitor C DR is cut off from the floating diffusion region FD. Therefore, the charge accumulated in the photodiode PD moves only to the floating diffusion region FD.

[0079] In step S160, a second sampling corresponding to sampling in the low illumination mode is performed. The transfer transistor TX is turned off, and the potential provided by the charge accumulated in the floating diffusion region FD is sampled. That is, the second sampling samples a second voltage S2 corresponding to the charge accumulated in the floating diffusion region FD.

[0080] In step S170, a first sampling signal (S1'=S1-R) corresponding to the light sampled in the high illumination mode and a second sampling signal (S2'=S2-R) corresponding to the light sampled in the low illumination mode are calculated, where the first sampling signal (S1'=S1-R) is generated by an uncorrelated double sampling method, and the second sampling signal (S2'=S2-R) is generated by a correlated double sampling method.

[0081] In step S180, a first sampling signal S1' corresponding to an image signal in a high illumination mode (HIM) and a second sampling signal S2' corresponding to an image signal in a low illumination mode (LIM) are merged.

[0082] As described above, the image sensor 100 of the present invention includes a dynamic range capacitor C DR In the high illumination mode, the image sensor of the present invention provides a low conversion gain by using a dynamic range capacitor C DR In a low illumination mode where no IR is used, a high conversion gain can be provided to perform low noise and high sensitivity sampling. Therefore, a wide dynamic range (WDR) function can be efficiently realized through the image sensor of the present invention.

[0083] 10 is a graph showing the extended dynamic range of a pixel sensor according to an embodiment of the present invention. Referring to FIG. 10, the pixel sensor 112a of the present invention can significantly reduce the signal-to-noise ratio dip by controlling the full well capacity FWC to extend the dynamic range.

[0084] In low illumination mode (LIM), the full well capacity FWC of the pixel sensor 112a is the capacitance C provided by the floating diffusion region FD. FD where the capacitance of the floating diffusion region, C FD Assuming that the energy is about 10 keV, the light intensity I1 Up to 10 ...

[0085] And the light intensity I 1 In high illumination mode (HIM), the full well capacity FWC is greater than the dynamic range capacitor C DR The dynamic range is extended using a dynamic range capacitor C, which can accommodate the charge overflowing from the photodiode PD. DR Capacity provided through C DR Assuming that the light intensity I is about 1 MeV, the dynamic range is extended by more than 100 times. 2 It provides linear characteristics without saturation at the following corresponding illuminances:

[0086] According to an operation method of the pixel sensor 112a according to an embodiment of the present invention, the amount of overflowing charge is sampled through the floating diffusion region FD, so that linearity can be maintained between the low illumination signal and the high illumination signal when the signals are merged.

[0087] Fig. 11 is a graph simply illustrating the effect of the present invention, which shows a curve of the signal-to-noise ratio (SNR) of the pixel sensor 112a according to the light intensity as a function of the magnitude of the full well capacity FWC.

[0088] Curve C1 is the dynamic range capacitor C DR The signal-to-noise ratio (SNR) in the default operating mode without applying the . For example, the capacitance C of the floating diffusion region FD with the full well capacitance FWC of 2 fF is FD The characteristic when only the dynamic range capacitor C is provided is shown in curve C1. DRThe curve C1 shows the signal-to-noise ratio (SNR) characteristics when the magnitude of the full well capacitance FWC is extended to 32 fF using the dynamic range capacitor C2. In this case, the default operating mode shows a signal-to-noise ratio dip of about 4 dB compared to the signal-to-noise ratio (SNR). DR Figure 1 shows the signal-to-noise ratio (SNR) characteristics when the magnitude of the full well capacity FWC using is extended to 64 fF. In this case, the default operating mode shows a signal-to-noise ratio dip of about 7 dB compared to the signal-to-noise ratio (SNR).

[0089] According to the driving method of the pixel sensor 112a of the present invention, when the dynamic range changes, a signal-to-noise ratio dip exists, but it can be seen that the magnitude of the generated signal-to-noise ratio dip is not large.

[0090] Although the embodiments of the present invention have been described in detail above with reference to the drawings, the present invention is not limited to the above-described embodiments and can be modified in various ways without departing from the technical spirit of the present invention. [Explanation of symbols]

[0091] 100 Image Sensor 110 pixel array 111 Lower plate 112 Upper Board 112a pixel sensor 113 Transparent electrode layer 114 Color Filter 115 Micro Lens 120 Line Decoder 130 Analog-to-Digital Converter (ADC) 140 Output Buffer 150 Timing Controller C DR Dynamic Range Capacitor C FD Floating Diffusion Capacitance CLi, CLm Column lines DCG Dual conversion gain control signal DCGX Dual Conversion Gain Transistor DX Drive Transistor FD Floating diffusion region FWC Full Well Capacity PD Photodiode R Reset Level RG Reset signal RX Reset Transistor S1, S2 High and low illumination sensing signals SEL Selection signal SX selection transistor TG Transfer Signal TX Transistor V FD Floating Diffusion Voltage V PIX Power supply voltage

Claims

[Claim 1] a photodiode that generates an electric charge in response to incident light; a floating diffusion region for storing charge transferred from the photodiode; a transfer transistor responsive to a transfer signal to couple the photodiode to the floating diffusion region; a dynamic range capacitor for extending the capacitance of the floating diffusion region; a dual conversion gain transistor that connects the dynamic range capacitor and the floating diffusion region when operating in a high illumination mode and that disconnects the floating diffusion region from the dynamic range capacitor when operating in a low illumination mode; a reset transistor for connecting the dual conversion gain transistor to a power supply voltage in response to a reset signal; a drive transistor for amplifying the potential of the floating diffusion region; the dynamic range capacitor is formed of a cylindrical electrode and a dielectric in a semiconductor layer different from the floating diffusion region; the low illumination mode is initiated after the high illumination mode is terminated; the source of the dual conversion gain transistor is connected to the floating diffusion region; The drain of the reset transistor is connected to a power supply voltage; one end of the dynamic range capacitor is connected between the dual conversion gain transistor and the reset transistor; The other end of the dynamic range capacitor is connected to the drain of the drive transistor.

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