Transmission Line Board

Abstract

This transmission line board includes: a first transmission line (104) that has a first line length, is formed on a substrate (101) made of a dielectric, and connects a first integrated circuit (102) and a second integrated circuit (103) to each other; a first dielectric layer (105) that has a first permittivity and is formed to cover the first integrated circuit (102), the second integrated circuit (103), and the first transmission line (104); a second dielectric layer (106) that has a second permittivity and is formed on the first dielectric layer (105); a first via (107) that has a columnar shape and is connected to the first integrated circuit (102); a second via (108) that has a columnar shape and is connected to the second integrated circuit (103); and a second transmission line (109) that has a second line length, is formed in the second dielectric layer (106), and is connected to the first via (107) and the second via (108). The first permittivity and the second permittivity are set such that a signal transmission time in the first transmission line (104) becomes the same as a signal transmission time in the second transmission line (109).

Description

[Technical field]

[0001] The present invention relates to a transmission line substrate. [Background technology]

[0002] In recent years, as this type of module becomes higher in frequency, the configuration of the transmission line is extremely important for the high-frequency transmission line substrate in order to transmit signals at high speed without causing operational errors. For example, when multiple integrated circuits are integrated on a transmission line substrate, it may be desirable to connect all the wiring that transmits high-frequency signals with wiring of the same length. For example, as shown in Fig. 3, if the input / output units of a first integrated circuit 302 and a second integrated circuit 303 that are integrated on a substrate 301 and connected to each other are arranged facing each other and the connection intervals of each transmission line are the same, it is possible to form each transmission line with the same line length.

[0003] However, since input / output sections are generally formed all around the periphery of an integrated circuit, in practice, each transmission line is formed with a different wiring length. When each transmission line is formed with a different wiring length, a difference occurs in the transmission time of the signal transmitted through each transmission line. For this reason, the transmission line board has problems such as processing malfunction due to timing deviation and noise generation.

[0004] To propagate high-speed signals on high-frequency transmission line substrates, typical transmission line structures include microstrip lines, coplanar lines, and grounded coplanar lines. For example, a microstrip line is constructed by forming a ground plane of a planar conductive layer on one side of a dielectric substrate and forming a strip-shaped line on the other side. The characteristic impedance of these lines is determined by the width and thickness of the signal line, the dielectric constant and thickness of the dielectric substrate, and the geometric dimensions of the gap between the signal line and the ground pattern.

[0005] In addition to higher frequencies, lower power consumption is also an important factor, and to reduce power consumption, miniaturization and higher density are required. For example, a configuration in which corresponding wires are connected with the same length results in redundant wiring. The longer the wire length, the greater the loss. Furthermore, forming many folded parts also affects signal quality, such as loss, at high frequencies. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2003-198215 A Summary of the Invention [Problem to be solved by the invention]

[0007] In the case of a transmission line substrate, various studies have been conducted to solve the problems caused by the above-mentioned transmission lines and balanced lines with different wiring lengths. For example, in the transmission line substrate shown in Fig. 4, a first integrated circuit 402 and a second integrated circuit 403 are mounted on a dielectric substrate 401, and a number of transmission line patterns are formed on the dielectric substrate 401 to connect the opposing input / output units of these integrated circuits. In this transmission line substrate, each transmission line is formed to have approximately the same line length.

[0008] In the transmission line substrate, input / output units are provided on sides 402a, 402b, and 402c of first integrated circuit 402, and input / output units are provided on sides 403a, 403b, and 403c of second integrated circuit 403. The distance between the input / output unit on side 402a and the input / output unit on side 403a is the maximum length. Next, the distance between the input / output unit on side 402b and the input / output unit on side 403b is the intermediate length. Next, the distance between the input / output unit on side 402c and the input / output unit on side 403c is the minimum length.

[0009] In this transmission line substrate, a first transmission line 411a that connects an input / output unit provided on a side 402a of a first integrated circuit 402 and an input / output unit provided on a side 403a of a second integrated circuit 403 is used as a reference, and a second transmission line 412a is patterned on a dielectric substrate 401 so that the line lengths of the first and second transmission lines 412a and 412a are the same. A bent portion is formed in a portion of the second transmission line 412a, so that the line length of the second transmission line 412a is approximately the same as that of the first transmission line 411a. In addition, a fourth transmission line 412b is formed in a so-called meander pattern with many folded portions, so that the line length of the fourth transmission line 412b is approximately the same as that of the third transmission line 411b.

[0010] However, the transmission line substrate with the above-mentioned configuration has a so-called redundant wiring structure because it has to take the trouble of forming bent or folded sections in the transmission lines with short linear distances to achieve equal-length wiring. In this type of transmission line substrate, low power consumption is pursued, and the redundant wiring structure described above has a large loss and is not practical.

[0011] Furthermore, in this type of transmission line board, as the line length of the transmission line increases, there is a problem that the impedance components increase, deteriorating the transmission efficiency of high-frequency signals. In addition, the board becomes more susceptible to emitting and receiving electromagnetic noise, resulting in a problem that the electromagnetic matching characteristics and electromagnetic interference characteristics are deteriorated.

[0012] Furthermore, when the lines are formed with different lengths, the phase shift amount of the high frequency signal transmitted through each line is different. This causes a problem of increased loss of the high frequency signal after conversion. As circuit components and circuit elements are made more multifunctional and more highly functional, the number of input / output terminals is also increased and provided at high density. This makes it extremely difficult to address the above-mentioned issues, and the redundant wiring becomes more complicated and longer, further exacerbating problems such as larger size and deterioration of characteristics.

[0013] The present invention has been made to solve the above problems, and has an object to make it possible to transmit high-frequency signals without increasing loss between transmission lines of different line lengths, without making the wiring structure redundant. [Means for solving the problem]

[0014] The transmission line substrate according to the present invention comprises a first integrated circuit and a second integrated circuit disposed on a substrate made of a dielectric material, a first transmission line of a first line length formed on the substrate and connecting the first integrated circuit and the second integrated circuit, a first dielectric layer formed to cover the first integrated circuit, the second integrated circuit, and the first transmission line and made of a dielectric having a first dielectric constant, a second dielectric layer formed on the first dielectric layer and made of a dielectric having a second dielectric constant, and a dielectric layer connected to the first integrated circuit and penetrating the first dielectric layer to a point partway through the second dielectric layer. the first dielectric layer and the second dielectric layer; a second via connected to the second integrated circuit and penetrating the first dielectric layer to a certain point; a second transmission line of a second line length formed in the second dielectric layer and connected to the first via and the second via to connect the first integrated circuit and the second integrated circuit; and a ground layer formed on the back surface of the substrate, wherein when the first line length is longer than the second line length, the second dielectric constant is lower than the first dielectric constant, and when the second line length is longer than the first line length, the first dielectric constant is lower than the second dielectric constant. Effect of the Invention

[0015] As described above, according to the present invention, when the first line length is longer than the second line length, the second dielectric constant is lower than the first dielectric constant, and when the second line length is longer than the first line length, the first dielectric constant is lower than the second dielectric constant. This makes it possible to transmit high-frequency signals without making the wiring structure redundant and without increasing loss between transmission lines of different line lengths. [Brief description of the drawings]

[0016] [Figure 1A] FIG. 1A is a cross-sectional view showing a configuration of a transmission line substrate according to a first embodiment of the present invention. [Figure 1B]FIG. 1B is a plan view showing a partial configuration of the transmission line substrate according to the first embodiment of the present invention. [Figure 1C] FIG. 1C is a cross-sectional view showing the configuration of the transmission line substrate according to the first embodiment of the present invention. [Figure 2A] FIG. 2A is a cross-sectional view showing a configuration of a transmission line substrate according to a second embodiment of the present invention. [Figure 2B] FIG. 2B is a cross-sectional view showing the configuration of a transmission line substrate according to the second embodiment of the present invention. [Diagram 3] FIG. 3 is a plan view showing the configuration of the transmission line substrate. [Figure 4] FIG. 4 is a plan view showing the configuration of the transmission line substrate. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0017] Hereinafter, a transmission line substrate according to an embodiment of the present invention will be described.

[0018] [Embodiment 1] First, a transmission line substrate according to a first embodiment of the present invention will be described with reference to Figures 1A, 1B, and 1C. Figure 1C shows a cross section taken along line aa' in Figure 1A.

[0019] This transmission line board first includes a first integrated circuit 102 and a second integrated circuit 103 arranged (mounted) on a substrate 101 made of a dielectric material. Substrate 101 is a substrate for a semiconductor package or a substrate for mounting a semiconductor chip. For example, in a semiconductor package, other circuit elements are also mounted on substrate 101, although not shown.

[0020] This transmission line substrate also includes a first transmission line 104 having a first line length, which is formed on the substrate 101 and connects the first integrated circuit 102 and the second integrated circuit 103. The first transmission line 104 is a strip-shaped transmission line made of a conductive material such as Au. In this example, two first transmission lines 104 are provided. Note that the number of first transmission lines 104 is not limited to two.

[0021] The transmission line substrate also includes a first dielectric layer 105 formed to cover the first integrated circuit 102, the second integrated circuit 103, and the first transmission line 104 and made of a dielectric having a first dielectric constant, and a second dielectric layer 106 formed on the first dielectric layer 105 and made of a dielectric having a second dielectric constant.

[0022] This transmission line substrate also includes a columnar first via 107 connected to the first integrated circuit 102 and penetrating the first dielectric layer 105 to a point halfway through the second dielectric layer 106, and a columnar second via 108 connected to the second integrated circuit 103 and penetrating the first dielectric layer 105 to a point halfway through the second dielectric layer 106. The first via 107 and the second via 108 each have a thickness (depth) of, for example, about 100 μm.

[0023] This transmission line substrate also includes a second transmission line 109 of a second line length that is formed in the second dielectric layer 106, connects to the first via 107 and the second via 108, and connects the first integrated circuit 102 and the second integrated circuit 103. A ground layer 110 is formed on the back surface of the substrate 101.

[0024] Here, when the first line length is longer than the second line length, the second dielectric constant is lower than the first dielectric constant, and when the second line length is longer than the first line length, the first dielectric constant is lower than the second dielectric constant. The first and second dielectric constants are set so that the signal transmission times in the first transmission line 104 and the second transmission line 109 are equal to each other.

[0025] This example also includes a third dielectric layer 111 made of a dielectric having a third dielectric constant formed on the second dielectric layer 106, a columnar third via 112 connected to the first integrated circuit 102, penetrating the first dielectric layer 105 and the second dielectric layer 106, and penetrating partway through the third dielectric layer 111, and a columnar fourth via 113 connected to the second integrated circuit 103, penetrating the first dielectric layer 105 and the second dielectric layer 106, and penetrating partway through the third dielectric layer 111. The third via 112 and the fourth via 113 each have a thickness (depth) of, for example, about 100 μm.

[0026] A third transmission line 114 having a third line length formed in a third dielectric layer 111 is connected to the first via 107 and the second via 108. The third transmission line 114 connects the first integrated circuit 102 and the second integrated circuit 103. Here, when the second line length is longer than the third line length, the third dielectric constant is lower than the second dielectric constant, and when the third line length is longer than the second line length, the second dielectric constant is lower than the third dielectric constant. The second dielectric constant and the third dielectric constant are set so that the transmission times of signals in the second transmission line 109 and the third transmission line 114 are equal to each other.

[0027] In this example, the line length is first transmission line 104<second transmission line 109<third transmission line 114. The dielectric constants are first dielectric constant>second dielectric constant>third dielectric constant. In this example, first transmission line 104, second transmission line 109, and third transmission line 114 are formed linearly in a plan view. Note that first transmission line 104, second transmission line 109, and third transmission line 114 do not need to be formed linearly in a plan view.

[0028] The first integrated circuit 102 and the second integrated circuit 103 are provided with input / output units on each of the sides 102a-102d and 103a-103d, and the opposing input / output terminals are connected by corresponding transmission lines. The first integrated circuit 102 and the second integrated circuit 103 have the longest linear distance between the input / output units on the outer sides 102a and 103a, and are connected by two third transmission lines 114 with the longest line length. The first integrated circuit 102 and the second integrated circuit 103 have a slightly shorter linear distance between the input / output units on the sides 102b and 102c and the sides 103b and 103c, and are connected by the respective second transmission lines 109.

[0029] The first integrated circuit 102 and the second integrated circuit 103 are connected by a first transmission line 104 which has a minimum straight-line distance between the input / output sections of sides 102d and 103d and a minimum line length. The first integrated circuit 102 can have a large number of input / output terminals formed on each of sides 102a to 102d, and the second integrated circuit 103 can have a large number of input / output terminals formed on each of 103a to 103d. A transmission line is provided for each of the input / output terminals.

[0030] Each of the substrate 101, the first dielectric layer 105, the second dielectric layer 106, and the third dielectric layer 111 is made of a dielectric insulating material having a low dielectric constant and a low Tan δ (dielectric tangent), i.e., excellent high-frequency characteristics, and has a predetermined thickness. These can be made of an organic base material made of a resin material such as benzocyclobutene (BCB), polyphenylene ether resin (PPE), bismaleimide triazine (BT-resin), polyimide resin, epoxy resin, cyanate resin, or phenol resin. The substrate 101 can be made of an inorganic base material such as ceramic, or a mixture of an inorganic base material and an organic base material such as glass epoxy.

[0031] The substrate 101, the first dielectric layer 105, the second dielectric layer 106, and the third dielectric layer 111 can be configured as a multi-layer structure with wiring patterns, ground patterns, etc. formed on the inner layers, and each of these can be configured as a double-sided substrate. The first transmission line 104, the second transmission line 109, the third transmission line 114, the first via 107, the second via 108, the third via 112, and the fourth via 113 can be formed by a pattern formation method using a known deposition technique, photolithography technique, etching technique, etc.

[0032] Incidentally, the first transmission line 104 is formed in a region of the first dielectric layer 105 having a first dielectric constant ε2, the second transmission line 109 is formed in a region of the second dielectric layer 106 having a second dielectric constant ε3, and the third transmission line 114 is formed in a region of the third dielectric layer 111 having a third dielectric constant ε4. Here, as described above, the first dielectric constant ε2>second dielectric constant ε3>third dielectric constant ε4.

[0033] Here, the phase velocity vp of the sine wave propagating through the transmission line can be expressed as vp = 2πf / kz (1), where kz is the phase constant (the imaginary term of the propagation constant) and f is the frequency.

[0034] For a sine wave, if the phase velocity propagating in a vacuum is vp0, the phase constant is kz0, and the wavelength is λ0, then from equation (1), we obtain "vp0 = 2πf / kz0 = fλ0··· (2)".

[0035] When the transmission line is formed as a microstrip line on a dielectric substrate with a dielectric constant of εr, the phase constant kz is expressed as kz = √εw × kz0 (3).

[0036] Here, εw is the effective dielectric constant, which can be expressed as εw=1+q(εr-1)···(4) using the filling factor q (the ratio of the transmission line surrounded by the dielectric material) determined by the electric field distribution between the dielectric substrate on which the microstrip line is formed and the air. Since the entire electric field of a strip line exists in the dielectric, and q=1, equation (4) gives εw=εr.

[0037] The phase velocity vp of a transmission line formed by a microstrip line on a dielectric substrate with a dielectric constant εr is, from equations (1) to (4), "vp = 2πf / kz = fλ, vp = 2πf / (√εw × kz0) = fλ, vp = vp0 / √εw = fλ0 / √εw (5)".

[0038] Therefore, a transmission line formed on a substrate or layer made of a dielectric has the characteristic that the signal propagation speed gradually slows down as the dielectric constant increases, as is clear from equation (5). In a transmission line substrate, the signal transmitted between first integrated circuit 102 and second integrated circuit 103 via each transmission line can be regarded as a digitally modulated signal or an electric signal consisting of a collection of various high-frequency sine waves.

[0039] In the transmission line substrate, as described above, the third transmission line 114 having the longest line length is formed on the third dielectric layer 111 having a low dielectric constant ε4, the second transmission line 109 is formed on the second dielectric layer 106 having an intermediate dielectric constant ε3, and the first transmission line 104 having the shortest line length is formed on the first dielectric layer 105 having a high dielectric constant ε2. The first, second, and third dielectric constants are set so that the signal transmission times in the first transmission line 104, the second transmission line 109, and the third transmission line 114 are equal to each other.

[0040] In the transmission line substrate of the embodiment, the transmission lines connecting first integrated circuit 102 and second integrated circuit 103 have different line lengths due to the above configuration. However, by forming the lines in dielectric layers having different dielectric constants, the transmission speed of the transmitted high-frequency signal is adjusted, and transmission lines of pseudo-equal length can be constructed.

[0041] As described above, according to the first embodiment, the transmission lines can be freely formed on the dielectric layers without redundant wiring, and the signal transmission characteristics can be improved. In addition, since the regions with different dielectric constants are formed in the lamination direction, the device can be manufactured by a manufacturing technique for vertical integration (lamination). As a result, compared to the case where the regions with different dielectric constants are formed in the horizontal direction by photolithography and etching, the process precision and yield can be improved, and the occupied area is not affected, so the design freedom is also improved. Furthermore, even if the number of input terminals of the integrated circuit to be connected increases, the transmission lines are configured to be arranged in the vertical direction, so that high density and miniaturization are possible. As a result, low power consumption, miniaturization, and cost reduction can be realized.

[0042] In the above description, the transmission lines between the first integrated circuit 102 and the second integrated circuit 103 are limited to six transmission lines, and the number of dielectric layers is four including the substrate 101, but it goes without saying that the present invention is not limited to this. Also, the transmission lines are not limited to strip-shaped transmission lines, and may be coplanar lines.

[0043] [Embodiment 2] Next, a transmission line substrate according to a second embodiment of the present invention will be described with reference to Figures 2A and 2B. Figure 2B shows a cross section taken along line aa' in Figure 2A.

[0044] This transmission line substrate first includes a first integrated circuit 102 and a second integrated circuit 103 arranged (mounted) on a substrate 101 made of a dielectric material. This transmission line substrate also includes a first transmission line 104 of a first line length that is formed on the substrate 101 and connects the first integrated circuit 102 and the second integrated circuit 103.

[0045] The transmission line substrate also includes a first dielectric layer 105 formed to cover the first integrated circuit 102, the second integrated circuit 103, and the first transmission line 104 and made of a dielectric having a first dielectric constant, and a second dielectric layer 106 formed on the first dielectric layer 105 and made of a dielectric having a second dielectric constant.

[0046] The transmission line substrate also includes a first via 107 connected to the first integrated circuit 102 and penetrating through the first dielectric layer 105 to partway through the second dielectric layer 106, and a second via 108 connected to the second integrated circuit 103 and penetrating through the first dielectric layer 105 to partway through the second dielectric layer 106.

[0047] This transmission line substrate also includes a second transmission line 109 of a second line length that is formed in the second dielectric layer 106, connects to the first via 107 and the second via 108, and connects the first integrated circuit 102 and the second integrated circuit 103. A ground layer 110 is formed on the back surface of the substrate 101.

[0048] This example also includes a third dielectric layer 111 made of a dielectric having a third dielectric constant formed on the second dielectric layer 106, a third via 112 connected to the first integrated circuit 102, penetrating the first dielectric layer 105 and the second dielectric layer 106 and partially penetrating the third dielectric layer 111, and a fourth via 113 connected to the second integrated circuit 103, penetrating the first dielectric layer 105 and the second dielectric layer 106 and partially penetrating the third dielectric layer 111.

[0049] A third transmission line 114 having a third line length formed in a third dielectric layer 111 is connected to the first via 107 and the second via 108. The third transmission line 114 connects the first integrated circuit 102 and the second integrated circuit 103.

[0050] The above-mentioned configuration is the same as that of the first embodiment. In the second embodiment, a first ground plane 115 is further provided between the first dielectric layer 105 and the second dielectric layer 106. A second ground plane 116 is also provided between the second dielectric layer 106 and the third dielectric layer 111. Each ground plane is formed in an area not connected to each via. The first ground plane 115 is disposed directly below the second transmission line 109, and the second ground plane 116 is disposed directly below the third transmission line 114.

[0051] In the second embodiment, the distance (h2) between the first via 107 and the first ground plane 115 is smaller than the distance (g1) between the two first vias 107 (h2 <g1,g1

[0052] ​The same is true for the two second transmission lines 109 and the two third transmission lines 114. The distance h3 between the second transmission line 109 and the first ground plane 115 and the distance h4 between the second transmission line 109 and the second ground plane 116 are smaller than the distance (g2) between the two second transmission lines 109. Also, the distance h5 between the third transmission line 114 and the second ground plane 116 is smaller than the distance (g3) between the two third transmission lines 114. These features make it possible to reduce crosstalk noise between the transmission lines. Also, the crosstalk noise between the transmission lines adjacent to each other in the lamination direction of the dielectric layers is reduced to almost zero due to the presence of the ground plane.

[0053] As described above, it is possible to achieve both high density and reduced crosstalk noise according to the second embodiment. In addition, by adjusting the distance between the transmission line and the ground plane by using the transmission line and the ground plane that exists directly below or above the transmission line or both, the characteristic impedance of the transmission line can be set with a higher degree of freedom than with a normal strip line or microstrip line.

[0054] As described above, according to the present invention, when the first line length is longer than the second line length, the second dielectric constant is set lower than the first dielectric constant, and when the second line length is longer than the first line length, the first dielectric constant is set lower than the second dielectric constant, thereby adjusting the transmission speed of the transmitted high-frequency signal and constructing transmission lines of pseudo-equal length, thereby making it possible to transmit high-frequency signals without increasing loss between transmission lines of different line lengths without making the wiring structure redundant. According to the present invention, it is possible to provide a transmission line substrate that improves signal transmission characteristics and achieves low power consumption, small size, and low cost.

[0055] According to the present invention, the first transmission line and the second transmission line are arranged above and below the substrate, and the first and second dielectric constants of the first and second dielectric layers in which the transmission lines are formed are set so that the signal transmission times in the first and second transmission lines are equal, so that the transmission lines can be freely formed without redundant wiring, and the signal transmission characteristics can be improved. Since the transmission lines are integrated vertically, it is possible to apply an integration manufacturing technique, which is expected to improve the process accuracy and yield, and also improve the design freedom. In addition, even if the number of input terminals of the integrated circuit increases, it is possible to increase the density and reduce the size because they are configured vertically.

[0056] Furthermore, it is possible to reduce crosstalk noise between transmission lines, and the characteristic impedance of the lines can be set with a higher degree of freedom than with normal strip lines or microstrip lines. This makes it possible to simultaneously improve wiring density and reduce crosstalk noise between lines, while also achieving low power consumption, compact size, and cost.

[0057] It should be noted that the present invention is not limited to the above-described embodiments, and it is apparent that many modifications and combinations can be made by a person having ordinary knowledge in the art within the technical concept of the present invention. [Explanation of symbols]

[0058] 101...substrate, 102...first integrated circuit, 103...second integrated circuit, 104...first transmission line, 105...first dielectric layer, 106...second dielectric layer, 107...first via, 108...second via, 109...second transmission line, 110...ground layer, 111...third dielectric layer, 112...third via, 113...fourth via, 114...third transmission line.

Claims

1. a first integrated circuit and a second integrated circuit disposed on a substrate made of a dielectric material; a first transmission line having a first line length formed on the substrate and connecting the first integrated circuit and the second integrated circuit; a first dielectric layer formed to cover the first integrated circuit, the second integrated circuit, and the first transmission line, the first dielectric layer being made of a dielectric material having a first dielectric constant; a second dielectric layer formed on the first dielectric layer and made of a dielectric material having a second dielectric constant; a first via hole connected to the first integrated circuit and extending through the first dielectric layer and partway through the second dielectric layer; a second via hole connected to the second integrated circuit and extending through the first dielectric layer and partway through the second dielectric layer; a second transmission line having a second line length, formed in the second dielectric layer, connected to the first via and the second via, for connecting the first integrated circuit and the second integrated circuit; and a ground layer formed on the back surface of the substrate. Equipped with When the first line length is longer than the second line length, the second dielectric constant is lower than the first dielectric constant; When the second line length is longer than the first line length, the first dielectric constant is lower than the second dielectric constant. A transmission line substrate comprising:

2. 2. The transmission line substrate according to claim 1, The transmission line substrate further comprising a first ground plane formed between the first dielectric layer and the second dielectric layer.

3. 3. The transmission line substrate according to claim 1, The first dielectric constant and the second dielectric constant are The first transmission line and the second transmission line are set in a state in which the transmission times of the signals in the first transmission line and the second transmission line are equal to each other. A transmission line substrate comprising:

4. The transmission line board according to any one of claims 1 to 3, 2. A transmission line substrate, comprising: a first transmission line and a second transmission line, the first transmission line and the second transmission line being formed linearly in a plan view.

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