Method for manufacturing bonded substrate and method for manufacturing circuit board

The method addresses the challenge of mold release layer removal in ceramic bonded substrates by using wet etching and buffing to ensure consistent copper etching and strengthen solder joints in ceramic bonded substrates.

JP7610707B2Active Publication Date: 2025-01-08NGK ELECTRONICS DEVICES INC +1

Patent Information

Application Number
JP2023527529
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2021-06-11
Filing Date
2022-03-25
Publication Date
2025-01-08
Estimated Expiration
2042-03-25

Smart Images

  • Figure 0007610707000002
    Figure 0007610707000002
  • Figure 0007610707000003
    Figure 0007610707000003
  • Figure 0007610707000004
    Figure 0007610707000004
Patent Text Reader

Abstract

The present invention suitably removes, after bonding, a release layer formed on a copper plate when fabricating a bonded substrate using pressurizing / heating bonding. This method for manufacturing a bonded substrate comprises: a preparation step for preparing one or a plurality of bonding objects, which are formed by laminating a brazing material layer and a copper plate on both main surfaces of a ceramic substrate; a lamination step for for laminating the following element while respectively providing release layers between the one or plurality of bonding objects and a pair of holding members for holding the same; a bonding step for heating the one or plurality of bonding objects while pressurizing using the first holding member, thereby obtaining one or a plurality of bonded substrates in which the ceramic substrate and the copper plate are bonded by a bonding layer; and a removal step for, by wet etching, dissolving a portion, of the copper plate provided to the bonded substrate, in contact with the release layer and thereby removing the release layer from the bonded substrate.
Need to check novelty before this filing date? Find Prior Art

Description

[Technical field]

[0001] The present invention relates to the preparation of bonded ceramic substrates, and in particular to post-bonding treatment. [Background technology]

[0002] Widely known ceramic insulating heat dissipation circuit boards on which electronic components such as semiconductor chips are mounted include silicon nitride insulating heat dissipation circuit boards and alumina insulating heat dissipation circuit boards. Ceramic insulating heat dissipation circuit boards have the role of dissipating heat generated by the mounted electronic components to the outside, and also serve as an electrical connection between the electronic components and the outside.

[0003] A ceramic insulating heat dissipation circuit board is a bonded board made by bonding copper plates (sometimes called copper foil, copper circuit board, copper heat sink, etc.) whose main component is metallic copper to both sides of a ceramic substrate using a brazing material containing active metal. An example of the bonding method is pressure heat bonding. Usually, a semiconductor chip is bonded (mounted) to one of the copper plates by silver sintering bonding, and a metal heat dissipation plate (heat sink), for example, is soldered to the other copper plate.

[0004] Among them, silicon nitride insulating heat dissipation circuit boards are often used for in-vehicle applications because they have superior heat dissipation properties and reliability compared to alumina-based insulating heat dissipation circuit boards using alumina-based ceramic substrates. In such cases, silver plating is often applied to the surface of the copper foil constituting the silicon nitride insulating heat dissipation circuit board in order to improve the bonding reliability of the silver sintered bonding between the semiconductor chip and the silicon nitride insulating heat dissipation circuit board. For example, a form in which silver plating is applied by electroless plating to the surface of a copper circuit board provided on one side of a silicon nitride insulating heat dissipation circuit board is already known (see, for example, Patent Document 1).

[0005] Also, a method is already known in which a copper plate and a silicon nitride ceramic substrate are bonded together by pressure and heat using a brazing material, and which allows multiple bonded substrates to be obtained simultaneously (see, for example, Patent Document 2). In essence, this method involves preparing multiple intermediate bodies (a silicon nitride ceramic substrate having brazing material layers formed on the front and back surfaces and a copper plate disposed on the brazing material layers), applying a coating (release layer) containing a release agent to the surface of each copper plate, stacking these multiple intermediate bodies, bonding the entire stack thus obtained by heating while applying pressure, and finally removing the release layer to obtain multiple bonded substrates.

[0006] When a plurality of bonded substrates are obtained by the method disclosed in Patent Document 2, it is required to ensure that no release layer remains on the surfaces of the copper plates of the obtained bonded substrates.

[0007] However, when the release agent is ceramic particles, depending on the joining temperature, the copper particles of the softened copper plate may enter the gaps between the release agent particles, forming a coating that is a mixture of the two, and this coating may remain on the copper plate.

[0008] Conventionally, the coating has been removed by mechanical polishing processes such as brush polishing (brush cleaning) and buff polishing, but it has been difficult to completely remove the coating because the release agent particles sink into the copper plate or are caught in the copper plate due to its ductility.

[0009] The residual release agent etc. can cause variations in the reaction state when various treatments are carried out in later processes, such as copper etching for patterning or surface treatment, or when a circuit board obtained by dividing the patterned bonded board is subjected to a silver plating treatment as disclosed in Patent Document 1. In particular, the latter can cause a decrease in the solder bonding strength to the silver plating film. [Prior art documents] [Patent documents]

[0010] [Patent Document 1] International Publication No. 2020 / 218193 [Patent Document 2] International Publication No. 2020 / 105160 Summary of the Invention

[0011] The present invention has been made in consideration of the above problems, and aims to provide a technique for suitably removing a release layer formed on a copper plate after bonding when producing a bonded substrate by a pressure and heat bonding method.

[0012] In order to solve the above problems, a first aspect of the present invention is a method for manufacturing a bonded substrate, the method comprising the steps of: preparing one or more objects to be joined, each of which is formed by laminating a brazing material layer and a copper plate on both main surfaces of a ceramic substrate; stacking the one or more objects to be joined and a pair of clamping members that sandwich the one or more objects to be joined, with a release layer provided between the pair of clamping members, such that the one or more objects to be joined are sandwiched between the pair of clamping members; and stacking the one or more objects to be joined between the pair of clamping members. According to the surface pressure profile where the maximum surface pressure is 5MPa to 25MPa The method includes a bonding process for obtaining one or more bonded substrates in which the ceramic substrate and the copper plate are bonded with a bonding layer by heating the one or more objects to be bonded while applying pressure, and a removal process for removing the release layer from the bonded substrate by dissolving the copper plate in the bonded substrate at a location in contact with the release layer by wet etching.

[0013] A second aspect of the present invention is a method for producing a bonded substrate according to the first aspect, characterized in that an etching liquid having a surface tension of 70 mN / m or less is used in the removing step.

[0014] A third aspect of the present invention is a method for producing a bonded substrate according to the second aspect, wherein the etching solution is hydrogen peroxide (H 2 O 2 ) at 1.5% to 30%, and sulfuric acid (H 2 SO 4 The present invention is characterized in that the etching solution is a sulfuric acid-hydrogen peroxide-based solution containing 1% to 20% of

[0015] A fourth aspect of the present invention is a method for producing a bonded substrate according to the second or third aspect, characterized in that in the removing step, an etching time is set to 45 seconds or more. A fifth aspect of the present invention is a method for manufacturing a bonded substrate according to any one of the first to fourth aspects, characterized in that it includes a buffing step of buffing the copper plate of the bonded substrate that has been subjected to the removal step.

[0016] The present invention 6 The present invention relates to a method for manufacturing a circuit board, comprising the steps of: 5 and a plating step of applying substitution silver plating to a surface of the copper plate of the bonded substrate that has been subjected to the patterning step.

[0020] The first to third aspects of the present invention 5 According to this aspect, the release layer adhered to the copper plate constituting the bonded substrate in the pressure and heat bonding method can be reliably removed.

[0021] In addition, the present invention 6 According to the above aspect, the variation in etching of the copper plate during patterning of the circuit pattern is reduced. Also, when a silver plating film is formed on a circuit board by displacement silver plating, the condition of the interface between the copper plate surface and the silver plating film is improved. [Brief description of the drawings]

[0023] [Figure 1] FIG. 2 is a cross-sectional view that diagrammatically illustrates a bonded substrate 100. [Diagram 2] 1A to 1C are diagrams showing the procedure for producing a bonded substrate 100, including post-processing steps. [Diagram 3] FIG. 13 is a diagram showing a schematic view of pressurized heat bonding of an intermediate product 150. [Figure 4] FIG. 13 is a diagram showing the state of removal of a release layer 165 when the concentration of hydrogen peroxide in an etching solution is changed. [Diagram 5] FIG. 13 is a diagram showing the state of removal of release layer 165 when etching time is changed. [Figure 6]FIG. 13 is a diagram showing the difference in appearance of release layer 165 depending on the etching time when an iron chloride-based etching solution is used as the etching solution. [Figure 7] 1 is an SEM image of the copper plate surface after removing the silver plating film from the circuit board of the comparative example. [Figure 8] 1 is a SEM image of the copper plate surface after removing the silver plating film from the circuit board of the example. [Figure 9] 13 is a graph showing a histogram and changes in integrated value for each interval for the number of facets per mm2 in a comparative example. [Figure 10] 13 is a graph showing a histogram and changes in integrated value for each interval for the number of facets per mm2 in an example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0024] <Bonded substrate> FIG. 1 shows the present embodiment. In a nutshell FIG. 1 is a cross-sectional view that diagrammatically illustrates such a bonded substrate 100.

[0025] The bonded substrate 100 according to this embodiment includes a ceramic substrate 110, a copper plate 111, a bonding layer 112, a copper plate 113, and a bonding layer 114. The bonded substrate 100 may include elements other than these elements.

[0026] Although the use of the bonded substrate 100 is not particularly limited, the following description will be given on the assumption that the bonded substrate 100 is used as an insulating heat dissipation substrate on which a power semiconductor element is mounted in a power semiconductor module. In this case, one exposed main surface 111B of the copper plate 111 is used as a bonding surface for the power semiconductor element, and one exposed main surface 113B of the copper plate 113 is used as a bonding surface for a metal heat dissipation plate (heat sink). In the following description, the main surfaces 111B and 113B may be collectively referred to as the copper plate surfaces.

[0027] The other main surface (joining surface) 111A of the copper plate 111 is joined to approximately the entire first main surface 1101 of the ceramic substrate 110 by a bonding layer 112. Meanwhile, the other main surface (joining surface) 113A of the copper plate 113 is joined to approximately the entire second main surface 1102 of the ceramic substrate 110 by a bonding layer 114. The first main surface 1101 and the second main surface 1102 face each other.

[0028] As the ceramic substrate 110, a wide variety of ceramic substrates that can be bonded by pressure and heat, as described below, can be used. 3 N 4 Examples of the ceramic substrate 110 include a silicon nitride (AlN) substrate, an aluminum nitride substrate, an alumina substrate, and a substrate in which zirconia particles are dispersed in alumina. Among them, a silicon nitride ceramic substrate is advantageous in that it has high thermal conductivity and high insulation properties, and also has high mechanical strength, and is therefore unlikely to break during pressure and heat bonding. There are no particular limitations on the planar shape or size of the ceramic substrate 110, but from the perspective of miniaturizing the power semiconductor module, an example of the ceramic substrate 110 is a rectangular substrate in plan view with a side length of about 100 mm to 250 mm and a thickness of 0.20 mm to 0.40 mm.

[0029] The thickness of the copper plates 111 and 113 is preferably about 300 μm to 2500 μm, although it is not necessary for them to have the same value.

[0030] The bonding between the ceramic substrate 110 and the copper plates 111 and 113 by the bonding layers 112 and 114 is achieved by an active metal method, which will be described later. As the active metal, at least one metal selected from the group consisting of titanium (Ti) and zirconium (Zr) is used. When the ceramic substrate 110 is a silicon nitride ceramic substrate, the bonding layers 112 and 114 mainly contain at least one nitride of titanium and zirconium used as the active metal. The thickness of the bonding layers 112 and 114 may be about 0.1 μm or more and 5 μm or less. However, it is not necessary for both layers to have the same thickness.

[0031] The copper plate 111, together with the bonding layer 112, is patterned into a predetermined shape (circuit pattern) corresponding to the power semiconductor element to be bonded. Therefore, the first main surface 1101 of the ceramic substrate 110 is partially exposed in the bonding area of ​​the copper plate 111. In addition, the copper plate 113 and the bonding layer 114 may be patterned. However, for the sake of convenience in the following description, the term bonded substrate 100 will include those that are not patterned.

[0032] 1, detailed illustration is omitted, but more specifically, the bonded substrate 100 is a mother substrate to be divided into a plurality of substrates (circuit substrates) by singulation, and a large number of circuit patterns having the same shape are two-dimensionally repeated on the copper plate 111 and the bonding layer 112 provided on the first main surface 1101. Each circuit substrate is then used for mounting a power semiconductor element.

[0033] <Preparation of bonded substrate> Fig. 2 is a diagram showing the procedure for producing bonded substrate 100, including post-processing. In this embodiment, the bonding of ceramic substrate 110 and copper plates 111 and 113 to obtain bonded substrate 100 is performed by an active metal method using an active metal brazing material. Fig. 3 is a diagram showing a schematic view of pressure-heat bonding of intermediate product (product to be bonded) 150, which is performed in the process of producing bonded substrate 100 by the active metal method.

[0034] (Intermediate product) In producing the bonded substrate 100, first, a plurality of intermediate products 150 are prepared (step S1). In this embodiment, the prepared intermediate products 150 are subjected to pressure heating bonding and other processes to obtain the bonded substrate 100.

[0035] 3, the intermediate product 150 has a configuration in which a brazing material layer 162 and a copper plate 111 are laminated in this order on a first main surface 1101 of a ceramic substrate 110, and a brazing material layer 164 and a copper plate 113 are laminated in this order on a second main surface 1102. Note that in the state of the intermediate product 150, the copper plate 111 (or further the copper plate 113) is not patterned.

[0036] The brazing layers 162 and 164 are formed by applying a paste (brazing paste) containing an active metal brazing material and a solvent. The brazing paste may further contain a binder, a dispersant, an antifoaming agent, and the like.

[0037] The active metal brazing material is made of powder. The active metal brazing material contains, for example, at least one metal element selected from the group consisting of silver (Ag) and copper (Cu), and at least one active metal element selected from the group consisting of titanium (Ti) and zirconium (Zr). The active metal brazing material is preferably a metal powder containing silver and titanium hydride (TiH 2 ) powder and zirconium hydride (ZrH 2 In this case, the active metal brazing material does not contain alloy powder, which is difficult to atomize at low cost, so that the active metal brazing material can be easily atomized at low cost.

[0038] The active metal brazing material is preferably made of a powder having an average particle size of 0.1 μm or more and 10 μm or less. The average particle size can be obtained by measuring the particle size distribution using a commercially available laser diffraction type particle size distribution measuring device and calculating D50 from the measured particle size distribution. When the active metal brazing material has such a small average particle size, the brazing material layers 162 and 164 can be made thin.

[0039] The brazing material layers 162 and 164 are formed by applying a brazing material paste to the first main surface 1101 and the second main surface 1102 of the ceramic substrate 110. More specifically, the brazing material layers 162 and 164 are formed by volatilizing the solvent from the applied film formed in this manner. Then, the copper plates 111 and 113 are laminated on the brazing material layers 162 and 164, respectively, to form the intermediate product 150. More specifically, the copper plate 111 contacts the brazing material layer 162 on the main surface 111A, and the copper plate 113 contacts the brazing material layer 162 on the main surface 111B. is the Lord It is in contact with the brazing material layer 164 at surface 113A.

[0040] (Release layer) Next, a release layer 165 is formed on the main surface 111B of the copper plate 111 provided in all of the prepared intermediate products 150, or on the main surface 113B of the copper plate 113 provided in all of the prepared intermediate products 150 (step S2).

[0041] However, in the intermediate products 150 located at the top and bottom of the laminate 140 described below, release layers 165 are formed on both main surfaces 111B and 113B. Alternatively, the release layers 165 may be formed on both main surfaces 111B and 113B of all intermediate products 150.

[0042] The release layer 165 is formed by spraying a coating liquid containing a release agent and a solvent onto one or both of the principal surfaces 111B and 113B, which are the surfaces on which the release layer 165 is to be formed. More specifically, the solvent evaporates from the coating film formed by the spray coating, thereby forming the release layer 165. The coating liquid may further contain a binder, a dispersant, an antifoaming agent, and the like. The solvent contains isopropyl alcohol, and the like.

[0043] Preferably, the coating liquid is electrostatically applied to the surface to be coated, which prevents the coating liquid from flowing around to areas other than the surface to be coated, thereby reducing loss of the coating liquid.

[0044] The release layer 165 may be formed by a method different from the above-mentioned method. For example, the release layer 165 may be provided by screen printing a paste containing a release agent onto the surface to be formed.

[0045] The thickness of the release layer 165 is arbitrary, but is preferably 5 μm or more and 30 μm or less. If the thickness of the release layer 165 is thinner than 5 μm, the surface to be formed is insufficiently covered by the release layer 165, and the copper plate 111 or the copper plate 113 tends to be easily exposed. If pressure-heat bonding is performed on an intermediate product 150 whose surface to be formed is insufficiently covered by the release layer 165 in this way, it may be difficult to separate the intermediate products 150 from each other and to separate the intermediate product 150 from the upper punch 180 and the lower punch 181, which are a pair of clamping members that clamp the intermediate product 150. On the other hand, if the thickness of the release layer 165 is thicker than 30 μm, the time required to remove the release layer 165 from the intermediate product 150 after pressure-heat bonding tends to be longer.

[0046] The release agent is made of a powder. The release agent is preferably made of boron nitride (BN) powder, graphite powder, molybdenum disulfide (MoS 2 ) powder and molybdenum dioxide (MoO 2 The release agent contains at least one powder selected from the group consisting of boron nitride powder, which is particularly desirably a highly heat-resistant powder. The release agent may contain alumina.

[0047] The release agent preferably has an average particle size of 0.1 μm or more and 10 μm or less. The average particle size can be obtained by measuring the particle size distribution using a commercially available laser diffraction type particle size distribution measuring device and calculating D50 from the measured particle size distribution. If the average particle size is larger than this range, when the copper plates 111 and 113 are bonded to the ceramic substrate 110 by pressurized and heated bonding, the shape of the powder of the release agent is transferred to the copper plate surfaces (principal surfaces 111B and 113B) in contact with the release layer 165, which tends to deteriorate the surface roughness of the copper plate surfaces, which is not preferable.

[0048] (Pressure and heat bonding) The intermediate products 150, each having a release layer 165 formed thereon, are stacked at predetermined positions in a pressure and heat bonding device 170, and pressure and heat bonding is performed on the laminate 140 thus obtained (step S3). Fig. 3 shows how pressure and heat bonding is performed on the laminate 140, which is a laminate of three intermediate products 150 (150a to 150c).

[0049] 3, in the case of pressure and heat bonding, the laminate 140 is placed between an upper punch 180 and a lower punch 181 of the pressure and heat bonding device 170. Then, the laminate 140 is sandwiched from above and below by the upper punch 180 and the lower punch 181, so that each intermediate product 150 is pressurized. Furthermore, in parallel with this pressurization, the laminate 140 is heated by a heater 182 also provided in the pressure and heat bonding device 170.

[0050] Preferably, the upper punch 180 and the lower punch 181 apply pressure to the laminate 140 in the lamination direction during pressure-heat bonding according to a pressure profile in which the maximum pressure is 5 MPa or more and 25 MPa or less. Furthermore, the heater 182 heats the intermediate product 150 according to a temperature profile in which the maximum temperature is 800° C. or more and 1000° C. or less. Preferably, the heating is performed according to a temperature profile in which the maximum temperature is 800° C. or more and 900° C. or less.

[0051] By performing pressure and heat bonding in the above manner, the bonded substrate 100 is obtained. In the present embodiment, pressure and heat are applied to the multiple intermediate products 150 constituting the laminate 140 at once, so that multiple bonded substrates 100 can be obtained at the same time.

[0052] For example, if the ceramic substrate 110 is made of silicon nitride ceramic, in each intermediate product 150 constituting the laminate 140, the active metal (e.g., titanium) present in the brazing material layers 162 and 164 reacts with nitrogen in the ceramic substrate 110, while the silver present in the brazing material layers 162 and 164 diffuses into the copper plates 111 and 113. At that time, diffusion of other metal components contained in the active metal paste into the copper plates 111 and 113, diffusion of silicon contained in the ceramic substrate 110 into the brazing material layers 162 and 164, etc. may also occur.

[0053] As a result, the brazing material layers 162 and 164 are transformed into bonding layers 112 and 114, respectively, whose main component is an active metal nitride, and the copper plates 111 and 113 are bonded to the ceramic substrate 110 at the bonding layers 112 and 114. In this way, the bonded substrate 100 is obtained.

[0054] Similarly, when an oxide substrate such as an alumina substrate or a substrate in which zirconia particles are dispersed in alumina is used as the ceramic substrate 110, the brazing layers 162 and 164 are transformed into bonding layers 112 and 114 as a result of the pressure and heat bonding, thereby obtaining a bonded substrate 100.

[0055] (Removal of release layer) However, at the stage where the pressure and heat bonding is completed, the multiple bonded substrates 100 and the upper punch 180 and the lower punch 181 are in a state of being stacked with the release layer 165 interposed therebetween. They can be separated by peeling them off at the release layer 165, but the release layer 165 remains on the copper plate surface of each separated bonded substrate 100. The remaining release layer 165 can cause problems during patterning, plating, and other processes in later steps. Therefore, a process is performed to remove the release layer 165 remaining on the bonded substrate 100 after separation (step S4).

[0056] In this embodiment, the release layer 165 is removed by wet etching. However, the wet etching does not directly dissolve and remove the remaining release layer 165 itself, but targets the copper plate surface, i.e., the main surface 111B and the main surface 113B, at the locations in contact with the release layer 165. By etching copper at the locations where the release layer 165 remains, the release layer 165 can be removed more reliably.

[0057] The etching liquid is preferably one that can etch copper and has a degree of permeability that allows it to penetrate through the release layer 165 covering the copper plate surface and reach the copper plate surface. The permeability can be evaluated by the surface tension of the etching liquid, and it can be said that the smaller the surface tension, the better the permeability.

[0058] Specifically, an etching solution for removing the release layer 165 is preferably one having a surface tension of 70 mN / m or less. 2 O 2 ) at 1.5% to 30%, and sulfuric acid (H 2 SO 4 An example of such an etching solution is an aqueous solution containing 1% to 20% hydrogen peroxide (H 2 O 2 ) and sulfuric acid (H 2 SO 4 ) is dissolved in water, and the mass ratio of hydrogen peroxide to the mass of the aqueous solution is 1.5% to 30%, and the mass ratio of sulfuric acid is 1% to 20%. The surface tension of such a sulfuric acid-hydrogen peroxide-based etching solution is about 60 mN / m. Note that copper chloride-based or iron chloride-based etching solutions and DI water, which have a surface tension exceeding 70 mN / m and high viscosity, are not suitable for removing the release layer 165.

[0059] If the etching time is set to 45 seconds or more, the release layer 165 can be generally removed satisfactorily. There is no particular upper limit from the viewpoint of complete removal of the release layer 165, but excessive etching will result in excessive thinning of the copper plates 111 and 113, so in practice, a time of 1000 seconds or less is sufficient. The temperature of the etching solution may be about 20°C to 60°C.

[0060] After the wet etching process is completed, the exposed copper plate is buffed (step S5). The buffing is performed to adjust the condition of the copper plate surface and to roughen the copper plate surface in order to improve the adhesion of DFR (dry film resist) in the subsequent DFR lamination process.

[0061] Preferably, the buffing is performed in two stages: mechanical buffing and chemical buffing. The former is performed mainly for the purpose of adjusting the condition of the copper plate surface, and the latter is performed mainly for the purpose of roughening the copper plate surface. For the chemical buffing, for example, an aqueous hydrogen peroxide solution is used.

[0062] In the conventional technology disclosed in Patent Document 2, the above-mentioned wet etching for removing the release layer was not performed, and instead, after pressure and heat bonding, the separated bonded substrates were subjected to brush polishing (brush cleaning) and then buff polishing. This was intended to completely remove the release layer at the buff polishing stage, but in reality, the release layer was not always completely removed by buff polishing, and tended to remain on the copper plate surface in the form of a mixture with copper, etc.

[0063] However, in the present embodiment, as described above, after pressure and heat bonding, the separated bonded substrates 100 are wet etched, and at this point, the release layer 165 is completely removed before buffing, so that the remaining release layer 165 does not cause problems in the subsequent steps. In addition, because the release layer 165 is suitably removed prior to buffing, buffing can be performed specifically for the purpose of increasing the adhesion of the DFR.

[0064] By carrying out the buff polishing, the bonded substrate 100 in a state before patterning is obtained.

[0065] (Patterning) After the buffing, the bonded substrate 100 is usually subjected to a process for patterning the copper plate 111 (and the bonding layer 112) into a predetermined circuit pattern. As described above, the bonded substrate 100 is produced as a mother substrate to be divided into a large number of substrates by singulation, and therefore, during patterning, a large number of circuit patterns having the same shape are repeatedly provided two-dimensionally.

[0066] First, a DFR lamination process (step S6) is performed to attach a DFR (dry film resist) to substantially the entire main surface 111B that has been roughened by buff polishing, followed by patterning (step S7) by a known photolithography process.

[0067] The patterning is realized by partially dissolving and removing the DFR by known exposure and development processes to partially expose the main surface 111B of the copper plate 111 according to the circuit pattern to be formed, and then etching the exposed portion (copper etching). An example of an etchant for copper etching is a ferric chloride-based etchant.

[0068] Then, following the copper etching, the bonding layer 112 that exists directly below the position where the copper has been removed by the copper etching is removed (residue removal) (step S8). The removal of the bonding layer 112 can be performed by etching or the like.

[0069] When the patterning is completed, the DFR is peeled off (step S9). For example, an NaOH aqueous solution is used for such peeling. The bonded substrate 100 from which the DFR has been peeled off corresponds to the bonded substrate 100 shown in FIG.

[0070] When the copper plate 113 is patterned, the same series of processes including DFR lamination, patterning, residue removal, and DFR peeling are performed on the main surface 113B.

[0071] (grooving) Hereinafter, the post-processing performed on the bonded substrate 100 will be described. First, a groove processing process is performed (step S10) to separate the bonded substrate 100, which is a mother substrate on which a large number of circuit patterns having the same shape are two-dimensionally repeated, into a large number of circuit substrates each having a unit circuit pattern in a later process. The groove processing is performed, for example, by a laser. The laser light source is a N 2 A laser is an example.

[0072] (Silver plating) Next, a process is performed to form a silver plating film on the copper plate surfaces (principal surfaces 111B and 113B) of bonded substrate 100, which is the mother substrate after groove processing. The silver plating film is formed mainly for the purpose of increasing the bonding strength when bonding the power semiconductor element and the heat sink to the circuit board. In particular, the silver plating is performed for the purpose of increasing the bonding strength when soldering a metal heat sink to principal surface 113B.

[0073] First, prior to the formation of the silver plating, a treatment is performed to adjust the condition of the copper plate surface (step S11). Specifically, a degreasing treatment is performed to remove organic residue remaining on the copper plate surface, and soft etching is performed to slightly etch the copper plate surface. For example, an ethylene glycol aqueous solution is used for the degreasing treatment. For the soft etching, an aqueous hydrogen peroxide solution is used as an etching solution.

[0074] Then, the copper plate surface whose surface condition has been adjusted by the above-mentioned treatment is subjected to electroless plating by displacement silver plating (step S12). A suitable plating bath is one containing about 10% aluminocarboxylate and about 1.0 g / L silver.

[0075] The bonded substrate 100, whose copper plate surface is plated with silver, is broken at the positions of the grooves formed earlier and divided into individual pieces. As a result, a large number of circuit substrates, each having a unit circuit pattern, are obtained from the bonded substrate 100, which is a mother substrate on which a large number of circuit patterns having the same shape are two-dimensionally repeated (step S13).

[0076] <Effects of removing the release layer> As described above, in this embodiment, the bonded substrates 100 obtained in a laminated state by pressure and heat bonding are peeled from each other at the release layer 165, and then wet etching is performed, so that the release layer 165 remaining on the copper plate surface of the bonded substrate 100 can be reliably removed. This treatment has the effect of reducing the variation in copper etching during patterning. It also has the effect of improving the state of the interface between the copper plate surface and the silver plating film when a silver plating film is formed on the patterned bonded substrate 100 by displacement silver plating in a later process.

[0077] More specifically, with regard to the latter, if wet etching is not performed as a treatment to remove the release layer, as in the prior art, and only a mechanical polishing treatment such as brush polishing (brush cleaning) or buff polishing is performed, the release layer is not necessarily removed sufficiently, and the release agent particles tend to remain on the copper plate surface in the form of a mixture with copper, etc., until the stage of forming the silver plating film.

[0078] If displacement silver plating is performed with the release agent particles remaining in this way, the balance between the copper dissolution rate and the silver deposition rate is lost, and many facets are formed on the copper plate surface directly below the silver plating film, resulting in many voids between the copper plate surface and the silver plating film. In this specification, the term "facet", which originally means a surface (crystal surface), is used to mean a "hole" that is recessed from the surroundings and formed on the copper plate surface due to the formation of facets. The number of such holes is referred to as the number of facets or the number of facets. The presence of many facets and voids is a factor that reduces the bonding strength of the solder joint to the copper plate to which the silver plating film is applied. If the circuit board is used in a power semiconductor module, it is a factor that reduces the solder bonding strength of the heat sink to the main surface 113B.

[0079] In contrast, in the present embodiment, the release layer 165 is suitably removed by wet etching before the subsequent steps are performed, so that when the silver plating film is formed, the occurrence of gaps between the silver plating and the copper plate due to the formation of facets on the surface of the copper plate is suitably suppressed. Therefore, the bonding strength of the solder bonding to the copper plate on which the silver plating film is applied is sufficiently ensured. If the circuit board is used in a power semiconductor module, the solder bonding strength of the heat sink to the main surface 113B is sufficiently ensured.

[0080] Specifically, in a bonded board or a circuit board manufactured by a conventional procedure without wet etching, the thickness of the copper plate surface is 1 mm 2 In the case of a copper plate surface of a bonded substrate or a circuit board manufactured by the procedure according to the present embodiment, the number of facets per mm is tens of thousands.2 The number of facets per unit area is reduced to 3000 or less, which ensures good solder joint strength.

[0081] Preferably, the number of facets having a diameter (facet diameter) of 2.5 μm or more is 1 mm 2 The number of facets per mm2 with a facet diameter of less than 2.5 μm is 1200 or less. 2 More preferably, the number of facets with a facet diameter of less than 1.5 μm is 1800 or less per mm 2 In this case, the bonding strength of the solder joint is more suitably ensured.

[0082] As described above, according to this embodiment, when a plurality of intermediate products, each of which is formed by laminating a brazing material layer and a copper plate on both main surfaces of a ceramic substrate, are laminated with a release layer therebetween, and the laminate thus obtained is subjected to pressure-heat bonding to obtain a plurality of bonded substrates at once, the release layer remaining on the bonded substrate after pressure-heat bonding can be removed reliably by performing wet etching that dissolves the surface of the copper plate. This reduces the variation in copper etching during subsequent patterning. In addition, when a silver plating film is formed on the copper plate surface of the bonded substrate by displacement silver plating in a later process, the state of the interface between the copper plate surface and the silver plating film is also improved.

[0083] In particular, in the latter case, the occurrence of gaps between the silver plating and the copper plate due to the formation of facets on the copper plate surface is effectively suppressed, thereby ensuring sufficient bonding strength of the solder joint to the copper plate coated with a silver plating film.

[0084] <Modification> In the above embodiment, a laminate of a plurality of intermediate products is subjected to pressure and heat bonding. However, in the present embodiment, only one intermediate product is subjected to pressure and heat bonding. vs. In one embodiment, the release layer attached to the copper plate in the resulting bonded substrate is removed by wet etching.

[0085] The steps of groove processing (step S10) and singulation (step S13) in the above-described embodiment may be omitted. When the dimensions of the circuit board used in the power semiconductor module are large, such steps may be taken. That is, one bonded substrate 100 may be used as it is in the power semiconductor module as a whole. EXAMPLES

[0086] (Verification of release layer removal effect) An experiment was conducted to confirm the effect of removing the release layer 165 remaining on the bonded substrate 100 by wet etching. Boron nitride (BN) powder was used as the release agent, and a sulfuric acid-hydrogen peroxide-based etching solution was used as the etching solution.

[0087] FIG. 4 shows the removal of release layer 165 when the hydrogen peroxide concentration in the etching solution is changed, using an actual image (part) captured by a camera, a binarized image of the captured image, and the area ratio of white and black areas in the binarized image determined by image analysis.

[0088] The binarization process for identifying the white and black parts was performed by creating a density histogram based on the captured image, with the vertical axis representing the number of pixels that appeared and the horizontal axis representing 256 gray levels (density values) from 0 to 255, setting the threshold value of the gray level to 100, and judging pixels with a gray level of less than 100 to be black and pixels with a gray level of 100 or more to be white. The reason why the threshold value of the gray level is set to 100 is that when the copper plate surface is completely covered with the release layer 165 and is not exposed at all, the number of pixels that appeared in the gray level range of 0 to 100 is almost zero, and a peak in the number of pixels that appeared was observed in the gray level range of 100 to 255, whereas when the release layer 165 is completely removed and the entire copper plate surface is exposed, the number of pixels that appeared in the gray level range of 100 to 255 was almost zero. Appearance The number of pixels was almost 0, and a peak in the number of pixels that appeared was observed in the gray level range of 0 to 100.

[0089] More specifically, the hydrogen peroxide concentration of the sulfuric acid-hydrogen peroxide etching solution was varied to four levels: 1%, 1.5%, 2%, and 3%, the sulfuric acid concentration was 10%, the temperature was 40° C., and the etching time was 160 seconds.

[0090] FIG. 5 shows the removal of release layer 165 when etching times are different, using a captured image similar to that of FIG. 4, a binary image, and the area ratio of white and black areas in the binary image.

[0091] More specifically, the hydrogen peroxide concentration of the etching solution was 3%, the sulfuric acid concentration was 10%, the temperature was 40°C, and the etching time was varied to five levels: 0 seconds (i.e., untreated), 15 seconds, 30 seconds, 45 seconds, and 160 seconds.

[0092] It is apparent from FIGS. 4 and 5 that when the hydrogen peroxide is 1.5% or more and the etching time is 45 seconds or more, the release layer is removed almost entirely.

[0093] 6 is a diagram showing the difference in appearance of the release layer 165 depending on the etching time when an iron chloride-based etching solution is used as the etching solution, using captured images similar to those in FIG. 4. The etching time was varied to four levels: 30 seconds, 60 seconds, 90 seconds, and 600 seconds.

[0094] 6, it is confirmed that there is almost no change in the release layer 165 up to the 90 second point. Furthermore, it is confirmed that even at the 600 second point, a large amount of the release layer 165, which appears white, remains. This result indicates that the iron chloride-based etching solution is not suitable for removing the release layer 165.

[0095] (Surface tension evaluation) The surface tension, which is an index of permeability, was measured for a sulfuric acid-hydrogen peroxide-based etching solution, an iron chloride-based etching solution, and DI water.

[0096] The sulfuric acid-hydrogen peroxide etching solution was an aqueous solution with a hydrogen peroxide concentration of 3% and a sulfuric acid concentration of 10%, and the iron chloride etching solution was an aqueous solution with an iron chloride concentration of 40% and a hydrochloric acid concentration of 10%.

[0097] The measuring device used was CBVP-Z manufactured by Kyowa Interface Science, the plate method was used, and the measuring temperature was 20°C.

[0098] The results were as follows: Sulfuric acid-hydrogen peroxide system: 60.6 mN / m; Ferric chloride: 77.8 mN / m; DI water: 73.1 mN / m.

[0099] Considering the above results together with the results shown in Figures 4 to 6, it is suggested that a sulfuric acid-hydrogen peroxide-based etching solution, which has low surface tension and excellent permeability, is suitable for removing the release layer 165.

[0100] (Facet number evaluation) Next, the number of facets present on a circuit board on which a silver plating film was formed was evaluated in order to confirm the usefulness of applying wet etching to remove the release layer 165. As an example, a circuit board was prepared by removing the release layer 165 by wet etching using a sulfuric acid-hydrogen peroxide-based etching solution in which the hydrogen peroxide concentration was 3% and the sulfuric acid concentration was 10%, and then the circuit board was prepared according to the procedure shown in Fig. 2. As a comparative example, a circuit board (5 cm x 5 cm) was prepared according to the procedure shown in Fig. 2, except that brush cleaning was performed instead of wet etching.

[0101] In counting the number of facets, first, the silver plating film formed on the circuit board was removed using an aqueous solution containing potassium permanganate and sodium hydroxide, and then an image of 180 μm×240 μm at three arbitrary points on the copper plate surface was taken with a SEM (S-3000N manufactured by HITACHI). FIG. 7 is an image of the circuit board of the comparative example, and FIG. 8 is an image of the circuit board of the embodiment. Next, the obtained image (magnification: 500 times) was printed out, and all facets in the printed image were counted for each section determined for the diameter (facet diameter). Specifically, the maximum diameter of the facet in a certain direction of the image (for example, the long side direction of the rectangular image) was taken as the facet diameter, and the diameter of each facet was measured with a ruler. The facet diameter was expressed in μm units, and was counted for each of the following 11 sections by rounding off the first decimal place. Note that a similar measurement may be performed by image analysis.

[0102] Section 1: 0.5 μm or more, 1.4 μm or less (less than 1.5 μm); Section 2: 1.5 μm or more, 2.4 μm or less (less than 2.5 μm); Section 3: 2.5 μm or more and 3.4 μm or less (less than 3.5 μm); Section 4: 3.5 μm or more and 4.4 μm or less (less than 4.5 μm); Section 5: 4.5 μm or more, 5.4 μm or less (less than 5.5 μm); Section 6: 5.5 μm or more, 6.4 μm or less (less than 6.5 μm); Section 7: 6.5 μm or more and 7.4 μm or less (less than 7.5 μm); Section 8: 7.5 μm or more, 8.4 μm or less (less than 8.5 μm); Section 9: 8.5 μm or more, 9.4 μm or less (less than 9.5 μm); Section 10: 9.5 μm or more, 10.4 μm or less (less than 10.5 μm); Section 11: 10.5 μm or more.

[0103] Facets with a diameter of less than 0.5 μm were excluded because they were difficult to identify.

[0104] Table 1 shows the count value of the facets for each section in each of the three counting ranges for each of the comparative examples and the examples, the total number of facets in the three counting ranges for each section (the "Total" column in Table 1), and the total number of facets for each section as a function of the total area of ​​the counting range (180 μm × 240 μm × 3 = 0.1296 mm 2 ) divided by 1 mm 2 Number of facets per mm 2 "Per" column) and 1mm 2 The number of facets per diameter is calculated from the number of facets per diameter starting from the smaller facet diameter range.

[0105] [Table 1]

[0106] FIG. 9 shows the results for the comparative example of 1 mm 2 10 is a graph showing a histogram of the number of facets per mm and the change in the integrated value for each interval. 2 13 is a graph showing a histogram and changes in integrated value for each interval for the number of facets per pixel.

[0107] As can be seen from Table 1 and Figures 9 and 10, in the comparative example, the total number of facets was 1 mm 2 In the example, the total number of facets is 1 mm. 2 The number of facets per sample was only 2707, which was less than 3000. In other words, the number of facets in the example was reduced to about 1 / 10 of that in the comparative example. This shows that performing wet etching to remove the release layer is effective in reducing the number of facets.

[0108] More specifically, in the comparative example, the number of facets with a facet diameter of 2.5 μm or more is 1 mm 2On the other hand, in the embodiment, the number of facets with a facet diameter of 2.5 μm or more is 1 mm 2 The result is 2707-1566=1141 pieces per unit, which is less than 1200 pieces, but the difference from the comparative example is somewhat small.

[0109] However, in the comparative example, the number of facets with a facet diameter of less than 1.5 μm was 1 mm 2 The number of facets with a facet diameter of less than 2.5 μm was also very large at 22,099 per mm. 2 In contrast, in the example, the number of facets with a facet diameter of less than 1.5 μm is 1 mm 2 The number of facets with a facet diameter of less than 2.5 μm was also at 1,080 per mm. 2 The number remains at 1,566 per unit.

[0110] This difference suggests that in the case of the embodiment, the formation of facets with a small diameter is more effectively suppressed, which is effective in ensuring the solder joint strength to the copper plate having a silver-plated film.

Claims

1. A method for manufacturing a bonded substrate, comprising the steps of: A preparation step of preparing one or more objects to be joined, each of which is formed by laminating a brazing material layer and a copper plate on both main surfaces of a ceramic substrate; a stacking step of stacking the one or more objects to be joined between a pair of clamping members that clamp the one or more objects to be joined and a release layer provided between the one or more objects to be joined so that the one or more objects to be joined are clamped by the pair of clamping members; a bonding process in which the one or more objects to be bonded are heated while being pressurized by the pair of clamping members according to a surface pressure profile in which a maximum surface pressure is 5 MPa or more and 25 MPa or less, thereby obtaining one or more bonded substrates in which the ceramic substrate and the copper plate are bonded by a bonding layer; a removing step of removing the release layer from the bonding substrate by dissolving a portion of the copper plate of the bonding substrate that is in contact with the release layer by wet etching; A method for manufacturing a bonded substrate, comprising:

2. A method for manufacturing a bonded substrate according to claim 1, comprising the steps of: In the removing step, an etching solution having a surface tension of 70 mN / m or less is used. A method for manufacturing a bonded substrate.

3. A method for manufacturing a bonded substrate according to claim 2, comprising the steps of: The etching solution is a sulfuric acid-hydrogen peroxide-based etching solution containing 1.5% to 30% hydrogen peroxide and 1% to 20% sulfuric acid. A method for manufacturing a bonded substrate.

4. A method for producing a bonded substrate according to claim 2 or 3, comprising the steps of: In the removing step, the etching time is 45 seconds or more. A method for manufacturing a bonded substrate.

5. A method for manufacturing a bonded substrate according to any one of claims 1 to 4, comprising the steps of: a buffing step of buffing the copper plate of the bonded substrate that has been subjected to the removing step; A method for manufacturing a bonded substrate, comprising:

6. a patterning step of forming a predetermined circuit pattern on the bonded substrate manufactured by the manufacturing method according to any one of claims 1 to 5; a plating step of performing substitution silver plating on the surface of the copper plate of the bonded substrate that has been subjected to the patterning step; A method for manufacturing a circuit board, comprising:

Citation Information

Patent Citations

  • Production of joined body composed of ceramics and metal

    JP1995223878A

  • Method for the Production of a Metal-Ceramic Substrate or Copper-Ceramic Substrate, and Support to be Used in Said Method

    US20070261778A1

  • Method for producing bonded substrate

    WO2020105160A1

  • Ceramic circuit substrate and electronic component module

    WO2020218193A1

Cited By

  • Method for producing circuit board

    WO2026197165A1