Silicon wafer and method for manufacturing silicon wafer

Abstract

To form a warp in a direction that cancels the warp that occurs in a device manufacturing process.SOLUTION: A manufacturing method of a silicon wafer includes a first heat treatment step of inwardly diffusing oxygen on a surface layer of a silicon wafer obtained by slicing from a single crystal silicon ingot grown by a Czochralski method and freezing an atomic pore in a bulk portion of the silicon wafer, a second heat treatment step of precipitating an oxygen precipitate on the surface layer of the silicon wafer, and a polishing step of removing either the front surface or the back surface of the silicon wafer by polishing 5 μm or more and 15 μm or less after the second heat treatment step for the silicon wafer under an oxidizing atmosphere.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to a silicon wafer and a method for manufacturing the silicon wafer. [Background technology]

[0002] Silicon wafers (hereafter sometimes simply referred to as wafers) used as substrates for semiconductor devices are required not only to have defect-free surfaces, but also to have mechanical strength and gettering performance, which captures metal impurities, in order to improve device quality. Gettering is a technology that actively utilizes the phenomenon in which impurities in the wafer gather in specific areas to reduce the adverse effects on the performance of the final product, and can be broadly divided into intrinsic gettering and extrinsic gettering.

[0003] Intrinsic gettering (hereinafter simply referred to as gettering) reduces the adverse effect on the performance of the final product by designing oxygen precipitates called BMD (Bulk Micro Defects) inside the wafer. BMD inside the wafer can combine with metal impurities and fix them. In order to improve the performance of gettering, it is important to control the area where BMD precipitates well. For example, Patent Document 1 proposes a method in which a wafer is subjected to rapid temperature increase and decrease (hereinafter referred to as RTP) at 1300°C or higher to leave a large amount of vacancies, which are point defects, in the bulk of the wafer (not the surface layer but the inside), and then BMDs are formed at a high density during the subsequent BMD precipitation heat treatment. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2015-204326 A Summary of the Invention [Problem to be solved by the invention]

[0005] Incidentally, the heat treatment of silicon wafers in the semiconductor device manufacturing process is changing year by year, and not only the gettering ability for metal impurities introduced during the heat treatment but also the warping of silicon wafers due to the heat treatment is becoming a major problem.

[0006] In particular, 3D NAND devices, which have recently attracted attention, have a structure in which oxide films, nitride films, metal films, etc. are stacked vertically on a silicon wafer, and the stacked films are prone to causing significant warping in the silicon wafer. If a silicon wafer warps significantly during the device fabrication process, it can cause overlay defects in subsequent processes. In order to suppress warping during the device fabrication process, it is necessary to fabricate silicon wafers that are warped in a direction that counteracts the warping that occurs during the device fabrication process, rather than simply producing silicon wafers with a high degree of flatness.

[0007] In addition, since the direction and amount of warping that occurs varies depending on the structure of the device to be formed and the heat treatment conditions, it is desirable to be able to control the warping of the silicon wafer accordingly.

[0008] An object of the present invention is to provide a silicon wafer that contributes to forming a warp in a direction that cancels the warp that occurs during the device fabrication process, and a method for manufacturing the same. [Means for solving the problem]

[0009] In order to solve the above problems, the method for producing a silicon wafer of the present invention includes the steps of: subjecting a silicon wafer obtained by slicing a single crystal silicon ingot grown by the Czochralski method to a first heat treatment step in an oxidizing atmosphere, in which oxygen is inwardly diffused into a surface layer of the silicon wafer and atomic vacancies are frozen in a bulk portion of the silicon wafer; and precipitating oxygen precipitates in the surface layer of the silicon wafer. After the second heat treatment step, Surface for fabricating devicesand a polishing step of removing 5 μm to 15 μm from the surface of the substrate, and the second heat treatment step is performed for a heating time from the furnace temperature to 700° C. of less than 2 hours.

[0010] In this way, the method for producing a silicon wafer of the present invention forms a BMD precipitation region several μm beneath the device active layer by combining a first heat treatment step and a second heat treatment step. In the first heat treatment step, oxygen is inwardly diffused into the surface layer to increase the oxygen concentration in the surface layer region, and atomic vacancies (hereinafter, vacancies) are frozen in the wafer bulk. Then, in the second heat treatment step, oxygen precipitates are made visible in the surface layer region several μm deep.

[0011] On the other hand, oxygen precipitates (SiO 2 ) has a volume 2.21 times that of silicon (Si), so the surface layer of the silicon wafer is constantly under tensile stress due to oxygen precipitates. By removing 5 to 15 μm of either the front or back surface of the silicon wafer by polishing, the tensile stress of the other region where oxygen precipitates are formed causes the entire silicon wafer to warp. This makes it possible to form a warp in a direction that counteracts the warp that occurs during the device fabrication process.

[0012] In addition, the second heat treatment step teeth, It is preferable to hold the temperature at 800°C to 1000°C for 1 hour to 10 hours, and then raise the temperature to 1100°C to 1200°C and hold the temperature for 10 minutes to 4 hours, thereby precipitating the oxygen precipitate in a region with a depth of 1 to 6 μm while securing a defect-free layer with a depth of 1 to 2 μm from the surface of the silicon wafer. In the second heat treatment step, the reason for the exposure time from the furnace temperature to 700°C being less than 2 hours is to prevent oxygen precipitates from being formed in a region 1 μm below the surface. In addition, the reason for holding the temperature at 800°C to 1000°C is that this is the main nucleation temperature of oxygen precipitates caused by vacancies. The reason for holding the temperature at 1100°C to 1200°C for 10 minutes to 2 hours is to grow the nuclei of the generated oxygen precipitates, increase the surface area of ​​the precipitates, and increase the gettering power of metal impurities.

[0013] Furthermore, in the first heat treatment step, it is preferable to hold the temperature at 1300°C to 1350°C for 1 to 60 seconds, and then rapidly cool to 1000°C at a cooling rate faster than 50°C per second, 120°C per second or less. The oxygen concentration in the surface layer region is increased by holding the temperature at 1300°C to 1350°C for 1 to 60 seconds, and the reason for setting the cooling rate faster than 50°C per second is to prevent a decrease in concentration due to outward diffusion of the increased oxygen and vacancies. Also, the reason for setting the cooling rate to 120°C per second or less is to prevent the occurrence of slip due to thermal stress.

[0014] Furthermore, the first heat treatment process Then, the second heat treatment is performed without removing the surface layer of the silicon wafer. process This is to form a defect-free layer several μm deep from the surface of the silicon wafer and a region where oxygen precipitates are formed directly below the defect-free layer.

[0015] Furthermore, the first heat treatment process Then, the oxide film formed on the silicon wafer is peeled off, and the second heat treatment is performed. process It is preferable to carry out the above step in a non-oxidizing atmosphere, since this promotes the outward diffusion of oxygen and ensures a defect-free region of about 2 μm.

[0016] Furthermore, it is preferable to use a defect-free silicon ingot obtained by controlling the crystal pulling speed and the temperature gradient in the crystal axis direction at the solid-liquid interface in the Czochralski method. In the first heat treatment method, void defects (defects introduced during crystal growth) remain within a region 1 μm from the surface. This problem can be avoided by using defect-free silicon that does not have void defects.

[0017] It is preferable that the polishing step forms a concave warp toward the polished surface, thereby forming a warp in a direction that cancels the warp that occurs during the device fabrication process.

[0018] Similarly, the silicon wafer manufactured by using the above-mentioned silicon wafer manufacturing method can be warped in a direction that cancels the warp that occurs in the device process. The opposite side of the device The surface has a defect-free layer at a depth of 1 to 2 μm and an oxygen precipitate layer at a depth of 1 to 6 μm, The opposite side of the device Similarly, a silicon wafer having a convex warp toward the surface can form a warp in a direction that counteracts the warp that occurs during device processing. Effect of the Invention

[0019] According to the present invention, it is possible to provide a silicon wafer and a manufacturing method thereof that contribute to forming a warp in a direction that cancels the warp that occurs in the device manufacturing process. [Brief description of the drawings]

[0020] [Figure 1] FIG. 1 is a cross-sectional view showing an outline of an example of an RTP apparatus used in a silicon wafer manufacturing method according to an embodiment of the present invention. [Diagram 2] FIG. 2 is a flowchart showing the steps of the method for producing a silicon wafer according to the embodiment of the present invention. [Diagram 3] FIG. 3 is a conceptual diagram of the warping that occurs in a silicon wafer during the polishing process. [Figure 4] FIG. 4 is a diagram showing an example of a heat treatment sequence in a method for producing a silicon wafer. [Diagram 5] FIG. 5 is a diagram showing an oxygen concentration profile in the depth direction. [Figure 6] FIG. 6 is a diagram showing the results of measuring the warpage of a silicon wafer. [Figure 7] FIG. 7 is a diagram showing the results of measuring the relationship between the warpage of a silicon wafer and the oxygen concentration. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0021] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. However, the present invention is not limited to the embodiment described below. In addition, in each drawing, the same or corresponding elements are appropriately assigned the same reference numerals. Furthermore, it should be noted that the drawings are schematic, and the dimensional relationship of each element, the ratio of each element, etc. may differ from the actual ones. There may also be parts in which the dimensional relationship and ratio differ between the drawings.

[0022] FIG. 1 is a cross-sectional view showing an outline of an example of an RTP apparatus used in a silicon wafer manufacturing method according to an embodiment of the present invention.

[0023] As shown in FIG. 1, the RTP apparatus 10 includes a chamber (reaction tube) 20 having an atmospheric gas inlet 20a and an atmospheric gas outlet 20b, a plurality of lamps 30 spaced apart from one another in the upper portion of the chamber 20, and a wafer support 40 that supports a wafer W in a reaction space 25 within the chamber 20.

[0024] The wafer support 40 includes an annular susceptor 40a that supports the outer periphery of the wafer W, and a stage 40b that supports the susceptor 40a. The wafer support 40 also includes a rotating means that rotates the wafer W around its central axis at a predetermined speed.

[0025] The chamber 20 is made of, for example, quartz. The lamp 30 is made of, for example, a halogen lamp. The susceptor 40a is made of, for example, silicon. The stage 40b is made of, for example, quartz.

[0026] 1, RTP is performed on the wafer W by introducing the wafer W into the reaction space 25 and supporting the wafer W on the susceptor 40a of the wafer support 40. Then, an atmospheric gas, which will be described later, is introduced from the atmospheric gas inlet 20a, and the surface of the wafer W is irradiated with light from the lamps 30 while the wafer W is being rotated.

[0027] The temperature in the reaction space 25 in the RTP device 10 is controlled by measuring the average temperature at multiple points on the wafer surface in the radial direction of the lower part of the wafer W using multiple radiation thermometers 50 embedded in the stage 40b of the wafer support part 40, and controlling the multiple halogen lamps 30 (such as individually controlling the ON-OFF of each lamp and controlling the emission intensity of the emitted light) based on the measured temperatures.

[0028] Fig. 2 is a flow chart showing the steps of a method for producing a silicon wafer according to an embodiment of the present invention. As shown in Fig. 2, the method for producing a silicon wafer according to an embodiment of the present invention mainly includes a silicon wafer preparation step S1, a first heat treatment step S2, and a second heat treatment step S3.

[0029] In the silicon wafer preparation step S1, silicon wafers sliced ​​from a silicon single crystal ingot grown by the Czochralski method are prepared. The growth of a silicon single crystal ingot by the Czochralski method can be performed by a known method. Polycrystalline silicon filled in a quartz crucible is heated to form a silicon melt, a seed crystal is brought into contact with the silicon melt from above the liquid surface, and the seed crystal and the quartz crucible are pulled up while rotating, and the diameter is expanded to a desired diameter to grow a straight body portion, thereby producing a silicon single crystal ingot.

[0030] Here, in the Czochralski method, it is preferable to use a defect-free silicon ingot obtained by controlling the crystal pulling speed and the temperature gradient in the crystal axis direction at the solid-liquid interface. In the first heat treatment method in the latter stage, void defects (defects introduced during crystal growth) remain within a 1 μm region from the surface. This problem can be avoided by using defect-free silicon that does not have void defects.

[0031] The silicon single crystal ingot thus obtained is processed into silicon wafers by a well-known method. The silicon single crystal ingot is sliced ​​into wafers using an inner diameter blade or a wire saw, and then processed by processes such as chamfering the outer circumference, lapping, etching, polishing, etc. to produce silicon wafers before heat treatment.

[0032] In the first heat treatment step S2, oxygen is diffused inward into the surface layer of the silicon wafer in an oxidizing atmosphere, and atomic vacancies are frozen in the bulk of the silicon wafer. In the second heat treatment step S3, oxygen precipitates are made visible in a surface layer several μm deep. The optimal conditions for the first heat treatment step S2 and the second heat treatment step S3 will be described in detail later.

[0033] On the other hand, it is preferable to carry out the second heat treatment step S3 successively after the first heat treatment step S2 without removing the surface layer of the silicon wafer. This is to create a defect-free layer several μm from the surface of the silicon wafer and a formation region of oxygen precipitates immediately below the defect-free layer. In addition, it is preferable to peel off the oxide film formed on the silicon wafer after the first heat treatment step S2 and then carry out the second heat treatment step S3 in a non-oxidizing atmosphere. This is to promote the outward diffusion of oxygen and ensure a sufficient defect-free layer.

[0034] After the second heat treatment step S3, in the polishing step S4, either the front or back surface of the silicon wafer is polished away by 5 μm to 15 μm. The volume of the oxygen precipitates (SiO2) precipitated in the second heat treatment step S3 is 2.21 times that of silicon (Si). Therefore, the surface layer of the silicon wafer (including the front and back surfaces) is in a state where tensile stress due to the oxygen precipitates is constantly generated. In the polishing step S4, either the front or back surface of the silicon wafer is polished away by 5 μm to 15 μm, so that the tensile stress of the other oxygen precipitate formation region causes the entire silicon wafer to warp.

[0035] Although the polishing step S4 causes warping in the entire silicon wafer, the performance of the final product is improved by forming the warp in a direction that counteracts the warp that occurs in the subsequent device fabrication steps.

[0036] Fig. 3 is a conceptual diagram of warpage that occurs in a silicon wafer due to a polishing process. As shown in Fig. 3, after the second heat treatment process, oxygen precipitates D are precipitated on the surface layers of both the front and back surfaces of the silicon wafer W. By removing 5 μm to 15 μm of either the front or back surface of the silicon wafer W by polishing, it is possible to cause warpage in the entire silicon wafer W due to the tensile stress of the other oxygen precipitate formation region.

[0037] For example, as shown in Figure 3, if 5 μm or more and 15 μm or less (area A) is removed from the front surface of a silicon wafer W by polishing, the silicon wafer W deforms as indicated by the arrow (A), and a concave warp occurs toward the front surface. On the other hand, if 5 μm or more and 15 μm or less (area B) is removed from the back surface of the silicon wafer W by polishing, the silicon wafer W deforms as indicated by the arrow (B), and a convex warp occurs toward the front surface. Note that the direction of warping differs depending on the structure of the device to be formed and the heat treatment conditions, so whether the front surface or back surface of the silicon wafer W is polished can be selected according to the subsequent process.

[0038] 4 is a diagram showing a sequence of heat treatment in the method for producing a silicon wafer according to the present invention. In FIG. 4, the vertical axis T indicates temperature, and the horizontal axis t indicates time. As shown in FIG. 4, the method for producing a silicon wafer according to the present invention includes a first heat treatment step TH 1 and the second heat treatment process TH 2 It is equipped with:

[0039] As shown in FIG. 4, the first heat treatment step TH 1 is the temperature T 1 The temperature is raised to 100°C and the time is kept at that temperature D 1 Hold and cool at rate R 1 The first heat treatment step TH is then rapidly cooled. 1 The reaction is carried out in an oxidizing atmosphere using, for example, an RTP apparatus 10 as shown in FIG.

[0040] First heat treatment process TH 1 Temperature T at 1is preferably set to, for example, 1300° C. or more and 1350° C. or less, and the time D 1 The first heat treatment step TH is preferably performed for 1 second or more and 60 seconds or less in order to sufficiently increase the oxygen concentration in the surface layer region of the silicon wafer. 1 Cooling rate R 1 The rate of heating is preferably faster than 50° C. per second and not more than 120° C. per second. This is to prevent a decrease in concentration due to outward diffusion of oxygen and vacancies that have been increased in the silicon wafer by heating in an oxidizing atmosphere.

[0041] As shown in FIG. 4, the second heat treatment step TH 2 is the temperature T 2 The temperature is raised to 100°C and the time is kept at that temperature D 2 Hold at temperature T 3 The temperature is raised to 100°C and the time is kept at that temperature D 3 However, the temperature T 2 The heating rate when heating from the furnace temperature to temperature T 4 Experience time up to time D 4 Less than.

[0042] Second heat treatment process TH 2 Temperature T at 2 is preferably set to, for example, 800° C. or more and 1000° C. or less, and the time D 2 The time T is preferably 1 hour or more and 10 hours. This is because this temperature condition is the main nucleation temperature of oxygen precipitates caused by vacancies, and is preferable for generating oxygen precipitates. 3 is preferably set to, for example, 1100° C. or more and 1200° C. or less, and the time D 3 The time is preferably from 10 minutes to 4 hours inclusive, in order to grow the nuclei of the generated oxygen precipitates, increase the surface area of ​​the precipitates, and enhance the gettering power of metal impurities.

[0043] In addition, the second heat treatment process TH 2 Temperature T during heating 4 is 700℃, and the time to reach that temperature D 4The time is preferably less than 2 hours in order to prevent the formation of oxygen precipitates in the region 1 μm below the surface and to ensure a sufficiently wide defect-free layer.

[0044] [Example] Next, an example will be described in which the effects of the silicon wafer and the manufacturing method thereof according to the present invention described above are verified.

[0045] In the verification experiment, the region where the oxygen precipitates were generated was first confirmed. The silicon wafers of the example used in the verification experiment are as follows:

[0046] [Table 1]

[0047] The silicon wafers of Examples A to C are subjected to a first heat treatment step and a second heat treatment step. In the first heat treatment step, the silicon wafers are heated in a 100% O 2 The sample was held at 1350°C for 30 seconds in an atmosphere, and then quenched at a cooling rate of 120°C per second. The second heat treatment step conditions were that the sample was held at 850°C for 3 hours in a 100% Ar atmosphere, and then held at 1150°C for 30 minutes.

[0048] The oxygen concentration profile in the depth direction was analyzed for the silicon wafers of Examples A to C that had been subjected to the first heat treatment step and the second heat treatment step using a secondary ion mass spectrometry (SIMS). Fig. 5 is a diagram showing the oxygen concentration profile in the depth direction. For comparison, Fig. 5 also shows an example (comparative example) in which only the first heat treatment step was performed on Example B, and an example (calculation example) in which calculations were performed taking only oxygen diffusion into consideration.

[0049] 5, a region D where oxygen precipitates are highly concentrated is detected from a depth of 1 to 5 μm in the silicon wafers of Examples A to C. Also, in the silicon wafers of Examples A to C, a defect-free layer is formed from the surface to a depth of about 1 μm.

[0050] Therefore, by polishing either the front surface or the back surface of the silicon wafer by 5 μm to 15 μm, the region D of high concentration oxygen precipitates precipitated to a depth of 1 to 5 μm can be removed. 2 ) has a volume 2.21 times that of silicon (Si), so by removing the region D of high concentration oxygen precipitates on either the front or back surface of the silicon wafer, it is possible to cause the entire silicon wafer to warp due to the tensile stress of the other oxygen precipitate formation region.

[0051] Figure 6 shows the results of measuring the warpage of a silicon wafer. The degree of warpage of the silicon wafer used here is the amount of "bow." Bow represents the height of the center of the silicon wafer and the distance from the three-point reference plane of the silicon wafer. Note that if the center of the silicon wafer is higher than the three-point reference plane, it is defined as positive, and if it is lower, it is defined as negative.

[0052] The measurement results shown in Fig. 6 were obtained by preparing 30 silicon wafers that had been subjected to the first heat treatment step and the second heat treatment step under the conditions of the above-mentioned Example B, and comparing 10 wafers in which only the front side was processed with a grinder, 10 wafers in which only the back side was processed, and 10 wafers in which both the front side and the back side were processed. The amount of polishing on the surface of each silicon wafer was 10 µm.

[0053] As shown in Figure 6, when only the front side was processed, the average change in bow before and after processing was -4.6 μm, while when only the back side was processed, the average change in bow before and after processing was about 4.7 μm. When both the front side and back side were processed, there was almost no change in bow before and after processing. From this result, it is possible to generate warpage in a planned manner by polishing either the front side or the back side of the silicon wafer. In addition, the amount of warpage can be controlled by the sequence of the first heat treatment and the second heat treatment and the polishing amount, but since the density and size of the oxygen precipitates that induce warpage depend on the oxygen concentration in the silicon wafer, it is also possible to control it by the oxygen concentration.

[0054] Fig. 7 is a diagram showing the results of measuring the relationship between the warpage of silicon wafers and oxygen concentration. The graph shown in Fig. 7 plots the amount of change in "Bow," which is the degree of warpage of silicon wafers, for silicon wafers of Examples A to C shown in Table 1 above.

[0055] In this verification experiment, ten silicon wafers each of Examples A to C were subjected to the first heat treatment step and the second heat treatment step in the same manner as in the above experiment. 2 The material is then held at 1350°C for 30 seconds in an atmosphere, and then rapidly cooled at a rate of 120°C per second. The second heat treatment step conditions are to hold at 850°C for 3 hours in a 100% Ar atmosphere, and then to hold at 1150°C for 30 minutes.

[0056] After that, only the surface of the silicon wafer is polished by 10 μm, and the change in bow before and after processing is measured. The average value of the change in bow measured for each of the 10 wafers is calculated and shown in the table below, and the graph shown in Figure 6 is a plot of this.

[0057] [Table 2]

[0058] As can be seen from the above table and FIG. 7, the amount of bow can be adjusted by controlling the oxygen concentration of the silicon wafer.

[0059] For example, when stacking an oxide film, a nitride film, a metal film, etc. vertically on the front side of a silicon wafer for the purpose of fabricating a 3D NAND device, the silicon wafer is likely to warp upward in a convex shape, so it is preferable to polish only the front side of the silicon wafer according to the present invention in advance. Then, if the oxygen concentration of the silicon wafer is appropriately selected according to the configuration of the oxide film, nitride film, metal film, etc. to be stacked on the silicon wafer, it is possible to contribute to forming a warp in a direction that cancels the warp that occurs in the device fabrication process. [Explanation of symbols]

[0060] 10 RTP device 20 Chamber 20a Atmospheric gas inlet 20b Atmospheric gas exhaust port 25 Reaction Space 30 Lamp 40 Wafer support

Claims

1. Silicon wafers are sliced ​​from single crystal silicon ingots grown by the Czochralski method. a first heat treatment step of inwardly diffusing oxygen into a surface layer of the silicon wafer and freezing atomic vacancies in a bulk portion of the silicon wafer in an oxidizing atmosphere; a second heat treatment step of precipitating oxygen precipitates on a surface layer of the silicon wafer; a polishing step of removing a surface of the silicon wafer on which devices are to be fabricated by polishing the surface to a depth of 5 μm to 15 μm after the second heat treatment step; Equipped with The method for producing a silicon wafer, wherein the second heat treatment step is performed with a heating time from a furnace temperature to 700° C. being less than two hours.

2. 2. The method for producing a silicon wafer according to claim 1, wherein the second heat treatment step comprises holding the temperature at 800° C. or higher and 1000° C. or lower for 1 hour or longer and 10 hours or shorter, and then raising the temperature to 1100° C. or higher and 1200° C. or lower and holding the temperature for 10 minutes or longer and 4 hours or shorter, thereby precipitating the oxygen precipitates in a region with a depth of 1 to 6 μm while securing a defect-free layer with a depth of 1 to 2 μm from the surface of the silicon wafer.

3. 3. The method for producing a silicon wafer according to claim 1, wherein the first heat treatment step comprises holding the wafer at 1300° C. or more and 1350° C. or less for 1 second or more and 60 seconds or less, and quenching the wafer to 1000° C. or less at a cooling rate faster than 50° C. per second and 120° C. per second or less.

4. 4. The method for producing a silicon wafer according to claim 1, wherein the second heat treatment step is carried out successively after the first heat treatment step without removing a surface layer of the silicon wafer.

5. 5. The method for producing a silicon wafer according to claim 1, wherein after the first heat treatment step, an oxide film formed on the silicon wafer is peeled off, and then the second heat treatment step is performed in a non-oxidizing atmosphere.

6. 6. The method for producing a silicon wafer according to claim 1, wherein a defect-free silicon ingot is used, which is obtained by controlling a crystal pulling speed and a temperature gradient in a crystal axis direction at a solid-liquid interface in the Czochralski method.

7. 7. The method for producing a silicon wafer according to claim 1, wherein a concave warp is formed toward the polished surface in the polishing step.

8. A silicon wafer having a defect-free layer 1 to 2 μm deep from the surface opposite the surface on which devices are fabricated and an oxygen precipitate layer in a region 1 to 6 μm deep, and characterized by having a convex warp toward the surface opposite the surface on which devices are fabricated.

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