A process for bonding two semiconductor substrates

Abstract

The present invention relates to a process for bonding two semiconductor substrates by molecular adhesion, comprising the steps of: a) bringing a first substrate and a second substrate (2) into intimate contact to form an assembly having a bonding interface (4); b) reactively annealing the bonding interface (4) at a first temperature higher than a predetermined first temperature, where b) generates gas bubbles at the bonding interface; c) at least partially peeling the two substrates at the bonding interface (4) to eliminate the gas bubbles; and d) bringing the first substrate and the second substrate (2) back into intimate contact at the bonding interface (4) to reform the assembly.

Description

[Technical field]

[0001] The present invention relates to the field of semiconductor materials for microelectronic components. In particular, the present invention relates to a process for joining two semiconductor substrates by molecular adhesion. [Background technology]

[0002] The joining of substrates by molecular adhesion ("direct wafer bonding") is a well-known technique with applications in the fields of microelectronics, optoelectronics and microelectromechanical systems, e.g. for producing silicon-on-insulator substrates, multijunction photovoltaic cells and for producing 3D structures.

[0003] According to this technique, two substrates are brought into intimate contact such that the surfaces of the substrates are sufficiently close to one another that atomic and / or molecular bonds are formed between the surfaces, thus creating an adhesion force between the two contacting surfaces without the use of an intermediate adhesive layer, such as a polymer or glue layer.

[0004] The assembly obtained is then subjected to a heat treatment to strengthen the adhesion, generally at a temperature that may vary between 50° C. and 1200° C., depending on the nature of the substrates and the application envisaged.

[0005] In some cases, bonding by molecular adhesion leads to the appearance of defects at the bond interface, called bond defects. These may be "bubble" type defects ("bonding voids"). Bond defects may result from the trapping and accumulation of gas species between the surfaces of the bonded substrates. These species may correspond to species adsorbed on the surfaces of the substrates during pretreatment before bonding. These species may correspond to residues from chemical reactions, especially water chemistry, that occur when the substrates are brought into intimate contact or during annealing to strengthen the bond.

[0006] The presence of bond defects at the bonding interface has a very negative impact on the quality of the manufactured structure: for example, if the bonding step is followed by a step of thinning one of the two substrates to form a layer by using cutting or Smart Cut® techniques, the absence of adhesion between the two surfaces at the location of the bond defect may result in a local tearing of the thin layer at this location.

[0007] Furthermore, if a composite structure comprising, for example, a thin layer of monocrystalline silicon carbide (SiC) bonded to a carrier substrate made from SiC is intended for the manufacture of a vertical power device, good thermal and electrical conductivity between the thin layer and the carrier substrate is required.

[0008] To join substrates resulting in composite structures, there are two main approaches to perform direct bonding: hydrophilic and hydrophobic.

[0009] In the hydrophilic approach, the surfaces of the two substrates are treated to make them hydrophilic, in particular by creating a layer of native oxide. A layer of water is present between the two substrates to promote the formation of atomic and / or molecular bonds responsible for the adhesive forces between the two substrates. However, the presence of a layer of native oxide at the bonding interface affects and worsens the electrical conduction between the two substrates.

[0010] In the hydrophobic technique, the surfaces of the two substrates are treated to be hydrophobic; that is, the native oxide layer is removed, limiting the presence of water between the substrates. To further limit the presence of water, the bonding between the two substrates may be performed under a controlled atmosphere, such as an anhydrous atmosphere or a vacuum. Two substrates bonded together using this technique exhibit good vertical electrical and thermal conductance (Yushin et al, Applied Physics Letters, 84(20), 3993-3995, 2004). However, these conditions may be complicated to obtain in an industrial environment. Furthermore, applicants have observed that when two SiC substrates bonded using this technique are exposed to temperatures above 700° C., pressurized bubbles may appear at the interface between the two substrates, adversely affecting the quality of the bond. This is particularly troublesome when the assembly formed by bonding the two substrates must be subjected to a heat treatment at a temperature above the temperature at which such bubbles appear, for example to perform layer transfer using the Smart Cut method.

[0011] Other techniques exist based on activated surface bonding ("surface-activated bonding", or SAB), as described, for example, by F.MU et al. (4th IEEE International Workshop on Low Temperature Bonding for 3D Integration (LTB-3D), 15-16 July 2014). The surfaces of the two substrates to be bonded are exposed to atomic bombardment to activate the surfaces of the substrates before bonding them together at low temperature. This technique allows to obtain very good adhesion between the two substrates, but it also leads to the formation of an amorphous layer at the interface between the two substrates. The presence of this amorphous layer generally leads to a poor electrical conductivity between the two substrates. Summary of the Invention [Problem to be solved by the invention]

[0012] The present invention aims to overcome all or some of the above mentioned drawbacks. The present invention relates to a process for bonding two semiconductor substrates by molecular adhesion, which allows good electrical and thermal conduction at the bonding interface, while reducing the number of bonding defects or even completely preventing their appearance. [Means for solving the problem]

[0013] To this end, the subject of the present invention is a) bringing a first and a second substrate into intimate contact to form an assembly having a bonding interface; b) reactively annealing the bonded interface at a first temperature higher than a predetermined first temperature, which generates gas bubbles at the bonded interface; 1. A process for bonding two semiconductor substrates by molecular adhesion comprising: c) at least partially peeling the two substrates at the bonding interface to eliminate air bubbles; d) bringing the first and second substrates back into intimate contact at the bonding interface to reform the assembly; The present invention provides a bonding process comprising the steps of:

[0014] According to other advantageous, non-limiting features of the present invention, taken alone or in any technically feasible combination, The stripping step c) is carried out under a controlled atmosphere. The controlled atmosphere of the stripping step c) is an anhydrous atmosphere or a vacuum. The stripping step c) is carried out wholly or partly at a second temperature above ambient temperature. The second temperature is lower than 700°C, preferably lower than 200°C, even more preferably lower than 100°C. The peeling step c) involves mechanically separating the two substrates by inserting a blade between the two substrates at the bonding interface. The bonding process includes, after step d), a step e) of thinning the first substrate to form a thin layer. A first substrate includes a major surface and a buried plane of weakness, and a thin layer is defined between the major surface and the buried plane of weakness. Step e) involves transferring the thin layer onto a second substrate by splitting along the buried plane of weakness. Step e) comprises a heat treatment at a temperature equal to or greater than a predetermined second temperature enabling spontaneous splitting along the buried weak plane (1b), and the first temperature of step b) and the second temperature of step c) are lower than the predetermined second temperature. [Brief description of the drawings]

[0015] Further features and advantages of the present invention will become apparent from the following detailed description of the invention, which proceeds with reference to the accompanying drawings. [Figure 1] 1 shows a composite structure manufactured according to the joining process of the present invention. [Figure 2a] 5 illustrates steps of a bonding process according to the present invention. [Figure 2b] 5 illustrates steps of a bonding process according to the present invention. [Figure 2c] 5 illustrates steps of a bonding process according to the present invention. [Figure 2d] 5 illustrates steps of a bonding process according to the present invention. [Figure 2e] 5 illustrates steps of a bonding process according to the present invention. [Diagram 3] 4 illustrates an alternative or optional step of the bonding process according to the present invention. [Figure 4a] 4 illustrates an alternative or optional step of the bonding process according to the present invention. [Figure 4b] 4 illustrates an alternative or optional step of the bonding process according to the present invention. [Figure 4c] 4 illustrates an alternative or optional step of the bonding process according to the present invention. [Figure 4d] 4 illustrates an alternative or optional step of the bonding process according to the present invention. [Figure 4e] 4 illustrates an alternative or optional step of the bonding process according to the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] As mentioned above, the present invention relates to a process for bonding a first substrate 1 to a second substrate 2 by molecular adhesion, each substrate being made of a semiconductor material.

[0017] More specifically, the invention seeks to form a composite structure 3' comprising a monocrystalline thin layer 1' arranged on a carrier substrate 2 (FIG. 1). The first substrate 1 is intended to form the thin layer 1' for producing the component and is therefore preferably formed from a good quality monocrystalline material. The second substrate 2 is intended to form the carrier substrate 2 of the composite structure 3' and may therefore be formed from a lower quality monocrystalline or polycrystalline material.

[0018] The thin layer 1' has a thickness of less than 1 micrometer and is advantageously compatible with Smart Cut type methods. The first substrate 1 and the second substrate 2 have a thickness of the order of a few hundred micrometers before being joined.

[0019] These two substrates 1, 2 may be made of different or identical semiconductor materials selected from silicon carbide (SiC) and indium phosphide (InP) or, more generally, they may be binary, ternary or quaternary compounds made of elements of columns IV and III, V of the periodic table of the elements.

[0020] The substrates 1, 2 each have a "main" surface 1a, 2a which corresponds to the surfaces that are brought into intimate contact to perform the bonding.

[0021] Before being brought into intimate contact, the main faces 1a, 2a are advantageously subjected to various treatments in order to achieve a direct bond by molecular adhesion. The purpose of these treatments is to clean the main faces 1a, 2a in order to remove contaminants (particles, organic matter, etc.) and to potentially activate them to promote a chemical surface termination favorable for the propagation of the bonded wave and for a high strength of the bonded interface 4. Chemical-mechanical polishing of the main faces 1a, 2a can also be applied in order to make them as smooth as possible. It is also conceivable to form a conductive intermediate layer on one of the main faces 1a, 2a or on each of these main faces, which can also be smoothed by chemical-mechanical polishing.

[0022] 2a to 2e show steps of the bonding process according to the present invention.

[0023] The first step a) of the present invention (FIGS. 2a, 4a) involves bringing a major surface 1a of a first substrate 1 into intimate contact with a major surface 2a of a second substrate 2 to form an assembly 3 having a bonding interface 4. "Intimate" contact means that the major surfaces 1a, 2a are brought into direct contact without an adhesive layer, joining the major surfaces by molecular adhesion along the bonding interface 4.

[0024] Bringing the substrates 1, 2 into intimate contact may be carried out under ambient or controlled atmosphere, e.g., under inert gas and / or vacuum. It is contemplated that this may be carried out to bring the substrates 1, 2 into intimate contact at ambient or higher temperatures, e.g., 30° C. to 500° C.

[0025] Upon completion of step a), the assembly 3 is subjected in a next step b) (FIGS. 2b, 4b) to a reactive anneal of the bonding interface at a temperature (hereafter called the first temperature) higher than a first predetermined temperature. This first predetermined temperature corresponds to the temperature above which species trapped at the bonding interface and / or adsorbed before coming into contact (e.g. hydrogen, fluorine, residues of a water monolayer in the case of hydrophobic bonding) react completely or partially on the main faces 1a, 2a to form gas bubbles 5 at the bonding interface 4. The duration of this anneal is typically 1 hour.

[0026] If the two substrates 1, 2 are made of SiC, this predetermined first temperature is approximately 200°C and the first temperature may for example be chosen to be equal to 700°C.

[0027] The gas trapped in these bubbles 5 may be, for example, dihydrogen, water vapor or carbon dioxide, or other gases resulting from a thermally activated reaction at the bonding interface 4. It has been found that, when the substrates 1, 2 are made of SiC, these bubbles 5 can remain stable over a wide range of temperatures, typically up to 1100°C or even higher. This is particularly troublesome if a subsequent thinning step must be performed in the process without exceeding the aforementioned range in which the bubbles 5 are stable. Bonding defects (corresponding to bubbles) tend to impair the integrity and quality of the thin layer 1' resulting from the thinning of the first substrate 1.

[0028] The next step c) of the present invention (FIG. 2c, FIG. 4c) involves at least partial delamination of the two substrates 1, 2 at the bonding interface 4. Separating the two substrates 1, 2 by cutting open the bonding interface 4 allows the bubbles 5 to be eliminated by releasing the gas trapped in them.

[0029] The peeling step c) may comprise mechanically separating the two substrates 1, 2 by inserting a blade 6 between them at the bonding interface 4. The material of the blade is chosen to avoid contamination and to be compatible with microelectronic applications. The blade is preferably made of Teflon. When the blade is inserted at the bonding interface 4, the blade 6 generates a peel wave that propagates along the bonding interface 4 and causes the separation of the two substrates 1, 2. It is necessary and sufficient that the peel wave reaches each of the bubbles 5 present at the interface to release the trapped gas and to eliminate all bubbles 5 present. Thus, the peeling does not necessarily take place over the entire bonding interface 4, so that the two substrates 1, 2 may remain joined over a portion of the bonding interface 4.

[0030] This delamination step c) (FIGS. 2c, 4c) is advantageously carried out under a controlled atmosphere: it may be carried out in a clean room or, preferably, under anhydrous atmosphere, such as under dry nitrogen or under vacuum, to prevent deposition of particles or water on the main faces 1a, 2a of the substrates 1, 2, which may generate bonding defects in the next step.

[0031] Step c) may be carried out wholly or partly at a second temperature equal to or higher than ambient temperature, which second temperature is generally lower than 700°C, preferably lower than 200°C, more preferably lower than 100°C.

[0032] Step c) may also comprise ion beam etching the main surfaces 1a, 2a of the two substrates 1, 2 to remove any oxide layers. This typically involves bombardment with argon ions of energy of tens to hundreds of eV for tens of seconds.

[0033] The two substrates 1, 2 are then brought back into intimate contact at the bonding interface 4 in step d) (Fig. 2d, Fig. 4d) to reform the assembly 3 and securely bond the main faces 1a, 2a together. This step of bringing back into contact is preferably carried out under a controlled atmosphere, the composition and temperature of which are similar to that of step c), to avoid the introduction of new impurities that may generate new gas bubbles.

[0034] After this step d), the assembly 3 can be subjected to a heat treatment without generating bond defects that could adversely affect the quality of the substrate 1 or the thin layer 1' obtained upon completion of the optional subsequent thinning step e). This absence of harmful bond defects can be explained by the fact that there are now no or very few species that can react at the bond interface 4 with temperature after the final bonding. Moreover, the precautions taken in steps c) and d) to avoid the introduction of new impurities also contribute to the absence of bond defects.

[0035] On completion of step d), if the intended application requires a thin layer 1' and the initial thickness of the first substrate 1 is not suitable, a step e) of thinning the first substrate 1 can be carried out. If the step e) of thinning the first substrate 1 comprises a heat treatment, it is particularly important to be able to expose the assembly 3 to the heat treatment without generating bond defects. Indeed, without it, there is a risk of adversely affecting the quality of the thin layer 1' resulting from step e).

[0036] The purpose of the step e) of thinning the first substrate 1 (figure 2e, figure 4e) is to form a thin layer 1' on which various electronic components can subsequently be manufactured.

[0037] According to a first embodiment (FIG. 2e), the thin layer 1′ may be formed by thinning the back surface 1c of the first substrate 1 by grinding, dry or wet chemical etching and / or chemical mechanical polishing, alternating with cleaning sequences. One (or several) heat treatment(s) may be applied to strengthen the bonding interface 4 without causing the appearance of new bubbles at the bonding interface 4 and / or to improve the crystallographic and / or surface quality of the thin layer 1′.

[0038] According to a second embodiment, the thin layer 1' can be formed by layer transfer using the Smart Cut method. In this case, the bonding process according to the invention comprises, before the intimate contact step a), a step of forming a buried weak plane 1b in the first substrate 1 (FIG. 3), whereby the thin layer 1' is defined between the main surface 1a and the buried weak plane 1b. Advantageously, the buried weak plane 1b is formed by ion implantation of optical species up to a given depth. The implanted optical species are optionally hydrogen, helium or these two species are co-implanted. These optical species form microcavities distributed in a thin layer parallel to the main surface 1a of the first substrate 1, near a given depth. This thin layer is called buried weak plane 1b for simplicity. The energy of the implantation of the optical species is selected to reach a given depth in the first substrate 1, said depth corresponding to the target thickness of the thin layer 1'.

[0039] Steps a) to d) of this second embodiment, illustrated by figures 4a to 4d, follow the general description above.

[0040] Step e) consists in splitting along the buried weak plane 1b to separate the thin layer 1' from the remaining part 1'' of the first substrate 1 and thus transferring the thin layer 1' onto the second substrate 2 (FIG. 4e). This splitting can be induced by applying a heat treatment to the assembly 3 at a temperature equal to or higher than a second predetermined temperature. This second predetermined temperature corresponds to a temperature at which spontaneous splitting along the buried weak plane 1b can occur. In the case where the first substrate 1 is made of SiC, the second temperature is typically between 750° C. and 1000° C. The splitting heat treatment can have a duration ranging from a few minutes to a few hours. During said heat treatment, the microcavities present in the buried weak plane 1b follow a growth kinetics until the spontaneous initiation of a fracture wave, which propagates over the entire extent of the buried weak plane 1b and results in a separation between the thin layer 1' bonded to the second substrate 2 and the remaining part 1'' of the first substrate 1. Alternatively, separation can be induced by the application of localized stress or by a combination of thermal treatment and mechanical stress.

[0041] Furthermore, according to this second embodiment, it is necessary that the properties of the material of the first substrate 1 and of the buried weak plane 1b (related to the conditions of the implantation of the optical species) allow the division to be obtained at a predetermined second temperature at least 50° C. to 150° C. higher than the first temperature of step b), so as not to cause a premature separation of the thin layer 1′ from the remaining part 1″ of the first substrate 1. It is likewise necessary that the first temperature of step b) (FIG. 4b) and the second temperature of step c) (FIG. 4c) do not exceed this predetermined second temperature.

[0042] Of course, it is possible to envisage other techniques than those mentioned above for forming the thin layer 1' in step e).

[0043] Upon completion of the above steps a) to e), a composite structure 3' is obtained that is free of harmful bonding defects and exhibits very good adhesion between the thin layer 1' and the carrier substrate 2.

[0044] Thus, using such a composite structure 3', a further layer having a thickness of, for example, 10 micrometers at 1700°C can be formed on the composite structure by epitaxy, the device being formed without risk of damaging the structure 3'.

[0045] The composite structure 3' may also exhibit very good vertical electrical and thermal conductance between the lamina 1' and the carrier substrate 2. This is due to the choice of materials in the lamina 1' and the carrier substrate 2 and the absence of an intermediate tie layer to bond them together.

[0046] Of course, the invention is not limited to the described implementation(s), and modifications can be made to the invention without departing from the scope of the invention, which is defined by the claims.

Claims

1. a) bringing a first substrate (1) and a second substrate (2) into intimate contact to form an assembly (3) having a bonding interface (4); b) reactively annealing the bonded interface at a first temperature, which is greater than a predetermined temperature, where b) generates gas bubbles at the bonded interface; 1. A process for bonding two semiconductor substrates by molecular adhesion comprising: c) at least partially peeling the two substrates (1, 2) at the bonding interface (4) to eliminate the air bubbles; d) bringing said first substrate (1) and said second substrate (2) back into intimate contact at said bonding interface (4) to reform said assembly (3); A bonding process comprising:

2. The bonding process of claim 1 , wherein the delaminating step c) is carried out under a controlled atmosphere.

3. The bonding process of claim 2 , wherein the controlled atmosphere of the peeling step c) is an anhydrous atmosphere or a vacuum.

4. The bonding process according to any one of claims 1 to 3, wherein the peeling step c) is carried out wholly or partly at a second temperature above ambient temperature.

5. The bonding process of claim 4 wherein the second temperature is less than 700°C.

6. The bonding process according to any one of claims 1 to 5, wherein the peeling step c) comprises mechanically separating the two substrates (1, 2) by inserting a blade between the two substrates (1, 2) at the bonding interface (4).

7. The bonding process according to any one of the preceding claims, comprising after step d) a step e) of thinning the first substrate (1) to form a thin layer (1').

8. 8. The joining process according to claim 7, wherein the first substrate (1) comprises a main surface (1a) and a buried plane of weakness (1b), and the thin layer (1') is defined between the main surface (1a) and the buried plane of weakness (1b).

9. The bonding process according to claim 8, wherein step e) transfers said thin layer (1') onto said second substrate (2) by splitting along said buried plane of weakness (1b).

10. step e) comprises a heat treatment at a temperature equal to or greater than a third predetermined temperature enabling spontaneous splitting along said buried plane of weakness (1b); the first temperature in step b) and the second temperature in step c) are lower than the predetermined third temperature; The joining process according to claim 9 when claim 7 is dependent on claim 4 or 5.

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