Semiconductor Device

Abstract

To provide a highly reliable semiconductor device.SOLUTION: A semiconductor device includes a first chip with a first electrode, a wiring member apart from the first chip, a second chip with a second electrode that is disposed between the first chip and the wiring member, a first conductive plate disposed on the first electrode, having the maximum size in a second direction intersecting with a first direction from the first chip to the second chip larger than the maximum size of the first chip in the second direction, and electrically connected to the first electrode, a second conductive plate disposed on the second electrode, having the maximum size in the second direction larger than the maximum size of the second chip in the second direction, and electrically connected to the second electrode, and a first wire bonded to a part of the first conductive part that protrudes in the second direction over the first chip, a part of the second conductive part that protrudes in the second direction over the second chip, and the wiring member.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The embodiments relate to a semiconductor device. [Background technology]

[0002] 2. Description of the Related Art Conventionally, semiconductor devices in which a plurality of chips are electrically connected by bonding wires have been known. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2015-5583 A Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the embodiments is to provide a highly reliable semiconductor device. [Means for solving the problem]

[0005] A semiconductor device according to an embodiment includes a first chip having a first electrode, a wiring member spaced from the first chip, a second chip having a second electrode and arranged between the first chip and the wiring member, a first conductive plate arranged on the first electrode and having a maximum dimension in a second direction intersecting a first direction from the first chip to the second chip that is larger than the maximum dimension of the first chip in the second direction and electrically connected to the first electrode, a second conductive plate arranged on the second electrode and having a maximum dimension in the second direction that is larger than the maximum dimension of the second chip in the second direction and electrically connected to the second electrode, a portion of the first conductive plate protruding in the second direction beyond the first chip, a portion of the second conductive plate protruding in the second direction beyond the second chip, and a first wire joined to the wiring member. [Brief description of the drawings]

[0006] [Figure 1] 1 is a top view showing a semiconductor device according to an embodiment; [Diagram 2] 2 is an enlarged top view of the area surrounded by dashed line A in FIG. 1. [Diagram 3] 3 is a cross-sectional view taken along line BB' in FIG. 2. [Figure 4] 2 is an enlarged top view of an area surrounded by dashed line A in FIG. 1, with the conductive plates and wires in FIG. 1 omitted. [Diagram 5] 2 is an enlarged top view of the area surrounded by dashed line A in FIG. 1 with the wires in FIG. 1 omitted. [Figure 6] FIG. 11 is an enlarged top view showing a part of a semiconductor device according to a reference example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] FIG. 1 is a top view showing a semiconductor device according to the present embodiment. FIG. 2 is an enlarged top view of the area surrounded by the dashed line A in FIG. FIG. 3 is a cross-sectional view taken along line BB' in FIG. The semiconductor device 100 according to this embodiment is a power semiconductor device. The semiconductor device 100 is mounted on a vehicle such as an automobile or a train, and is used for switching control of a motor mounted on the vehicle. Such a semiconductor device 100 is required to output a large current. However, the application of the semiconductor device is not particularly limited to the above.

[0008] 1, the semiconductor device 100 includes a substrate 110, a lead frame 121 for drain connection arranged on the substrate 110, a plurality of lead frames 122 for gate connection arranged on the substrate 110, and a plurality of lead frames 123 (wiring members) for source connection arranged on the substrate 110. As shown in FIGS. 2 and 3, the semiconductor device 100 further includes a plurality of chips 130 arranged on the lead frame 121 for drain connection, a plurality of conductive plates 140 arranged on each of the plurality of chips 130, and a plurality of wires 151, 152, 153, 154.

[0009] Each part of the semiconductor device 100 will be described in detail below. In the following, for ease of understanding, an XYZ Cartesian coordinate system will be used. The direction from the substrate 110 toward the chip 130 will be referred to as the "Z direction". The Z direction will be referred to as the "upward direction" and the opposite direction to the Z direction will be referred to as the "downward direction", but these directions are unrelated to the direction of gravity. The direction perpendicular to the Z direction will be referred to as the "X direction". The direction perpendicular to the Z direction and the X direction will be referred to as the "Y direction".

[0010] The substrate 110 is made of, for example, an insulating material. The substrate 110 has a flat plate shape. The substrate 110 has a rectangular shape with its longitudinal direction aligned in the X direction and its corners rounded when viewed from above. However, the shape of the substrate 110 is not limited to the above. The surface of the substrate 110 has an upper surface 110a and a lower surface 110b that are approximately parallel to the X direction and Y direction, as shown in FIG. 3.

[0011] A lead frame 121 for drain connection, a lead frame 122 for gate connection, and a lead frame 123 for source connection are arranged on an upper surface 110a of the substrate 110. A heat dissipation member such as a metal plate may be arranged under the substrate 110.

[0012] Each of the lead frames 121, 122, and 123 is made of a metal material such as copper (Cu), and each of the lead frames 121, 122, and 123 has a flat plate shape.

[0013] As shown in FIG. 1, the lead frame 121 for drain connection has a plurality of supporting portions 121a and a plurality of connecting portions 121b.

[0014] In this embodiment, ten chips 130 are arranged on each support 121a. On each support 121a, the ten chips 130 are arranged in a matrix of two columns in the X direction and five rows in the Y direction. However, the number of chips arranged on each support is not limited to the above number as long as it is two or more. Furthermore, the arrangement of the chips on each support is not limited to the above.

[0015] In this embodiment, the number of supporting portions 121a provided in the semiconductor device 100 is eight. The eight supporting portions 121a are arranged such that two supporting portions 121a are adjacent to each other in the Y direction and four supporting portions 121a are lined up in the X direction.

[0016] In this embodiment, the number of the connection parts 121b provided in the semiconductor device 100 is four. One of the four connection parts 121b connects the support part 121a located on the most -X side and the most +Y side to the support part 121a located on the most +X side and the most +Y side. The other of the four connection parts 121b connects the support part 121a located on the most -X side and the most -Y side to the support part 121a located on the most +X side and the most -Y side. The other of the four connection parts 121b connects the support part 121a located on the most -X side and the most +Y side to the support part 121a located on the most -X side and the most -Y side. The other of the four connection parts 121b connects the support part 121a located on the most +X side and the most +Y side to the support part 121a located on the most -X side and the most -Y side. The other of the four connection parts 121b connects the support part 121a located on the most +X side and the most +Y side to the support part 121a located on the most +X side and the most -Y side. However, the number and arrangement of the support parts are not limited to the above.

[0017] In this embodiment, the semiconductor device 100 includes eight gate connection lead frames 122 corresponding to the eight support portions 121a of the drain connection lead frame 121. Each gate connection lead frame 122 is disposed adjacent to the corresponding support portion 121a in the X direction. Specifically, each gate connection lead frame 122 is disposed on the inside of the corresponding support portion 121a in the X direction. Each gate connection lead frame 122 extends in the Y direction. However, the shape and position of the gate connection lead frame are not limited to the above.

[0018] Similarly, in this embodiment, the semiconductor device 100 includes eight lead frames 123 for source connection corresponding to the eight support portions 121a of the lead frame 121 for drain connection. Each lead frame 123 for source connection is arranged to sandwich the lead frame 122 for gate connection between the corresponding lead frame 123 and the corresponding support portion 121a. Specifically, each lead frame 123 for source connection is arranged on the inner side of the corresponding lead frame 121 for drain connection and the lead frame 122 for gate connection in the X direction.

[0019] The lead frame 123 for source connection located at the most -X side and the most +Y side is connected to the support portion 121a located at the +X side. The lead frame 123 for source connection located at the most +X side and the most +Y side is connected to the support portion 121a located at the -X side. The lead frame 123 for source connection located at the most -X side and the most -Y side is connected to the support portion 121a located at the +X side. The lead frame 123 for source connection located at the most +X side and the most -Y side is connected to the support portion 121a located at the -X side. The other lead frames 123 for source connection are not connected to the support portion 121a and extend in the Y direction. However, the shape and position of the lead frame for source connection are not limited to the above.

[0020] The lead frame 122 for gate connection is spaced apart from the lead frame 121 for drain connection and the lead frame 123 for source connection.

[0021] FIG. 4 is an enlarged top view of the area surrounded by the dashed line A in FIG. 1 with the conductive plates and wires in FIG. 1 omitted. In this embodiment, each chip 130 is a metal-oxide-semiconductor field-effect transistor (MOSFET). Each chip 130 has a generally flat plate shape. Each chip 130 has a rectangular shape in top view. However, the shape of each chip is not limited to the above.

[0022] As shown in Fig. 3, the surface of each chip 130 has a lower surface 130a facing the lead frame 121 for drain connection, and an upper surface 130b located on the opposite side of the lower surface 130a. A drain electrode 131 is provided on the lower surface 130a. The drain electrode 131 is electrically connected to the lead frame 121 for drain connection. As shown in Fig. 4, a gate electrode 132 and a source electrode 133 are provided on the upper surface 130b.

[0023] In this embodiment, the drain electrode 131, the gate electrode 132, and the source electrode 133 each contain aluminum (Al) as a main material. % It is made of aluminum (Al) as follows: However, the materials constituting the drain electrode, gate electrode, and source electrode are not limited to the above as long as they are conductive materials such as metals.

[0024] The shape of the gate electrode 132 in top view is substantially rectangular. The gate electrode 132 is disposed at the end of the top surface 130b in the X direction and at the center in the Y direction. However, the shape and position of the gate electrode are not limited to the above.

[0025] In top view, the source electrode 133 has a substantially rectangular first region 133a and a pair of second regions 133b that protrude from the first region 133a in the X direction and are spaced apart from each other in the Y direction. The gate electrode 132 is disposed between the pair of second regions 133b. In each chip 130, the gate electrode 132 and the source electrode 133 are electrically insulated from each other.

[0026] FIG. 5 is an enlarged top view of the area surrounded by dashed line A in FIG. 1 with the wires in FIG. 1 omitted. A conductive plate 140 is disposed on the source electrode 133 of each chip 130. The conductive plate 140 is made of a metal material such as copper (Cu) etc. The conductive plate 140 has a generally flat plate shape.

[0027] The conductive plate 140 exposes the gate electrode 132 and is electrically insulated from the gate electrode 132. Specifically, a recess 141 recessed in the X direction is formed on the side surface of the conductive plate 140 so as to expose the gate electrode 132. However, the shape of the conductive plate is not limited to the above. For example, the shape of the conductive plate in a top view may be rectangular, and the conductive plate may be separated from the gate electrode in the X direction.

[0028] The maximum dimension L1 in the Y direction of the conductive plate 140 is larger than the maximum dimension L2 in the Y direction of the chip 130. Therefore, both ends of the conductive plate 140 in the Y direction protrude from the chip 130. However, it is not necessary that one end of the conductive plate in the Y direction protrudes from the chip and the other end in the Y direction does not protrude from the chip. Furthermore, the maximum dimension L3 in the X direction of the conductive plate 140 is smaller than the maximum dimension L4 in the X direction of the chip 130. However, the magnitude relationship between the maximum dimension of the conductive plate in the X direction and the maximum dimension of the chip in the X direction is not limited to the above.

[0029] 3, the conductive plate 140 is electrically connected to the source electrode 133 of the chip 130 via a metal layer 160 and a bonding member 170. Specifically, a metal layer 160 containing gold (Au) is provided on the source electrode 133. The metal layer 160 and the conductive plate 140 As described above, the source electrode 133 is mainly made of aluminum (Al), and therefore, the conductive plate 132 is bonded to the conductive plate 132 by the bonding member 170 made of solder or sintered material. 140 It is difficult to directly bond the source electrode 133 to the conductive plate 131. In contrast, in this embodiment, the source electrode 133 is covered with a metal layer 160 containing gold (Au), so that the conductive plate 131 can be bonded to the conductive plate 131 via the metal layer 160. 140 can be bonded to the source electrode 133. However, the connection structure between the conductive plate and the source electrode is not limited to the above.

[0030] As shown in FIG. 2, the chips 130 adjacent in the X direction are connected in parallel. Hereinafter, of the chips 130 adjacent in the X direction, the chip 130 farther from the lead frame 123 for source connection is referred to as the "first chip 130A". Also, of the chips 130 adjacent in the X direction, the chip 130 closer to the lead frame 123 for source connection is referred to as the "second chip 130B". In other words, the second chip 130B is the chip 130 located between the lead frame 123 for source connection and the first chip 130A. Also, the conductive plate 140 on the first chip 130A is referred to as the "first conductive plate 140A", and the conductive plate 140 on the second chip 130B is referred to as the "second conductive plate 140B".

[0031] Gate electrodes 132 of first chip 130A and second chip 130B are electrically connected to lead frame 122 for gate connection via wire 151 (second wire). Specifically, one end of wire 151 is bonded to gate electrode 132 of first chip 130A by wire bonding. The other end of wire 151 is bonded to lead frame 122 for gate connection by wire bonding. An intermediate portion of wire 151 is bonded to gate electrode 132 of second chip 130B by wire bonding. In FIG. 2, for ease of explanation, the bonded portions of wires 151 to 154 to chip 130 are indicated by blackened circles.

[0032] The source electrodes 133 of the first chip 130A and the second chip 130B are connected to a lead frame for source connection. 123 are electrically connected to each other via two wires 152 (first wires). Specifically, one end of each wire 152 is joined by wire bonding to a portion of first conductive plate 140A protruding from first chip 130A in the Y direction. The other end of each wire 152 is joined by wire bonding to lead frame 123 for source connection. The middle portion of each wire 152 is joined by wire bonding to a portion of second conductive plate 140B protruding from second chip 130B in the Y direction.

[0033] One of the two wires 152 is connected to one end in the Y direction of the first conductive plate 140A and one end in the Y direction of the second conductive plate 140B. The other of the two wires 152 is connected to the other end in the Y direction of the first conductive plate 140A and the other end in the Y direction of the second conductive plate 140B.

[0034] The source electrodes 133 of the first chip 130A and the second chip 130B are connected to a lead frame for source connection. 123 and are further electrically connected via two wires 153 (third wires). Specifically, one end of each wire 153 is bonded by wire bonding to a portion of first conductive plate 140A located directly above first chip 130A. The other end of each wire 153 is bonded by wire bonding to lead frame 123 for source connection. The middle portion of each wire 153 is bonded by wire bonding to a portion of second conductive plate 140B located directly above second chip 130B.

[0035] The source electrode 133 of the second chip 130B is connected to a lead frame for connecting the source. 123 are electrically connected to each other via two wires 154. Specifically, one end of each wire 154 is bonded by wire bonding to a portion of second conductive plate 140B located directly above second chip 130B. The other end of each wire 154 is bonded by wire bonding to lead frame 123 for source connection.

[0036] The two wires 154 are arranged to sandwich the wire 151 in the Y direction when viewed from above. The two wires 153 are arranged to sandwich the wires 151 and 154 in the Y direction when viewed from above.

[0037] The positions in the X direction of the joints of the wires 152, 153, and 154 to the first chip 130A are different from each other. Similarly, the positions in the X direction of the joints of the wires 152, 153, and 154 to the second chip 130B are different from each other. However, the positions in the X direction of the joints of the wires 152, 153, and 154 to the first chip 130A may be the same, and the positions in the X direction of the joints of the wires 152, 153, and 154 to the second chip 130B may be the same. Also, although a state in which the wires 153 and 154 do not overlap in top view is shown in FIG. 1 and FIG. 2, the wires 153 and 154 may partially overlap in top view.

[0038] In this way, the chips 130 adjacent in the X direction are connected in parallel by the multiple wires 152, 153. This allows the amount of current that the semiconductor device 100 can output to be increased. The number of wires used to electrically connect the chips 130 adjacent in the X direction to the lead frame 123 for source connection is not limited to six. The wires may also connect three or more chips and the lead frame for source connection in parallel. Two or more wires may be joined to the portion of each conductive plate protruding from the chip.

[0039] FIG. 6 is an enlarged top view showing a part of the semiconductor device in the reference example. The semiconductor device 100A in the reference example differs from the semiconductor device 100 in the present embodiment in that it does not include the conductive plate 140. When the conductive plate 140 is not provided, the number of wires that can be joined to the source electrode 133 of the chip 130 depends on the area of ​​the source electrode 133.

[0040] In particular, the number of wires that can be joined to source electrode 133 of second chip 130B may be smaller than the number of wires that can be joined to source electrode 133 of first chip 130A. Specifically, even if one end of wire 152A can be joined to source electrode 133 of first chip 130A on the same straight line extending in the X direction as wire 153, there may be no place to join the middle part of wire 152A because wires 153 and 154 are joined to source electrode 133 of second chip 130B. In such a case, wire 152A is joined to source electrode 133 of first chip 130A and lead frame 123 for source connection, and is not joined to source electrode 133 of second chip 130B.

[0041] Therefore, in a configuration such as the semiconductor device 100A in the reference example, the length between the bonded portions of the wire 152A is longer than the length between the bonded portions of the wire 152 in this embodiment. The longer the length between the bonded portions of the wire 152A, the greater the deformation amount when a temperature change occurs. The greater the deformation amount, the greater the stress acting on the bonded portion of the wire 152A, making the bonded portion more likely to break.

[0042] In contrast, in the semiconductor device 100 according to this embodiment, as shown in Fig. 2, a conductive plate 140 is provided on each chip 130. The middle portion of the wire 152 is joined to the conductive plate 140 on the source electrode 133 of the chip 130 closer to the lead frame 123 for source connection. This makes it possible to prevent the length between the joints of the wire 152 from becoming long. This makes it possible to prevent the joints of the wire 152 from breaking. As a result, it is possible to provide a highly reliable semiconductor device 100.

[0043] Next, the effects of this embodiment will be described. In the semiconductor device 100 according to this embodiment, the first conductive plate 140A is disposed on the first chip 130A, and the second conductive plate 140B is disposed on the second chip 130B. The maximum dimension L1 of the first conductive plate 140A in the second direction (Y direction) intersecting with the first direction (X direction) from the first chip 130A to the second chip 130B is larger than the maximum dimension L2 of the first chip 130A in the Y direction. Similarly, the maximum dimension L1 of the second conductive plate 140B in the Y direction is larger than the maximum dimension L2 of the second chip in the Y direction. The wire 152 is joined to a portion of the first conductive plate 140A protruding in the Y direction from the first chip 130A, a portion of the second conductive plate 140B protruding in the Y direction from the second chip 130B, and the lead frame 123 for source connection. Therefore, the length of the wire 152 can be prevented from becoming long. This can prevent the amount of deformation of the wire 152 due to temperature change from becoming large. As a result, it is possible to prevent the bonding portion of the wire 152 from breaking due to temperature changes. As a result, it is possible to provide a highly reliable semiconductor device 100.

[0044] Furthermore, each conductive plate 140 exposes the gate electrode 132 of each chip 130. Therefore, the gate electrode 132 of the first chip 130A and the gate electrode 132 of the second chip 130B can be electrically connected by a wire 151.

[0045] Moreover, semiconductor device 100 further includes a portion of first conductive plate 140A located directly above first chip 130A, a portion of second conductive plate 140B located directly above second chip 130B, and wire 153 joined to lead frame 123 for source connection. Therefore, the amount of current that semiconductor device 100 can output can be increased.

[0046] Furthermore, the maximum dimension L3 in the X direction of first conductive plate 140A is smaller than the maximum dimension L4 in the X direction of first chip 130A, and the maximum dimension L3 in the X direction of second conductive plate 140B is smaller than the maximum dimension L4 in the X direction of second chip 130B. Therefore, it is possible to prevent first conductive plate 140A and second conductive plate 140B from coming close to each other.

[0047] Further, the source electrode 133 contains aluminum (Al), and a metal layer 160 containing gold (Au) is provided on the source electrode 133. Therefore, the source electrode 133 and the conductive plate 140 can be joined by a joining member 170 such as solder or a sintered material.

[0048] In the above embodiment, an example in which the wiring member is a lead frame has been described. However, the wiring member may be any member that is electrically connected to the first electrode of the first chip and the second electrode of the second chip and that constitutes the wiring of the semiconductor device. Therefore, the wiring member may be, for example, a wiring layer provided on a terminal or a substrate.

[0049] Although the embodiments of the present invention have been described above, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are included in the scope of the invention and its equivalents described in the claims. [Explanation of symbols]

[0050] 100: Semiconductor device 110: Substrate 110a:Top surface 110b: Bottom surface 121: Lead frame for drain connection 121a: Support part 121b: Connection part 122: Lead frame for gate connection 123: Lead frame for source connection 130: Tip 130A: 1st chip 130B: 2nd chip 130a: Bottom surface 130b:Top surface 131: Drain electrode 132: Gate electrode 133: Source electrode 133a: 1st area 133b:Second area 140: Conductive plate 140A: First conductive plate 140B: 2nd conductive plate 141 :Concave fruit 1 51: Wire 152: Wire 153: Wire 154: Wire 160: Metal layer 170: Joint material L1: Maximum dimension of the conductive plate in the Y direction L2: Maximum dimension of the chip in the Y direction L3: Maximum dimension of the conductive plate in the X direction L4: Maximum dimension of the chip in the X direction

Claims

1. a first tip having a first electrode; a wiring member spaced apart from the first chip; a second chip having a second electrode and disposed between the first chip and the wiring member; a first conductive plate disposed on the first electrode, the first conductive plate having a maximum dimension in a second direction intersecting a first direction from the first chip to the second chip that is larger than a maximum dimension of the first chip in the second direction and a maximum dimension in the first direction that is smaller than a maximum dimension of the first chip in the first direction, and electrically connected to the first electrode; a second conductive plate disposed on the second electrode, the second conductive plate having a maximum dimension in the second direction larger than a maximum dimension in the second direction of the second chip and a maximum dimension in the first direction smaller than a maximum dimension in the first direction of the second chip, and electrically connected to the second electrode; a first wire joined to a portion of the first conductive plate protruding in the second direction beyond the first chip, a portion of the second conductive plate protruding in the second direction beyond the second chip, and the wiring member; Equipped with the first chip protrudes from the first conductive plate on both sides in the first direction, The second chip protrudes from the second conductive plate on both sides in the first direction.

2. the first chip further includes a third electrode disposed on a surface on which the first electrode is provided; the first conductive plate exposes the third electrode; the second chip further includes a fourth electrode disposed on a surface on which the second electrode is provided, the second conductive plate exposes the fourth electrode; The semiconductor device according to claim 1 , further comprising a second wire joined to the third electrode, extending from the third electrode toward the fourth electrode, and joined to the fourth electrode.

3. the first chip and the second chip are each a MOSFET; the first electrode is a source electrode of the first chip; the third electrode is a gate electrode of the first chip, the second electrode is a source electrode of the second chip; The semiconductor device according to claim 2 , wherein the fourth electrode is a gate electrode of the second chip.

4. A semiconductor device according to any one of claims 1 to 3, further comprising a portion of the first conductive plate located directly above the first chip, a portion of the second conductive plate located directly above the second chip, and a third wire joined to the wiring member.

5. the first electrode and the second electrode each contain aluminum; a first metal layer disposed on the first electrode and comprising gold; a second metal layer disposed on the second electrode and comprising gold; a first conductive bonding member located between the first metal layer and the first conductive plate and bonding the first metal layer and the first conductive plate; a second conductive bonding member located between the second metal layer and the first conductive plate and bonding the second metal layer and the second conductive plate; The semiconductor device according to any one of claims 1 to 4, further comprising:

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