Method for forming a stacked device wafer

Abstract

To provide a formation method for a multilayer device wafer for aligning and bonding device wafers with each other without forming an alignment mark for alignment within a rectangular region corresponding to a device chip.SOLUTION: A formation method for a multilayer device wafer in a bonding apparatus 30 includes a bonding step of bonding a first device wafer 11 with a second device wafer 21. The bonding step includes a position adjusting step of imaging by an imaging unit a first predetermined line formed in an outer peripheral part at a front face side of the first device wafer and positioned outside of a rectangular region corresponding to a device and a second predetermined line formed in an outer peripheral part at a front face side of the second device wafer and positioned outside of the rectangular region corresponding to the device and adjusting relative positions of the first device wafer and the second device wafer by utilizing the first predetermined line and the second predetermined line.SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] The present invention relates to a method for forming a stacked device wafer, in which a plurality of device wafers are stacked to form a stacked device wafer. [Background technology]

[0002] In recent years, products incorporating semiconductor devices including semiconductor device chips have become smaller, thinner, and lighter, as typified by mobile devices such as smartphones, tablets, etc. Accordingly, there is a demand for semiconductor devices to become smaller, thinner, and more dense.

[0003] In order to meet this demand, a method has been proposed in which first and second semiconductor wafers, each having a plurality of semiconductor devices formed thereon, are bonded together via an adhesive layer to form a stacked device wafer having a wafer-on-wafer (WOW) structure, and then the stacked device wafer is subjected to dicing or the like to produce a stacked multi-chip package (MCP) (see, for example, Patent Document 1).

[0004] In Patent Document 1, in order to accurately align and bond the first and second semiconductor device wafers, first, a thermal oxide film is formed over the entire first and second silicon wafers, and then, by a photolithography process, an alignment mark is formed in the thermal oxide film within a rectangular area corresponding to the device chip.

[0005] The alignment mark has the function of indicating a reference position for elements etc. formed within a rectangular area, and also functions as a positioning mark indicating the position of each device wafer when aligning the first and second semiconductor device wafers.

[0006] However, in order to perform the photolithography process, a dedicated photomask is required for forming the alignment marks, and the manufacturing cost increases by the amount of the photolithography process.

[0007] Furthermore, since the alignment marks do not contribute to the function of the semiconductor device itself, the presence of the alignment marks reduces the effective area in which semiconductor devices, including semiconductor circuits, wiring layers, etc., can be formed. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] JP 2008-153499 A Summary of the Invention [Problem to be solved by the invention]

[0009] The present invention has been made in consideration of the above problems, and has an object to align and bond device wafers together without forming alignment marks for alignment within rectangular areas corresponding to device chips. [Means for solving the problem]

[0010] According to one aspect of the present invention, there is provided a method for forming a laminated device wafer by bonding together a first device wafer and a second device wafer, each of which has a plurality of planned dividing lines set in a lattice pattern on its front surface and has devices formed in each of a plurality of rectangular regions partitioned by the plurality of planned dividing lines to form a laminated device wafer in which a plurality of device wafers are stacked, the method comprising the steps of: processing the first device wafer to remove at least a chamfered portion formed on an outer periphery of the front surface side of the first device wafer; after the removal step, grinding the back surface side of the first device wafer to thin it; and after the thinning step, and a bonding step of bonding the first device wafer and the second device wafer together, the bonding step including an imaging unit capturing an image of a first predetermined line formed on the outer periphery of the front surface side of the first device wafer and positioned outside a rectangular area corresponding to the device, and a second predetermined line formed on the outer periphery of the front surface side of the second device wafer and positioned outside the rectangular area corresponding to the device, and a position adjustment step of adjusting the relative positions of the first device wafer and the second device wafer using the first predetermined line and the second predetermined line.

[0011] Preferably, in the bonding step, the back surface side of the first device wafer and the front surface side of the second device wafer are bonded to each other.

[0012] Preferably, in the position adjusting step, the first predetermined line and the second predetermined line are simultaneously imaged by an imaging unit.

[0013] Also, preferably, the first predetermined line is a first planned dividing line set on the surface of the first device wafer, the second predetermined line is a second planned dividing line set on the surface of the second device wafer, the first planned dividing line and the second planned dividing line have the same shape and size, and in the position adjustment step, the first planned dividing line and the second planned dividing line are aligned.

[0014] Also, preferably, in the position adjustment step, in addition to the first predetermined line and the second predetermined line, a third predetermined line that is perpendicular to the first predetermined line, is formed on the outer periphery of the front surface side of the first device wafer, and is located outside the rectangular area corresponding to the device, and a fourth predetermined line that is perpendicular to the second predetermined line, is formed on the outer periphery of the front surface side of the second device wafer, and is located outside the rectangular area corresponding to the device, are used to adjust the relative positions of the first device wafer and the second device wafer.

[0015] According to another aspect of the present invention, there is provided a method for forming a laminated device wafer by bonding together a first device wafer and a second device wafer, the first device wafer and the second device wafer having a plurality of regions defined by the plurality of dividing lines in a lattice pattern on the front surface and a device formed in each of the regions. The method includes the steps of: forming a modified layer by positioning a focal point of a laser beam having a wavelength that transmits through the first device wafer at a predetermined depth in the thickness direction of the first device wafer in the outer periphery of the first device wafer; and grinding the back side of the first device wafer to thin it, and The present invention provides a method for forming stacked device wafers, the method comprising: a thinning step of removing an outer periphery of a wafer; and a bonding step of bonding the first device wafer and the second device wafer together after the thinning step, the bonding step including a position adjustment step of imaging, with an imaging unit, a first predetermined line formed on the outer periphery of the front surface side of the first device wafer and positioned outside a rectangular area corresponding to the device, and a second predetermined line formed on the outer periphery of the front surface side of the second device wafer and positioned outside the rectangular area corresponding to the device, and adjusting the relative positions of the first device wafer and the second device wafer using the first predetermined line and the second predetermined line. Effect of the Invention

[0016] In a method for forming a stacked device wafer according to one aspect of the present invention, a first device wafer and a second device wafer are bonded together (a bonding step). The bonding step includes a position adjustment step.

[0017] In the position adjustment step, a first predetermined line formed on the outer periphery of the front surface side of the first device wafer and positioned outside the rectangular area corresponding to the device, and a second predetermined line formed on the outer periphery of the front surface side of the second device wafer and positioned outside the rectangular area corresponding to the device are imaged by an imaging unit, and the relative positions of the first device wafer and the second device wafer are adjusted using the first predetermined line and the second predetermined line.

[0018] In other words, device wafers can be aligned with each other without forming alignment marks for alignment within rectangular areas corresponding to the devices in order to adjust the positions of the device wafers. Therefore, the photolithography process for forming alignment marks can be omitted, and the effective area of ​​the devices is not reduced by the alignment marks. [Brief description of the drawings]

[0019] [Figure 1] FIG. 1(A) is a perspective view of a first device wafer, and FIG. 1(B) is a cross-sectional view of the outer periphery of the first device wafer. [Diagram 2] FIG. 1 is a flow diagram of a method for forming a stacked device wafer. [Diagram 3] FIG. 3(A) is a partial cross-sectional side view showing the removing step, and FIG. 3(B) is a cross-sectional view of the first device wafer after the removing step. [Figure 4] FIG. 4(A) is a partial cross-sectional side view showing the thinning step, and FIG. 4(B) is a cross-sectional view of the first device wafer etc. after the thinning step. [Diagram 5] FIG. 11 is a partial cross-sectional side view showing a position adjustment step. [Figure 6]FIG. 2 is a perspective view of a first device wafer and a second device wafer. [Figure 7] Figure 7(A) is a schematic diagram of an image in region A when the positions of the first and second planned division lines are misaligned, and Figure 7(B) is a schematic diagram of an image in region A when the positions of the first and second planned division lines are aligned. [Figure 8] Figure 8(A) is a schematic diagram of an image in region B when the positions of the third and fourth planned division lines are misaligned, and Figure 8(B) is a schematic diagram of an image in region B when the positions of the third and fourth planned division lines are aligned. [Figure 9] FIG. 9(A) is a partial cross-sectional side view showing the lowering and fixing step, and FIG. 9(B) is a cross-sectional view of the first and second device wafers after the temporary fixing substrate has been removed. [Figure 10] FIG. 11 is a flow diagram of a method for forming a laminated device wafer according to a second embodiment. [Figure 11] FIG. 2 is a top view of a first device wafer showing first and second intended processing lines. [Figure 12] FIG. 4 is a diagram showing a state in which a first modified layer is formed. [Figure 13] FIG. 11 is a diagram showing a state in which a second modified layer is formed. [Figure 14] FIG. 14A is a diagram showing a case where the position adjustment step is performed using a device region and a peripheral surplus region, and FIG. 14B is a diagram showing a case where the position adjustment step is performed using device regions. [Figure 15] FIG. 1 is a cross-sectional view of a stacked device wafer in which five device wafers are stacked. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0020] An embodiment according to one aspect of the present invention will be described with reference to the accompanying drawings. First, a first device wafer 11 (see FIG. 1) and a second device wafer 21 (see FIG. 5) will be described. Since both have roughly the same shape, the first device wafer 11 will be described.

[0021] Fig. 1(A) is a perspective view of a first device wafer 11, and Fig. 1(B) is a cross-sectional view of the outer periphery of the first device wafer 11. The first device wafer 11 has a disk-shaped wafer 13 made mainly of silicon.

[0022] A plurality of planned dividing lines (streets) 15 are set in a lattice pattern on a front surface 11a (corresponding to the front surface of the wafer 13) of the first device wafer 11. The plurality of planned dividing lines 15 include a plurality of planned dividing lines 15a each parallel to a first direction 17a.

[0023] The plurality of division lines 15a are intersected by a plurality of division lines 15b each parallel to a second direction 17b perpendicular to the first direction 17a. The surface 11a is divided into a plurality of rectangular regions 19A by the plurality of division lines 15a, 15b.

[0024] A device 19 such as an IC (Integrated Circuit) is formed on the front surface 11a side of each rectangular region 19A. A notch 11c indicating the crystal orientation of the wafer 13 is formed on the outer periphery of the first device wafer 11.

[0025] In addition, a chamfered portion 11d is formed on each of the outer periphery on the front surface 11a side and the outer periphery on the back surface 11b side. In the thickness direction of the wafer 13, an outer periphery 11e that defines the diameter of the wafer 13 exists between the chamfered portion 11d on the front surface 11a side and the chamfered portion 11d on the back surface 11b side.

[0026] The second device wafer 21 has roughly the same shape as the first device wafer 11, but the structure of the devices 19 of the second device wafer 21 may be the same as or different from the structure of the devices 19 of the first device wafer 11.

[0027] Next, with reference to Figures 2 to 9(B), a method for forming the laminated device wafer 23 (see Figure 9(B)) in which the first device wafer 11 and the second device wafer 21 are laminated will be described.

[0028] 2 is a flow diagram of a method for forming a laminated device wafer 23 according to the first embodiment. First, the outer periphery of the first device wafer 11 is cut (processed) to remove the chamfered portion 11d formed on the outer periphery on the front surface 11a side of the first device wafer 11 (removal step S10).

[0029] 3A is a partial cross-sectional side view showing the removing step S10. In the removing step S10, a cutting device 2 is used. The cutting device 2 has a disk-shaped chuck table (not shown). The upper surface of the chuck table functions as a substantially flat holding surface.

[0030] A negative pressure is transmitted to the holding surface from a suction source (not shown) such as an ejector. A rotation drive source (not shown) such as a motor is connected to the lower part of the chuck table. The rotation drive source allows the chuck table to rotate around a predetermined rotation axis 4 arranged approximately parallel to the cutting feed direction (e.g., the Z-axis direction).

[0031] A cutting unit is disposed above the chuck table and is configured to be movable in the cutting feed direction by a ball screw type cutting feed unit (not shown).

[0032] Furthermore, the cutting unit is configured to be movable in an indexing feed direction (for example, in the Y-axis direction) by a ball screw type indexing feed unit (not shown). The cutting unit has a square cylindrical spindle housing whose longitudinal direction is arranged along the indexing feed direction.

[0033] A part of the cylindrical spindle 6 is rotatably accommodated in the spindle housing. A rotation drive source (not shown), such as a motor, is provided at the base end of the spindle 6. The tip of the spindle 6 protrudes from the spindle housing, and a cutting blade 8 having an annular cutting edge is attached to this tip.

[0034] In the removal step S10, first, the back surface 11b side of the first device wafer 11 is suction-held by the holding surface. Next, while cutting water such as pure water is supplied to the cutting blade 8, the lower end of the cutting blade 8 rotating at high speed (e.g., about 30,000 rpm) cuts into the outer periphery of the front surface 11a side, and the chuck table is rotated at a predetermined speed (e.g., 3° / s (i.e., 180° / min)).

[0035] As a result, the chamfered portion 11d on the front surface 11a side is removed, and an annular step portion 11f is formed on the front surface 11a side. Figure 3(B) is a cross-sectional view of the first device wafer 11 after the removing step S10.

[0036] In addition, in the removal step S10, at least the chamfered portion 11d on the front surface 11a side is removed, but alternatively, the cutting depth of the cutting blade 8 may be positioned at approximately the same height as the back surface 11b, and each of the chamfered portions 11d on the front surface 11a side and the back surface 11b side may be removed.

[0037] After the removal step S10, a temporary adhesive such as an ultraviolet curing resin or a thermoplastic resin is applied to the temporary fixing substrate 33 using a spinner coater (not shown). After this, a temporary adhesive layer 35 is formed, and then the disk-shaped temporary fixing substrate 33 is fixed to the front surface 11a side via the temporary adhesive layer 35 (temporary fixing step S20).

[0038] In this embodiment, a glass substrate that is transparent to visible light is used as the temporary fixing substrate 33. Alternatively, however, a silicon substrate may be used as the temporary fixing substrate 33. Note that since a silicon substrate is transparent to infrared light, when a silicon substrate is used, an infrared camera is used in the microscope camera unit 32 described below.

[0039] After the temporary fixing substrate 33 is suction-held by the first chuck table, the back surface 11b side is ground to thin the first device wafer 11 (thinning step S30). Fig. 4(A) is a partially sectional side view of the first device wafer 11 and the grinding and polishing apparatus 10 showing the thinning step S30.

[0040] The grinding / polishing apparatus 10 has a disk-shaped first chuck table (not shown). The first chuck table is rotatable about a predetermined rotation axis 12 by a rotation drive source such as a motor.

[0041] A rough grinding unit 14 is provided above the first chuck table. The rough grinding unit 14 is configured to be movable in a grinding feed direction (e.g., Z-axis direction) by a ball screw type grinding feed unit (not shown). The rough grinding unit 14 has a cylindrical spindle housing 16 whose longitudinal direction is arranged along the grinding feed direction.

[0042] A part of a cylindrical spindle 18 is rotatably housed in the spindle housing 16. A rotation drive source (not shown), such as a motor, is provided at the upper end of the spindle 18. The lower end of the spindle 18 protrudes from the spindle housing 16, and the upper surface side of a disk-shaped mount 20 is fixed to this lower end.

[0043] An annular rough grinding wheel 22 is attached to the underside of the mount 20. The rough grinding wheel 22 has an annular wheel base 22a. A plurality of block-shaped rough grinding stones 22b are discretely arranged on the underside of the wheel base 22a along the circumferential direction of the wheel base 22a.

[0044] The grinding and polishing apparatus 10 further includes a second chuck table (not shown) that is disposed adjacent to the first chuck table and has substantially the same structure as the first chuck table. The second chuck table is also rotatable around a predetermined rotation axis.

[0045] A finish grinding unit (not shown) is provided above the second chuck table. The finish grinding unit includes a finish grinding stone having abrasive grains having an average grain size smaller than that of the rough grinding stone 22b, in place of the rough grinding stone 22b.

[0046] The grinding and polishing apparatus 10 further includes a third chuck table (not shown) that is disposed adjacent to the first and second chuck tables and has substantially the same structure as the first chuck table. The third chuck table is also rotatable around a predetermined rotation axis.

[0047] A polishing unit (not shown) is provided above the third chuck table. The polishing unit has a disk-shaped polishing pad (not shown) instead of the rough grinding wheel 22.

[0048] In the thinning step S30, first, the first chuck table is rotated around the rotation axis 12 at a predetermined speed (e.g., about 300 rpm), and the rough grinding wheel 22 is rotated around the spindle 18 as the rotation axis at a predetermined speed (e.g., about 3,000 rpm).

[0049] The back surface 11b side is roughly ground by feeding the rough grinding unit 14 downward while supplying grinding water such as pure water to the processing point from the rough grinding wheel 22. After rough grinding is performed until a predetermined thickness is reached, the back surface 11b side is finish ground using a second chuck table and a finish grinding unit.

[0050] After the finish grinding, a third chuck table and a polishing unit are used to perform chemical mechanical polishing (CMP) on the back surface 11b side. Through rough grinding, finish grinding and polishing, the wafer 13 is thinned so that the thickness from the back surface 11b to the outermost surface of the device 19 is about 10 μm, and grinding marks (saw marks) are removed.

[0051] In the thinning step S30, the back surface 11b side is ground and polished to a position corresponding to the step portion 11f, so that the outer diameter of the first device wafer 11 becomes smaller than the outer diameter before the thinning step S30, which is defined by the outer periphery 11e.

[0052] 4(B) is a cross-sectional view of the first device wafer 11 etc. after the thinning step S30. After the thinning step S30, the back surface 11b side of the first device wafer 11 and the front surface 21a side of the second device wafer 21 are bonded together with an adhesive (bonding step S40).

[0053] In the bonding step S40, a bonding apparatus 30 (see FIG. 5) is used. The bonding apparatus 30 has a vacuum chamber (not shown). In the vacuum chamber, a disk-shaped holder (not shown) that holds the temporary fixing substrate 33 by suction is provided.

[0054] The holding part includes a porous body, and negative pressure is transmitted to this porous body from a suction source such as an ejector. In addition, the holding part is configured to be movable along the Z-axis direction (up and down direction) by a Z-axis direction moving mechanism (not shown) connected to it.

[0055] Provided near the holding part is a microscope camera unit (imaging unit) 32. The microscope camera unit 32 includes a lens, an imaging element, etc., and has a focal depth of about 20 μm to 30 μm.

[0056] The microscope camera unit 32 is configured to be movable in the X-, Y-, and Z-axis directions above the temporary fixed substrate 33 sucked by the holding part. A holding table (not shown) is provided below the holding part and the microscope camera unit 32.

[0057] The holding table is configured to be movable along the X- and Y-axes by a ball screw type X-axis direction moving mechanism and a Y-axis direction moving mechanism (neither shown).

[0058] Furthermore, the holding table is configured to be rotatable within a predetermined angle range around a rotation axis along the Z-axis direction (i.e., adjustable in the θ direction). The holding table is also provided with a heat source (not shown) such as a heater.

[0059] In the bonding step S40, first, a resin adhesive such as benzocyclobutene is applied to the back surface 11b side of the first device wafer 11 using a spinner coater (not shown) to form an adhesive layer 37 having a predetermined thickness (e.g., a thickness of less than 10 μm).

[0060] Thereafter, the pressure inside the vacuum chamber is reduced, and the back surface 21b side of the second device wafer 21 is held by a holding table using a holding ring (not shown) or the like, and the holding portion holding the temporary fixing substrate 33 by suction is moved downward.

[0061] Then, the surface 21a of the second device wafer 21 and the adhesive layer 37 are brought close to each other so that the upper ends of the devices 19 on the surface 21a side are separated by a distance 39a of at least several μm from the adhesive layer 37 (see FIG. 5). At this time, the surfaces 11a and 21a are located at a distance 39b close enough that they can be simultaneously imaged by the microscope camera unit 32.

[0062] Next, the outer periphery on the front surface 11a side of the first device wafer 11 and the outer periphery on the front surface 21a side of the second device wafer 21 are imaged by the microscope camera unit 32, and the relative position of the second device wafer 21 with respect to the first device wafer 11 is adjusted (position adjustment step S42).

[0063] Fig. 5 is a partial cross-sectional side view showing the position adjustment step S42, and Fig. 6 is a perspective view of the first device wafer 11 and the second device wafer 21 in the position adjustment step S42. Note that the temporary fixing substrate 33 and the temporary adhesive layer 35 are omitted in Fig. 6.

[0064] In the position adjustment step S42 of this embodiment, a first planned division line (first specified line) 15a1 parallel to the first direction 17a formed on the outer periphery of the surface 11a, and a second planned division line (second specified line) 15a2 parallel to the first direction 17a formed on the outer periphery of the surface 21a are simultaneously imaged.

[0065] The first planned dividing line 15a1 and the second planned dividing line 15a2 indicate dividing positions when dividing the wafer 13 into devices 19, and are located outside the rectangular area 19A corresponding to the devices 19. In this respect, they differ from the above-mentioned alignment marks for positioning.

[0066] FIG. 7A is a schematic diagram of an image in a region A in a case where the position of a first planned division line 15a1 and the position of a second planned division line 15a2 are misaligned in the second direction 17b.

[0067] In the case of FIG. 7(A), the second device wafer 21 is moved in the second direction 17b, so that the first planned dividing lines 15a1 and the second planned dividing lines 15a2 are aligned in the second direction 17b.

[0068] 7B is a schematic diagram of an image in the region A when the position of the first division line 15a1 and the position of the second division line 15a2 coincide with each other in the second direction 17b. The first division line 15a1 and the second division line 15a2 have the same shape and size (width), and therefore are suitable as alignment marks.

[0069] Next, the microscope camera unit 32 is positioned in region B (see FIG. 6). Then, images of a third planned division line (third predetermined line) 15b3, which is positioned perpendicular to the first planned division line 15a1, and a fourth planned division line (fourth predetermined line) 15b4, which is positioned perpendicular to the second planned division line 15a2, are simultaneously captured.

[0070] Of course, the third division line 15b3 is formed on the outer periphery on the front surface 11a side, and the fourth division line 15b4 is also formed on the outer periphery on the front surface 21a side. Moreover, the third division line 15b3 and the fourth division line 15b4 are also located outside the rectangular region 19A corresponding to the device 19.

[0071] Fig. 8(A) is a schematic diagram of an image in region B in the case where the position of the third planned dividing line 15b3 and the position of the fourth planned dividing line 15b4 are misaligned. In the case of Fig. 8(A), the second device wafer 21 is moved in the first direction 17a to align the third planned dividing line 15b3 and the fourth planned dividing line 15b4 in the first direction 17a.

[0072] 8(B) is a schematic diagram of an image in region B when the position of the third planned division line 15b3 and the position of the fourth planned division line 15b4 are aligned. The third planned division line 15b3 and the fourth planned division line 15b4 have the same shape and size (width), and are therefore suitable as alignment marks.

[0073] In particular, by adjusting the positions using a plurality of planned dividing lines 15 that are positioned perpendicular to each other, the first device wafer 11 and the second device wafer 21 can be accurately aligned in the first direction 17a and the second direction 17b.

[0074] It is preferable that region A and region B are separated by ¼ or more of the circumference in the circumferential direction of the first device wafer 11. By separating region A and region B in this manner, it becomes easier to detect a misalignment compared to when region A and region B are close to each other.

[0075] Incidentally, in the position adjustment step S42, the deviation in the θ direction between the first device wafer 11 and the second device wafer 21 may be eliminated by utilizing the respective dividing lines 15 on the front surface 11a side and the front surface 21a side.

[0076] In this manner, in the position adjustment step S42, position adjustment is performed in the second direction 17b using the first planned division line 15a1 and the second planned division line 15a2, and position adjustment is performed in the first direction 17a using the third planned division line 15b3 and the fourth planned division line 15b4 as references.

[0077] In other words, the first device wafer 11 and the second device wafer 21 can be aligned with each other without forming an alignment mark in the rectangular area 19A corresponding to the device 19 for adjusting the positions of the first device wafer 11 and the second device wafer 21.

[0078] Therefore, there is an advantage that the photolithography process for forming the alignment marks can be omitted, and the effective area of ​​the device 19 is not reduced by the alignment marks.

[0079] 9(A) is a partial cross-sectional side view showing the lowering and fixing step S44 after the position adjustment step S42. In the lowering and fixing step S44, the temporary fixing substrate 33 is lowered to press the back surface 11b side against the front surface 21a side, and the adhesive layer 37 is solidified.

[0080] For example, the second device wafer 21 is heated at 250° C. for about one hour while the back surface 11b side is pressed against the front surface 21a side, thereby solidifying the adhesive layer 37. This bonds and fixes the first device wafer 11 and the second device wafer 21 together.

[0081] After the lowering and fixing step S44, the adhesive force of the temporary adhesive layer 35 is reduced, and the temporary fixing substrate 33 is peeled off from the front surface 11a side (peeling step S50). Fig. 9(B) is a cross-sectional view of the laminated device wafer 23 after the peeling step S50.

[0082] For example, when the temporary adhesive is an ultraviolet curing resin, ultraviolet light is irradiated onto the front surface 11a side to reduce the adhesive strength, and then the temporary fixing substrate 33 is peeled off. As a result, a stacked device wafer 23 in which the first device wafer 11 and the second device wafer 21 are stacked is formed.

[0083] In this embodiment, the first device wafer 11 and the second device wafer 21 can be aligned without forming an alignment mark in the rectangular region 19A corresponding to the device 19. Therefore, the photolithography process for forming the alignment mark can be omitted, and the effective area of ​​the device 19 is not reduced by the alignment mark.

[0084] (First Modified Example) Incidentally, when the circuit pattern including the devices 19 on the surface 11a side of the first device wafer 11 and the circuit pattern including the devices 19 on the surface 21a side of the second device wafer 21 are mirror images, the surface 11a side and the surface 21a side can also be bonded together.

[0085] In this case, after the removing step S10, the front surface 11a side is protected with a resin protective tape (not shown) or the like, and then the back surface 11b side is ground to perform the thinning step S30. Then, a temporary fixing substrate 33 is fixed to the back surface 11b side of the first device wafer 11 after the thinning step S30 via a temporary adhesive layer 35 (temporary fixing step).

[0086] Next, an adhesive layer 37 is formed on the surface 11a side of the first device wafer 11, and the adhesive layer 37 on the surface 11a side and the surface 21a of the second device wafer 21 are brought face to face and close to each other so that they are separated by a distance 39a of at least several μm.

[0087] Then, in the position adjustment step S42, a microscope camera unit 32 equipped with an infrared camera is used to capture images of the outer periphery on the surface 11a side of the first device wafer 11 and the outer periphery on the surface 21a side of the second device wafer 21, and the relative position of the second device wafer 21 with respect to the first device wafer 11 is adjusted.

[0088] By using an infrared camera in this manner, it is possible to image the front surface 11a side as well as the front surface 21a side in a manner that transmits through the first device wafer 11. Thereafter, through a lowering and fixing step S44 and a peeling step S50, a laminated device wafer in which the front surface 11a side and the front surface 21a side are bonded together can be formed.

[0089] (Second Modification) Furthermore, as described above, when the circuit pattern on the front surface 11a side and the circuit pattern on the front surface 21a side are mirror images, the back surface 11b side and the back surface 21b side can also be attached to each other.

[0090] When bonding the back surface 11b side and the back surface 21b side, a first device wafer 11 that has been thinned through the above-mentioned removing step S10 to thinning step S30 and has its front surface 11a side fixed to a temporary fixing substrate 33 is prepared.

[0091] Similarly, after removing the chamfered portion on the front surface 21a side, the back surface 21b side of the second device wafer 21, whose front surface 21a side is fixed to a temporary fixing substrate (not shown) by a temporary adhesive layer 35, is ground to prepare a thinned second device wafer 21.

[0092] When removing the chamfered portion on the front surface 21a side, the removal range on the front surface 21a side is adjusted so that the diameter of the second device wafer 21 after thinning is larger than the diameter of the first device wafer 11.

[0093] Then, the temporary fixing substrate 33 of the first device wafer 11, which has an adhesive layer 37 provided on the back surface 11b side, is held by suction using a holding portion, the temporary fixing substrate fixed to the second device wafer 21 is held by suction using a holding table, and the first device wafer 11 is positioned above the second device wafer 21.

[0094] Next, the adhesive layer 37 of the first device wafer 11 and the rear surface 21b of the second device wafer 21 are brought close to each other so that they are separated by a distance 39a of at least several μm.

[0095] In particular, in the position adjustment step S42, a microscope camera unit 32 equipped with an infrared camera is used to capture images of the outer periphery on the surface 11a side of the first device wafer 11 and the outer periphery on the surface 21a side of the second device wafer 21, and to adjust the relative position of the second device wafer 21 with respect to the first device wafer 11.

[0096] In this manner, by using an infrared camera, it is possible to image the front surface 21a side and the front surface 11a side in a manner that transmits through the second device wafer 21. Thereafter, through a lowering and fixing step S44 and a peeling step S50, a laminated device wafer in which the back surface 11b side and the back surface 21b side are bonded together can be formed.

[0097] (Third Modification) The front surface 11a of the first device wafer 11 may be bonded to the back surface 21b of the second device wafer 21. In this case, similar to the first modification, a temporary fixing substrate 33 is fixed to the back surface 11b of the first device wafer 11 after the thinning step S30 via a temporary adhesive layer 35 (temporary fixing step).

[0098] As in the second modified example, the chamfered portion on the front surface 21a side is removed, and then the back surface 21b side of the second device wafer 21, the front surface 21a side of which is fixed to a temporary fixing substrate (not shown) by the temporary adhesive layer 35, is ground to prepare a thinned second device wafer 21. As in the second modified example, the diameter of the thinned second device wafer 21 is made larger than the diameter of the first device wafer 11.

[0099] Then, the temporary fixing substrate 33 of the first device wafer 11, which has an adhesive layer 37 provided on the back surface 11b side, is held by suction using a holding portion, the temporary fixing substrate fixed to the second device wafer 21 is held by suction using a holding table, and the first device wafer 11 is positioned above the second device wafer 21.

[0100] Next, the adhesive layer 37 of the first device wafer 11 and the rear surface 21b of the second device wafer 21 are brought close to each other so that they are separated by a distance 39a of at least several μm.

[0101] In particular, in the position adjustment step S42, a microscope camera unit 32 equipped with an infrared camera is used to capture images of the outer periphery on the surface 11a side of the first device wafer 11 and the outer periphery on the surface 21a side of the second device wafer 21, and to adjust the relative position of the second device wafer 21 with respect to the first device wafer 11.

[0102] In this manner, by using an infrared camera, images of the front surface 11a side and the front surface 21a side can be captured in a manner penetrating the first device wafer 11 and the second device wafer 21. Thereafter, through a lowering and fixing step S44 and a peeling step S50, a laminated device wafer in which the front surface 11a side and the back surface 21b side are bonded together can be formed.

[0103] Next, a second embodiment will be described. Fig. 10 is a flow diagram of a method for forming a laminated device wafer 23 according to the second embodiment. In the second embodiment, first, the front surface 11a side is fixed to a temporary fixing substrate 33 via a temporary adhesive layer 35 (temporary fixing step S20).

[0104] Next, a first modified layer 43a and a second modified layer 43b (see Figures 12 and 13) are formed on the outer periphery of the first device wafer 11 along the first planned processing line 45a and the second planned processing line 45b (see Figure 11) (modified layer formation step S22).

[0105] Fig. 11 is a top view of the first device wafer 11 showing the first processing lines 45a and the second processing lines 45b along which the modified layers 43 (see Fig. 13) are to be formed, respectively. Note that the dividing lines 15, the devices 19, etc. are omitted in Fig. 11.

[0106] In the modified layer forming step S22, a laser processing device 40 is used (see FIG. 12). The laser processing device 40 has a disk-shaped chuck table (not shown). A rotary drive source (not shown) such as a motor is provided below the chuck table, and the chuck table can rotate around a rotary shaft 42.

[0107] A ball screw type processing feed mechanism (X-axis direction moving mechanism) is provided below the chuck table. A laser beam irradiation unit 44 is disposed above the chuck table. The laser beam irradiation unit 44 has a laser oscillator (not shown) and a condenser 46 including a condenser lens (not shown).

[0108] In the modified layer formation step S22, a laser beam L is irradiated along a ring-shaped first processing line 45a (see Figure 11) located a predetermined distance inward from the outer peripheral edge 11e in the radial direction of the first device wafer 11 to form a ring-shaped first modified layer 43a.

[0109] Fig. 12 is a diagram showing a state in which the first modified layer 43a is formed, and corresponds to the CC cross-sectional view of Fig. 11. In order to form the first modified layer 43a, first, the temporary fixing substrate 33 fixed to the first device wafer 11 is suction-held on the holding surface of a chuck table.

[0110] Next, the condenser 46 is placed directly above the first line to be processed 45a, and the focal point of the pulsed laser beam L having a wavelength that transmits the wafer 13 is positioned at a predetermined depth in the thickness direction of the wafer 13. In this state, the first device wafer 11 is rotated around the rotation axis 42. The processing conditions are set, for example, as follows:

[0111] Wavelength: 1064nm Average power output: 1W Repetition frequency: 100kHz Rotation speed: 180° / s

[0112] Since multiphoton absorption occurs at the focal point and its vicinity, a ring-shaped first modified layer 43a is formed along the first processing line 45a. Note that a plurality of first modified layers 43a may be formed in the thickness direction of the wafer 13 by changing the depth position of the focal point.

[0113] In Fig. 12, the first modified layer 43a is shown by a circle for the sake of convenience. When the first modified layer 43a is formed, cracks 47 are formed starting from the first modified layer 43a and extending to the front surface 11a and the back surface 11b.

[0114] In the modified layer formation step S22, a laser beam L is further irradiated along a plurality of second processing lines 45b (18 in the example shown in Figure 11) that are set radially at approximately equal intervals along the outer peripheral edge 11e in the annular region from the first processing line 45a to the outer peripheral edge 11e to form a second modified layer 43b.

[0115] Fig. 13 is a diagram showing a state in which the second modified layer 43b is formed, and corresponds to the CC cross-sectional view of Fig. 11. In order to form the second modified layer 43b, first, one second processing line 45b is made substantially parallel to the X-axis direction.

[0116] Then, the focal point of the laser beam L is positioned at a predetermined depth below one of the second lines to be processed 45b, and the chuck table is moved along the X-axis direction so that the focal point moves from one end of the one of the second lines to be processed 45b to the other end. The processing conditions are set, for example, as follows.

[0117] Wavelength: 1064nm Average power output: 1W Repetition frequency: 100kHz Machining feed speed: 800mm / s

[0118] In this manner, the second modified layer 43b is formed along all the second processing lines 45b. In FIG. 13, one second modified layer 43b is shown by a plurality of circles for convenience. When the second modified layer 43b is formed, cracks 47 are formed starting from the second modified layer 43b and extending to the front surface 11a and the back surface 11b. The modified layer 43 refers to a region that has a weaker mechanical strength than a region not irradiated with the laser beam L and that becomes the starting point of the cracks 47.

[0119] After the modified layer forming step S22, the back surface 11b side of the first device wafer 11 is ground to thin it (thinning step S30, see FIGS. 4(A) and 4(B)). In the thinning step S30, cracks 47 extend from the first modified layer 43a and the second modified layer 43b due to the impact of grinding.

[0120] Then, the outer periphery of the first device wafer 11 is separated and removed by vibration, centrifugal force, and the like acting on the first device wafer 11 during grinding. Since the bonding step S40 and subsequent steps are the same as those in the first embodiment, the description thereof will be omitted.

[0121] In the second embodiment as well, the first device wafer 11 and the second device wafer 21 can be aligned without forming an alignment mark in the rectangular region 19A corresponding to the device 19. Therefore, the photolithography process for forming the alignment mark can be omitted, and the effective area of ​​the device 19 is not reduced by the alignment mark.

[0122] In the second embodiment, too, the front surface 11a side and the front surface 21a side may be bonded together as described in the first modified example, the back surface 11b side and the back surface 21b side may be bonded together as described in the second modified example, or the front surface 11a side and the back surface 21b side may be bonded together as described in the third modified example.

[0123] Next, two examples of the position adjustment step S42 will be described with reference to Fig. 14(A) and Fig. 14(B). Fig. 14(A) is a diagram showing a case where the position adjustment step S42 is performed using the device region 19a and the outer circumferential surplus region 29b.

[0124] A circular device region 19a in which a plurality of devices 19 are formed is present on the front surface 11a side of the first device wafer 11. In addition, an annular outer peripheral surplus region is present outside the device region 19a in the radial direction of the first device wafer 11.

[0125] Similarly, a circular device region 29a in which a plurality of devices 19 are formed is present on the front surface 21a side of the second device wafer 21. In addition, a peripheral surplus region 29b is present outside the device region 29a in the radial direction of the second device wafer 21.

[0126] Generally, on the front side of a 300 mm (12 inch) diameter wafer, the flatness of an annular region extending from the outer periphery to 2.0 mm inward along the diameter direction is not guaranteed by the manufacturer. This annular region is generally called the outer periphery excess region.

[0127] In the peripheral surplus region, the division lines 15, devices 19, wiring layers, circuits, etc. are not formed at all, or even if they are formed, the circuits, etc. formed in this peripheral surplus region are not ultimately used as a device chip.

[0128] In addition, an annular region extending 1.0 mm inward along the diameter direction from the outer peripheral surplus region (i.e., starting from the inner circumference of the outer peripheral surplus region and extending 3.0 mm inward along the diameter direction from the outer peripheral edge 11e) is included in the device region, but the circuits etc. located in this annular region are not ultimately used as a device chip.

[0129] Taking the above circumstances into consideration, first, with reference to Figure 14(A), we will explain the case where the second planned division line 15a2 and the fourth planned division line 15b4 in the second device wafer 21 are formed from the device region 29a to the outer peripheral surplus region 29b.

[0130] In this case, the position adjustment step S42 can be performed using the first planned dividing line 15a1 and the third planned dividing line 15b3 formed on the outer periphery on the surface 11a side of the first device wafer 11, and the second planned dividing line 15a2 and the fourth planned dividing line 15b4 formed on the outer periphery on the surface 21a side of the second device wafer 21.

[0131] However, as shown in Figure 14(B), there may be cases where the second planned dividing line 15a2 and the fourth planned dividing line 15b4 in the second device wafer 21 are formed on the outer periphery of the device region 29a but not formed in the outer periphery excess region 29b.

[0132] In this case, as shown in FIG. 14(B), the diameter of the device region 19a shown in FIG. 14(A) is further reduced by 1.0 mm, so that the outer periphery of the device region 29a is exposed outside the device region 19a (see the leftward arrow in FIG. 14(B)).

[0133] 14(B) is a diagram showing a case where the position adjustment step S42 is performed using the device regions 19a, 29a. While capturing images of the outer peripheries of the device regions 19a, 29a with the microscope camera unit 32, the positions of the first device wafer 11 and the second device wafer 21 are adjusted.

[0134] In either case of FIG. 14(A) or FIG. 14(B), the first device wafer 11 and the second device wafer 21 can be aligned without forming an alignment mark in a rectangular region 19A corresponding to the device 19.

[0135] Also, in the cases of Figures 14(A) and 14(B), the front surface 11a side and the front surface 21a side may be bonded together as described in the first modified example, the back surface 11b side and the back surface 21b side may be bonded together as described in the second modified example, or the front surface 11a side and the back surface 21b side may be bonded together as described in the third modified example.

[0136] Next, an example in which three or more device wafers are stacked will be described. Fig. 15 is a cross-sectional view of a stacked device wafer 53 in which five device wafers (a first device wafer 11, a second device wafer 21, a third device wafer 31, a fourth device wafer 41, and a fifth device wafer 51) are stacked.

[0137] As shown in FIG. 15, the diameter of the thinned upper device wafer is made smaller than that of the lower device wafer, so that the bonding step S40 can be applied.

[0138] Therefore, adjacent device wafers in the stacking direction can be aligned with each other without forming alignment marks in rectangular regions 19A corresponding to the devices 19. In addition, it may be appropriately determined whether the front or back surface of the device wafer is to be the top (or bottom).

[0139] In addition, the structures, methods, and the like according to the above-described embodiments can be modified as appropriate without departing from the scope of the object of the present invention.

[0140] Instead of the above-mentioned removal step S10, a pulsed laser beam having a wavelength (e.g., 355 nm) that is absorbed by the first device wafer 11 may be used to remove at least the chamfered portion 11d formed on the outer periphery on the front surface 11a side by laser ablation.

[0141] Also, instead of the above-mentioned removing step S10, at least the chamfered portion 11d formed on the outer periphery on the front surface 11a side may be removed by plasma etching. That is, in the removing step S10 for processing the first device wafer 11, laser ablation or plasma etching may be used.

[0142] Furthermore, in the bonding step S40, instead of the adhesive layer 37, a silicon oxide layer may be formed on the back surface 11b of the first device wafer 11, and a silicon oxide layer may also be formed on the front surface 21a of the second device wafer 21 and flattened before the silicon oxide layers are bonded together.

[0143] Incidentally, in the position adjustment step S42, the front surface 11a side may be imaged and then the focal point of the microscope camera unit 32 may be moved in the Z-axis direction to image the front surface 21a side, so that the front surface 11a side and the front surface 21a side may be imaged at different times rather than simultaneously. However, imaging simultaneously makes position adjustment easier.

[0144] In addition, in the position adjustment step S42, instead of or together with the first division line 15a1 to the fourth division line 15b4, a predetermined pattern such as a core including a TEG (Test Element Group), memory cells, row decoders, column decoders, etc., a peripheral, a wiring layer, etc. can be used.

[0145] In other words, the first to fourth specified lines used to adjust the position of the first device wafer 11 and the second device wafer 21 are not limited to the planned division lines 15, but any pattern located outside the rectangular area 19A corresponding to the device 19 can be used. [Explanation of symbols]

[0146] 2: cutting device, 4: rotating shaft, 6: spindle, 8: cutting blade, 10: grinding and polishing device 11: first device wafer, 11a: front surface, 11b: back surface, 11c: notch 11d: chamfered portion, 11e: outer periphery, 11f: step portion, 13: wafer 12: Rotating shaft, 14: Rough grinding unit, 16: Spindle housing, 18: Spindle 15, 15a, 15b: Planned division lines 15a1: First division line (first predetermined line) 15a2: Second division line (second predetermined line) 15b3: Third division line (third predetermined line) 15b4: 4th division line (4th designated line) 17a: 1st direction, 17b: 2nd direction 19: device, 19A: area, 19a: device area 20: mount, 22: rough grinding wheel, 22a: wheel base, 22b: rough grinding stone 21: second device wafer, 21a: front surface, 21b: back surface 23: stacked device wafer, 29a: device region, 29b: peripheral excess region 30: bonding device, 32: microscope camera unit (imaging unit) 33: temporary fixing substrate, 35: temporary adhesive layer, 37: adhesive layer, 39a, 39b: distance 40: laser processing device, 42: rotating shaft 44: laser beam irradiation unit, 46: condenser 43: modified layer, 43a: first modified layer, 43b: second modified layer 45a: first processing line, 45b: second processing line, 47: crack 31: third device wafer, 41: fourth device wafer 51: fifth device wafer, 53: stacked device wafer A, B: Area, L: Laser beam

Claims

1. 1. A method for forming a laminated device wafer, comprising bonding together a first device wafer and a second device wafer, the first device wafer and the second device wafer having a plurality of planned dividing lines set in a lattice pattern on a surface thereof and a plurality of regions defined by the plurality of planned dividing lines, each region having a device formed therein, to form a laminated device wafer in which the plurality of device wafers are stacked, the method comprising the steps of: a removing step of processing the first device wafer to remove at least a chamfered portion formed on an outer periphery of the front surface side of the first device wafer; a thinning step of thinning the backside of the first device wafer by grinding the backside of the first device wafer after the removing step; a bonding step of bonding the first device wafer and the second device wafer together after the thinning step; Equipped with The bonding step includes a position adjustment step of imaging a first predetermined line formed on the outer periphery of the front surface side of the first device wafer and positioned outside a rectangular area corresponding to the device, and a second predetermined line formed on the outer periphery of the front surface side of the second device wafer and positioned outside a rectangular area corresponding to the device, using an imaging unit, and adjusting the relative positions of the first device wafer and the second device wafer using the first predetermined line and the second predetermined line.

2. 2. The method for forming stacked device wafers according to claim 1, wherein in the bonding step, the back surface side of the first device wafer and the front surface side of the second device wafer are bonded together.

3. 3. The method for forming a laminated device wafer according to claim 1, wherein in the position adjusting step, the first predetermined line and the second predetermined line are simultaneously imaged by an imaging unit.

4. the first predetermined line is a first planned dividing line set on the front surface of the first device wafer, the second predetermined lines are second planned dividing lines set on the front surface of the second device wafer, The first division line and the second division line have the same shape and size, 4. The method for forming a laminated device wafer according to claim 1, wherein in the position adjusting step, the first planned dividing line and the second planned dividing line are aligned.

5. 5. The method for forming stacked device wafers according to claim 1, wherein in the position adjustment step, in addition to the first predetermined line and the second predetermined line, the relative positions of the first device wafer and the second device wafer are adjusted using a third predetermined line that is perpendicular to the first predetermined line, is formed on the outer periphery of the front surface side of the first device wafer, and is located outside the rectangular area corresponding to the device, and a fourth predetermined line that is perpendicular to the second predetermined line, is formed on the outer periphery of the front surface side of the second device wafer, and is located outside the rectangular area corresponding to the device.

6. 1. A method for forming a laminated device wafer, comprising bonding together a first device wafer and a second device wafer, the first device wafer and the second device wafer having a plurality of planned dividing lines set in a lattice pattern on a surface thereof and a plurality of regions defined by the plurality of planned dividing lines, each region having a device formed therein, to form a laminated device wafer in which the plurality of device wafers are stacked, the method comprising the steps of: a modified layer forming step of forming a modified layer by positioning a focal point of a laser beam having a wavelength that transmits through the first device wafer at a predetermined depth in a thickness direction of the first device wafer in an outer periphery of the first device wafer; a thinning step of grinding the back surface side of the first device wafer after the modified layer forming step and removing the outer periphery of the first device wafer; a bonding step of bonding the first device wafer and the second device wafer together after the thinning step; Equipped with The bonding step includes a position adjustment step of imaging a first predetermined line formed on the outer periphery of the front surface side of the first device wafer and positioned outside a rectangular area corresponding to the device, and a second predetermined line formed on the outer periphery of the front surface side of the second device wafer and positioned outside a rectangular area corresponding to the device, using an imaging unit, and adjusting the relative positions of the first device wafer and the second device wafer using the first predetermined line and the second predetermined line.

Images