Wiring board and method for manufacturing the same
Patent Information
- Application Number
- JP2021118871
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-07-19
- Publication Date
- 2025-03-04
- Estimated Expiration
- 2041-07-19
Smart Images

Figure 0007638812000001 
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Abstract
Description
[Technical field]
[0001] The present invention relates to a wiring board and a method for manufacturing a wiring board. [Background technology]
[0002] The wiring substrate on which the semiconductor chip is mounted has connection terminals for connecting to the semiconductor chip. The connection terminals are metal protrusions that come into contact with the wiring pattern of the wiring layer of the wiring substrate and protrude outward from openings provided in an insulating layer that covers the wiring pattern.
[0003] A wiring board and a semiconductor chip are generally connected via a plurality of connection terminals. In such cases, the diameter and pitch of the connection terminals are not necessarily all the same, and connection terminals having at least one of different diameter and pitch may be provided. For example, connection terminals for inputting and outputting electrical signals may have a relatively small diameter and small pitch, while connection terminals for applying a power supply voltage may have a relatively large diameter and large pitch, and so on. In this way, connection terminals having small diameters and small pitches and connection terminals having large diameters and large pitches are mixed.
[0004] The multiple connection terminals are formed by forming multiple openings in an insulating layer covering the wiring pattern, the openings having different diameters and / or pitches, and applying, for example, electrolytic copper plating to each opening. For example, small-diameter and small-pitch connection terminals are formed in the small-diameter and small-pitch openings, and large-diameter and large-pitch connection terminals are formed in the large-diameter and large-pitch openings.
[0005] However, when electrolytic copper plating is performed on a plurality of openings having different diameters and / or pitches, the deposition rate of electrolytic copper varies depending on various factors such as the difference in diameter and pitch of each opening, and thus the heights of the plurality of connection terminals formed in these plurality of openings may vary. When a plurality of connection terminals having different heights are mixed in this way, the connection reliability between the wiring board and the semiconductor chip may decrease. For example, in a connection terminal having a low height, the top of the connection terminal may not be in sufficient contact with the electrode of the semiconductor chip, resulting in an open failure. In addition, when the amount of solder for connection is increased in order to avoid an open failure, in a connection terminal having a high height, the excess solder may extend laterally and come into contact with a nearby connection terminal, resulting in a short failure.
[0006] In response to this, in order to equalize the heights of multiple connection terminals, a wiring board has been proposed that has, as the wiring pattern of the wiring layer with which the connection terminals come into contact, a single-layer wiring pattern and a multi-layer wiring pattern that is thicker than the single-layer wiring pattern. The single-layer wiring pattern is formed by laminating a single metal layer, and the multi-layer wiring pattern is formed by laminating multiple metal layers. In such a wiring board, the heights of multiple connection terminals can be equalized by appropriately adjusting the thickness of the multi-layer wiring pattern. [Prior art documents] [Patent documents]
[0007] [Patent Document 1] JP 2008-227355 A Summary of the Invention [Problem to be solved by the invention]
[0008] However, in the above-mentioned multi-layered wiring pattern of the wiring board, the width of the uppermost metal layer becomes small, which may result in a decrease in the connection reliability between the wiring pattern and the connection terminal.
[0009] That is, when forming a multi-layered wiring pattern, generally, a metal layer having a relatively small width is laminated on a metal layer having a relatively large width. Therefore, in the multi-layered wiring pattern, the upper surface of the top metal layer, which is the contact surface with the connection terminal, is narrower than the upper surfaces of the metal layers of layers other than the top layer. If the width of the upper surface of the top metal layer is small, the area of the contact area between the upper surface of the wiring pattern and the bottom of the opening may be small when forming an opening through the wiring pattern in the insulating layer covering the wiring pattern in the wiring board. As a result, the area of the contact area between the upper surface of the wiring pattern and the connection terminal formed in the opening also becomes small, and the connection reliability between the wiring pattern of the multi-layered structure and the connection terminal is reduced.
[0010] The disclosed technology has been made in consideration of the above, and aims to provide a wiring board and a manufacturing method for a wiring board that can improve the connection reliability between a multi-layer wiring pattern and a connection terminal. [Means for solving the problem]
[0011] In one embodiment, the wiring board disclosed in the present application has a wiring layer, an insulating layer, a plurality of openings, and a connection terminal. The wiring layer has a wiring pattern. The insulating layer is laminated on the wiring layer and covers the wiring pattern. The plurality of openings penetrate the insulating layer to the wiring pattern, and at least one of the diameter and the pitch is different. The connection terminal is formed in each opening and contacts the upper surface of the wiring pattern exposed from each opening. The wiring layer has a first wiring pattern made of a single metal layer, and a second wiring pattern made of a plurality of laminated metal layers and thicker than the first wiring pattern. The uppermost metal layer of the second wiring pattern is a contact surface with the connection terminal, and has an upper surface having the same width as the upper surface of the metal layer of the layer other than the uppermost layer. Effect of the Invention
[0012] According to one aspect of the wiring board disclosed in the present application, it is possible to improve the connection reliability between the wiring pattern of a multi-layer structure and the connection terminal. [Brief description of the drawings]
[0013] [Figure 1] FIG. 1 is a cross-sectional view showing the configuration of a wiring board according to a first embodiment. [Diagram 2] FIG. 2 is an enlarged view showing the structure of the second wiring pattern of the wiring layer. [Diagram 3] FIG. 3 is a flowchart showing a flow of the method for manufacturing the wiring board according to the first embodiment. [Figure 4] FIG. 4 is a diagram showing a specific example of a wiring layer forming step. [Diagram 5] FIG. 5 is a diagram showing a specific example of an insulating layer laminating step. [Figure 6] FIG. 6 is a diagram showing a specific example of the opening forming step. [Figure 7] FIG. 7 is a diagram showing a specific example of the seed layer forming step. [Figure 8] FIG. 8 is a diagram showing a specific example of a DFR layer forming step. [Figure 9] FIG. 9 is a diagram showing a specific example of an electrolytic copper plating process. [Figure 10] FIG. 10 is a diagram showing a specific example of the DFR layer removing step. [Figure 11] FIG. 11 is a flowchart showing the flow of the wiring layer forming process in the first embodiment. [Figure 12] FIG. 12 is a diagram showing a specific example of the seed layer forming step. [Figure 13] FIG. 13 is a diagram showing a specific example of a DFR layer lamination step. [Figure 14] FIG. 14 is a diagram showing a specific example of the development process. [Figure 15] FIG. 15 is a diagram showing a specific example of an electrolytic copper plating process. [Figure 16] FIG. 16 is a diagram showing a specific example of a DFR layer lamination step. [Figure 17] FIG. 17 is a diagram showing a specific example of the development process. [Figure 18] FIG. 18 is a diagram showing a specific example of an electrolytic copper plating process. [Figure 19]FIG. 19 is a diagram showing a specific example of the DFR layer removing step. [Figure 20] FIG. 20 is a cross-sectional view showing the configuration of a wiring board according to the second embodiment. [Figure 21] FIG. 21 is a flowchart showing the flow of a wiring layer forming process in the second embodiment. [Figure 22] FIG. 22 is a diagram showing a specific example of a laser processing step. [Figure 23] FIG. 23 is a diagram showing a specific example of an electrolytic copper plating process. [Figure 24] FIG. 24 is a diagram showing a specific example of a DFR layer lamination step. [Diagram 25] FIG. 25 is a diagram showing a specific example of the development process. [Figure 26] FIG. 26 is a diagram showing a specific example of an electrolytic copper plating process. [Figure 27] FIG. 27 is a diagram showing a specific example of the DFR layer removing step. [Figure 28] FIG. 28 is a cross-sectional view showing the configuration of a wiring board according to the third embodiment. [Figure 29] FIG. 29 is a flowchart showing the flow of a wiring layer forming process in the third embodiment. [Diagram 30] FIG. 30 is a diagram showing a specific example of an electrolytic nickel plating process. [Diagram 31] FIG. 31 is a diagram showing a specific example of the DFR layer removing step. [Diagram 32] FIG. 32 is a diagram showing a specific example of a seed layer etching step. [Diagram 33] FIG. 33 is a cross-sectional view showing the configuration of a wiring board according to a modified example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0014] Hereinafter, embodiments of a wiring board and a method for manufacturing a wiring board disclosed in the present application will be described in detail with reference to the drawings. Note that the disclosed technology is not limited to the embodiments.
[0015] (First embodiment) Fig. 1 is a cross-sectional view showing the configuration of wiring board 100 according to the first embodiment. Fig. 1 shows a cross section near the surface of wiring board 100 on which connection terminals are formed. In the following description, the surface on which connection terminals are formed is called the "upper surface" of wiring board 100, and the up-down direction is defined accordingly, but wiring board 100 may be manufactured and used, for example, upside down, or in any position.
[0016] The wiring board 100 has insulating layers 110 and 120, a wiring layer 111, and connection terminals 131 and 132. Although not shown in Fig. 1, other insulating layers and wiring layers may be formed below the insulating layer 110, and for example, a core layer made of a material such as glass may be formed.
[0017] The insulating layer 110 is formed using an insulating resin mainly composed of, for example, an epoxy resin or a polyimide resin. For example, a thermosetting insulating resin or a photosensitive insulating resin can be used as the insulating resin. The insulating layer 110 may contain a filler such as silica (SiO2).
[0018] The wiring layer 111 is laminated on the insulating layer 110. The wiring layer 111 may be made of, for example, copper. The wiring layer 111 may be connected to a wiring layer (not shown) below the insulating layer 110 through a via wiring (not shown) that penetrates the insulating layer 110.
[0019] The wiring layer 111 has a first wiring pattern 210 and a second wiring pattern 220 that is thicker than the first wiring pattern 210. The first wiring pattern 210 is composed of a single metal layer. The second wiring pattern 220 is composed of a metal layer 222 laminated on a metal layer 221. The metal layer 222 is the uppermost metal layer. In FIG. 1, two metal layers 221 and 222 are laminated, but the number of laminated metal layers may be three or more. As will be described later, the upper surface of the uppermost metal layer 222 of the second wiring pattern 220 has the same width as the upper surface of the metal layer 221 of the layer adjacent to the uppermost layer.
[0020] The insulating layer 120 is formed so as to cover the wiring patterns (i.e., the first wiring pattern 210 and the second wiring pattern 220) of the wiring layer 111. The insulating layer 120 is the outermost insulating layer on the upper surface side of the wiring substrate 100. The material and thickness of the insulating layer 120 can be the same as those of the insulating layer 110, for example. Like the insulating layer 110, the insulating layer 120 may also contain a filler such as silica (SiO2).
[0021] In the insulating layer 120, openings 121 and 122 are formed, which penetrate the insulating layer 120 and expose the upper surfaces of the wiring patterns (i.e., the first wiring pattern 210 and the second wiring pattern 220) of the wiring layer 111 from the bottom. At least one of the diameter and the pitch of the openings 121 and 122 is different, and the opening 122 has at least one of the diameter and the pitch smaller than that of the opening 121. In this embodiment, the opening 122 has both the diameter and the pitch smaller than that of the opening 121. The opening 121 penetrates the insulating layer 120 to the first wiring pattern 210 and exposes the upper surface of the first wiring pattern 210 from the bottom. The opening 122 penetrates the insulating layer 120 to the second wiring pattern 220 and exposes the upper surface of the second wiring pattern 220 from the bottom.
[0022] Connection terminals 131, 132 for connecting the wiring pattern of the wiring layer 111 and the electrodes of the semiconductor chip are formed in the openings 121, 122. Since the openings 121, 122 have different diameters and pitches, the connection terminals 131, 132 also have different diameters and pitches. That is, the opening 121 with a large diameter and a large pitch has the connection terminal 131 with a large diameter and a large pitch formed therein, and the opening 122 with a small diameter and a small pitch has the connection terminal 132 with a small diameter and a small pitch formed therein. The connection terminals 131, 132 are in contact with the upper surfaces of the wiring patterns (i.e., the first wiring pattern 210 and the second wiring pattern 220) exposed from the openings 121, 122.
[0023] Since the diameters and pitches of the openings 121, 122 are different, there is a possibility that a difference in height occurs between the connection terminals 131, 132. For example, the height of the connection terminal 132 formed in the opening 122 having a small diameter and a small pitch from the upper surface of the insulating layer 120 may be lower than the height of the connection terminal 131. In this embodiment, the second wiring pattern 220 in contact with the connection terminal 132 is thicker than the first wiring pattern 210 in contact with the connection terminal 131. Therefore, by appropriately adjusting the thickness of the second wiring pattern 220, the heights of the connection terminals 131, 132 can be made equal.
[0024] The configuration of the contact portion between the connection terminal 132 and the second wiring pattern 220 will be specifically described with reference to Fig. 2. Fig. 2 is an enlarged view showing the structure of the second wiring pattern 220 of the wiring layer 111. As described above, the second wiring pattern 220 has a two-layer structure in which the metal layer 222 is laminated on the metal layer 221.
[0025] The upper surface of the uppermost metal layer 222 of the second wiring pattern 220 is a contact surface with the connection terminal 132. The upper surface of the uppermost metal layer 222 has the same width as the upper surface of the metal layer 221 of the layer adjacent to the uppermost layer. In other words, the width W1 of the upper surface of the metal layer 222 is the same as the width W2 of the upper surface of the metal layer 221.
[0026] In this way, the uppermost metal layer 222 of the second wiring pattern 220 has an upper surface with the same width as the upper surface of the metal layer 221 of the layer other than the uppermost layer, and contacts the connection terminal 132 at this upper surface. Therefore, the surface area of the upper surface of the uppermost metal layer 222 (i.e., the upper surface of the second wiring pattern 220) can be increased compared to a case where the upper surface of the uppermost metal layer is narrower than the upper surface of the metal layer of the layer other than the uppermost layer. This makes it possible to increase the area of the contact region between the upper surface of the second wiring pattern 220 and the bottom of the opening 122 when forming the opening 122 penetrating to the second wiring pattern 220 in the insulating layer 120. As a result, the area of the contact region between the upper surface of the second wiring pattern 220 and the connection terminal 132 formed in the opening 122 can be increased, and the connection reliability between the wiring pattern of the multilayer structure and the connection terminal can be improved.
[0027] In addition, the cross-sectional shape of the uppermost metal layer 222 of the second wiring pattern 220 is a straight cross-sectional shape in which the side surface is located on the same straight line as the side surface of the metal layer 221 of the layer adjacent to the uppermost layer. That is, the side surface of the uppermost metal layer 222 of the second wiring pattern 220 and the side surface of the metal layer 221 of the layer adjacent to the uppermost layer are formed so as to extend continuously and linearly in the cross-sectional shape. In this way, the side surface of the uppermost metal layer 222 of the second wiring pattern 220 and the side surface of the metal layer 221 of the layer adjacent to the uppermost layer extend continuously and linearly, so that the stress applied from the insulating layer 120 to the side surface of the second wiring pattern 220 can be evenly distributed. As a result, peeling between the uppermost metal layer 222 and the metal layer 221 of the layer adjacent to the uppermost layer can be suppressed, and deterioration of the electrical characteristics of the wiring pattern of the multilayer structure can be suppressed.
[0028] Next, a method for manufacturing the wiring board 100 configured as above will be described with a specific example with reference to Fig. 3. Fig. 3 is a flowchart showing the flow of the method for manufacturing the wiring board 100 according to the embodiment.
[0029] First, a wiring layer 111 having a wiring pattern is formed on an insulating layer 110 (step S101). Specifically, as shown in FIG. 4, for example, a wiring layer 111 having a first wiring pattern 210 and a second wiring pattern 220 thicker than the first wiring pattern 210 is formed on an insulating layer 110. FIG. 4 is a diagram showing a specific example of a wiring layer forming process. The first wiring pattern 210 is formed by stacking a single metal layer, for example, by a semi-additive method. The second wiring pattern is formed by stacking metal layers 221 and 222, for example, by a semi-additive method. The second wiring pattern 220 is formed so that the width (width W1 in FIG. 2) of the upper surface of the uppermost metal layer 222, which is the contact surface with the connection terminal 132, is the same as the width (width W2 in FIG. 2) of the upper surface of the metal layer 221 of the layer adjacent to the uppermost layer. The forming process of the wiring layer 111 will be described in detail later.
[0030] After the wiring layer 111 is formed, an insulating layer 120 is laminated on the insulating layer 110 and the wiring layer 111 so as to cover the wiring pattern of the wiring layer 111 (step S102). Specifically, as shown in Fig. 5, for example, the insulating layer 120 is laminated on the insulating layer 110 and the wiring layer 111 so as to cover the wiring pattern of the wiring layer 111. Fig. 5 is a diagram showing a specific example of the insulating layer lamination step. The insulating layer 120 is the outermost insulating layer on the upper surface side of the wiring board 100.
[0031] When the insulating layer 120 is laminated, the openings 121 and 122 are formed in the insulating layer 120 at positions where the connection terminals for the semiconductor chip are to be provided (step S103). Specifically, as shown in FIG. 6, for example, the openings 121 and 122 are formed, which penetrate the insulating layer 120 and expose the upper surfaces of the wiring patterns (that is, the first wiring pattern 210 and the second wiring pattern 220) of the wiring layer 111 from the bottom. At this time, the diameter and pitch of the openings 121 are different from the diameter and pitch of the openings 122, since the size of the connection terminals varies depending on the type of electrodes of the semiconductor chip, for example. That is, the openings 122, where the connection terminals for inputting and outputting electric signals are formed, have a relatively small diameter and a small pitch, whereas the openings 121, where the connection terminals for applying the power supply voltage are formed, have a relatively large diameter and a large pitch. FIG. 6 is a diagram showing a specific example of the opening formation process.
[0032] The openings 121 and 122 can be formed by, for example, a laser processing method using a CO2 laser. The opening 121 is formed by the laser processing method so as to penetrate the insulating layer 120 to the first wiring pattern 210. The opening 122 is formed by the laser processing method so as to penetrate the insulating layer 120 to the second wiring pattern 220.
[0033] The second wiring pattern 220 is formed so that the width of the top surface of the uppermost metal layer 222, which is the contact surface with the connection terminal 132, is the same as the width of the top surface of the metal layer 221 of the layer adjacent to the uppermost layer. Therefore, when the opening 122 is formed by laser processing, the area of the contact region between the top surface of the second wiring pattern 220 and the bottom of the opening 122 can be increased, and the possibility of the opening 122 falling off from the top surface of the second wiring pattern 220 can be reduced.
[0034] After the openings 121 and 122 are formed, a seed layer 123 is formed on the upper surface of the insulating layer 120 (step S104). Specifically, as shown in FIG. 7, the seed layer 123 is formed by, for example, sputtering or electroless plating to continuously cover the upper surface of the insulating layer 120, the inner surfaces of the openings 121 and 122, and the upper surface of the wiring pattern of the wiring layer 111 exposed at the bottom of the openings 121 and 122. The seed layer 123 may be made of, for example, copper (Cu), nickel (Ni), or a copper-nickel alloy (Cu-Ni), but copper (Cu) is used here. The thickness of the seed layer 123 may be, for example, about 100 to 300 nm. FIG. 7 is a diagram showing a specific example of the seed layer formation process.
[0035] After the seed layer 123 is formed, a dry film resist (DFR) layer that serves as a mask for electrolytic copper plating is formed on the upper surface of the seed layer 123 (step S105). Specifically, the DFR is laminated on the seed layer 123, and exposure and development are performed according to the positions of the connection terminals 131, 132, thereby forming a DFR 140 having openings at positions where the connection terminals 131, 132 will be formed, as shown in Fig. 8. Fig. 8 is a diagram showing a specific example of the DFR layer formation step.
[0036] Then, electrolytic copper plating is performed using the seed layer 123 as a power supply layer (step S106), and connection terminals are formed in the openings 121 and 122. Specifically, as shown in FIG. 9, copper (Cu) is precipitated inside the openings 121 and 122 and inside the openings of the DFR 140, and connection terminals 131 and 132 are formed. FIG. 9 is a diagram showing a specific example of an electrolytic copper plating process. At this time, the openings 121 and 122 are filled with copper, and the connection terminal 131 contacts the upper surface of the first wiring pattern 210 exposed from the opening 121, and the connection terminal 132 contacts the upper surface of the second wiring pattern 220 exposed from the opening 122. As described above, since the area of the contact area between the upper surface of the second wiring pattern 220 and the bottom of the opening 122 is increased, the area of the contact area between the upper surface of the second wiring pattern 220 and the connection terminal 132 formed in the opening 122 is also increased. As a result, the connection reliability between the wiring patterns and the connection terminals can be improved.
[0037] After the connection terminals 131, 132 are formed, the DFR 140 is removed, for example, with an alkaline stripping liquid (step S107). This results in a structure in which the connection terminals 131, 132 protrude upward from the insulating layer 120, as shown in Fig. 10. Fig. 10 is a diagram showing a specific example of the DFR layer removal step.
[0038] Then, using the connection terminals 131, 132 as a mask, the seed layer 123 in the portions not overlapping with the connection terminals 131, 132 is removed by etching (step S108). This results in the wiring substrate 100 shown in Fig. 1. Note that the seed layer 123 is omitted in Fig. 1.
[0039] Next, the process of forming the wiring layer 111 in the first embodiment will be described more specifically with reference to Fig. 11. Fig. 11 is a flowchart showing the flow of the wiring layer formation process in the first embodiment.
[0040] First, a seed layer is formed on the insulating layer 110 (step S201). Specifically, as shown in Fig. 12, a seed layer 112 is formed on the upper surface of the insulating layer 110 by, for example, electroless copper plating. The thickness of the seed layer 112 is, for example, 1 µm, which is in the range of 0.5 to 1.5 µm. Fig. 12 is a diagram showing a specific example of the seed layer formation step.
[0041] Then, a DFR is laminated on seed layer 112 (step S202). Specifically, for example, as shown in Fig. 13, DFR 230 is laminated on the upper surface of seed layer 112. Fig. 13 is a diagram showing a specific example of the DFR layer lamination step.
[0042] Once the DFR 230 is laminated, exposure and development are performed according to the position of the wiring pattern (step S203). As a result, as shown in FIG. 14, for example, openings 230a, 230b with different diameters and pitches are formed at the positions where the wiring pattern of the DFR 230 is to be formed. FIG. 14 is a diagram showing a specific example of the development process. Here, it is assumed that openings 230a with a relatively large diameter and pitch and openings 230b with a relatively small diameter and pitch are formed in the DFR 230. The cross-sectional shape of openings 230a, 230b has a linear inner surface.
[0043] Then, electrolytic copper plating is performed using the seed layer 112 as a power supply layer (step S204), whereby copper (Cu) is precipitated in the openings 230a and 230b, forming a single-layer metal layer. Specifically, as shown in FIG. 15, for example, metal layers 211 and 221, which are single-layer metal layers, are laminated on the seed layer 112 exposed from the opening of the DFR 230. FIG. 15 is a diagram showing a specific example of an electrolytic copper plating process. The metal layer 211 is laminated on the seed layer 112 exposed from the opening 230a of the DFR 230, thereby forming the first wiring pattern 210 made of the single-layer metal layer 211. In addition, the metal layer 221, which is the bottom layer of the second wiring pattern 220, is laminated on the seed layer 112 exposed from the opening 230b of the DFR 230. The metal layers 211 and 221 are laminated to a thickness that does not completely fill the openings 230a and 230b.
[0044] Once metal layers 211, 221 are laminated, another DFR is laminated on DFR 230 (step S205). Specifically, for example, as shown in Fig. 16, DFR 240 is laminated on the upper surface of DFR 230, and at the same time, a part of DFR 240 extends into the space within openings 230a, 230b of DFR 230, filling the space within openings 230a, 230b. Fig. 16 is a diagram showing a specific example of the DFR layer lamination process.
[0045] Once the DFR 240 is laminated, exposure and development are performed according to the position of the second wiring pattern 220 (step S206). As a result, as shown in FIG. 17, for example, an opening 240a is formed in the region of the DFR 240 that overlaps with the openings 230a and 230b, and at the same time, a portion of the DFR 240 is removed from the space within the opening 230b. FIG. 17 is a diagram showing a specific example of the development step. By removing a portion of the DFR 240 from the space within the opening 230b, the upper surface of the metal layer 221 is exposed at the bottom of the opening 230b.
[0046] Then, electrolytic copper plating is performed using the seed layer 112 as a power supply layer (step S207), whereby copper (Cu) is precipitated on the upper surface of the metal layer 221 exposed from the opening 230b, forming a metal layer. Specifically, as shown in FIG. 18, for example, a metal layer 222 is laminated on the metal layer 221 exposed from the opening 230b. FIG. 18 is a diagram showing a specific example of the electrolytic copper plating process. By laminating the metal layer 222 on the metal layer 221 exposed from the opening 230b, a second wiring pattern 220 made of the laminated metal layers 221, 222 and thicker than the first wiring pattern 210 is formed in the opening 230b.
[0047] Since the cross-sectional shape of the opening 230b has a linear inner side surface, the width of the second wiring pattern 220 formed along the inner side surface of the opening 230b is constant from the upper end to the lower end. Therefore, the width of the upper surface of the metal layer 222 of the uppermost layer of the second wiring pattern 220 is the same as the width of the upper surface of the metal layer 221 of the layer adjacent to the uppermost layer. In addition, the side surface of the metal layer 222 of the uppermost layer of the second wiring pattern 220 is formed along the linear inner side surface of the opening 230b. Therefore, the cross-sectional shape of the metal layer 222 of the uppermost layer of the second wiring pattern 220 is a linear cross-sectional shape in which the side surface is located on the same straight line as the side surface of the metal layer 221.
[0048] After the second wiring pattern 220 is formed, the DFRs 230, 240 are removed, for example, by an alkaline stripping solution (step S208). By stripping the DFRs 230, 240, the wiring layer 111 is obtained in a state in which the first wiring pattern 210 and the second wiring pattern 220 are formed on the seed layer 112, as shown in Fig. 19. Fig. 19 is a diagram showing a specific example of the DFR layer removal step.
[0049] Then, using the first wiring pattern 210 and the second wiring pattern 220 as a mask, the seed layer 112 in the portion not overlapping with the first wiring pattern 210 and the second wiring pattern 220 is removed by etching (step S209), thereby completing the formation of the wiring layer 111.
[0050] As described above, the wiring board (for example, wiring board 100) according to the first embodiment has a wiring layer (for example, wiring layer 111), an insulating layer (for example, insulating layer 120), a plurality of openings (for example, openings 121, 122), and a connection terminal (for example, connection terminals 131, 132). The wiring layer has a wiring pattern (for example, first wiring pattern 210 and second wiring pattern 220). The insulating layer is laminated on the wiring layer and covers the wiring pattern. The plurality of openings penetrate the insulating layer to the wiring pattern and have at least one of a diameter and a pitch different from each other. The connection terminal is formed in each opening and contacts the upper surface of the wiring pattern exposed from each opening. The wiring layer has a first wiring pattern made of a single metal layer (for example, metal layer 211) and a second wiring pattern made of a plurality of laminated metal layers (for example, metal layers 221, 222) and thicker than the first wiring pattern. The uppermost metal layer of the second wiring pattern (e.g., metal layer 222) is a contact surface with the connection terminal, and has an upper surface with the same width as the upper surface of a metal layer other than the uppermost layer (e.g., metal layer 221). As a result, the wiring board according to the first embodiment can improve the connection reliability between the multi-layered wiring pattern and the connection terminal.
[0051] In addition, the side surface of the uppermost metal layer of the second wiring pattern according to the first embodiment is linear and aligned in the same line as the side surfaces of the metal layers other than the uppermost layer in the cross-sectional shape, so that the wiring board according to the first embodiment can suppress deterioration of electrical characteristics in the multi-layer wiring pattern.
[0052] Moreover, the multiple openings according to the first embodiment include a first opening (e.g., opening 121) and a second opening (e.g., opening 122) having a smaller diameter and pitch than the first opening. The first opening penetrates the insulating layer to the first wiring pattern, and the second opening penetrates the insulating layer to the second wiring pattern. As a result, the wiring board according to the first embodiment can improve the connection reliability between the wiring pattern of the multilayer structure and the connection terminals formed in the openings having a smaller diameter and pitch.
[0053] Second embodiment The second embodiment relates to a variation of the structure of the wiring layer 111 in the first embodiment.
[0054] Fig. 20 is a cross-sectional view showing the configuration of a wiring board 100 according to a second embodiment. In Fig. 20, the same parts as in Fig. 1 are denoted by the same reference numerals. Fig. 20 shows a cross section near the surface of the wiring board 100 on which connection terminals are formed. The wiring board 100 shown in Fig. 20 has insulating layers 110 and 120, a wiring layer 111, and connection terminals 131 and 132. Although not shown in Fig. 20, other insulating layers and wiring layers may be formed below the insulating layer 110, and for example, a core layer made of a material such as glass may be formed.
[0055] The wiring layer 111 has a first wiring pattern 210A and a second wiring pattern 220A that is thicker than the first wiring pattern 210A. The first wiring pattern 210A is composed of a single metal layer. The second wiring pattern 220A is composed of a metal layer 222A laminated on a metal layer 221A. The metal layer 222A is the uppermost metal layer. In FIG. 20, two metal layers 221A and 222A are laminated, but the number of laminated metal layers may be three or more.
[0056] The upper surface of the uppermost metal layer 222A of the second wiring pattern 220A is a contact surface with the connection terminal 132. The upper surface of the uppermost metal layer 222A is wider than the upper surface of the metal layer 221A of the layer adjacent to the uppermost layer. That is, the width W1 (see FIG. 2) of the upper surface of the metal layer 222A is wider than the width W2 (see FIG. 2) of the upper surface of the metal layer 221A.
[0057] In this way, the uppermost metal layer 222A of the second wiring pattern 220A has an upper surface that is wider than the upper surface of the metal layer 221A of the layers other than the uppermost layer, and contacts the connection terminal 132 at this upper surface. Therefore, the surface area of the upper surface of the uppermost metal layer 222A (i.e., the upper surface of the second wiring pattern 220A) can be made larger than when the upper surface of the uppermost metal layer is narrower than the upper surface of the metal layer of the layers other than the uppermost layer. This makes it possible to make the area of the contact region between the upper surface of the second wiring pattern 220A and the bottom of the opening 122 larger when forming the opening 122 that penetrates through to the second wiring pattern 220A in the insulating layer 120. As a result, the area of the contact region between the upper surface of the second wiring pattern 220A and the connection terminal 132 formed in the opening 122 can be made larger, and the connection reliability between the wiring pattern of the multilayer structure and the connection terminal can be improved.
[0058] In addition, the cross-sectional shape of the uppermost metal layer 222A of the second wiring pattern 220A is a tapered cross-sectional shape in which the side surface is located on the same straight line as the side surface of the metal layer 221A of the layer adjacent to the uppermost layer. That is, the side surface of the uppermost metal layer 222A of the second wiring pattern 220A and the side surface of the metal layer 221A of the layer adjacent to the uppermost layer are formed so as to extend continuously and linearly in the cross-sectional shape. In this way, the side surface of the uppermost metal layer 222A of the second wiring pattern 220A and the side surface of the metal layer 221A of the layer adjacent to the uppermost layer are continuously formed in a tapered shape, so that the stress applied from the insulating layer 120 to the side surface of the second wiring pattern 220A can be evenly distributed. As a result, peeling between the uppermost metal layer 222 and the metal layer 221 of the layer adjacent to the uppermost layer can be suppressed, and deterioration of the electrical characteristics of the wiring pattern of the multilayer structure can be suppressed.
[0059] Next, a method for manufacturing the wiring board 100 configured as above will be described. The method for manufacturing the wiring board 100 according to the second embodiment differs from the method for manufacturing the wiring board 100 according to the first embodiment in the step of forming the wiring layer 111. Therefore, the step of forming the wiring layer 111 in the second embodiment will be described below with reference to FIG. 21 while giving a specific example. FIG. 21 is a flowchart showing the flow of the wiring layer forming step in the second embodiment. In FIG. 21, steps S301, S302, and S309 are the same as steps S201, S202, and S209 shown in FIG. 11, respectively, and therefore detailed description thereof will be omitted.
[0060] First, the seed layer 112 is formed on the insulating layer 110 (step S301). Then, the DFR 230 is laminated on the seed layer 112 (step S302).
[0061] When the DFR 230 is laminated, laser processing is performed according to the position of the wiring pattern (step S303). As a result, as shown in FIG. 22, for example, openings 230c and 230d with different diameters and pitches are formed at the positions where the wiring pattern of the DFR 230 is to be formed. FIG. 22 is a diagram showing a specific example of the laser processing step. Here, it is assumed that openings 230a with a relatively large diameter and pitch and openings 230b with a relatively small diameter and pitch are formed in the DFR 230. A CO2 laser or the like is used for the laser processing. The cross-sectional shape of openings 230c and 230d formed by the laser processing has a tapered inner surface.
[0062] Then, electrolytic copper plating is performed using the seed layer 112 as a power supply layer (step S304), whereby copper (Cu) is precipitated in the openings 230c and 230d to form a single-layer metal layer. Specifically, as shown in FIG. 23, for example, metal layers 211A and 221A, which are single-layer metal layers, are laminated on the seed layer 112 exposed from the opening of the DFR 230. FIG. 23 is a diagram showing a specific example of an electrolytic copper plating process. The metal layer 211A is laminated on the seed layer 112 exposed from the opening 230c of the DFR 230, whereby the first wiring pattern 210A made of the single-layer metal layer 211A is formed. In addition, the metal layer 221A, which is the bottom layer of the second wiring pattern 220A, is laminated on the seed layer 112 exposed from the opening 230d of the DFR 230. The metal layers 211A and 221A are laminated to a thickness that does not completely fill the openings 230c and 230d.
[0063] Once metal layers 211A, 221A are laminated, another DFR is laminated on DFR 230 (step S305). Specifically, for example, as shown in Fig. 24, DFR 240 is laminated on the upper surface of DFR 230, and at the same time, a part of DFR 240 extends into the space within openings 230c, 230d of DFR 230, filling the space within openings 230c, 230d. Fig. 24 is a diagram showing a specific example of the DFR layer lamination process.
[0064] Once the DFR 240 is laminated, exposure and development are performed according to the position of the second wiring pattern 220 (step S306). As a result, as shown in FIG. 25, for example, an opening 240a is formed in the region of the DFR 240 that overlaps with the openings 230c and 230d, and at the same time, a portion of the DFR 240 is removed from the space within the opening 230d. FIG. 25 is a diagram showing a specific example of the development step. By removing a portion of the DFR 240 from the space within the opening 230d, the upper surface of the metal layer 221A is exposed at the bottom of the opening 230d.
[0065] Then, electrolytic copper plating is performed using the seed layer 112 as a power supply layer (step S307), whereby copper (Cu) is precipitated on the upper surface of the metal layer 221A exposed from the opening 230d, forming a metal layer. Specifically, as shown in FIG. 26, for example, a metal layer 222A is laminated on the metal layer 221A exposed from the opening 230d. FIG. 26 is a diagram showing a specific example of an electrolytic copper plating process. By laminating the metal layer 222A on the metal layer 221A exposed from the opening 230d, a second wiring pattern 220A made of the laminated metal layers 221A and 222A and thicker than the first wiring pattern 210A is formed in the opening 230d.
[0066] Since the cross-sectional shape of the opening 230d has a tapered inner side, the width of the second wiring pattern 220A formed along the inner side of the opening 230d increases from the upper end to the lower end. Therefore, the width of the upper surface of the topmost metal layer 222A of the second wiring pattern 220A is larger than the width of the upper surface of the metal layer 221A of the layer adjacent to the topmost layer. In addition, the side surface of the topmost metal layer 222A of the second wiring pattern 220A is formed along the tapered inner side of the opening 230d. Therefore, the cross-sectional shape of the topmost metal layer 222A of the second wiring pattern 220A is a tapered cross-sectional shape with the side surface aligned in the same line as the side surface of the metal layer 221A.
[0067] After the second wiring pattern 220A is formed, the DFRs 230 and 240 are removed, for example, with an alkaline stripping solution (step S308). By stripping the DFRs 230 and 240, the wiring layer 111 is obtained in a state in which the first wiring pattern 210A and the second wiring pattern 220A are formed on the seed layer 112, as shown in Fig. 27. Fig. 27 is a diagram showing a specific example of the DFR layer removal step.
[0068] Then, using the first wiring pattern 210A and the second wiring pattern 220A as a mask, the seed layer 112 in the portion not overlapping with the first wiring pattern 210A and the second wiring pattern 220A is removed by etching (step S309), thereby completing the formation of the wiring layer 111.
[0069] As described above, the uppermost metal layer (e.g., metal layer 222A) of the second wiring pattern (e.g., second wiring pattern 220A) according to the second embodiment has an upper surface that is in contact with the connection terminal and is wider than the upper surface of a metal layer (e.g., metal layer 221A) other than the uppermost layer. This makes it possible to further improve the connection reliability between the multi-layered wiring pattern and the connection terminal according to the wiring board according to the second embodiment.
[0070] In addition, the side of the uppermost metal layer of the second wiring pattern according to the second embodiment is aligned in the same line as the side of the metal layer other than the uppermost layer and has a tapered cross section, so that the wiring board according to the second embodiment can suppress deterioration of electrical characteristics in the wiring pattern of a multilayer structure.
[0071] Third embodiment The third embodiment relates to a variation of the structure of the wiring layer 111 in the first embodiment.
[0072] Fig. 28 is a cross-sectional view showing the configuration of a wiring board 100 according to a third embodiment. In Fig. 28, the same parts as in Fig. 1 are denoted by the same reference numerals. Fig. 28 shows a cross section near the surface of the wiring board 100 on which connection terminals are formed. The wiring board 100 shown in Fig. 28 has insulating layers 110 and 120, a wiring layer 111, and connection terminals 131 and 132. Although not shown in Fig. 28, other insulating layers and wiring layers may be formed below the insulating layer 110, and for example, a core layer made of a material such as glass may be formed.
[0073] The wiring layer 111 has a first wiring pattern 210B and a second wiring pattern 220B that is thicker than the first wiring pattern 210B. The first wiring pattern 210B is composed of a single metal layer. The second wiring pattern 220B is composed of a metal layer 222B laminated on a metal layer 221B. The metal layer 222B is the uppermost metal layer. In FIG. 28, two metal layers 221B and 222B are laminated, but the number of laminated metal layers may be three or more.
[0074] The upper surface of the uppermost metal layer 222B of the second wiring pattern 220B is a contact surface with the connection terminal 132. The upper surface of the uppermost metal layer 222B is wider than the upper surface of the metal layer 221B of the layer adjacent to the uppermost layer. That is, the width W1 (see FIG. 2) of the upper surface of the metal layer 222B is wider than the width W2 (see FIG. 2) of the upper surface of the metal layer 221B.
[0075] In this way, the uppermost metal layer 222B of the second wiring pattern 220B has an upper surface that is wider than the upper surface of the metal layer 221B of the layer other than the uppermost layer, and contacts the connection terminal 132 at this upper surface. Therefore, the surface area of the upper surface of the uppermost metal layer 222B (i.e., the upper surface of the second wiring pattern 220B) can be made larger than when the upper surface of the uppermost metal layer is narrower than the upper surface of the metal layer of the layer other than the uppermost layer. This makes it possible to make the area of the contact region between the upper surface of the second wiring pattern 220B and the bottom of the opening 122 larger when forming the opening 122 that penetrates through to the second wiring pattern 220B in the insulating layer 120. As a result, the area of the contact region between the upper surface of the second wiring pattern 220B and the connection terminal 132 formed in the opening 122 can be made larger, and the connection reliability between the wiring pattern of the multilayer structure and the connection terminal can be improved.
[0076] Moreover, the cross-sectional shape of the uppermost metal layer 222B of the second wiring pattern 220B is a cross-sectional shape in which the side surface is located outward from the side surface of the metal layer 221B of the layer adjacent to the uppermost layer. That is, the side surface of the uppermost metal layer 222B of the second wiring pattern 220B and the side surface of the metal layer 221B of the layer adjacent to the uppermost layer are formed so as to be connected via a step in the width direction in the cross-sectional shape. In this way, a step in the width direction is formed between the side surface of the uppermost metal layer 222B of the second wiring pattern 220B and the side surface of the metal layer 221B of the layer adjacent to the uppermost layer, so that the surface area of the upper surface of the second wiring pattern 220B can be increased. As a result, the resistance loss of the second wiring pattern 220B can be reduced, and the deterioration of the electrical characteristics in the wiring pattern of the multilayer structure can be suppressed.
[0077] Next, a method for manufacturing the wiring board 100 configured as above will be described. The method for manufacturing the wiring board 100 according to the third embodiment differs from the method for manufacturing the wiring board 100 according to the first embodiment in the step of forming the wiring layer 111. Therefore, the step of forming the wiring layer 111 in the third embodiment will be described below with reference to FIG. 29 while giving a specific example. FIG. 29 is a flowchart showing the flow of the wiring layer forming step in the third embodiment. In FIG. 29, steps S401 to S406 are the same as steps S201 to S206 shown in FIG. 11, respectively, and therefore detailed description thereof will be omitted.
[0078] After the DFR 240 is laminated, exposure and development are performed according to the position of the second wiring pattern 220B (step S406), and electrolytic nickel plating is performed using the seed layer 112 as a power supply layer (step S407). By applying electrolytic nickel plating, nickel (Ni) is precipitated on the upper surface of the copper (Cu) metal layer 221B exposed from the opening 230b, forming a metal layer. Specifically, as shown in FIG. 30, for example, a metal layer 222B is laminated on the metal layer 221B exposed from the opening 230b. FIG. 30 is a diagram showing a specific example of the electrolytic nickel plating process. By laminating the metal layer 222B on the metal layer 221B exposed from the opening 230b, a second wiring pattern 220B consisting of the laminated metal layers 221B and 222B and thicker than the first wiring pattern 210B is formed in the opening 230b.
[0079] At this stage, the width of the upper surface of the uppermost metal layer 222B of the second wiring pattern 220B is the same as the width of the upper surface of the metal layer 221B of the layer adjacent to the uppermost layer. Also, at this stage, the cross-sectional shape of the uppermost metal layer 222B of the second wiring pattern 220B is a straight cross-sectional shape in which the side surface is located on the same straight line as the side surface of the metal layer 221B.
[0080] After the second wiring pattern 220B is formed, the DFRs 230 and 240 are removed, for example, with an alkaline stripping solution (step S408). By stripping the DFRs 230 and 240, the wiring layer 111 is obtained in a state in which the first wiring pattern 210B and the second wiring pattern 220B are formed on the seed layer 112, as shown in Fig. 31. Fig. 31 is a diagram showing a specific example of the DFR layer removal step.
[0081] Then, the seed layer 112 is etched using the first wiring pattern 210B and the second wiring pattern 220B as a mask (step S409). Specifically, the seed layer 112 and the first wiring pattern 210B and the second wiring pattern 220B formed on the seed layer 112 are immersed in an etching solution that selectively dissolves, for example, copper (Cu). This removes the seed layer 112 exposed between the first wiring pattern 210B and the second wiring pattern 220B. The metal layers 221B of the first wiring pattern 210B and the second wiring pattern 220B are formed from the same metal (i.e., copper) as the seed layer 112. Therefore, when the seed layer 112 is dissolved, the metal layers 221B of the first wiring pattern 210B and the second wiring pattern 220B are also dissolved from the sides. On the other hand, the uppermost metal layer 222B of the second wiring pattern 220B is made of nickel (Ni) and therefore has etching resistance to the etching solution used to etch the seed layer 112, and is not dissolved by the etching solution.
[0082] As a result, as shown in FIG. 32, for example, a second wiring pattern 220B is formed in which the width of the metal layer 221B of the layer adjacent to the top layer is smaller than the width of the metal layer 222B of the top layer. FIG. 32 is a diagram showing a specific example of a seed layer etching step. That is, a step in the width direction is formed between the side of the metal layer 222B of the top layer of the second wiring pattern 220B and the side of the metal layer 221B of the layer adjacent to the top layer. In other words, the cross-sectional shape of the metal layer 222B of the top layer of the second wiring pattern 220B is a cross-sectional shape in which the side is located outward from the side of the metal layer 221B of the layer adjacent to the top layer. This completes the formation of the wiring layer 111.
[0083] As described above, the uppermost metal layer (e.g., metal layer 222B) of the second wiring pattern (e.g., second wiring pattern 220B) according to the third embodiment has an upper surface that is in contact with the connection terminal and is wider than the upper surface of a metal layer (e.g., metal layer 221B) other than the uppermost layer. This makes it possible to further improve the connection reliability between the multi-layered wiring pattern and the connection terminal according to the wiring board according to the third embodiment.
[0084] Moreover, in the cross-sectional shape, the side surface of the uppermost metal layer (e.g., metal layer 222B) of the second wiring pattern (e.g., second wiring pattern 220B) according to the third embodiment is located outward from the side surface of the metal layer (e.g., metal layer 221B) of a layer other than the uppermost layer. As a result, the wiring board according to the second embodiment can suppress deterioration of electrical characteristics in the wiring pattern of a multilayer structure.
[0085] (Other variations) In the above-described embodiments, the first wiring pattern 210 is located below the opening 121 and the second wiring pattern 220 is located below the opening 122. However, the positions of the first wiring pattern 210 and the second wiring pattern 220 can be interchanged. For example, as shown in FIG. 33, the second wiring pattern 220 may be located below the opening 121 and the first wiring pattern 210 may be located below the opening 122. FIG. 33 is a cross-sectional view showing a configuration of a wiring board 100 according to a modified example. In the wiring board 100 shown in FIG. 33, the opening 121 penetrates the insulating layer 120 to the second wiring pattern 220 and exposes the upper surface of the second wiring pattern 220 from the bottom. Moreover, the opening 122 penetrates the insulating layer 120 to the first wiring pattern 210 and exposes the upper surface of the first wiring pattern 210 from the bottom. According to this configuration, it is possible to improve the connection reliability between the second wiring pattern 220 having a multi-layer structure and the connection terminals 131 formed in the openings 121 having a large diameter and pitch.
[0086] In addition, in the above first and second embodiments, an example was shown in which the uppermost metal layer of the second wiring patterns 220, 220A was formed by copper plating, but this is not limited thereto, and a metal that can be deposited by a method such as electrolytic plating, such as Ni or Al, may be used for the uppermost metal layer. [Explanation of symbols]
[0087] 100 Wiring board 110 Insulating layer 111 Wiring layer 120 Insulating layer 121 Opening 122 Opening 131, 132 Connection terminal 210, 210A, 210B First wiring pattern 211, 211A metal layer 220, 220A, 220B Second wiring pattern 221, 221A, 221B metal layer 222, 222A, 222B metal layer 230a, 230b, 230c, 230d opening 240a opening
Claims
1. A wiring layer having a wiring pattern; an insulating layer that is laminated on the wiring layer and covers the wiring pattern; a plurality of openings each having a different diameter and / or a different pitch, the openings penetrating the insulating layer to the wiring pattern; a connection terminal formed in each of the openings and in contact with an upper surface of the wiring pattern exposed from each of the openings; The wiring layer is a first wiring pattern formed of a single metal layer; a second wiring pattern that is made of a plurality of laminated metal layers and is thicker than the first wiring pattern; The metal layer that is the uppermost layer of the second wiring pattern is a top surface which is a contact surface with the connection terminal and has a width equal to or larger than that of the top surface of the metal layer of a layer other than the top layer; The plurality of openings include A first opening; a second opening having a smaller diameter and pitch than the first opening, The first opening is The insulating layer is formed to reach the first wiring pattern. The second opening is The insulating layer is penetrated to the second wiring pattern. A wiring board comprising:
2. The metal layer that is the uppermost layer of the second wiring pattern is In the cross-sectional shape, the side surface is aligned in the same straight line as the side surface of the metal layer of the layer other than the uppermost layer and is linear.
2. The wiring board according to claim 1.
3. The metal layer that is the uppermost layer of the second wiring pattern is In the cross-sectional shape, the side surface is aligned in the same line as the side surface of the metal layer of the layer other than the uppermost layer and is tapered.
2. The wiring board according to claim 1.
4. The metal layer that is the uppermost layer of the second wiring pattern is In the cross-sectional shape, the side surface is located outward from the side surface of the metal layer of a layer other than the uppermost layer.
2. The wiring board according to claim 1.
5. The metal layer that is the uppermost layer of the second wiring pattern is The metal layer is a layer of a different metal from the metal layer of the layers other than the top layer.
5. The wiring board according to claim 1, wherein the wiring board is a substrate.
6. forming a wiring layer having a wiring pattern; laminating an insulating layer on the wiring layer to cover the wiring pattern; forming a plurality of openings in the insulating layer, the openings penetrating the insulating layer to the wiring pattern and having at least one of a diameter and a pitch different from one another; forming a connection terminal in each of the openings so as to contact an upper surface of the wiring pattern exposed from each of the openings; The step of forming the wiring layer includes: forming a first wiring pattern by laminating a single metal layer; and forming a second wiring pattern thicker than the first wiring pattern by stacking a plurality of metal layers. In the step of forming the second wiring pattern, a width of an upper surface of the metal layer of the uppermost layer of the second wiring pattern, which is a contact surface with the connection terminal, is set to be equal to a width of an upper surface of the metal layer of a layer other than the uppermost layer, or set to be larger than a width of an upper surface of the metal layer of a layer other than the uppermost layer; The plurality of openings include A first opening; a second opening having a smaller diameter and pitch than the first opening, The first opening is The insulating layer is formed to reach the first wiring pattern. The second opening is The insulating layer is penetrated to the second wiring pattern.
4. A method for manufacturing a wiring board comprising the steps of:
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