Light-emitting component, optical measurement device, image forming device, and method for manufacturing light-emitting component

JP7639530B2Active Publication Date: 2025-03-05FUJIFILM BUSINESS INNOVATION CORP
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Patent Information

Application Number
JP2021074496
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-04-26
Publication Date
2025-03-05
Estimated Expiration
2041-04-26

AI Technical Summary

Benefits of technology

【0008】 請求項1に記載の発明によれば、発光素子になんらかの光が入射した場合でも誤動作が生じにくい。 請求項2に記載の発明によれば、光遮断性に優れる材料により光遮断体を形成できる。 請求項3に記載の発明によれば、電極を形成する際に、光遮断体も形成できる。 請求項4に記載の発明によれば、電流供給線を形成する際に、光遮断体も形成できる。 請求項5に記載の発明によれば、層構成がより簡単になる。 請求項6に記載の発明によれば、電極とは別に光遮断体を形成できる。 請求項7に記載の発明によれば、光遮断性に優れる材料により光遮断体を形成できるとともに、電極と絶縁することができる。 請求項8に記載の発明によれば、光吸収により光の透過を抑制することができる。 請求項9に記載の発明によれば、サイリスタの層の中に光を吸収する層があっても誤動作が生じにくくなる。 請求項10に記載の発明によれば、開口部の内面を全て覆わなくても誤動作が生じにくくなる。 請求項11に記載の発明によれば、光反射により光の透過を抑制することができる。 請求項12に記載の発明によれば、発光素子を二次元状に並列点灯させた光計測装置が得られる。 請求項13に記載の発明によれば、発光素子を二次元状に並列点灯させた画像形成装置が得られる。 請求項14に記載の発明によれば、電極や電球供給線を光遮断体として利用できる。 請求項15に記載の発明によれば、電極を形成する際に、光遮断体も形成できる。 請求項16に記載の発明によれば、電流供給線を形成する際に、光遮断体も形成できる。 請求項17に記載の発明によれば、表面状態が綺麗なサイリスタ上に電極を形成できる。 請求項18に記載の発明によれば、光遮断性に優れる材料により光遮断体を形成できるとともに、電極と絶縁することができる。

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Abstract

To provide a light emitting component that hardly malfunctions even when a certain type of light is incident on a light emitting device, a light measuring apparatus, an image forming apparatus, and a method for manufacturing a light emitting component.SOLUTION: A light emitting component comprises: a substrate 80; and a light emitting device that is provided on the substrate 80 and emits light in a direction intersecting with a surface of the substrate 80. The light emitting device has thyristors that are setting thyristors S, and an opening δ that is formed in the thyristors and emits light. An inner face of the opening δ is covered by an emission surface protective film 351 that blocks transmission of light. The emission surface protective film 351 is formed, for example, of metal, and includes an insulating part 352 between the thyristors and the emission surface protective film 351.SELECTED DRAWING: Figure 3
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Description

[Technical field]

[0001] The present invention relates to a light emitting component, an optical measuring device, an image forming device, and a method for manufacturing a light emitting component. [Background technology]

[0002] Patent Document 1 describes constructing a light-emitting element with a pnpnpn six-layer semiconductor structure, providing electrodes on the p-type first layer and n-type sixth layer at both ends and on the p-type third layer and n-type fourth layer in the center, making the pn layer perform the function of a light-emitting diode, and making the pnpn fourth layer perform the function of a thyristor.

[0003] Patent document 2 describes a light-emitting element array in which a large number of exposure elements whose threshold voltage or threshold current can be controlled by external light are arranged one-dimensionally, two-dimensionally, or three-dimensionally, and at least a portion of the light emitted from each light-emitting element is incident on other light-emitting elements in the vicinity of each light-emitting element, and each light-emitting element is connected to a clock line that applies a voltage or current from the outside.

[0004] Patent Document 3 describes a self-scanning light source head including a substrate, surface-emitting semiconductor lasers arranged in an array on the substrate, and a thyristor arranged on the substrate as a switching element for selectively turning on and off the emission of the surface-emitting semiconductor lasers, and an image forming device utilizing the same. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2001-308385 A [Patent Document 2] Japanese Patent Application Publication No. 1-238962 [Patent Document 3] JP 2009-286048 A Summary of the Invention [Problem to be solved by the invention]

[0006] In 3D sensing and the like, a light-emitting unit in which light-emitting elements are arranged is adopted. There are light-emitting devices in which the light-emitting elements are set to a lit or unlit state by turning on each of the light-emitting elements. However, when some light, for example, external light, is incident on the light-emitting element, a malfunction may occur in which the element is turned on even though it is turned off. Therefore, it is desirable to make it difficult for such a malfunction to occur even when some light is incident on the element. An object of the present invention is to provide a light emitting component, an optical measuring device, an image forming device, and a method for manufacturing a light emitting component that are unlikely to malfunction even when some light is incident on a light emitting element. [Means for solving the problem]

[0007] The invention described in claim 1 includes a substrate, and a light-emitting element provided on the substrate and emitting light in a direction intersecting a surface of the substrate, the light-emitting element being: A light emitting unit that emits light and a A thyristor and a From the light-emitting part Light From the exit part at the bottom The light emitting component has an opening through which light is emitted, and the inner surface of the opening is covered with a light blocking material that suppresses the transmission of light. The invention described in claim 2 is the light emitting component described in claim 1, wherein the light blocking body is made of metal and an insulating portion is provided between the thyristor and the light blocking body. A third aspect of the present invention is the light emitting component according to the second aspect, wherein the metal extends from an electrode electrically connected to the thyristor to an inner surface of the opening. A fourth aspect of the present invention is the light-emitting component according to the second aspect, wherein the metal extends from a current supply wiring electrically connected to the thyristor to an inner surface of the opening. The invention described in claim 5 is the light emitting component described in claim 1, wherein the light blocking body is made of an insulating material. The invention recited in claim 6 is the light emitting component recited in claim 1, wherein the light emitting element further includes an electrode, and the light shield further covers the electrode. The invention described in claim 7 is the light emitting component described in claim 1, wherein the light shield is made of metal and covers the electrodes via an insulating portion. An eighth aspect of the present invention is the light-emitting component according to the first aspect, wherein the light blocking body is a light absorbing body that absorbs light. A ninth aspect of the present invention is the light-emitting component according to the eighth aspect, wherein at least one of the layers constituting the thyristor absorbs light having a longer wavelength than the emitted light. The invention described in claim 10 is the light emitting component described in claim 1, wherein the light blocking body covers a part of the inner surface of the opening. An eleventh aspect of the present invention is the light-emitting component according to the first aspect, wherein the light blocking body is a light reflector that reflects light. The invention described in claim 12 is an optical measurement device comprising: a light-emitting component described in any one of claims 1 to 11; a light-receiving unit that receives reflected light from an object irradiated with light from the light-emitting component; and a processing unit that processes information regarding the light received by the light-receiving unit and measures the distance from the light-emitting component to the object or the shape of the object. The invention described in claim 13 is an image forming device comprising a light-emitting component described in any one of claims 1 to 11, and a drive control unit that receives an input of an image signal and drives the light-emitting component based on the image signal so that a two-dimensional image is formed by light emitted from the light-emitting component. The invention described in claim 14 further comprises a substrate, A light emitting unit that emits light and a Thyristor and a layer forming step of forming a thyristor having a thickness of 100 nm, The light from the light emitting part is guided to the exit part which hits the bottom surface of the light emitting part. A direction intersecting the plane of the substrate To This is a method for manufacturing a light-emitting component, including an opening formation step of forming an opening for emitting light, and a covering step of covering the thyristor and the inner surface of the opening formed by the opening formation step with a light shield that suppresses light transmission. The invention described in claim 15 is a method for manufacturing a light-emitting component described in claim 14, in which the light shield is a metal and is formed in the covering process so as to extend from the inner surface of the opening onto the thyristor as an electrode. The invention described in claim 16 is a method for manufacturing a light-emitting component described in claim 14, wherein the light shield is metal and is formed in the covering process so as to extend from the inner surface of the opening onto the thyristor as a current supply line electrically connected to the thyristor. The invention described in claim 17 further comprises a substrate, A light emitting unit that emits light and a Thyristor and a layer forming step of forming a thyristor on the thyristor formed by the layer forming step; and an electrode forming step of forming an electrode on the thyristor formed by the layer forming step. The light from the light emitting part is guided to the exit part which hits the bottom surface of the light emitting part. A direction intersecting the plane of the substrate To This is a method for manufacturing a light-emitting component, including an opening formation step of forming an opening for emitting light, and a covering step of covering the thyristor and the inner surface of the opening formed by the opening formation step with a light shield that suppresses light transmission. The invention described in claim 18 is a method for manufacturing a light-emitting component described in claim 17, in which the light shield is metal and is formed in the covering process so as to cover the electrode via the electrode and an insulating portion. Effect of the Invention

[0008] According to the invention as recited in claim 1, malfunction is unlikely to occur even when some light is incident on the light emitting element. According to the invention as recited in claim 2, the light shield can be made of a material having excellent light shielding properties. According to the invention as recited in claim 3, the light shield can be formed when the electrodes are formed. According to the invention as recited in claim 4, the light shield can be formed when the current supply line is formed. According to the invention as defined in claim 5, the layer structure becomes simpler. According to the sixth aspect of the present invention, the light shield can be formed separately from the electrodes. According to the seventh aspect of the present invention, the light shield can be formed from a material having excellent light shielding properties, and can be insulated from the electrodes. According to the eighth aspect of the invention, light transmission can be suppressed by light absorption. According to the ninth aspect of the present invention, even if a light absorbing layer is present in the layers of the thyristor, malfunction is unlikely to occur. According to the invention as recited in claim 10, malfunctions are less likely to occur even if the inner surface of the opening is not entirely covered. According to the invention as set forth in claim 11, it is possible to suppress the transmission of light by light reflection. According to the invention as set forth in claim 12, an optical measurement device in which light emitting elements are two-dimensionally lit in parallel can be obtained. According to the invention as set forth in claim 13, an image forming apparatus in which light emitting elements are two-dimensionally lit in parallel can be obtained. According to the invention as recited in claim 14, the electrodes and the bulb supply wires can be used as light shields. According to the fifteenth aspect of the present invention, the light shield can be formed when the electrodes are formed. According to the sixteenth aspect of the present invention, the light shield can be formed when the current supply line is formed. According to the seventeenth aspect of the present invention, electrodes can be formed on a thyristor having a clean surface. According to the eighteenth aspect of the present invention, the light shield can be made of a material having excellent light shielding properties, and can be insulated from the electrodes. [Brief description of the drawings]

[0009] [Figure 1] FIG. 2 is an equivalent circuit diagram of the light emitting device. [Diagram 2] FIG. 2 is a diagram showing an example of a planar layout of a light-emitting section; [Diagram 3] (a) and (b) are cross-sectional views of the drive thyristor / laser diode. [Figure 4] FIG. 2 is an enlarged plan view of the drive thyristor / laser diode. [Diagram 5] 1 is a cross-sectional view of an island including a setting thyristor and a connecting diode, and an island including a transfer thyristor, a coupling diode, and a connecting diode. [Figure 6] 13(a) and 13(b) show cases where the area covering the cylindrical inner surface as the emission surface protection film is smaller when the inner surface of the opening is viewed from above. [Figure 7] 4(a) and 4(b) show the case where the emission surface protection film covers the gate layer of the set thyristor. [Figure 8] 4(a) and 4(b) show the case where the emission surface protection film covers the n-cathode layer of the set thyristor. [Figure 9] 13(a) and 13(b) are diagrams showing a second example of another form of the exit surface protection film. [Figure 10] 13(a) and 13(b) are diagrams showing a third example of another form of the exit surface protection film. [Figure 11] 13(a) and 13(b) are diagrams showing a fourth example of another configuration of the exit surface protection film. [Figure 12] 5(a) to 5(c) are diagrams further explaining the laminated structure of the laser diode and the drive thyristor. [Figure 13] 1(a) and 1(b) are a flowchart showing the order of steps in a method for manufacturing a light-emitting section. [Figure 14] 1A and 1B are diagrams illustrating an example of controlling the turning on / off of a laser diode in a light emitting device. [Figure 15] 4 is a timing chart for driving the light emitting device. [Figure 16] FIG. 1 is a diagram illustrating an optical measurement device using a light emitting device. [Figure 17] FIG. 1 is a diagram illustrating an image forming apparatus using a light emitting device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0011] [Light emitting device 10] FIG. 1 is an equivalent circuit diagram of a light emitting device 10. As shown in FIG. The light emitting device 10 includes a light emitting section 100 and a control section 110 . The light emitting unit 100 includes a laser diode LD that emits laser light as an example of a light emitting element. The light emitting unit 100 is configured as a self-scanning light emitting device array (SLED: Self-Scanning Light Emitting Device) as described below. The laser diode LD is, for example, a vertical cavity surface emitting laser (VCSEL).

[0012] In FIG. 1, the light emitting unit 100 is an example of a light emitting component, and includes 16 laser diodes LD arranged in a 4×4 matrix (two-dimensionally). The term "two-dimensionally" means that there are two dimensions, and for example, that the light emitting unit 100 extends in the x direction and the y direction described below. Here, in the plane of FIG. 1, the direction from right to left is defined as the x direction, and the direction from bottom to top is defined as the y direction. The x direction and the y direction are perpendicular to each other. Then, the light emitting unit 100 includes a light emitting element unit 101 in which laser diodes LD11, LD21, LD31, and LD41 are arranged in the x direction, a light emitting element unit 102 in which laser diodes LD12, LD22, LD32, and LD42 are arranged in the x direction, a light emitting element unit 103 in which laser diodes LD13, LD23, LD33, and LD43 are arranged in the x direction, and a light emitting element unit 104 in which laser diodes LD14, LD24, LD34, and LD44 are arranged in the x direction. The light emitting element components 101-104 are provided on a substrate 80 (see FIG. 2 described later), and function as light emitting elements that emit light in a direction intersecting the surface of the substrate 80. Here, the "surface" refers to the front and back surfaces of the substrate 80.

[0013] Further, each of the laser diodes LD included in the light-emitting element portions 101 to 104 is arranged in the y direction. That is, the laser diodes LD11, LD12, LD13, and LD14 are arranged in the y direction, the laser diodes LD21, LD22, LD23, and LD24 are arranged in the y direction, the laser diodes LD31, LD32, LD33, and LD34 are arranged in the y direction, and the laser diodes LD41, LD42, LD43, and LD44 are arranged in the y direction. In this way, when the laser diodes LD are to be distinguished from one another, two-digit numbers are used, such as "LD11". In some cases, "i" is used instead of the number in the x direction, and "j" is used instead of the number in the y direction, resulting in "LDij". In other cases, "i" is used instead of each number when numbers are used only in the x direction, and "j" is used instead of each number when numbers are used only in the y direction. Here, i and j are integers from 1 to 4.

[0014] The laser diode LD includes 16 drive thyristors DT. Each drive thyristor DT is connected to a corresponding laser diode LD. Here, each drive thyristor DT is connected in series to each laser diode LD. That is, the drive thyristor DT and the laser diode LD form a pair. Therefore, the drive thyristors DT are given the same number as the connected laser diode LD to distinguish them from each other.

[0015] In this specification, "~" indicates a number of components that are distinguished from each other, and includes those written before and after "~" and those with numbers therebetween. For example, light-emitting element units 101 to 104 include light-emitting element unit 101 through light-emitting element unit 104 in numerical order.

[0016] The light-emitting unit 100 includes a transfer element unit 105 including four transfer thyristors T, four setting thyristors S, four coupling diodes D, four connecting diodes Da and Db, and four resistors Rg. The transfer element unit 105 further includes a start diode SD and current limiting resistors R1 and R2.

[0017] The transfer thyristors T are arranged in the x direction in the order of transfer thyristors T1, T2, T3, and T4. The coupling diodes D are arranged in the x direction in the order of coupling diodes D1, D2, D3, and D4. The coupling diodes D1, D2, and D3 are provided between the transfer thyristors T1, T2, T3, and T4, respectively, and the coupling diode D4 is provided on the side of the transfer thyristor T4 opposite to the side on which the coupling diode D3 is provided. The setting thyristors S are arranged in the x direction in the order of setting thyristors S1, S2, S3, and S4. The connecting diodes Da, Db and resistor Rg are also arranged in the x direction in a similar manner. The transfer thyristor T, setting thyristor S, coupling diode D, connecting diodes Da and Db, and resistor Rg are arranged in the x direction, so they are numbered with a single digit. Note that the letter "i" may be used instead of individual numbers.

[0018] The laser diode LD, the coupling diode D, and the connection diodes Da and Db are two-terminal elements having an anode and a cathode. The drive thyristor DT, the transfer thyristor T, and the setting thyristor S are three-terminal elements having an anode, a cathode, and a gate. The gate of the drive thyristor DTij (i, j = 1 to 4) is referred to as the gate Gdij, the gate of the transfer thyristor Ti (i = 1 to 4) as the gate Gti, and the gate of the setting thyristor Si (i = 1 to 4) as the gate Gsi. Here, the drive thyristor DT is an example of a drive element, the transfer thyristor T is an example of a transfer element, and the setting thyristor S is an example of a setting element.

[0019] Next, the connections of the above elements (laser diode LD, drive thyristor DT, transfer thyristor T, etc.) will be described. As described above, the laser diode LDij (i, j = 1 to 4) and the drive thyristor DTij are connected in series. That is, the anode of the laser diode LDij is connected to the reference potential Vsub (ground potential (GND) or the like), and the cathode is connected to the anode of the drive thyristor DTij.

[0020] The reference potential Vsub is supplied via a back electrode 92 (see FIG. 3, which will be described later) provided on the back surface of the substrate 80 constituting the light-emitting section 100, as will be described later.

[0021] The cathode of the drive thyristor DTi1 included in the light-emitting element section 101 is connected to the light-up signal line 74-1. The light-up signal line 74-1 is connected to a φI1 terminal, and the light-up signal φI1 is supplied from the control section 110. The cathode of the drive thyristor DTi2 included in the light-emitting element section 102 is connected to the light-up signal line 74-2. The light-up signal line 74-2 is connected to a φI2 terminal, and the light-up signal φI2 is supplied from the control section 110 to the light-up signal line 74-2. The cathode of the drive thyristor DTi3 included in the light-emitting element unit 103 is connected to a light-up signal line 74-3. The light-up signal line 74-3 is connected to a φI3 terminal, and receives the light-up signal φI3 from the control unit 110. Similarly, the cathode of the drive thyristor DTi4 included in the light-emitting element unit 104 is connected to a light-up signal line 74-4. The light-up signal line 74-4 is connected to a φI4 terminal, and the light-up signal φI4 is supplied from the control unit 110. That is, the cathode of the drive thyristor DTij is connected to a light-up signal line 74-j, which is connected to a φIj terminal. A light-up signal φIj is supplied from the control unit 110 to the φIj terminal.

[0022] In the transfer element unit 105, the anode of the transfer thyristor Ti is connected to the reference potential Vsub. The cathodes of the odd-numbered transfer thyristors T1 and T3 are connected to a transfer signal line 72. The transfer signal line 72 is connected to a φ1 terminal via a current limiting resistor R1, and a transfer signal φ1 is supplied from the control unit 110. The cathodes of the even-numbered transfer thyristors T2 and T4 are connected to a transfer signal line 73. The transfer signal line 73 is connected to a φ2 terminal via a current limiting resistor R2, and a transfer signal φ2 is supplied from the control unit 110.

[0023] The coupling diodes Di are connected in series. That is, the cathode of one coupling diode D is connected to the anode of the coupling diode D adjacent in the x-direction. The start diode SD has an anode connected to the transfer signal line 73 and a cathode connected to the anode of the coupling diode D1. The cathode of the start diode SD and the anode of the coupling diode D1 are connected to the gate Gt1 of the transfer thyristor T1. The cathode of the coupling diode D1 and the anode of the coupling diode D2 are connected to the gate Gt2 of the transfer thyristor T2. The cathode of the coupling diode D2 and the anode of the coupling diode D3 are connected to the gate Gt3 of the transfer thyristor T3. The connection point between the cathode of the coupling diode D3 and the anode of the coupling diode D4 is connected to the gate Gt4 of the transfer thyristor T4.

[0024] Moreover, the setting thyristors Si (i=1 to 4) have their anodes connected to the reference potential Vsub and their cathodes connected to a setting signal line 75. The setting signal line 75 is connected to a φs terminal, and receives a setting signal φs from the control unit 110.

[0025] The gate Gti of the transfer thyristor Ti is connected via a resistor Rg to a power supply line 71. The power supply line 71 is connected to a Vgk terminal, and a power supply potential Vgk (−3.3 V, for example) is supplied from the control unit 110. The gate Gti of the transfer thyristor Ti is connected to the gate of the setting thyristor Si through a connecting diode Dai, and the gate Gsi of the setting thyristor Si is connected to the gate Gdij of the driving thyristor DTij through a connecting diode Dbi. That is, each connection thyristor S is connected to a plurality of pairs (four pairs in this example) of a drive thyristor DT and a laser diode LD.

[0026] The configuration of the control unit 110 will be described. The control unit 110 generates signals such as a lighting signal φIj and supplies the signals to the light-emitting unit 100. The light-emitting unit 100 operates according to the supplied signals. The control unit 110 is configured with an electronic circuit. For example, the control unit 110 is configured as an integrated circuit (IC). The control unit 110 includes a transfer signal generating unit 120 , a setting signal generating unit 130 , a lighting signal generating unit 140 , a reference potential generating unit 160 , and a power supply potential generating unit 170 .

[0027] The transfer signal generation unit 120 generates transfer signals φ1 and φ2, and supplies the transfer signal φ1 to the φ1 terminal of the light-emitting unit 100 and the transfer signal φ2 to the φ2 terminal. The setting signal generating section 130 generates a setting signal φs and supplies it to the φs terminal of the light emitting section 100 . The light-up signal generating unit 140 generates a light-up signal φIj and supplies it to the φIj terminal of the light-emitting unit 100 .

[0028] The reference potential generating section 160 generates a reference potential Vsub and supplies it to a Vsub terminal of the light emitting section 100. The power supply potential generating section 170 generates a power supply potential Vgk and supplies it to a Vgk terminal of the light emitting section 100.

[0029] The signals generated by the transfer signal generating section 120, the setting signal generating section 130, the lighting signal generating section 140, the reference potential generating section 160, and the power supply potential generating section 170 will be described later.

[0030] In the above, the light emitting unit 100 has been described as having laser diodes LD arranged two-dimensionally in a 4×4 array, but this is not limited to 4×4. In i×j, i and j may be multiple numbers other than 4. The number of the transfer thyristors T and the setting thyristors S may be i. The number of the transfer thyristors T and the setting thyristors S may be a number greater than i or a number less than i.

[0031] (Layout of the light emitting unit 100) The light emitting section 100 is made of a semiconductor material capable of emitting laser light. For example, the light emitting section 100 is made of a GaAs-based compound semiconductor. That is, as shown in the cross-sectional views described later (see Figs. 3(a), (b) and 5 described later), the light emitting section 100 is made of a semiconductor layer laminate in which a plurality of GaAs-based compound semiconductor layers are laminated on a substrate 80 made of p-type GaAs. The substrate 80 is set to the reference potential Vsub by supplying the reference potential Vsub to a back electrode 92 formed on the back surface of the substrate 80. First, the planar layout will be described.

[0032] FIG. 2 is a diagram showing an example of a planar layout of the light-emitting section 100. As shown in FIG. Here, the planar layout of the light emitting section 100 will be described using islands 301 to 307 shown in Fig. 2. Note that the island refers to a configuration in which a semiconductor layer stack is separated by mesa etching.

[0033] The island 301 includes islands 301-j (j=1 to 4), each of which is provided with a laser diode LD1j and a drive thyristor DT1j. The laser diode LD1j and the drive thyristor DT1j are connected in series by being stacked. Therefore, in FIG. 2, the laser diode LD1j and the drive thyristor DT1j are represented as DT / LD1j. A plurality of islands similar to the island 301 (island 301-j) are provided in parallel with the island 301 (island 301-j) in the x-direction, and DT / LDij (i=2 to 4, j=1 to 4) are provided.

[0034] A connecting diode Db1 and a setting thyristor S1 are provided in the island 302. Note that a plurality of islands similar to the island 302 are provided in parallel in the x direction of the island 302, and are provided with connecting diodes Dbi (i=2 to 4) and setting thyristors Si (i=2 to 4). The island 303 includes a connecting diode Da1, a transfer thyristor T1, and a coupling diode D1. Note that a plurality of islands similar to the island 303 are provided in parallel in the x direction of the island 303, and are provided with connecting diodes Dai (i=2 to 4), transfer thyristors Ti (i=2 to 4), and coupling diodes Di (i=2 to 4).

[0035] A resistor Rg1 is provided in the island 304. Note that a plurality of islands similar to the island 304 are provided in parallel in the x direction of the island 304, and resistors Rgi (i=2 to 4) are provided therein.

[0036] A start diode SD is provided in the island 305. A current limiting resistor R1 is provided in the island 306, and a current limiting resistor R2 is provided in the island 307.

[0037] Next, the cross-sectional structure of the light-emitting section 100 will be described. 3A and 3B are cross-sectional views of a drive thyristor DT / laser diode LD, in which Fig. 3(a) is a cross-sectional view taken along line IIIA-IIIA in Fig. 2, and Fig. 3(b) is a cross-sectional view taken along line IIIB-IIIB in Fig. 2. As shown in FIG. 3(a), a p-type anode layer (hereinafter referred to as p-anode layer, and the same applies below) 81 constituting the laser diode LD, a light emitting layer 82 that emits light, and an n-type cathode layer (n-cathode layer) 83 are laminated on a p-type GaAs substrate 80. A tunnel junction layer 84 is laminated on the n-cathode layer 83 constituting the laser diode LD. A p-type anode layer (p-anode layer) 85, an n-type gate layer (n-gate layer) 86, a p-type gate layer (p-gate layer) 87, and an n-type cathode layer (n-cathode layer) 88 constituting the drive thyristor DT are provided on the tunnel junction layer 84. These semiconductor layer laminates are separated by mesa etching.

[0038] In addition, in the center of the laser diode LD, the n-cathode layer 88, the p-gate layer 87, the n-gate layer 86, the p-anode layer 85, and the tunnel junction layer 84 are removed by etching to form an opening δ for emitting light. This exposes the n-cathode layer 83 of the laser diode LD. This exposed portion of the n-cathode layer 83 is the light emission opening γ of the laser diode LD.

[0039] That is, this semiconductor layer stack surrounds the light emission port γ of the laser diode LD to form a setting thyristor S. This can also be said that p anode layer 85, n gate layer 86, p gate layer 87, and n cathode layer 88, each having a thyristor structure, are left around the opening δ.

[0040] The p-anode layer 81 of the laser diode LD includes a current confinement layer. That is, the current confinement layer is a layer formed by oxidizing Al, such as AlAs. 2 O 3 This refers to a layer in which the electrical resistance becomes high and current does not flow easily due to the formation of a current blocking region β. In other words, oxidation proceeds from the part exposed by mesa etching (periphery), so the center part can be prevented from being oxidized. Therefore, a region where current flows easily (current passing region α) is left in the center, and the periphery is made into a region where current does not flow easily due to oxidation (current blocking region β). Non-radiative recombination is likely to occur in the peripheral part, which has many defects caused by mesa etching. By providing the current blocking region β, the power consumed by non-radiative recombination is suppressed, which leads to low power consumption and improved light extraction efficiency. The light extraction efficiency is the amount of light that can be extracted per unit of power.

[0041] On the n cathode layer 88, an n ohmic electrode 321 (n ohmic electrodes 321-1, 321-2, 321-3, 321-4) made of a metal material that easily forms ohmic contact with the n cathode layer 88 is provided. The n ohmic electrode 321 is provided in a horseshoe shape surrounding an emission port γ indicated by an arrow from which laser light is emitted (see FIG. 4 described later). An insulating layer 91 is provided except for the n ohmic electrode 321. On the insulating layer 91, a light-up signal line 74 (light-up signal lines 74-1, 74-2, 74-3, 74-4) is provided to connect the n ohmic electrode 321. In addition, a light-on signal line 74-1 is connected to the n ohmic electrode 321-1 of the drive thyristor DT11 / laser diode LD11, a light-on signal line 74-2 is connected to the n ohmic electrode 321-2 of the drive thyristor DT12 / laser diode LD12, a light-on signal line 74-3 is connected to the n ohmic electrode 321-3 of the drive thyristor DT13 / laser diode LD13, and a light-on signal line 74-4 is connected to the n ohmic electrode 321-4 of the drive thyristor DT14 / laser diode LD14.

[0042] Moreover, the inner surface of the opening δ is covered with exit surface protective films 351-1, 351-2, 351-3, and 351-4 (hereinafter, sometimes simply referred to as "exit surface protective film 351"). Exit surface protective film 351 is an example of a light blocking body that suppresses the transmission of light. A "light blocking body" is a substance that has the function of blocking light and suppressing the transmission of light. Here, the "inner surface" refers to the side surface of the opening δ. In this case, the inner surface has a cylindrical shape. Moreover, it is sufficient for the exit surface protection film 351 to cover the inner surface of the opening δ, and it is not necessary to provide it on the bottom surface of the opening δ. If the exit surface protection film 351 is provided on the bottom surface of the opening δ, the exiting light may be absorbed. In the example of FIG. 3, the exit surface protection film 351 is not provided on the bottom surface of the opening δ.

[0043] The n-ohmic electrodes 321-1, 321-2, 321-3, and 321-4 are respectively composed of contact vias 321a-1, 321a-2, 321a-3, and 321a-4 (hereinafter simply referred to as "contact vias 321a") and contact metals 321b-1, 321b-2, 321b-3, and 321b-4 (hereinafter simply referred to as "contact metals 321b"). The emission surface protection film 351 extends from the contact metals 321b and is formed on the inner surface of the opening δ.

[0044] The p-ohmic electrode 331-1 is made up of a contact via 331a-1 and a contact metal 331b-1. The emission surface protection film 351 extends from the contact metal 331b and is formed on the inner surface of the opening δ.

[0045] In this case, it can also be said that the emission surface protective film 351 extends from the n ohmic electrode 321 and the p ohmic electrode 332, which are electrodes electrically connected to the setting thyristor S, to the inner surface of the opening δ. In other words, the emission surface protective film 351 provided on the inner surface of the opening δ is an extension of the n ohmic electrode 321 and the p ohmic electrode 331 to the inner surface of the opening δ. It can also be said that the emission surface protective film 351 is formed integrally with the n ohmic electrode 321 and the p ohmic electrode 331.

[0046] The light exit surface protective film 351 is a light shielding body as described above. The light shielding body is not particularly limited as long as it has a function of suppressing the transmission of light. The light shielding body is, for example, a light absorber that absorbs light. Also, the light shielding body is a light reflector that reflects light. The light that is absorbed or reflected by the light exit surface protective film 351 is, for example, external light that is light that is incident from the outside. That is, at least one layer of the layers that constitute the setting thyristor S may absorb light with a longer wavelength than the emitted light. Also, at least one layer of the layers that constitute the setting thyristor S may absorb light emitted from the light emitting layer 82. When light with such a wavelength is incident on the opening δ and absorbed by the setting thyristor S, the setting thyristor S may be turned ON due to this optical energy. Then, due to the characteristics of the thyristor, the setting thyristor S remains in the ON state. That is, the setting thyristor S malfunctions. Therefore, in this embodiment, the emission surface protection film 351 is provided to block light and prevent the setting thyristor S from malfunctioning.

[0047] It is preferable that the emission surface protection film 351 is, for example, a metal. Examples of metals include gold (Au), platinum (Pt), germanium (Ge), nickel (Ni), zinc (Zn), chromium (Cr), and titanium (Ti). The emission surface protection film 351 may also be an alloy containing these metals. When the emission surface protection film 351 is made of a metal, it is expected to have not only a function of absorbing light but also a function of reflecting light, and is excellent in the light blocking effect. Furthermore, when the emission surface protection film 351 is made of metal, as shown in the figure, insulating parts 352-1, 352-2, 352-3, and 352-4 (hereinafter sometimes simply referred to as "insulating parts 352") are provided between the setting thyristor S and the emission surface protection films 351-1, 351-2, 351-3, and 351-4, respectively. This prevents electrical contact between the emission surface protection film 351 and the setting thyristor S.

[0048] Incidentally, an insulating material may be used as the emission surface protection film 351 instead of a metal. In this case, the insulating portion 352 is not necessary. The insulating material used in this embodiment is silicon dioxide (SiO 2), silicon nitride (Si 3 N 4 ), polyimide, BCB (benzocyclobutene), etc. Note that the insulator or insulating section 352 only needs to exhibit insulating properties depending on how it is used, and in addition to a material that always exhibits only insulating properties, a material that is a semiconductor but has high resistance and exhibits insulating properties against current flowing through the VCSEL, external light, etc. may also be used. Incidentally, emission surface protective film 351 only covers the inner surface of opening δ, and does not cover the entire emission portion that contacts the bottom surface of the opening. This is because a material that covers the inner surface absorbs light, and so this is done to avoid impeding the emission of light. On the other hand, insulating portion 352 is less likely to absorb light than emission surface protective film 351. Therefore, it is designed to cover the inner surface that contacts the side surface of opening δ. Here, even if an insulating material is used as emission surface protective film 351, it similarly does not cover the entire emission portion that contacts the bottom surface of opening δ, as insulating portion 352 does.

[0049] In this embodiment, an interlayer film 353 is provided in the hole 301a provided between the islands 301. The interlayer film 353 is an insulating material and can be made of the same material as the insulating portion 352, but may be made of an insulating material made of a different material from that of the insulating portion 352. The emission surface protection film 351 and the interlayer film 353 can be formed of the same material, but may be formed of different materials. The emission surface protection film 351 and the interlayer film 353 may be formed in the same process or in separate processes.

[0050] As shown in Fig. 3(b), in the cross section taken along line IIIB-IIIB, a part of the n-cathode layer 88 is removed in the drive thyristor DT to expose the p-gate layer 87. Then, a p-ohmic electrode 331 (only the p-ohmic electrode 331-1 is shown in Fig. 3(b)) made of a metal material that easily forms ohmic contact with the p-gate layer 87 is provided on the exposed p-gate layer 87. Then, a wiring 76 (see Fig. 4) is provided on the insulating layer 90, connecting the p-ohmic electrode 331-1 and the n-ohmic electrode 322 on the region 312 of the connection diode Db1 provided in the island 302.

[0051] In addition, in FIG. 3(b), the light-on signal line 74-1 connected to the n-ohmic electrode 321-1 is connected to an n-ohmic electrode similar to the n-ohmic electrode 321-1 of the other drive thyristors DT21 (DT / LD21), DT31 (DT / LD31), and DT41 (DT / LD41).

[0052] 4 is an enlarged plan view of the drive thyristor DT / laser diode LD. Here, the drive thyristor DT11 / laser diode LD11 will be explained, but the drive thyristor DT12 / laser diode LD12, drive thyristor DT13 / laser diode LD13, and drive thyristor DT14 / laser diode LD14 arranged in the y direction are also shown with reference characters to which "j" is added. Note that the light-up signal line 74-1 is shown with a dashed line to distinguish it from the others.

[0053] As shown in Fig. 4, the drive thyristor DT11 / laser diode LD11 (drive thyristor DT1j / laser diode LD1j) are provided in the island 301-1 (island 301-j). The island 301-1 (island 301-j) has a circular planar shape, with a circular emission port γ at the center for emitting light. The planar shape of the island 301-1 (island 301-j) does not have to be circular, and may be other shapes such as a rectangle or a polygon greater than a rectangle. The same applies to the emission port γ.

[0054] A part of the n-cathode layer 88 in the peripheral portion is removed to expose the p-gate layer 87. A p-ohmic electrode 331-1 (331-j) is provided on the exposed p-gate layer 87. The p-ohmic electrode 331-1 (331-j) is composed of a contact via 331a-1 (331a-j) and a contact metal 331b-1 (331b-j). The contact metal 331b-1 (331b-j) of the p-ohmic electrode 331-1 (p-ohmic electrode 331-j) is connected to the wiring 76. On the other hand, an n-ohmic electrode 321-1 (n-ohmic electrode 321-j) is provided in a horseshoe shape on the n-cathode layer 88, surrounding the emission port γ. The n-ohmic electrode 321-1 (n-ohmic electrode 321-j) is composed of a contact via 321a-1 (321a-j) and a contact metal 321b-1 (321b-j). The contact metal 321b-1 (321b-j) of the n-ohmic electrode 321-1 is connected to a light-up signal line 74-1. The light emission port γ of the light-up signal line 74-1 is an opening δ. This prevents the light emitted by the laser diode LD1j from being blocked by the light-up signal line 74-1.

[0055] As can be seen from Figures 3(a) and (b), the light emitted by the laser diode LD1j is emitted via the drive thyristor DT1j. As another example, a part or all of the drive thyristor DT1j located at a position through which the light emitted by the laser diode LD1j passes may be removed to reduce or eliminate light absorption by the drive thyristor DT1j. Alternatively, the direction of the light emitted by the laser diode LD1j may be the substrate 80 side (rear surface emission).

[0056] Although the drive thyristors DT1j / laser diodes LD1j arranged in the y direction have been described above, the drive thyristors DT / laser diodes LD arranged in the x direction are similar.

[0057] Fig. 5 is a cross-sectional view of an island 302 including a setting thyristor S1 and a connecting diode Db1, and an island 303 including a transfer thyristor T1, a coupling diode D1, and a connecting diode Da1. Fig. 5 is a cross-sectional view taken along line VV in Fig. 2. From the left side of Fig. 5 (the positive side in the x direction), the coupling diode D1, the transfer thyristor T1, the connecting diode Da1, the setting thyristor S1, and the connecting diode Db1 are shown.

[0058] A p-anode layer 81, a light emitting layer 82, an n-cathode layer 83, a tunnel junction layer 84, a p-anode layer 85, an n-gate layer 86, a p-gate layer 87, and an n-cathode layer 88 are laminated on a p-type GaAs substrate 80. In other words, the structure of the semiconductor layer laminate in the islands 302 and 303 is the same as that of the drive thyristor DT / laser diode LD shown in Figures 3(a) and 3(b).

[0059] However, as shown in FIG. 5, the outside of the islands 302 and 303 are mesa-etched until they reach the substrate 80. On the other hand, the area between the islands 302 and 303 is mesa-etched until they reach the p-anode layer 85. The p-anode layer 85 is connected to the substrate 80 (reference potential Vsub) by the wiring 78. That is, in the islands 302 and 303, the p-anode layer 81, the light-emitting layer 82, and the n-cathode layer 83, which function as the laser diode LD in the island 301, are short-circuited by the wiring 78 so as not to function as the laser diode LD. Here, the wiring 78 is provided in contact with the exposed side surfaces of the p-anode layer 81, the light-emitting layer 82, and the n-cathode layer 83. As described above, since they are not to function as the laser diode LD, the layers exposed on the side surfaces may be short-circuited. Note that the wiring 78 connects the p-type substrate 80 and the p-anode layer 85, and may be formed simultaneously with the p-ohmic electrode 331, etc.

[0060] Although not shown in FIG. 5, the islands 304, 305, 306, and 307 are also connected to the islands 302 and 303 via the p-anode layer 85. That is, as shown in FIG. 2, the substrate 80 includes a region 80B where the semiconductor layer stack is mesa-etched down to the substrate 80, and a region 80A where the semiconductor layer stack is mesa-etched up to the substrate 80 and the p anode layer 85 is exposed. The region 80A includes islands 302, 303, 304, 305, 306, 307, and similar islands. The region 80B includes islands 301-j and similar islands. However, in the region 80A, it is sufficient that a current blocking region β is formed in the p anode layer 81, and a part of the p anode layer 81 may remain. In the region 80B, it is sufficient that the p anode layer 85 remains, and a part of the p anode layer 85 may be etched in the thickness direction.

[0061] Next, the islands 302 and 303 will be described in detail. The island 302 exposes the p-gate layer 87, leaving regions 312 and 313 of the n-cathode layer 88. The connecting diode Db1 has the region 312 of the n-cathode layer 88 as its cathode layer, and the n-ohmic electrode 322 provided on the region 312 as its cathode. The connecting diode Db1 has the p-gate layer 87 as its anode layer, and is connected to the gate layer 87 of the adjacent setting thyristor S1. Alternatively, the connecting diode Db1 has the p-ohmic electrode 332 provided on the p-gate layer 87 as its anode. The setting thyristor S1 has a region 313 of the n-cathode layer 88 as a cathode layer, a p-gate layer 87 as a p-gate layer, and a p-anode layer 85 provided with the n-gate layer 86 sandwiched therebetween as an anode layer. The p-anode layer 85 is connected to the substrate 80 (reference potential Vsub). The p-ohmic electrode 332 provided on the p-gate layer 87 serves as a gate.

[0062] The island 303 exposes the p-gate layer 87, leaving regions 314, 315, and 316 of the n-cathode layer 88. The connecting diode Da1 has the region 314 of the n-cathode layer 88 as its cathode layer, and the n-ohmic electrode 324 provided on the region 314 as its cathode. The connecting diode Da1 has the p-gate layer 87 as its anode layer, and the p-ohmic electrode 333 (see FIG. 2) provided on the p-gate layer 87 as its anode. Similarly, the coupling diode D1 has the region 316 of the n-cathode layer 88 as its cathode layer, and the n-ohmic electrode 326 provided on the region 316 as its cathode. The coupling diode D1 has the p-gate layer 87 as its anode layer, and is connected to the p-gate layer 87 of the adjacent transfer thyristor T1. Alternatively, the coupling diode D1 has the p-ohmic electrode 333 (see FIG. 2) provided on the p-gate layer 87 as the anode.

[0063] The transfer thyristor T1 has a region 315 of the n-cathode layer 88 as a cathode layer, a p-gate layer 87 as a p-gate layer, and a p-anode layer 85 provided with the n-gate layer 86 sandwiched therebetween as an anode layer. The p-anode layer 85 is connected to the substrate 80 (reference potential Vsub). A p-ohmic electrode 333 (see FIG. 2) provided on the p-gate layer 87 serves as a gate.

[0064] Returning to FIG. 2, islands 304, 305, 306, and 307 will be described. In the island 304, the n-cathode layer 88 is removed to expose the p-gate layer 87. The resistor Rg1 uses the p-gate layer 87 between the p-ohmic electrodes 334 and 335 provided on the exposed p-gate layer 87 as a resistor (see FIG. 2).

[0065] The island 305 exposes the p-gate layer 87, leaving a region 317 of the n-cathode layer 88. The start diode SD has the region 317 of the n-cathode layer 88 as a cathode layer, and the n-ohmic electrode 327 provided in the region 317 as a cathode. The p-ohmic electrode 336 provided on the p-gate layer 87 as an anode.

[0066] In the islands 306 and 307, similar to the island 304, the n-cathode layer 88 is removed to expose the p-gate layer 87. Similarly to the resistor Rg1, the current limiting resistors R1 and R2 use the p-gate layer 87 between a pair of p-ohmic electrodes (not numbered) provided on the p-gate layer 87 as a resistor.

[0067] 2, the connections between the islands 301 to 307 will be described. The connections between the islands 301 to 304 and the islands arranged in parallel are similar, so the description will be omitted. The power supply line 71 is connected from the Vgk terminal to the p-ohmic electrode 335 of the island 304 in which the resistor Rg1 is provided. Next, the transfer signal line 72 is connected from the φ1 terminal to the n ohmic electrode 325 of the transfer thyristor T1 provided in the island 303 via a current limiting resistor R1 provided in the island 306. The transfer signal line 72 is connected to the odd-numbered transfer thyristor T provided in the same manner as the island 306.

[0068] The transfer signal line 73 is connected from the φ2 terminal through a current limiting resistor R2 provided in the island 307 to an n ohmic electrode (without symbol) of an even-numbered transfer thyristor T provided in an island similar to the island 303. The transfer signal line 73 is also connected to a p ohmic electrode 336 of the start diode SD.

[0069] The light-on signal line 74-j is connected to the n-ohmic electrode 321-j of the drive thyristor DT1j / laser diode LD1j (DT / LD1j) provided in the island 301-j.

[0070] The setting signal line 75 is connected to the n-ohmic electrode 323 of the setting thyristor S 1 provided in the island 302 .

[0071] The p-ohmic electrode 331-j (see FIG. 4) of the drive thyristor DT1j / laser diode LD1j (DT / LD1j) of the island 301-j and the n-ohmic electrode 322 of the connection diode Db1 of the island 302 are connected by a wiring 76.

[0072] The p-ohmic electrode 332 which is the gate Gs 1 of the setting thyristor S 1 of the island 302 and the n-ohmic electrode 324 of the connecting diode Da 1 of the island 303 are connected by a wiring 77 .

[0073] The p-ohmic electrode 333 of the island 303, the p-ohmic electrode 334 of the resistor Rg1 of the island 304, and the n-ohmic electrode 327 of the start diode SD are connected by a wiring 79. The n-ohmic electrode 326 of the coupling diode D1 of the island 303 is connected by a wiring similar to the wiring 79 to the gate Gt2 of the transfer thyristor T2 provided in an island similar to the adjacent island 303.

[0074] As described above, mesa etching between islands 302, 303, 304, 305, 306, and 307 is performed until p anode layer 85 is exposed. Then, p anode layer 85 is connected to substrate 80 by wiring 78. Although the position of wiring 78 is different from that in Fig. 5, it is shown on the right side of the paper in Fig. 2. In other words, wiring 78 connects region 80A and region 80B of substrate 80.

[0075] Furthermore, the form of the emission surface protection film 351 is not limited to the form explained in Figures 3 and 4. Other forms of the emission surface protection film 351 will be explained below.

[0076] 6 to 8 are diagrams showing a first example of another embodiment of the emission surface protection film 351. In FIG. Here, the case is shown in which the emission surface protection film 351 covers a part of the inner surface of the opening δ. Of these, FIGS. 6(a) and 6(b) show a case in which the area covering the cylindrical inner surface of the emission surface protection film 351 is smaller when the inner surface of the opening δ is viewed from above. In the following description, the island 301-1 is illustrated as an example, but the same applies to the other islands 301-2, 301-3, 301-4, etc. Of these, Fig. 6(a) is a view of the island 301-1 as seen from the same direction as Fig. 4. Also, Fig. 6(b) is a cross-sectional view taken along line VIB-VIB of Fig. 6(a). In this case, the width of emission surface protection film 351 extending from n-ohmic electrode 321 to the inner surface of aperture δ is narrower than that in the case shown in Fig. 3. In this way, even if the entire inner surface of aperture δ is not covered, by providing emission surface protection film 351 in a location where external light is likely to enter, for example, the above-mentioned malfunction can be suppressed without providing it anywhere else.

[0077] 7(a) and (b) show a case where the emission surface protection film 351 covers the gate layer of the setting thyristor S. In FIG. Of these, Fig. 7(a) is a view of the island 301-1 as seen from the same direction as Fig. 4. Also, Fig. 7(b) is a cross-sectional view taken along line VIIB-VIIB of Fig. 7(a). In this case, the n-gate layer 86 and the p-gate layer 87 are covered. This form covers the n-gate layer 86 and the p-gate layer 87, which are likely to induce malfunction. In this way, the above-mentioned malfunction can be suppressed even if the entire inner surface of the opening δ is not covered.

[0078] 8(a) and 8(b) show a case where the emission surface protection film 351 covers the n-cathode layer 88 of the setting thyristor S. In FIG. Of these, Fig. 8(a) is a view of the island 301-1 as seen from the same direction as Fig. 4. Also, Fig. 8(b) is a cross-sectional view taken along line VIIIB-VIIIB of Fig. 8(a). This configuration is adopted when n-cathode layer 88 is likely to absorb light such as external light, and other layers are unlikely to absorb light such as external light. In other words, this is the case where emission surface protection film 351 covers n-cathode layer 88, which is likely to induce malfunction, and does not cover other layers, which are unlikely to induce malfunction. In this way, the above-mentioned malfunction can be suppressed even if the entire inner surface of opening δ is not covered.

[0079] 9(a) and (b) are diagrams showing a second example of another form of the exit surface protection film 351. In FIG. 9(a)-(b) show a case where the configuration of the emission surface protective film 351-1 is different from that of FIG. 3. In this embodiment as well, the inner surface of the opening δ is covered with the emission surface protective film 351-1. In this embodiment, the emission surface protective film 351-1 is formed by extending from the light-up signal line 74-1, which is a current supply wiring electrically connected to the setting thyristor S, to the inner surface of the opening δ. In other words, the emission surface protective film 351-1 provided on the inner surface of the opening δ is the light-up signal line 74-1 extended to the inner surface of the opening δ. It can also be said that the emission surface protective film 351-1 is formed integrally with the light-up signal line 74-1.

[0080] Furthermore, when the emission surface protective film 351-1 is made of metal, an insulating portion 352-1 and an interlayer film 353 are provided between the setting thyristor S and the emission surface protective film 351-1 as shown in the figure. This prevents electrical contact between the emission surface protective film 351-1 and the setting thyristor S. Furthermore, when an insulating material is used as the emission surface protection film 351 instead of a metal, the insulating portion 352 and the interlayer film 353 are not necessary.

[0081] 10(a) and 10(b) are diagrams showing a third example of another configuration of the emission surface protection film 351. In FIG. 10(a)-(b) show a case where the configuration of the emission surface protection film 351-1 is different from that of FIG. 3, as in the case of FIG. 9. In the present embodiment, the inner surface of the opening δ is covered with the emission surface protection film 351-1. In the present embodiment, the emission surface protection film 351-1 is formed without being electrically connected to the n-ohmic electrode 321-1, the p-ohmic electrode 331-1, and the light-up signal line 74-1. In the present embodiment, the interlayer film 353 is on the outside, and the emission surface protection film 351-1 is formed by extending from the interlayer film 353 to the inner surface of the opening δ. When the emission surface protection film 351-1 is made of metal, the interlayer film 353 is also made of the same metal. In other words, the emission surface protection film 351-1 provided on the inner surface of the opening δ is obtained by extending the interlayer film 353 to the inner surface of the opening δ. It can also be said that the emission surface protection film 351-1 is formed integrally with the interlayer film 353.

[0082] Furthermore, when the emission surface protective film 351-1 is made of metal, as shown in the figure, an insulating portion 352-1 is provided between the setting thyristor S, the n-ohmic electrode 321-1, and the light-up signal line 74-1, and the emission surface protective film 351-1. This can also be said to cover the setting thyristor S, the n-ohmic electrode 321-1, and the light-up signal line 74-1 via the insulating portion 352-1. This prevents electrical contact between the emission surface protective film 351-1 and the setting thyristor S, and also prevents electrical contact between the emission surface protective film 351-1 and the light-up signal line 74-1. Furthermore, when an insulating material is used as the emission surface protection film 351-1 instead of a metal, the insulating portion 352-1 is not necessary.

[0083] 11(a) and (b) are diagrams showing a fourth example of another configuration of the exit surface protection film 351. In FIG. 11(a)-(b), similarly to the cases of Figures 9 and 10, the configuration of the emission surface protection film 351 is different from that of Figure 3. In this embodiment, the island 301-1 has a p-anode layer 181, an n-gate layer 182, a light-emitting layer 183, a p-gate layer 184, and an n-cathode layer 185 provided in this order.

[0084] Here, island 301-1 has a thyristor structure consisting of p anode layer 181, n gate layer 182, p gate layer 184, and n cathode layer 185. It can also be said that island 301-1 has a layered structure including a thyristor and a light emitting layer 183 that is provided between the layers constituting the thyristor and emits light. In this embodiment as well, the inner surface of the opening 6 is covered with an emission surface protection film 351-1. The configuration of the electrodes and wiring on the upper side of the island 301-1 is the same as in FIG.

[0085] <Layer structure of drive thyristor DT and laser diode LD> Next, the laminated structure of the drive thyristor DT1j and the laser diode LD1j in the island 301-j (j=1 to 4) shown in Fig. 3(a) and (b) will be described. Here, the laminated structure of the drive thyristor DT1j and the laser diode LD1j will be described by taking the laminated structure of the drive thyristor DT11 and the laser diode LD11 as an example. In the laminated structure of the drive thyristor DT11 and the laser diode LD11, a reference potential Vsub is applied to the back electrode 92 of the substrate 80, and a lighting signal φI1 is supplied to the lighting signal line 74-1 connected to the n ohmic electrode 321-1 provided on the n cathode layer 88. Then, a gate voltage is applied to the p ohmic electrode 331-1, which is the gate Gd11 provided on the p gate layer 87 shown in Fig. 3(b). In the following, the drive thyristor DT11 will be referred to as the drive thyristor DT, the laser diode LD11 as the laser diode LD, the n-ohmic electrode 321-1 as the n-ohmic electrode 321, the light-up signal φI1 as the light-up signal φI, and the gate voltage applied to the gate Gd11 as the potential of the gate Gd.

[0086] The drive thyristor DT is stacked on the laser diode LD via a tunnel junction layer 84, and the drive thyristor DT and the laser diode LD are connected in series. First, the tunnel junction layer 84 will be described. Fig. 12 is a diagram further explaining the laminated structure of the laser diode LD and the drive thyristor DT. Fig. 12(a) is a schematic energy band diagram in the laminated structure of the laser diode LD and the drive thyristor DT, Fig. 12(b) is an energy band diagram in a reverse bias state of the tunnel junction layer 84, and Fig. 12(c) shows the current-voltage characteristics of the tunnel junction layer 84.

[0087] When a voltage is applied between the light-up signal φI applied to the n-ohmic electrode 321 shown in FIGS. 5(a) and 5(b) and the reference potential Vsub of the rear electrode 92 such that the laser diode LD and the drive thyristor DT are forward biased as shown in the energy band diagram of FIG. 12(a), the n-type ohmic electrode 321 constituting the tunnel junction layer 84 is turned on. ++ Layers 84a and p ++A reverse bias is applied between the layer 84b and the layer 84b.

[0088] The tunnel junction layer 84 is a n-type semiconductor layer having a high concentration of n-type impurities. ++ layer 84a and p-type impurity-heavily doped p ++ This is the junction with layer 84b. Therefore, the width of the depletion region is narrow, and when forward biased, ++ From the conduction band on the layer 84a side to p ++ Electrons tunnel into the valence band on the layer 84b side. At this time, negative resistance characteristics appear (see the forward bias side (+V) in FIG. 12(c)).

[0089] On the other hand, as shown in FIG. 12(b), when the tunnel junction layer 84 is reverse biased (−V), ++ The potential Ev of the valence band on the layer 84b side is n ++ The potential Ec of the conduction band on the layer 84a side is higher than that of the layer 84a side. ++ From the valence band of layer 84b, n ++ Electrons tunnel into the conduction band on the layer 84a side. The larger the reverse bias voltage (-V), the easier it is for electrons to tunnel. That is, as shown on the reverse bias side (-V) in FIG. 12(c), the larger the reverse bias is, the easier it is for a current to flow through the tunnel junction layer 84 (tunnel junction).

[0090] Therefore, as shown in FIG. 12(a), when the drive thyristor DT is turned on, a current flows between the laser diode LD and the drive thyristor DT even if the tunnel junction layer 84 is reverse biased.

[0091] Instead of the tunnel junction layer 84, a III-V compound layer having metallic conductivity and epitaxially grown on a III-V compound semiconductor layer may be used. InNAs, which will be described as an example of a material for the metallic conductive III-V compound layer, has a negative band gap energy when the composition ratio x of InN is in the range of about 0.1 to about 0.8. InNSb has a negative band gap energy when the composition ratio x of InN is in the range of about 0.2 to about 0.75. The negative band gap energy means that there is no band gap. Therefore, it exhibits conductive properties (conductive properties) similar to those of a metal. In other words, metallic conductive properties (conductive properties) mean that a current flows if there is a gradient in the potential, similar to that of a metal.

[0092] The lattice constant of III-V group compounds (semiconductors) such as GaAs and InP is in the range of 5.6 Å to 5.9 Å. This lattice constant is close to the lattice constant of Si, which is about 5.43 Å, and the lattice constant of Ge, which is about 5.66 Å. In contrast, the lattice constant of InN, which is also a III-V compound, is about 5.0 Å in the zinc blende structure, and the lattice constant of InAs is about 6.06 Å. Therefore, the lattice constant of InNAs, a compound of InN and InAs, can be close to the 5.6 Å to 5.9 Å of GaAs and other compounds. The lattice constant of InSb, a III-V compound, is about 6.48 Å. Since the lattice constant of InN is about 5.0 Å, the lattice constant of InNSb, a compound of InSb and InN, can be close to the lattice constant of GaAs, which is 5.6 Å to 5.9 Å.

[0093] That is, InNAs and InNSb can be monolithically epitaxially grown on a layer of a III-V compound (semiconductor) such as GaAs. Also, a layer of a III-V compound (semiconductor) such as GaAs can be monolithically laminated by epitaxial growth on a layer of InNAs or InNSb.

[0094] Therefore, by connecting the laser diode LD and the drive thyristor DT in series and stacking them via a metallic conductive III-V compound layer instead of the tunnel junction layer 84, it is possible to prevent the n cathode layer 83 of the laser diode LD and the p anode layer 85 of the drive thyristor DT from being reverse biased.

[0095] <Basic operation of the driving thyristor DT and the laser diode LD> Next, the basic operation of the drive thyristor DT and the laser diode LD will be described. Here, the laser diode LD has a turn-on voltage of 1.5 V. In other words, if a voltage of 1.5 V or more is applied between the anode and cathode of the laser diode LD, the laser diode LD lights up (emits light). In addition, in the structure in which the drive thyristor DT and the laser diode LD are connected in series, the main series resistance component is possessed by the p anode layer 81 in the laser diode LD and the current blocking region β that functions as a current confinement layer in the p anode layer 81. As a result, the anode and gate voltages of the drive thyristor DT in the on state become 0.8 V (holding voltage) higher than the voltage of the light-up signal φI. Here, the light-up signal φI takes on a negative potential (−3.5V here) having an absolute value greater than 0V, −3.1V, −2.5V, or −3.1V. In the light-up signal φI, 0V is a potential that turns the laser diode LD off, −3.1V is a potential that turns the laser diode LD from an off state to an on state, −2.5V is a potential that maintains the on state of the laser diode LD in the on state, and −3.5V is a potential that turns on (emits light) the laser diode LD in the on state with a predetermined amount of light.

[0096] When the laser diode LD is changed from the off state to the on state, the lighting signal φI is set to −3.1 V. At this time, when −1.5 V is applied to the gate Gd, the threshold value of the drive thyristor DT becomes −3 V, which is the potential of the gate Gd (−1.5 V) minus the forward potential Vd (1.5 V) of the pn junction. At this time, since the lighting signal φI is −3.1 V, the laser diode LD changes from the off state to the on state. In other words, the laser diode LD oscillates and lights up (emits light). Then, since the voltage (holding voltage) applied to the drive thyristor DT in the on state is 0.8 V, 2.3 V is applied to the laser diode LD.

[0097] Next, the light-up signal φI is shifted from −3.1 V to −2.5 V. Then, since the holding voltage of the drive thyristor DT in the on state is 0.8 V, 1.7 V is applied to the laser diode LD. Since 1.7 V is greater than or equal to 1.5 V, which is the rise voltage of the laser diode LD, the light continues to be turned on (emit light).

[0098] When the light-up signal φI is set to −3.5 V, the holding voltage of the drive thyristor DT in the on state is 0.8 V, so that 2.7 V is applied to the laser diode LD. In other words, the voltage applied to the laser diode LD becomes the highest, and the laser diode LD enters a state in which it emits the most light (a state in which it emits strong light).

[0099] Then, when the light-up signal φI is set to 0 V, 0 V is applied to the series connection of the drive thyristor DT and the laser diode LD, the drive thyristor DT transitions from the on state to the off state (turns off), and the laser diode LD goes out. The operation of the light emitting device 10 will be described in detail later.

[0100] When the drive thyristor DT transitions from the on state to the off state, a charge remains between the anode of the drive thyristor DT and the cathode of the laser diode LD. However, the voltage between the anode of the drive thyristor DT and the cathode of the laser diode LD is a voltage (-1.5V) that is lower than the reference potential Vsub (0V) by the rise voltage (1.5V) of the laser diode LD, and the anode and gate of the drive thyristor DT are electrically disconnected in the off state, so there is no effect on the switching voltage. This makes it easier for the drive thyristor DT to operate stably.

[0101] (Layer structure and manufacturing method of the light emitting section 100) Here, the layer structure and manufacturing method of the light emitting section 100 will be described with reference to FIG. First, a semiconductor laminate is formed by epitaxially growing a p-anode (DBR) layer 81, a light emitting layer 82, an n-cathode (DBR) layer 83, a tunnel junction layer 84, a p-anode layer 85, an n-gate layer 86, a p-gate layer 87, and an n-cathode layer 88 in this order on a p-type substrate 80 (layer formation step). Here, the substrate 80 is described using p-type GaAs as an example, but it may be n-type GaAs or intrinsic (i) type GaAs with no impurities added.

[0102] The DBR layer is, for example, Al 0.9 Ga 0.1 A low refractive index layer with high Al composition of As and, for example, Al 0.2 Ga 0.8 It is composed of a combination of a high refractive index layer with a low Al composition of As. The film thickness (optical path length) of each of the low refractive index layer and the high refractive index layer is set to, for example, 0.25 (1 / 4) of the central wavelength. The Al composition ratio of the low refractive index layer and the high refractive index layer may be changed in the range of 0 to 1.

[0103] The p-anode (DBR) layer 81 is formed by stacking a lower p-anode (DBR) layer 81a, a current confinement layer 81b, and an upper p-anode (DBR) layer 81c in this order. The lower p-anode (DBR) layer 81a and the upper p-anode (DBR) layer 81c have an impurity concentration of, for example, 1×10 18 / cm3 The current confinement layer 81b is, for example, AlAs or p-type AlGaAs with a high Al impurity concentration. 2 O 3 By forming the insulating layer, the electrical resistance is increased and the current path is narrowed.

[0104] The thickness (optical path length) of the current confinement layer 81b in the p anode (DBR) layer 81 is determined by the structure to be adopted. When emphasis is placed on extraction efficiency and process reproducibility, it is preferable to set it to an integer multiple of the thickness (optical path length) of the low refractive index layer and the high refractive index layer constituting the DBR layer, for example, 0.75 (3 / 4) of the central wavelength. In addition, in the case of an odd multiple, it is preferable that the current confinement layer 81b is sandwiched between a high refractive index layer and a high refractive index layer. In addition, in the case of an even multiple, it is preferable that the current confinement layer 81b is sandwiched between a high refractive index layer and a low refractive index layer. In other words, it is preferable that the current confinement layer 81b is provided to suppress the disturbance of the refractive index period caused by the DBR layer. On the other hand, when it is desired to reduce the influence (refractive index and distortion) of the oxidized portion, the thickness of the current confinement layer 81b is preferably several tens of nm, and it is preferable that it is inserted in the part of the node of the standing wave standing in the DBR layer.

[0105] The light emitting layer 82 has a quantum well structure in which well layers and barrier layers are alternately stacked. The well layers are, for example, GaAs, AlGaAs, InGaAs, GaAsP, AlGaInP, GaInAsP, GaInP, etc., and the barrier layers are, for example, AlGaAs, GaAs, GaInP, GaInAsP, etc. The light emitting layer 82 may be a quantum wire or a quantum dot.

[0106] The n-cathode (DBR) layer 83 has an impurity concentration of, for example, 1×10 18 / cm 3 It is.

[0107] The tunnel junction layer 84 is a n-type semiconductor layer having a high concentration of n-type impurities. ++ Layer 84a and p ++ layer 84b (see FIG. 12(a) described later).++ Layers 84a and p ++ The layer 84b has an impurity concentration of, for example, 1×10 20 / cm 3 The impurity concentration of a normal junction is 10 17 / cm 3 ~10 18 / cm 3 It is a unit. ++ Layers 84a and p ++ In combination with layer 84b (hereinafter, n ++ Layer 84a / p ++ Layer 84b is used.) is, for example, n ++ GaInP / p ++ GaAs, n ++ GaInP / p ++ AlGaAs, n ++ GaAs / p ++ GaAs, n ++ AlGaAs / p ++ AlGaAs, n ++ InGaAs / p ++ InGaAs, ++ GaInAsP / p ++ GaInAsP, n ++ GaAsSb / p ++ GaAsSb. The combinations may be interchangeable.

[0108] The p-anode layer 85 has an impurity concentration of, for example, 1×10 18 / cm 3 p-type Al 0.9 The Al composition may be changed within the range of 0 to 1. The n-gate layer 86 has an impurity concentration of, for example, 1×10 17 / cm 3 n-type Al 0.9 The Al composition may be changed within the range of 0 to 1. The p-gate layer 87 has an impurity concentration of, for example, 1×10 17 / cm 3 p-type Al 0.9 The Al composition may be changed within the range of 0 to 1. The n-type cathode layer 88 has an impurity concentration of, for example, 1×10 18 / cm3 n-type Al 0.9 The Al composition may be changed within the range of 0 to 1.

[0109] These semiconductor layers are stacked by, for example, metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or the like to form a semiconductor stack.

[0110] Next, the n-cathode layer 88, the p-gate layer 87, the n-gate layer 86, the p-anode layer 85, the tunnel junction layer 84, the n-cathode (DBR) layer 83, the light emitting layer 82, and the p-anode (DBR) layer 81 are sequentially etched to separate the laminated structures such as the laminated structures 301 and 302. At the same time, a hole 301a is formed in the laminated structure 301 (hole forming step). This etching may be performed by wet etching using a sulfuric acid-based etching solution (sulfuric acid:hydrogen peroxide:water=1:10:300 in weight ratio) or the like, or may be performed by anisotropic dry etching (RIE) using, for example, boron chloride. This etching for separating the laminated structures is sometimes called mesa etching or post etching.

[0111] Next, the n-cathode layer 88, the p-gate layer 87, the n-gate layer 86, the p-anode layer 85, and the tunnel junction layer 84 are etched in order to form an opening δ at the emission port γ (opening forming step).

[0112] Next, the current confinement layer 81b with its exposed side surface is oxidized from the side surface at the edge portion and the hole 301a of the laminated structure to form a current blocking region β (current confinement layer forming process). The oxidation of the current confinement layer 81b is performed, for example, by oxidizing Al of the current confinement layer 81b, which is AlAs, AlGaAs, or the like, by steam oxidation at 300 to 400°C. At this time, oxidation progresses from the exposed side surface, and the Al oxide Al 2 O 3 The non-oxidized portion of the current confinement layer 81b becomes the current passing portion α.

[0113] Next, the n cathode layer 88 is etched to expose the p gate layer 87 (gate layer exposing step). This etching may be performed by wet etching using a sulfuric acid-based etching solution (sulfuric acid:hydrogen peroxide:water=1:10:300 in weight ratio), or may be performed by anisotropic dry etching using, for example, boron chloride. Then, p ohmic electrodes (p ohmic electrodes 331, 332, etc.) are formed on the p gate layer 87. The p ohmic electrodes are made of, for example, Au containing Zn (AuZn) which is easy to make ohmic contact with p-type semiconductor layers such as the p gate layer 87. Then, the p ohmic electrodes (p ohmic electrodes 331, 332, etc.) are formed by, for example, a lift-off method.

[0114] Next, insulating portion 352 and emission surface protection film 351 are formed in opening 6. That is, n cathode layer 88, p gate layer 87, n gate layer 86, and p anode layer 85 having a thyristor configuration and the inner surface of opening 6 formed in the opening formation step are covered with emission surface protection film 351 that absorbs light (covering step). When a metal is used as the emission surface protective film 351, the emission surface protective film 351 can be formed by, for example, sputtering. Specifically, in a vacuum state, argon ions are collided with a target made of a metal that is to be the material of the emission surface protective film 351, and the metal atoms thus released are attached to the inner surface of the opening δ.

[0115] Next, n ohmic electrodes 321, 323, 324, etc. are formed on the n cathode layer 88 (electrode formation process). The n ohmic electrodes (n ohmic electrodes 321, 323, 324, etc.) are made of, for example, Au containing Ge (AuGe) which is easy to make ohmic contact with n-type semiconductor layers such as the n cathode layer 88. The n ohmic electrodes (n ohmic electrodes 321, 323, 324, etc.) are formed by, for example, a lift-off method.

[0116] Then, wiring (power supply line 71, transfer signal line 72, transfer signal line 73, setting signal line 75, etc.) that connects the ohmic electrodes (n ohmic electrodes 321, 323, 324, etc.) and the p ohmic electrodes (p ohmic electrodes 331, 332, etc.) and the back surface electrode 92 are formed (wiring formation process). The wiring and the back surface electrode 92 are made of Al, Au, etc.

[0117] In this manner, the light emitting section 100 is manufactured. The substrate 80 may be a semiconductor substrate made of InP, GaN, InAs, other III-V group, II-VI material, sapphire, Si, Ge, etc. When the substrate is changed, the material of the semiconductor laminate monolithically laminated on the substrate is a material that approximately matches the lattice constant of the substrate (including strained structure, strain relaxation layer, metamorphic growth). As an example, InAs, InAsSb, GaInAsSb, etc. are used on the InAs substrate, InP, InGaAsP, etc. are used on the InP substrate, GaN, AlGaN, InGaN are used on the GaN substrate or sapphire substrate, and Si, SiGe, GaP, etc. are used on the Si substrate. However, when the substrate is attached to another support substrate after the crystal growth, the semiconductor material does not need to be approximately lattice matched to the support substrate.

[0118] In the method for manufacturing the light emitting section 100, the order of the steps is not limited to that described above. 13(a)-(b) are a flow chart showing the order of steps in the method for manufacturing the light-emitting section 100. FIG. Of these, Fig. 13(a) is a flow chart showing the same process sequence as in the above case. That is, the steps are arranged in the order of a layer forming step (step 101), a hole forming step (step 102), an opening forming step (step 103), a current confinement layer forming step (step 104), a gate layer exposing step (step 105), a coating step (step 106), an electrode forming step (step 107), and a wiring forming step (step 108). In this case, the hole 301a and the opening δ are formed, and then the electrodes are formed. Therefore, the structures shown in Figs. 3, 4, 6 to 8, 9, and 11 can be realized.

[0119] On the other hand, in the flowchart of FIG. 13(b), the steps are arranged in the order of a layer forming step (step 201), an electrode forming step (step 202), a hole forming step (step 203), an opening forming step (step 204), a current confinement layer forming step (step 205), a gate layer exposing step (step 206), a coating step (step 207), and a wiring forming step (step 208). That is, the electrode forming step, which was step 107 in FIG. 13(a), is step 202 in FIG. 13(b), which is a more upstream step. That is, the electrode is formed in an earlier step, not in a later step. This results in a step order in which the electrode is formed first on the upper side of the semiconductor laminate, and then the hole 301a, etc. are formed. This is expected to form an electrode on the upper side of the semiconductor laminate, which has a smoother surface. On the other hand, in the step of FIG. 13(a), when the hole 301a, etc. are formed, the upper surface of the semiconductor laminate may become rough. Moreover, the upper side of the electrodes can be covered with an emission surface protection film 351, and the structure shown in FIG. 10 can be realized.

[0120] (Operation of the Light Emitting Device 10) Fig. 14 is a diagram showing an example of controlling the turning on / off of the laser diodes LD in the light emitting device 10. Here, a case where the laser diodes LD described in Figs. 1, 2, etc. are arranged in a 4 x 4 pattern will be described as an example. In Fig. 14, the laser diodes LD to be turned on (emit light) (to be turned on) are indicated by "◯", and the laser diodes LD to be turned off (exited) are indicated by "X". Here, it is assumed that the laser diodes LD11, LD12, LD14, LD21, LD23, LD31, LD32, LD41, LD43, and LD44 are turned on (emit light), and the laser diodes LD13, LD22, LD24, LD33, LD34, and LD42 are turned off (exited).

[0121] In other words, when one looks at light-emitting device 10, one sees a state (image) in which the "circle" parts in Fig. 14 are lit (emitting light). The state seen in Fig. 14 corresponds to the state seen when Figs. 1 and 2 are viewed as is.

[0122] (Timing chart) Fig. 15 is a timing chart for driving the light emitting device 10. The light emitting device 10 includes 4x4 laser diodes LD, and is controlled to the on / off states shown in Fig. 14. In Fig. 15, time passes in alphabetical order (a, b, c, ...). The timing chart shown in Fig. 15 includes setting periods U(1) to U(4) for determining whether the laser diodes LD are set to on or off, and a lighting maintenance period Uc for maintaining the on states of the laser diodes LD set to on in parallel.

[0123] From time a to time f is a setting period U(1) for the laser diodes LD11, LD21, LD31, and L41, from time f to time k is a setting period U(2) for the laser diodes LD12, LD22, LD32, and L42, from time k to time p is a setting period U(3) for the laser diodes LD13, LD23, LD33, and L43, and from time p to time u is a setting period U(4) for the laser diodes LD14, LD24, LD34, and L44. And from time u to time v is a lighting maintenance period Uc in which the laser diodes LD set to lighting are kept in a lighting state in parallel. Here, if the set period U(1) is an example of a first period, the set periods U(2) to U(4) are examples of a second period. Also, the light-on sustain period Uc is an example of a third period. In FIG. 15, the set period U(1) is shown as being longer than the light-on sustain period Uc, but it is preferable that the light-on sustain period Uc be set longer than the set period U(1). Compared to a case where the set period U(1), which is an example of the first period, is longer than the light-on sustain period Uc, which is an example of the third period, the difference in the amount of light emission depending on the light-emission order between the multiple laser diodes LD is reduced.

[0124] The timing chart of FIG. 15 will be described with reference to FIG. At time a, power is supplied to the control unit 110 shown in Fig. 1. Then, the reference potential Vsub is set to "H (0 V)", and the power supply potential Vgk is set to "L (-3.3 V)". Next, the waveforms of each signal (transfer signals φ1, φ2, setting signal φs, and lighting signals φI1, φI2, φ13, φI4) will be explained. Note that since the setting periods U(1), U(2), U(3), and U(4) are basically the same, the explanation will focus on the setting period U(1).

[0125] The transfer signal φ1 is a signal having a potential of "H (0V)" and "L (-3.3V)". The transfer signal φ1 is "H (0V)" at time a of the setting period U(1), and transitions to "L (-3.3V)" between time a and time b. Then, it returns to "H (0V)" at time c. From time c to time e, the period from time a to time c is repeated. Then, from time e to time f, the transfer signal φ1 maintains "H (0V)". The transfer signal φ1 repeats the setting period U(1) during the setting periods U(2) to U(4).

[0126] The transfer signal φ2 is a signal having a potential of "H (0V)" and "L (-3.3V)". The transfer signal φ2 is "H (0V)" at time a of the setting period U(1) and transitions to "L (-3.3V)" between time b and time c. Then, it returns to "H (0V)" at time d. From time d to time f, the period from time b to time d is repeated. The transfer signal φ2 repeats the setting period U(1) during the setting periods U(2) to U(4).

[0127] The setting signal φs is a signal having a potential between "H (0V)" and "L (-3.3V)". When the laser diode LD shown in FIG. 14 is set to be turned on, the setting signal φs shifts from "H (0V)" to "L (-3.3V)". That is, the setting period U(1) is a period during which all of the laser diodes LD11, LD21, LD31, and LD41 are set to be turned on. Therefore, the setting signal φs is "H (0V)" at time a, and shifts to "L (-3.3V)" at time b to set the laser diode LD11 to be turned on. Then, the setting signal φs returns to "H (0V)" between time b and time c. Next, the setting signal φs shifts to "L (-3.3V)" at time c to set the laser diode LD21 to be turned on. Then, the setting signal φs returns to "H (0V)" between time b and time c. Similarly, the setting signal φs goes to "L (-3.3 V)" at time d to set the laser diode LD31 to on. Then, the setting signal φs returns to "H (0 V)" between time d and time e. Furthermore, the setting signal φs goes to "L (-3.3 V)" at time e to set the laser diode LD41 to on. Then, the setting signal φs returns to "H (0 V)" between time e and time f.

[0128] It should be noted that the setting signal φs does not transition from "H (0V)" to "L (-3.3V)" when the laser diode LD is set to be turned off. For example, in the setting period U(2), the laser diodes LD12 and LD32 are set to be turned on, and the laser diodes LD22 and LD42 are set to be turned off. Thus, at times g and i, the setting signal φs transitions to "L (-3.3V)", but does not transition to "L (-3.3V)" at times h and j, and remains at "H (0V)". The same applies to the other set periods U(3) and U(4). That is, in the set periods U(1) to U(4), the laser diodes LD to be turned on are turned on (emit light) in sequence. Then, at the time u when the sequential turning on is completed, the laser diodes LD to be turned on are turned on (emit light) in parallel.

[0129] As described above, the light-up signals φI1, φI2, φI3, and φI4 are signals having four potentials: "H (0V)", "L1 (-3.1V)", "L2 (-2.5V)", and "L3 (-3.5V)". First, the lighting signal φI1 will be described. The lighting signal φI1 is "H (0V)" at time a of the setting period U(1), and transitions to "L1 (-3.1V)" between time a and time b. Then, at time f when the setting period U(1) ends and the setting period U(2) starts, it transitions to "L2 (-2.5V)". Then, at time u when the setting period U(4) ends and the lighting maintenance period Uc starts, it transitions to "L3 (-3.5V)". Then, at time v when the lighting maintenance period Uc ends, it returns to "H (0V)".

[0130] The light-on signal φI2 is "H (0V)" during the setting period U(1), and transitions to "L1 (-3.1V)" between time f and time g of the setting period U(2). Then, at time k when the setting period U(2) ends and the setting period U(3) starts, it transitions to "L2 (-2.5V)". Then, at time u when the setting period U(4) ends and the light-on sustain period Uc starts, it transitions to "L3 (-3.5V)". Then, at time v when the light-on sustain period Uc ends, it returns to "H (0V)".

[0131] The lighting signal φI3 is "H (0V)" during the setting periods U(1) and U(2), and transitions to "L1 (-3.1V)" between time k and time l of the setting period U(3). Then, at time p when the setting period U(3) ends and the setting period U(4) starts, it transitions to "L2 (-2.5V)". Then, at time u when the setting period U(4) ends and the lighting maintenance period Uc starts, it transitions to "L3 (-3.5V)". Then, at time v when the lighting maintenance period Uc ends, it returns to "H (0V)".

[0132] The lighting signal φI4 is "H (0V)" during the setting periods U(1), U(2), and U(3), and transitions to "L1 (-3.1V)" between time p and time q of the setting period U(4). Then, at time u when the setting period U(4) ends and the lighting maintenance period Uc begins, it transitions to "L3 (-3.5V)". Then, at time v when the lighting maintenance period Uc ends, it returns to "H (0V)". In other words, the lighting signal φI4 does not have a period of "L2 (-2.5V)".

[0133] As described above, the light-up signals φI1 to φI4 have waveforms that are shifted by the set period U.

[0134] The thickness of the lines indicates the amount of light emitted when the laser diodes LD11, LD21, LD31, LD41, LD12, LD22, LD32, LD42, LD13, LD23, LD33, LD43, LD14, LD24, LD34, and LD44 are lit. Where no lines are drawn, this indicates that the laser diodes are not lit, i.e., not lit.

[0135] As described above, the light emitting device 10 operates based on the timing chart shown in Fig. 15. To turn off the lit laser diode LD, all the lighting signals φI should be set to "H (0V)" at time v. In other words, by repeating the process from time a to time v, the on / off state of the laser diode LD is controlled in chronological order. In the above, "L1 (-3.1V)" and "L3 (-3.5V)" are expressed as different potentials, but "L1" and "L3" may be the same potential.

[0136] Furthermore, in order to stabilize the operation of the light-emitting unit 100, a connection may be made between the gate Gs and the power supply potential Vgk, and between the gate Gd (wiring 76) and the power supply potential Vgk, via a resistor.

[0137] The coupling diode D may be formed of a transistor. Diodes may be connected in series to the anode sides of the setting thyristor S and the transfer thyristor T. In accordance with these changes, diodes and resistors may be added to the light-emitting unit 100 to adjust the respective drive voltages and stabilize the operation. A resistance component may be provided between the p-gate layer 87 of the drive thyristor DT and the wiring 76 to make it difficult for the voltage of the gate Gd of the drive thyristor DT in the ON state to affect the gate Gd of other drive thyristors DT in the ON state that share the wiring 76.

[0138] The multiple pads (φ1 terminal, φ2 terminal, Vgk terminal, φs terminal, and φIj terminal) may be provided approximately parallel to the arrangement of the transfer thyristors T on the substrate 80 of the light emitting device 10. In this way, current and / or voltage can be supplied uniformly depending on the arrangement of the multiple laser diodes LD.

[0139] Moreover, by providing a thick insulating film such as BCB (benzocyclobutene) on the transfer element unit 105 (see FIG. 1) and providing multiple terminals (φ1 terminal, φ2 terminal, Vgk terminal, φs terminal, φIj terminal) thereon, the size and cost can be reduced. Also, light from the transfer thyristor T and the setting thyristor S is blocked.

[0140] In addition, in this embodiment, the number of the transfer thyristors T and the setting thyristors S is described as the same as i, but in order to speed up the driving, a plurality of setting thyristors S may be connected to the transfer thyristor T, or a plurality of setting signal lines 75 may be provided. Also, a plurality of light emitting units 100 may be arranged on the same substrate or on a plurality of divided substrates and driven in parallel. In this way, the driving speed can be increased.

[0141] In the light-emitting section 100 and the light-emitting device 10 described above in detail, the inner surface of the opening 6 is provided with an emission surface protective film 351. This makes it possible to provide the light-emitting section 100 and the light-emitting device 10 that are less likely to malfunction even when some light, such as external light, enters the opening 6.

[0142] [Optical measurement device 1] The light emitting device 10 described above can be used for optical measurement. FIG. 16 is a diagram illustrating an optical measurement device 1 using a light emitting device 10. As shown in FIG. The optical measurement device 1 includes the above-mentioned light emitting device 10, a light receiving unit 20 that receives light, and a processing unit 30 that processes data. A measurement target (object) 40 is placed facing the optical measurement device 1. In Fig. 16, the measurement target 40 is a person as an example. Fig. 16 is a view seen from above.

[0143] As described above, the light emitting device 10 lights up the two-dimensionally arranged laser diodes LD, and emits light that spreads in a cone shape centered on the light emitting device 10 as shown by the solid line. At this time, the multiple light-up signals φIj may be simultaneously set to "L1 (-3.1 V)" or "L3 (-3.5 V)" during the setting period U(1) or the light-up sustain period Uc from the beginning.

[0144] The light receiving unit 20 is a device that receives light reflected by the measurement object 40. The light receiving unit 20 receives light directed toward the light receiving unit 20 as indicated by the dashed line. The light receiving unit 20 is preferably an imaging device that receives light from two-dimensional directions.

[0145] The processing unit 30 is configured as a computer equipped with an input / output unit for inputting and outputting data. The processing unit 30 processes information related to the light and calculates the distance to the measurement object 40 and the three-dimensional shape of the measurement object 40. The processing unit 30 of the optical measurement device 1 controls the light emitting device 10 to emit light from the light emitting device 10 for a short period of time. That is, the light emitting device 10 emits light in a pulsed form. Then, the processing unit 30 calculates the optical path length from the emission from the light emitting device 10 to the reflection from the measurement object 40 and the arrival at the light receiving unit 20 from the time difference between the timing (time) when the light emitting device 10 emits light and the timing (time) when the light receiving unit 20 receives the reflected light from the measurement object 40. The positions of the light emitting device 10 and the light receiving unit 20 and the interval between them are predetermined. Therefore, the processing unit 30 measures (calculates) the distance from the light emitting device 10 and the light receiving unit 20 or the distance from a reference point (reference point) to the measurement object 40. The reference point is a point (point) provided at a predetermined position from the light emitting device 10 and the light receiving unit 20.

[0146] This method is based on the arrival time of light and is called the time-of-flight (TOF) method. If this method is performed for a plurality of points on the measurement object 40, the three-dimensional shape of the measurement object 40 is measured. As described above, the emitted light from the light emitting device 10 spreads two-dimensionally and is irradiated onto the measurement object 40. Then, the reflected light from the portion of the measurement object 40 that is close to the light emitting device 10 is incident on the light receiving unit 20 first. When the imaging device for acquiring the above-mentioned two-dimensional image is used, a bright spot is recorded in the frame image at the portion where the reflected light reaches. From the bright spots recorded in a series of a plurality of frame images, the optical path length is calculated for each bright spot. Then, the distance from the light emitting device 10 and the light receiving unit 20 or the distance from a reference point (reference point) is calculated. That is, the three-dimensional shape of the measurement object 40 is calculated.

[0147] As another method, the light emitting device 10 of the present embodiment may be used for a light measurement method using a structured light method. The device used is almost the same as the light measurement device 1 using the light emitting device 10 shown in FIG. 16. The difference is that the light pattern irradiated to the measurement object 40 is a countless number of light dots (random pattern), which are received by the light receiving unit 20. The processing unit 30 processes information about the light. Here, the processing method does not involve calculating the time difference as described above, but rather calculates the positional deviation amount of the countless light dots to calculate the distance to the measurement object 40 and the three-dimensional shape of the measurement object 40. Conventionally, a randomly arranged two-dimensional VCSEL array or the like is used as the light source used in this method, but the random pattern to be irradiated is about 1 to 4 patterns that are predetermined (structured fix method). On the other hand, the light emitting device 10 of the present embodiment can irradiate light in more random patterns because the light dots to be irradiated can be freely set by an external signal.

[0148] The optical measurement device 1 as described above can be applied to calculating the distance to an article. It can also be applied to identifying an article by calculating the shape of the article. It can also be applied to identifying a person's face (face recognition) by calculating the shape of the face. Furthermore, by loading it into a vehicle, it can be applied to detecting obstacles in front, behind, or to the sides. In this way, the optical measurement device 1 can be widely used to calculate distance, shape, and the like.

[0149] [Image forming device 2] The light emitting device 10 described above can be used for image formation. FIG. 17 is a diagram illustrating an image forming apparatus 2 using the light emitting device 10. As shown in FIG. The image forming apparatus 2 includes the above-mentioned light emitting device 10, a drive control unit 50, and a screen 60 that receives light.

[0150] The operation of the image forming apparatus 2 will now be described. As described above, the light emitting device 10 sets the two-dimensionally arranged laser diodes LD to be turned on / off. Then, during the light-on sustain period Uc, the laser diodes LD are turned on in parallel. That is, a two-dimensional still image (two-dimensional image) is obtained. Therefore, an image signal is input, and the light-on sustain period Uc is sequentially rewritten by the drive control unit 50 that drives the light emitting device 10 based on the image signal so as to form a two-dimensional image, thereby obtaining a two-dimensional moving image. These two-dimensional still images and moving images are projected onto the screen 60.

[0151] In the above, the laser diode LD is described as going from non-lighting to lighting (emitting light), but the emission intensity in the light-emitting state may be increased. [Explanation of symbols]

[0152] 1...optical measurement device, 2...image forming device, 10...light emitting device, 20...light receiving unit, 30...processing unit, 40...measurement object, 50...drive control unit, 60...screen, 71...power line, 72, 73...transfer signal line, 74...lighting signal line, 75...setting signal line, 80...substrate, 81...p anode layer, 82...light emitting layer, 83...n cathode layer, 84...tunnel junction layer, 85...p anode layer, 86...n gate layer, 87...p gate layer, 88...n cathode layer, 100...light emitting unit, 110...control unit, 120...transfer signal generating unit, 130...setting signal generating unit, 140...lighting signal generating unit, 160...reference potential generating unit, 1 70...power supply potential generating section, 301 to 307...island, 321...n ohmic electrode, 331...p ohmic electrode, 351...emission surface protective film, 352...insulating section, 353...interlayer film, α...current passing region, β...current blocking region, γ...emission port, δ...opening, φ1, φ2...transfer signal, φI...lighting signal, D...coupling diode, DT...driving thyristor, Da, Db...connecting diode, LD...laser diode, R1, R2...current limiting resistor, Rg...resistor, S...setting thyristor, SD...start diode, T...transfer thyristor, U...setting period, Uc...lighting sustain period, Vgk...power supply potential

Claims

1. A substrate; A light emitting element provided on the substrate, the light emitting element emitting light in a direction intersecting with a surface of the substrate; Equipped with The light-emitting element is a light-emitting component having a light-emitting portion that emits light, a thyristor provided on the light-emitting portion, and an opening formed in the thyristor through which light from the light-emitting portion is emitted from an emission portion that hits the bottom surface of the thyristor, the inner surface of the opening being covered with a light shield that suppresses the transmission of light.

2. 2. The light emitting component according to claim 1, wherein the light blocking body is made of a metal and includes an insulating portion between the thyristor and the light blocking body.

3. The light emitting component according to claim 2 , wherein the metal extends from an electrode electrically connected to the thyristor to an inner surface of the opening.

4. 3. The light emitting component according to claim 2, wherein the metal extends from a current supply wiring electrically connected to the thyristor to an inner surface of the opening.

5. The light emitting component according to claim 1 , wherein the light blocking body is made of an insulating material.

6. The light-emitting element further includes an electrode, The light emitting component according to claim 1 , wherein the light shield further covers the electrode.

7. The light emitting component according to claim 1 , wherein the light shield is made of metal and covers the electrodes via an insulating portion.

8. 2. The light emitting component according to claim 1, wherein the light blocking body is a light absorbing body that absorbs light.

9. 9. The light emitting component according to claim 8, wherein at least one of the layers constituting the thyristor absorbs light having a longer wavelength than the emitted light.

10. The light emitting component according to claim 1 , wherein the light blocking body covers a part of the inner surface of the opening.

11. The light emitting component according to claim 1 , wherein the light blocking body is a light reflector that reflects light.

12. A light emitting component according to any one of claims 1 to 11; a light receiving unit that receives reflected light from an object onto which light is irradiated from the light emitting component; a processing unit that processes information about the light received by the light receiving unit to measure a distance from the light emitting component to an object or a shape of the object; An optical measurement device comprising:

13. A light emitting component according to any one of claims 1 to 11; a drive control unit that receives an input of an image signal and drives the light emitting components based on the image signal so that a two-dimensional image is formed by the light emitted from the light emitting components; An image forming apparatus comprising:

14. a layer forming step of forming a light emitting portion that emits light and a thyristor provided on the light emitting portion on a substrate; an opening forming step of forming an opening in the thyristor formed by the layer forming step, through which light from the light emitting portion is emitted from an emission portion that hits a bottom surface of the thyristor in a direction intersecting with a surface of the substrate; a covering step of covering the thyristor and an inner surface of the opening formed in the opening forming step with a light blocking material that suppresses transmission of light; A method for manufacturing a light emitting component comprising the steps of:

15. 15. The method for manufacturing a light emitting component according to claim 14, wherein the light blocking body is made of a metal, and is formed in the covering step so as to extend from the inner surface of the opening onto the thyristor as an electrode.

16. 15. The method for manufacturing a light-emitting component according to claim 14, wherein the light blocking body is made of a metal and is formed in the covering step so as to extend from an inner surface of the opening onto the thyristor as a current supply line electrically connected to the thyristor.

17. a layer forming step of forming a light emitting portion that emits light and a thyristor provided on the light emitting portion on a substrate; an electrode forming step of forming an electrode on the thyristor formed by the layer forming step; an opening forming step of forming an opening through which light from the light emitting portion is emitted from an emission portion that hits a bottom surface of the opening in a direction intersecting with a surface of the substrate after the electrode forming step; a covering step of covering the thyristor and an inner surface of the opening formed in the opening forming step with a light blocking material that suppresses transmission of light; A method for manufacturing a light emitting component comprising the steps of:

18. The method for manufacturing a light emitting component according to claim 17 , wherein the light shield is made of a metal and is formed in the covering step so as to cover the electrode via the electrode and an insulating portion.

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