Testing Systems

Abstract

An example test system includes an equipment interface board (DIB) having one or more signal transmission paths and interfaces for connecting to one or more other components of the test system. Test circuitry is configured to inject test signals into the one or more signal transmission paths and to measure transmitted versions of the test signals at the interfaces to obtain measurement signals. One or more processing units are configured to generate calibration coefficients based on differences between the injected test signals and the measurement signals and to store the calibration coefficients in computer memory. The calibration coefficients compensate for the effects of the one or more signal transmission paths on the test signals.

Description

[Technical field]

[0001] The present specification generally relates to an example process for calibrating an interface board in a test system. [Background technology]

[0002] Automatic test equipment (ATE) includes electronics for sending signals to and receiving signals from a device under test (DUT) to test the operation of the DUT. ATE includes test instruments, such as radio frequency (RF) or microwave instruments, that are calibrated for operation. Test instruments may be calibrated for power, noise, impedance, or other parameters at specific connectors at the input or output of the instrument. This location is called the calibration surface, and is the location where the performance of the test instrument is specified or known. Summary of the Invention [Means for solving the problem]

[0003] An example test system includes a device interface board (DIB) having one or more signal transmission paths and an interface for connecting to one or more other components of the test system. Test circuitry is configured to inject a test signal into the one or more signal transmission paths and to measure a transmitted version of the test signal at the interface to obtain a measurement signal. One or more processing devices are configured to generate calibration coefficients based on a difference between the injected test signal and the measurement signal and to store the calibration coefficients in a computer memory. The calibration coefficients are for compensating for the effects of the one or more signal transmission paths on the test signal. The test system may include one or more of the following features, alone or in combination.

[0004] The test signal may be swept across a frequency range. The one or more processors may be programmed to generate a user interface (UI) for display on a computer display device. The UI may be for enabling programming of test system parameters, including setting a frequency range. Different ones of the test signals having different frequencies may have different power levels. The calibration factor may compensate for signal loss on one or more signal transmission paths on the DIB.

[0005] The test system may include probes for selectively contacting signal contacts on the DIB to inject test signals into one or more signal transmission paths. The computer memory may be on the DIB. The test system may include circuitry for connecting to an interface of the DIB to obtain measurement signals.

[0006] A transmission line of the one or more transmission lines may include at least one of a passive electronic device or an active electronic device. The test circuitry may be part of a radio frequency (RF) test instrument, and the one or more signal transmission lines may be configured to transmit an RF signal. The test signal may have a frequency greater than 2 gigahertz (GHz). The test signal may have a frequency in the millimeter (MM) wave region. The test signal may have a frequency greater than 6 gigahertz (GHz). The test signal may have a frequency greater than 18 gigahertz (GHz).

[0007] The calibration factor can correct for changes in power of the test signal caused by transmission along the one or more signal transmission paths. The calibration factor can correct for changes in frequency of the test signal caused by transmission along the one or more signal transmission paths. The calibration factor can correct for at least one of changes in power, linearity, or gain of the test signal caused by transmission along the one or more signal transmission paths. The calibration factor can correct for an effect on the test signal of a length of a signal transmission line of the one or more signal transmission paths. The calibration factor can correct for an effect on the test signal of lossiness or insertion loss of a signal transmission line of the one or more signal transmission paths. The calibration factor can correct for an effect on the test signal of an impedance of a signal transmission line of the one or more signal transmission paths.

[0008] The DIB may be one of a plurality of DIBs configured for use with the test system. The computer memory may be on the DIB and the calibration coefficients may be specific to the DIB. The computer memory may be on the DIB and the calibration coefficients in the computer memory may be accessible by the computing system using an application programming interface (API).

[0009] The test circuitry can be configured to output a test signal to a device under test (DUT) attached to the DIB. The DUT can be for generating an output signal in response to the test signal. The one or more processing devices can be programmed to correct the output signal based on at least one of the calibration coefficients.

[0010] Any two or more of the features described herein, including in this Summary section, may be combined to form implementations not specifically described herein.

[0011] The systems and techniques described herein, or portions thereof, may be implemented using or controlled by a computer program product stored on one or more non-transitory machine-readable storage media and including instructions executable on one or more processing devices to control (e.g., coordinate) the operations described herein. The systems and techniques described herein, or portions thereof, may be implemented as an apparatus, method, or electronic system, which may include one or more processing devices and a memory for storing executable instructions for implementing various operations.

[0012] The details of one or more implementations are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will be apparent from the description and drawings, and from the claims. [Brief description of the drawings]

[0013] [Figure 1] FIG. 1 is a side block diagram of components of an example test system that may be used to generate calibration coefficients for an interface board. [Diagram 2] FIG. 2 is a top view block diagram of components of an example test system that may be used to generate calibration coefficients for an interface board. [Diagram 3] 4 is a flow diagram illustrating the operations involved in an example process for generating calibration coefficients for an interface board and for using those calibration coefficients to correct a signal. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] Like reference numbers in different drawings indicate like elements.

[0015] An example of a test system, such as an automatic test equipment (ATE), includes a test instrument configured to output test signals to a device under test (DUT) and receive signals from the DUT. The received signals can be responsive to the test signals or can be independent of the test signals. Circuitry within the test instrument, such as a radio frequency (RF) receiver capable of measuring power, processes the received signals to determine, for example, whether the signals are within tolerance and therefore whether the DUT has passed the test. A device interface board (DIB), also referred to as a "load board," provides the mechanical and electrical connection between the DUT and the test instrument. For example, the DIB may include signal contacts, such as ball grid array (BGA) pads, to which the DUT connects. To pass signals between the test instrument and the DUT, electrical conduits, such as conductive traces or radio frequency (RF) cables, extend between those signal contacts and the test instrument. In some implementations, there may be one or more interposers or other interface boards that are part of the mechanical and electrical connection between the DUT and the test instrument and complete such connection.

[0016] In some examples, the ATE is calibrated up to the DIB. For example, the DIB may be a point at which the performance of the test instrument is specified or known. This location is called the calibration front of the test instrument. Beyond this calibration front, e.g., from the calibration front to the signal contacts, the performance of the test system may not be specified or known. Thus, described herein are example techniques for calibrating an interface board, such as a DIB, in a test system. In some implementations, the calibration relative to the calibration front is known, and the techniques described herein calibrate the remaining portion of the path between the calibration front and the signal contacts on the DIB, so that the entire signal path between the test instrument and the signal contacts on the DIB can be calibrated.

[0017] An example of a test system as described in the previous paragraph includes a DIB having one or more signal transmission paths and an interface for connecting to one or more components of a test system. Test circuitry is configured, e.g., constructed, arranged, programmed, or controlled, to inject test signals into the one or more signal transmission paths and to measure transmitted versions of the test signals at the interface to obtain a measurement signal. One or more processing devices are configured, e.g., programmed, to generate calibration coefficients based on differences between the injected test signals and the measurement signals, and to store the calibration coefficients in a computer memory on the DIB. The calibration coefficients compensate for the effects of the one or more signal transmission paths on the test signal. For example, the calibration coefficients can compensate for the length of the signal transmission paths, the lossiness or insertion loss of the signal transmission paths, or the impedance of the signal transmission. The calibration coefficients can be specific to the DIB and may be accessed when the DIB is connected to different test systems, thereby allowing point-to-point calibration of the DUT.

[0018] 1 illustrates components of an example of an ATE 10 that can be used to implement the techniques described herein. In FIG. 1, dashed lines conceptually represent potential signal paths between components of the system.

[0019] ATE 10 includes a test head 12 and a control system 13. The control system may include a computing system comprised of one or more microprocessors or other suitable processing devices as described herein. An equipment interface board (DIB) 15 includes a printed circuit board (PCB) that connects to test head 12 and includes mechanical and electrical interfaces to one or more DUTs (not shown) that are or will be tested by the ATE. Power, including voltages, may be conveyed by one or more conduits in the DIB to the DUTs connected to the DIB.

[0020] 1, the DIB 15 electrically and mechanically connects to the test head 12. The DIB includes sites 19, which may include pins, BGA pads, or other points of electrical and mechanical connection to which a DUT may be connected. Test signals and response signals, such as RF signals and other signals, pass between the DUT and the test instruments through test channels on the sites. The DIB 15 may also include connectors, conductive traces, and circuitry for routing signals between the test instruments, the DUTs connected to the sites 19, and other circuitry, among other things. The DIB 15 also includes computer memory 23 for storing calibration coefficients for the DIB described herein.

[0021] The control system 13 communicates with components contained within the test head to control the tests. For example, the control system 13 can download a test program set to the test instruments 16A to 16N in the test head. The test instruments include hardware devices and may include one or more processors and other circuitry. The test instruments 16A to 16N can execute the test program set to test the DUTs that communicate with the test instruments. The control system 13 can also send to the test instruments in the test head instructions, test data, and / or other information usable by the test instruments to perform appropriate tests on the DUTs interfaced to the DIB. In some implementations, this information can be sent by a computer or other type of network or by direct electrical paths. In some implementations, this information can be sent by a local area network (LAN) or a wide area network (WAN).

[0022] In one example, a test program generates a test flow for application to the DUT. The test flow is written to output test signals, for example, to elicit a response from the DUT. As previously mentioned, the test signals and responses from the DUT may include RF signals.

[0023] In the example of FIG. 1, the ATE 10 includes multiple test instruments 16A-16N, each of which may be configured to perform one or more tests and / or other functions as desired. Although only four test instruments are shown, the system may include any suitable number of test instruments, including those external to the test head 12. In some implementations, each test instrument may be configured to output analog, digital, or RF signals for testing the DUT based on data provided by, for example, a control system, and to receive analog, digital, or RF response signals from the DUT. Different test instruments may be configured to perform different types of tests and / or test different DUTs. For example, the test instruments may include an RF test instrument 16B for transmitting RF test signals to the DUT and receiving RF response signals from the DUT. The received signals may include RF response signals based on the test signals and / or signals resulting from the DUT not prompted by (e.g., not responding to) the test signals. In some implementations, there may be electrical conductors, such as coaxial wires, between the DUT, the DIB, and the test instrument interface over which the test signals and response signals are transmitted.

[0024] Test signals, including RF signals, may be transmitted to and received from the DUT over multiple test channels or other conductive media. In some examples, a test channel may include a physical transmission medium over which signals are transmitted from the test instrument to the DUT and over which signals are received from the DUT. A physical transmission medium may include, but is not limited to, electrical conductors alone or in combination with wireless transmission media. In some examples, a test channel may include a frequency range over which signals are transmitted over one or more physical transmission media. A test channel may include conductive traces on a DIB and / or may be electrically connected to conductive traces. A test channel may also include hardware on a test instrument for receiving and digitizing signals.

[0025] In some examples, the ATE 10 includes a connection interface 18 that connects a test channel 21 of a test instrument to the DIB 15. The connection interface 18 may include connectors 20 or other devices for routing signals between the test instrument and the DIB 15. For example, the connection interface may include one or more circuit boards or other substrates on which such connectors are mounted. Conductors contained within the test channels may be routed through the connection interface and the DIB. In this example, the connection interface 18 is a calibration surface. That is, the connection interface 18, which may be part of the DIB 15 or external to the DIB 15, is a point at which the performance of the ATE 10 is specified or known. For example, the connection interface 18 is a point at which the performance of one or more of the or each test instrument 16 is specified or known.

[0026] A probe 22, such as a microwave probe, can be connected to each signal contact 19 on the DIB 15 to inject a signal at or receive a signal from each signal contact 19 on the DIB 15. In some implementations, the probe is part of the ATE 10. In some implementations, the probe can be connected to a separate tester that controls the operation of the probe.

[0027] In some implementations, the system includes an RF probe, which has the flexibility to measure various DUT pitches and DUT landing patterns, and can select an RF path control object using operational instructions to obtain accurate probe placement for each conductive path on the DIB.

[0028] FIG. 2 is a block diagram showing another implementation of an ATE that focuses on the calibration of the DIB. In FIG. 2, the DIB 25 can have the same structure and function as the DIB 15 of FIG. 1, the test head 27 can have the same structure and function as the test head 12 of FIG. 1, the test instrument 28 can have the same structure and function as the test instrument 16 of FIG. 1, and the probe head 29 can have the same structure and function as the probe head 22 of FIG. 1. FIG. 2 includes a connection interface 30 that can have the same structure and function as the connection interface 18 of FIG. 1 and can be part of the DIB or can be external to the DIB, and a NOR flash memory 31 or any programmable solid-state semiconductor storage area that can correspond to the computer memory 23 of FIG. 1. The signal contacts 32, such as a BGA, can have the same structure and function as the signal contacts 19 of FIG. 1. FIG. 2 also shows a probe positioner 34 that can be configured and controlled by the test instrument 28 to selectively contact the signal contacts, including the signal contacts 32 on the DIB 25, to inject test signals into one or more signal transmission paths 37 on the DIB. As previously mentioned, the transmission paths of the DIB may include conductive traces and may also include active electronic devices such as relays and passive electronic devices such as resistors and capacitors. Of the signal contacts, an add-on cable 38 may send control signals to a probe positioner to control movement of the probe head. The control signals sent on the add-on cable may also control which test signals are injected into which signal contacts to calibrate the DIB 25 as described herein. Figure 2 also shows a connector 40 connecting the test instrument 28 and the DIB 25 via transmission paths 41, and further connecting the add-on cable 38 to the test instrument 28.

[0029] In the example of FIG. 2, the performance and thus the calibration of the test meter is known for region 45 and unknown or known for region 44. In one example, the calibration is known from the test meter 28 to the connection interface 30 (the calibration front) and also for the probe head 29. An example process described herein determines calibration coefficients for the DIB (e.g., along its conductive traces). For example, the DIB may affect the level or other characteristics of the signal passing through the DIB. The process described herein determines values ​​(calibration coefficients) that, when combined with the output signal level, result in the expected signal level or characteristics. These calibration coefficients are stored in computer memory on the DIB. Thus, when the DIB is moved to a new test system, the calibration coefficients remain on the DIB and accessible to the new test system. The calibration coefficients may be applied to the signal passing through the DIB, for example, by a control system. As a result, the accuracy of the signal passing through the DIB may be preserved without having to recalibrate the DIB each time the DIB is reused. The calibration coefficients in computer memory may be accessible by a computing system, such as the test meter or a control system, using an application programming interface (API).

[0030] In some implementations, the calibration surface may be different than that described in the previous paragraph. For example, the calibration surface may be at connector 40, at any suitable point along transmission line 41, or at any suitable location on the DIB. The process described herein may be used to determine calibration coefficients for calibrating signals from the calibration surface to the DUT signal contacts of any test system.

[0031] FIG. 3 illustrates an example process 50 for generating calibration coefficients for an interface board, such as the example DIB described herein. According to process 50, a probe head is moved (51) into contact with signal contacts on the DIB. For example, the probe head may be selectively connected to the signal contacts on the DIB. The probe head is controlled to inject (52) one or more test signals into the signal contacts and thus through one or more signal transmission lines on the DIB. In this regard, signals may be injected into each signal contact and corresponding transmission line by moving the probe head into contact with successive signal contacts. A calibration coefficient may be generated for each signal contact on the DIB and stored in computer memory 23 / NOR flash memory 31 in association with an identifier for that signal contact. The calibration coefficient may be used to calibrate signals through those signal contacts.

[0032] 2, the probe head 29 injects a test signal into signal contacts 32. In some examples, the probe head may be controlled directly by a test instrument, directly by a control system, or by a control system via a test instrument. For example, the control system may control the probe head by instructing the test instrument to inject a test signal having characteristics specified by the control system into signal contacts 32. In some implementations, a radio frequency (RF) test instrument includes circuitry that is configured, e.g., constructed, arranged, and / or programmed, to control, regulate, or initiate the injection of the test signal.

[0033] In some implementations, the control system is configured, e.g., programmed, to generate a user interface (UI) for display on a computer display device. The UI is for enabling programming of a number of test system parameters, including test signal configuration parameters. For example, the test signal injected into each signal contact can be swept over a frequency range. The UI may allow a user to set this frequency range. Different test signals having different frequencies of the test signals also have different power levels. In some examples, for each frequency in the frequency range, the test signal at that frequency has a different power level. In some examples, for each frequency in the frequency range, the test signal at that frequency has multiple different power levels. In some examples, the test signal at one or more, but not all, frequencies has a different power level. The UI may be configured to allow a user to selectively program which frequencies have which power levels. A separate calibration factor may be determined for each signal contact / frequency / power level combination.

[0034] The test signal may have any suitable frequency and power level. In some implementations, the test signal has a frequency greater than 2 gigahertz (GHz), such as 3 GHz, 4 GHz, 5 GHz, or 6 GHz. In some implementations, the test signal has a frequency greater than 6 GHz, such as 7 GHz, 8 GHz, 9 GHz, or 10 GHz. In some implementations, the test signal has a frequency greater than 18 GHz, such as 19 GHz, 20 GHz, 21 GHz, or 22 GHz. In some implementations, the test signal has a frequency in the range of 6 GHz to 18 GHz. In some implementations, the test signal has a frequency in the range of 18 GHz to 20 GHz. In some implementations, the test signal has a frequency in the millimeter (MM) wave region. According to one definition, the frequency of MM waves is a radio frequency band in the electromagnetic spectrum that extends from 30 GHz to 300 GHz. According to one definition, the frequency of MM waves is a radio frequency band in the electromagnetic spectrum that extends from 24 GHz to 100 GHz. In some implementations, the test signal has a frequency within the 5G range (e.g., the 5G New Radio (NR) band), including MM waves, medium wave bands (e.g., below 6 GHz), and / or low bandwidth frequencies (e.g., below 1 GHz).

[0035] In the example of FIG. 2, the test signal travels through a transmission path 37 to the connection interface 30. Although not explicitly shown in FIG. 2, the transmission path 37 may include one or more conductive traces and one or more active and / or passive electronic devices along one, some, or all of the conductive traces. A transmitted version of the test signal injected at the signal contact 32 is measured (53) at the connection interface 30 to obtain a measurement signal. The measurement signal can be or may include the transmitted version of the test signal or its characteristics, such as power, parametric, and frequency. In some implementations, circuitry (not shown) connects to the connection interface 30 on the DIB to obtain the measurement signal. The circuitry may include a probe or other type of sampling device.

[0036] Process 50 also includes generating calibration coefficients based in whole or in part on the difference between the injected test signal and the measured signal (54). Process 50 stores the calibration coefficients in computer memory 31 on the DIB (55). As described herein, the calibration coefficients compensate for the effects on the test signal of one or more signal paths on or through the DIB. In this regard, the DIB may be one of multiple DIBs configured for use with the test system. In some implementations, the calibration coefficients are specific to a particular DIB. In some implementations, all or some of the same calibration coefficients may be used for the same DIB.

[0037] The calibration coefficients may be generated by one or more processing devices, examples of which are described herein, on the test instrument, on the test head, or on the control system. In some implementations, calculations to determine the calibration coefficients may be performed using a combination of processing performed on the test instrument and the control system. The calculations may include determining whether signal attributes, such as signal power, are as expected, and if not, generating calibration coefficients that correct for the unexpected signal attributes, such as signal power.

[0038] An example of a calculation of the calibration factors (or "cal factors") is set out below, assuming the following definitions and values: 1. Source Power (dBm (decibels-milliwatts)): The power level of the test signal injected from the source 2. Probe head loss (dB (decibels)): Loss component in the RF path of the probe head 3. Additional cable loss (dB): Loss in the cable connecting the test instrument to the probe head 4. Total Loss: RF path losses that cause attenuation 5. Transmission Line Loss (dB): RF transmission line trace loss in the DIB 6. Real source power: The power received by the DUT at the signal contact. 7. RF adapter: RF connector for conversion 8. Corrected Source Power: The source power that has been corrected. Probe head loss = 2dB Additional cable loss = 3dB Transmission line loss = 6dB Source power = -10dBm (the DUT gets -10dBm as its input at 10GHz) Target Source Power Level = Source Power + Total Losses + Calibration Factor (1) Total loss (dB) = Probe head loss + Additional cable loss + Transmission line loss Corrected source power = target source power level + cal factor Real source power = source power + total losses Actual source power = -10-3-2-6 = -22dBm: this is the power level of the measured signal Target Source Power = Real Source Power + Calibration Factor Calibration factor = target source power - actual source power = -10 - (-22) = +12 dB Therefore, the calibration factor = +12dB.

[0039] To correct for the source power seen by the DUT, a calibration factor can be plugged into equation (1) as follows: Target source power = -10dBm (-10dBm is what the DUT gets) Corrected source power = target source power level + cal factor = -10 + 12 = +2 dBm (2)

[0040] In some implementations, the calibration factor compensates for changes in power in the test signal caused by transmission along one or more signal transmission paths on the DIB. In some implementations, the calibration factor compensates for changes in frequency of the test signal caused by transmission along one or more signal transmission paths on the DIB. In some implementations, the calibration factor compensates for at least one of changes in power, linearity, or gain of the test signal caused by transmission along one or more signal transmission paths on the DIB. In some implementations, the calibration factor compensates for an effect on the test signal of a length of one or more signal transmission paths on the DIB. In some implementations, the calibration factor compensates for an effect on the test signal of lossiness or insertion loss of one or more signal transmission paths on the DIB. In some implementations, the calibration factor compensates for an effect on the test signal of an impedance of one or more signal transmission paths on the DIB. In implementations where the calibration plane is not at interface 30, a calibration factor can correct for any of the above effects from the calibration plane to the location of the DUT signal contacts on the DIB.

[0041] Referring again to FIG. 3, during testing, test circuitry such as test instrument 28 is configured to output a test signal to a DUT attached to DIB 25. The DUT generates an output signal in response to the test signal. The test instrument or control system can identify the signal contact to which the DUT is connected and can determine the frequency and power level of the test signal. Knowing this information, the test instrument or control system can use the API to access calibration coefficients appropriate for the test signal from the computer's NOR flash memory 31. For example, the test instrument or control system can access calibration coefficients for signal contacts for signals at the same frequency and power level as the test signal. The test instrument or control system can then correct the output signal based on at least one of the calibration coefficients obtained from the memory (56). One example of a correction that may be performed is described with respect to equation (2) above.

[0042] Examples of systems described herein may include hardware or a combination of hardware and software. For example, a system such as those described herein may include various controllers and / or processors located at various points within the system to control the operation of the automated elements. A central computer may coordinate the operation among the various controllers or processors. The central computer, controllers, and processors may execute various software routines to control and coordinate the various automated elements.

[0043] The processes described herein may be performed by a system or any other suitable computing device. The processes may be controlled at least in part using one or more computer program products, e.g., one or more computer programs tangibly embodied in one or more information carriers, such as one or more non-transitory machine-readable media for execution by or for controlling the operation of one or more data processing devices, e.g., programmable processors, computers, multiple computers, and / or programmable logic components.

[0044] The computer program may be written in any type of programming language, including compiled or interpreted languages, and may be implemented in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. The computer program may be implemented to be executed on one computer or on multiple computers at one site or distributed across multiple sites and interconnected by a network.

[0045] The operations associated with implementing all or a portion of the tests may be performed by one or more programmable processors executing one or more computer programs to perform the functions described herein. All or a portion of the tests may be implemented using special purpose logic circuitry, such as field programmable gate arrays (FPGAs) and / or application specific integrated circuits (ASICs).

[0046] Processors suitable for executing computer programs include, by way of example, both general purpose and special purpose microprocessors, as well as any one or more processors of any kind of digital computer. Generally, a processor receives instructions and data from a read-only memory or a random access memory, or both. Elements of a computer (including a server) include one or more processors for executing instructions, and one or more storage devices for storing instructions and data. Generally, a computer also includes one or more machine-readable storage media, such as mass storage devices for storing data, e.g., magnetic disks, magneto-optical disks, or optical disks, or is operatively coupled to receive, transfer, or both data from such machine-readable storage media. Machine-readable storage media suitable for containing computer program instructions and data include, by way of example, semiconductor storage devices, e.g., EPROM, EEPROM, and flash storage devices, magnetic disks, e.g., internal hard disks or removable disks, magneto-optical disks, and all forms of non-volatile storage, including CD-ROM and DVD-ROM disks.

[0047] As used herein, any "electrical connection" may include a direct physical connection, or an indirect connection that involves intervening components but still allows an electrical signal to flow between the connected components. Unless otherwise specified, any "connection" including electrical circuitry referred to herein through which an electrical signal flows is an electrical connection, and not necessarily a direct physical connection, regardless of whether the word "electrical" is used to modify the "connection."

[0048] Elements of the various implementations described herein may be combined to form other embodiments not specifically described above. Elements may be omitted from such structures without adversely affecting the operation of the structures described herein. Furthermore, various separate elements may be combined into one or more individual elements to perform the functions described herein.

Claims

1. 1. A test system comprising: a device interface board (DIB) including one or more signal transmission paths, interfaces for connecting to one or more other components of the test system, and DUT signal contacts for connecting a device under test (DUT); a test circuit configuration for injecting a test signal into the one or more signal transmission paths and measuring the test signal passing through the signal transmission path in the interface to obtain a measurement signal; one or more processing devices that generate calibration coefficients based on a difference between the injected test signal and the measured signal and store the calibration coefficients in a computer memory, the calibration coefficients compensating for effects of the one or more signal transmission paths on the test signal; 23. A test system comprising:

2. 10. The test system of claim 1, wherein the test signal sweeps a range of frequencies.

3. the one or more processing devices are programmed to generate a user interface (UI) for display on a computer display device; 3. The test system of claim 2, wherein the UI enables programming of a plurality of test system parameters including the setting of the frequency range.

4. 2. The test system of claim 1, wherein different ones of the test signals having different frequencies also have different power levels.

5. 2. The test system of claim 1, wherein the calibration factor compensates for signal loss on the one or more signal transmission paths on the DIB.

6. 2. The test system of claim 1, further comprising a probe that selectively contacts the DUT signal contacts on the DIB to inject the test signal into the one or more signal transmission paths.

7. The test system of claim 1 , wherein the computer memory resides on the DIB.

8. 2. The test system of claim 1, further comprising circuitry for connecting to the interface of the DIB to obtain the measurement signal.

9. 2. The test system of claim 1, wherein a transmission line of the one or more transmission lines includes at least one of a passive electronic device or an active electronic device.

10. the test circuitry is part of a radio frequency (RF) test meter; The test system of claim 1 , wherein the one or more signal transmission lines are configured to transmit RF signals.

11. The test system of claim 1 , wherein the test signal has a frequency greater than 2 Gigahertz (GHz).

12. 2. The test system of claim 1, wherein the test signal has a frequency in the millimeter (MM) wave range.

13. The test system of claim 1 , wherein the test signal has a frequency greater than 6 Gigahertz (GHz).

14. The test system of claim 1 , wherein the test signal has a frequency greater than 18 gigahertz (GHz).

15. 2. The test system of claim 1, wherein the calibration factor compensates for changes in power of the test signal caused by transmission along the one or more signal transmission paths.

16. 2. The test system of claim 1, wherein the calibration factor compensates for changes in frequency of the test signal caused by transmission along the one or more signal transmission paths.

17. 2. The test system of claim 1, wherein the calibration coefficients correct for at least one of changes in power, linearity, or gain of the test signal caused by transmission along the one or more signal transmission paths.

18. 2. The test system of claim 1, wherein the calibration factor compensates for an effect of a length of one of the one or more signal transmission paths on the test signal.

19. 2. The test system of claim 1, wherein the calibration factor compensates for an effect on the test signal of lossiness or insertion loss of a signal transmission line of the one or more signal transmission lines.

20. 2. The test system of claim 1, wherein the calibration factor compensates for an effect of an impedance of one of the one or more signal transmission paths on the test signal.

21. the DIB is one of a plurality of DIBs configured for use with the test system; said computer memory resides on said DIB; The test system of claim 1 , wherein the calibration coefficients are specific to the DIB.

22. said computer memory resides on said DIB; 2. The test system of claim 1, wherein the calibration coefficients in the computer memory are accessible by a computing system using an application programming interface (API).

23. the test circuitry is configured to output a test signal to a DUT attached to the DIB; the DUT generating an output signal in response to the test signal; The test system of claim 1 , wherein the one or more processing devices are programmed to correct the output signal based on at least one of the calibration coefficients.

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