Method and apparatus for adjusting film properties during thin film deposition - Patents.com
Patent Information
- Application Number
- JP2022547745
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2020-02-06
- Publication Date
- 2025-04-25
- Estimated Expiration
- 2040-02-06
AI Technical Summary
Existing thin film deposition processes face challenges in achieving uniform stress and crystal orientation due to thermal and lattice mismatch, leading to within-wafer fluctuations and reduced production yield in piezoelectric devices.
A multi-step process involving separate temperature control during the deposition of a seed layer and bulk layer, with the seed layer formed at elevated temperatures for favorable crystal orientation and the bulk layer at reduced temperatures to improve stress uniformity, combined with adjustments in deposition and cooling parameters.
This approach results in thin films with improved within-wafer stress uniformity and crystallographic orientation, reducing defects and enhancing the performance of piezoelectric devices.
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Abstract
Description
[Technical Field]
[0001]
[0001] Examples disclosed herein relate to methods and apparatus used for fine-tuning the properties of deposited thin film materials. [Background technology]
[0002]
[0002] Thin-film piezoelectric materials can be used in sensors and transducers. Piezoelectric sensors and transducers are also used in devices such as gyro sensors, inkjet printer heads and other microelectromechanical systems (MEMS) devices, including acoustic resonators used in mobile phones and other wireless applications. These thin piezoelectric films can be manufactured by techniques such as sputtering, pulsed laser ablation (PLD), MOCVD, and sol-gel deposition.
[0003]
[0003] In semiconductor processing, physical vapor deposition (PVD) (e.g., sputtering process) is a conventionally used process for depositing thin films. The PVD process involves impacting a target having a source material. Ions are generated in the plasma in the chamber and sputter the source material from the target onto the substrate. During some PVD processes, the sputtered source material is then accelerated toward the substrate being processed via a voltage bias. The source material is deposited on the surface of the substrate. In some examples, the sputtered source material may react with other reactants. When sputtering a layer fabricated on a substrate, the epitaxial growth of the thin film may exhibit strain and / or dislocation structures due to thermal and lattice mismatch between the piezoelectric-based material and the substrate.
[0004]
[0004] During the deposition of sputtered material, the thickness and stress uniformity of the sputtered thin film can be affected by several controlled parameters. These controlled parameters include the strength of the magnetic field used to trap electrons near the surface of the sputtering target, the lattice alignment or misalignment between adjacent materials, and the crystal orientation of the substrate, which can make it difficult to maintain uniform properties of the thin film. Such non-uniformity of the thin film can cause fluctuations in the in-wafer (WIW) piezoelectric properties, which can reduce the production yield of piezoelectric devices.
[0005]
[0005] Therefore, there is a need for improved methods and apparatus for depositing piezoelectric materials and extending the lifespan of thin films used in sensing devices. [Overview of the Initiative]
[0006]
[0006] Apparatuses and methods for fine-tuning the properties of a thin film are disclosed herein. In one example, a method for forming a piezoelectric film comprises (a) depositing a first piezoelectric film layer on the surface of a substrate by a first physical vapor deposition (PVD) process. The method further comprises (b) depositing a second piezoelectric film layer on top of and in contact with the first piezoelectric film layer by a second physical vapor deposition (PVD) process. The method is followed by (c) lowering the temperature of the substrate after the formation of the first piezoelectric film layer and before the formation of the second piezoelectric film layer. The temperature is lowered by performing the process over a first period. Processes (a), (b), and (c) are performed one or more additional times. Process (c) is performed over a second period in the additionally performed processes (a), (b), and (c). The second period is different from the first period.
[0007]
[0007] In another example, a method for forming a piezoelectric film includes (a) depositing a first piezoelectric film layer on the surface of a substrate by a first physical vapor deposition (PVD) process in a first processing chamber. The method includes (b) depositing a second piezoelectric film layer on top of and in contact with the first piezoelectric film layer by a second PVD process in the first processing chamber. The method is followed by (c) lowering the temperature of the substrate after forming the first piezoelectric film and before forming the second piezoelectric film. The temperature is lowered by running the process over a first period. Processes (a), (b), and (c) are performed one or more additional times. The additionally performed process (c) is performed over a second period, which is different from the first period.
[0008]
[0008] In yet another example, an apparatus for processing a substrate includes a processor coupled to at least one non-transient computer-readable medium. The at least one non-transient computer-readable medium includes instructions configured to perform a method when executed by the processor. This method includes (a) depositing a first piezoelectric film layer on the surface of the substrate by a first physical vapor deposition (PVD) process. In addition, the method includes (b) depositing a second piezoelectric film layer on top of and in contact with the first piezoelectric film layer by a second physical vapor deposition (PVD) process. This method is followed by (c) lowering the temperature of the substrate after the first piezoelectric film layer has been formed and before the second piezoelectric film layer has been formed. The temperature is lowered by performing the process over a first period. Processes (a), (b), and (c) are performed one or more additional times. Process (c) is performed over a second period in the additionally performed processes (a), (b), and (c). The second period is different from the first period.
[0009]
[0009] To enable a detailed understanding of the features of the present disclosure as described above, a more detailed description of the present disclosure, which is briefly summarized above, can be obtained by referring to the examples, some of which are shown in the accompanying drawings. However, it should be noted that the accompanying drawings are merely illustrative examples and should not be considered limiting in scope, and other equally valid examples are permitted. [Brief explanation of the drawing]
[0010] [Figure 1]
[0010] This is a plan view of a cluster tool adapted for depositing thin film layers on a substrate. [Figure 2]
[0011] Figure 1 is a plan view of one processing chamber adapted for depositing a thin film layer on a substrate in the cluster tool shown. [Figure 3]
[0012] Figure 1 is a cross-sectional view of another processing chamber adapted for processing substrates in the cluster tool shown. [Figure 4]
[0013] Figure 1 is a side view of an exemplary film stack fabricated within a cluster tool. [Figure 5]
[0014] Figure 1 is a flowchart illustrating an exemplary method for manufacturing a film stack within a cluster tool. [Figure 6]
[0015] This graph shows how the stress profile changes with respect to cooling time when the substrate temperature is reduced. [Figure 7]
[0016] This shows the change in crystallinity in a thin film layer formed from multiple consecutive intermediate layers. [Figure 8]
[0017] This is a plan view of a controller 700 that can provide commands to any one of the processing chambers shown in Figures 1 to 3. [Modes for carrying out the invention]
[0011]
[0018] For ease of understanding, the same reference numbers are used, where possible, to denote the same elements common to the figures. It is contemplated that elements and features of one embodiment can be beneficially incorporated into other embodiments without further recitation.
[0012]
[0019] Disclosed herein are apparatuses and methods for fine-tuning the properties of a thin film during a thin film deposition process, such as a process including a sputtering process. When a piezoelectric material is deposited on a substrate at a high temperature, the crystal orientation is improved, and as a result, the full-width-half-maximum (FWHM) peak that occurs is smaller because the variation in crystal orientation is reduced. However, forming a thin film at a high substrate deposition temperature increases the within-wafer (WIW) stress uniformity. In contrast, a lower substrate temperature shows a correlation with better WIW stress uniformity, but the FWHM peak becomes larger. The crystal structure of the thin film layer disclosed herein was studied (or inspected) using X-ray diffraction (XRD). Accordingly, there is a need for a method to resolve the conflicting effects on crystal orientation and film stress variation.
[0013]
[0020] To address these competing effects, multi-step process sequences have been developed and are disclosed herein. The process sequence generally involves the formation of a first thin layer, a so-called seed layer, and a second layer (also referred herein as a bulk layer) forming the remainder of the deposited film thickness. In another example, the bulk layer is formed on top of the substrate and in contact with the substrate if no seed layer is deposited. Separate temperature control is used between the deposition processes used to form the two layers. In one embodiment, the seed layer deposition process includes heating the substrate to a high temperature (e.g., 150-550 degrees) in a first chamber, such as a lamp-heated chamber or a heated substrate-supported pedestal-containing chamber, and then depositing the seed layer in a separate deposition chamber having a substrate support that is maintained at a temperature below the temperature achieved in the first chamber. In one example, the seed layer deposition process includes a sputtering process adapted to form a piezoelectric material. The high temperature reached by the substrate while the seed layer is being formed provides good surface conditions for nucleation of the thin film layer, allowing the formed crystal to have a favorable crystal orientation (e.g., small variation in crystal orientation). The substrate with the seed layer is then sent to another chamber for cooling. After the substrate has cooled, it is returned to the process chamber, which has a substrate support controlled to near room temperature to continue depositing the bulk layer. This deposition-cooling-deposition process sequence has been found to avoid conflicts between the temperature effect on stress and crystal orientation, instead positively impacting each property. Advantageously, the apparatus and methods disclosed herein enable the formation of thin films with both a smaller FWHM and improved stress uniformity and stress levels. Improved overall film properties are possible by reducing film stress and improving crystal orientation through separate temperature control between different parts of the processing sequence.
[0014]
[0021] During the sputtering of the thin film layer, differences in the surface characteristics of one or more regions of the thin film layer and / or the substrate surface can lead to cone defects, stacking defects, and other surface defects. The defects increase surface roughness, weaken the piezoelectric coupling between layers, and ultimately degrade the performance of the formed piezoelectric device. During the deposition of the high-temperature seed layer, parameters such as the degassing temperature, pressure, bias power, target-substrate distance, and gas ratio are adjusted to suppress cone defects and improve the crystal quality of the thin film layer.
[0015]
[0022] The methods and apparatuses disclosed herein also enable fine-tuning of the characteristics of thin films by adjusting process parameters during the formation of the bulk layer. Generally, deposition process parameters, process time, and cooling strategy process parameters are adjusted to improve stress uniformity and crystal orientation. Deposition process pressure, deposition bias power, sputter target power, gas ratio concentration (e.g., the concentration ratio of reactive gas to inert gas) are examples of adjustable deposition process parameters. Cooling process pressure, substrate support temperature, and cooling gas composition are examples of adjustable cooling process parameters. The deposition and cooling process parameters can be adjusted alone or in combination with the process time. Thus, by fine-tuning the above parameters while depositing the bulk layer, it is possible to improve the uniformity of within-wafer (WIW) stress and crystal orientation of thin film characteristics.
[0016]
[0023] FIG. 1 is a plan view of a cluster tool 100 adapted to deposit a thin film layer on a substrate. One example of the cluster tool 100 is commercially available from Applied Materials, Inc. of Santa Clara, California, and is known as the Endura® system.
[0017]
[0024] The cluster tool 100 includes a factory interface 104, a loading dock 140, a first robot 132, and a second robot 136. The cluster tool 100 also includes an orientation chamber 152, a degassing chamber 156, first processing chambers 160 and 168, second processing chambers 164-167, a second robot 136, and a main frame 172. The cluster tool 100 also includes a first transfer chamber 124 and a second transfer chamber 128.
[0018]
[0025] Each cassette 112, i.e., FOUP, is configured to receive multiple circuit boards 201. In this configuration, the circuit boards 201 are removed from the cassette 112 by one of the factory interface robots 120. The factory interface robot 120 transfers the circuit boards 201 from the cassette 112 and loads them into the loading dock 140 (i.e., load locks them). Once the circuit board processing in the cluster tool 100 is complete, the processed circuit boards 201 are then returned to their respective cassettes 112.
[0019]
[0026] The main frame 172 includes a first transfer chamber 124, which includes a first robot 132. The first robot 132 is configured to move the substrate 201 between an orientation chamber 152, a degassing chamber 156, and a first processing chamber 160. Each of the orientation chamber 152, the degassing chamber 156, and the first processing chamber 160 is positioned around the first transfer chamber 124. In some configurations, the first transfer chamber 124 is evacuated to a moderately low pressure, e.g., to about 1 milliliter or less. The second transfer chamber 128 is evacuated to an even lower pressure, e.g., to 1 microtorr. Thus, the first transfer chamber 124 or the second transfer chamber 128 is maintained at at least a moderate vacuum level to prevent the transfer of contaminants between the first transfer chamber 124 and the second transfer chamber 128. Any discussion or description of the first processing chamber 160 should be understood to necessarily include the first processing chamber 168 unless otherwise specified.
[0020]
[0027] The second robot 136 is configured to move one or more substrates 201 between the first processing chamber 160 and the second processing chamber 164. The second robot 136 is located within the second transfer chamber 128. The second robot 136 is configured to transfer the substrates 201 to and from the first processing chamber 160 and the second processing chamber 164 or other processing chambers 165-168, which are mounted on the portion of the second transfer chamber 128 of the main frame 172. In one configuration, each of the first robot 132 and the second robot 136 is a “frog-legged” robot available from Applied Materials, Inc. of Santa Clara, California. The first transfer chamber 124 can be selectively isolated from each of the orientation chamber 152, the venting chamber 156, and the first processing chamber 160 by using a slit valve (not shown) positioned between each of the orientation chamber 152, the venting chamber 156, and the first processing chamber 160. The second transfer chamber 128 can be selectively isolated from each of the first processing chamber 160 and the second processing chamber 164 by using a slit valve positioned between each of the first processing chamber 160 or the second processing chamber 164. In this specification, any discussion or description of the second processing chamber 164 should be understood to include any one of the second processing chambers 165-167.
[0021]
[0028] Each loading dock 140 is selectively isolated from both sides of the first transfer chamber 124 by a slit valve and from the external area 116 of the factory interface 104 by a vacuum door (not shown). In this configuration, a factory interface robot 120 within the factory interface is configured to move the substrate 201 from the cassette 112 to the loading dock 140. The substrate 201 is then isolated from the external area 116 of the factory interface 104 by a vacuum door (not shown) coupled to the loading dock 140. The substrate 201 is transferred to the loading dock 140. After the loading dock 140 has been pumped down to the desired pressure, the substrate 201 is then accessible by the first robot 132 through a slit valve opening (not shown) formed between the first transfer chamber 124 and the loading dock 140.
[0022]
[0029] Each substrate 201 is loaded into a cassette 112 coupled to a factory interface 104. The substrates 201 can have diameters ranging from approximately 100 mm to approximately 750 mm. The substrates 201 can be formed from various materials, including Si, SiC, or SiC-coated graphite. In one example, the substrate 201 contains silicon carbide material and has a thickness of approximately 1000 cm². 2 It has the above surface area. In another example, the surface area of substrate 201 is approximately 2,000 cm². 2 The above, and approximately 4,000 cm 2 That is all that is possible.
[0023]
[0030] One or more orientation chambers 152 may be used to align the substrate 201 to a desired rotational orientation within the cluster tool 100. By aligning the substrate 201, the substrate 201 is also aligned. The orientation chambers 152 may be positioned close to the loading dock 140 and close to the venting chamber 156.
[0024]
[0031] In some embodiments, the orientation chamber 152 includes a heat source, such as a lamp or a radiant heater that generates infrared radiation. The heat source in the orientation chamber 152 can be adapted to heat the substrate 201 and each substrate 201 to a desired temperature. The orientation chamber 152 can be pressurized under vacuum conditions to ensure that any undesirable water or other contaminants are removed from the surface of the substrate 201 before processing in other downstream chambers.
[0025]
[0032] In some embodiments, the cluster tool 100 includes a pre-cleaning chamber 156 adapted to clean the surface of a substrate 201 by using a cleaning process that includes exposing the substrate surface to one or more pre-cleaning gas compositions comprising a radio frequency (RF) generated plasma and / or a carrier gas (e.g., Ar, He, Kr) and / or a reactive gas (e.g., hydrogen). In some embodiments, the pre-cleaning chamber 156 is adapted to perform a process that may include a non-selective sputter etching process. The pre-cleaning chamber 156 typically includes components similar to those found in a pre-cleaning chamber 300, which is described below in relation to Figure 3.
[0026]
[0033] Each first processing chamber 160 is configured to process one or more substrates 201 within it. The processing may include cooling the substrate, heating the substrate 201, etching and / or depositing one or more layers on the surface of the substrate 201. In one configuration, the first processing chamber 160 is configured to cool or heat the substrate 201.
[0027]
[0034] Each of the processing chambers 164-167 is adapted to perform an etching and / or deposition process. In some embodiments, the deposition process may include a sputter deposition process (i.e., a PVD deposition process). The sputter deposition process may also include a temperature control step adapted to cool and / or control the temperature of the substrate during processing.
[0028]
[0035] Figure 2 is a plan view of processing chamber 200, which may be part of one or more of processing chambers 164-167. Processing chamber 200 is adapted to deposit a thin film layer on a substrate 201 in the cluster tool shown in Figure 1. Processing chamber 200 may be a magnetron-type PVD chamber available from Applied Materials, Inc. in Santa Clara, California. Processing chamber 200 includes chamber 204, target 248, magnetron 296, vacuum pumping system 260, substrate support assembly 232, and process kit 214. In one example, target 248 is a scandium (Sc)-doped aluminum (Al) target. In one example, target 248 is a scandium (Sc)-doped aluminum (Al) target, which has scandium between approximately 1 at% and 40 at%. In another example, the aluminum (Al) target has scandium between approximately 20 at% and 40 at% or between approximately 30 at% and 40 at%. In yet another example, the aluminum (Al) target has scandium between approximately 5 at% and 40 at% or between approximately 5 at% and 20 at%. In yet another example, target 248 can be made from Al.
[0029]
[0036] Chamber 204 supports a target 248, which is sealed to one end of chamber 204 through a target isolator 244 using multiple O-rings. Chamber 204 can be held under vacuum.
[0030]
[0037] The process kit 214 includes an edge ring 234, a first shield 216, and a second shield 220, which are separated by a second dielectric shield isolator 224. The components of the process kit 214 are positioned within the chamber 204 to protect the chamber wall 208. The metal within the process kit 214 is electrically grounded from the sputtered material generated in the internal space 212. The first shield 216 can be electrically floated, and the second shield 220 is electrically grounded. In alternative examples, either or both of the first shield 216 or the second shield 220 may be grounded to the same or different ungrounded levels, floated, or biased. The first shield 216 and the second shield 220 may be made from stainless steel. The inner surface 228 may be bead blasted or otherwise roughened to promote adhesion of the sputtered material deposited on the inner surface 228.
[0031]
[0038] The substrate support assembly 232 includes a pedestal 236. The pedestal 236 may include an electrostatic chuck 238 having a support surface adapted to support the substrate 201 above the electrode 240. It is understood that other devices may be used to hold the substrate 201 in place during processing. To provide thermal control of the substrate 201 during processing, a resistance heater, a coolant channel, and / or a heat transfer gas cavity (not shown in Figure 2) may be formed in the pedestal 236. The electrode 240 coupled to the first power supply 252 may apply RF and / or DC biases to the substrate 201 to attract the plasma 299 ionized deposited material and process gas. In other applications, the bias on the substrate 201 may be reduced or eliminated to further reduce the potential for damage to the deposited thin film layer.
[0032]
[0039] The target 248 has at least a surface portion made of the material to be sputter-deposited on the substrate 201. In one example, pulsed DC, RF and / or pulsed RF bias signals are applied to the target 248 by a second power supply 284. The pulsed DC, RF and / or pulsed RF bias signals enable the deposition of optional non-conductive layers, such as PZT or an aluminum nitride layer. To attract ions generated by the plasma 299 and sputter the target 248, the target 248 may be biased by the second power supply 284 to provide, for example, an average power of 1-20 kW. The pulsed DC and / or RF bias signals applied to the target 248 may include signals having a plurality of alternating first and second intervals (details below). Each of the first intervals has a negative voltage applied to the bias signal to attract ions and sputter the target 248. During the alternating second interval, the applied bias signal is lower than the bias applied during the first interval, and no bias is applied (e.g., zero applied voltage). In some examples, the applied bias signal has a positive voltage, repelling positively charged ions from target 248 and reducing arc discharge.
[0033]
[0040] Those skilled in the art will understand that a pulsed bias signal applied to target 248 can provide many beneficial processing advantages depending on the specific application. For example, a pulsed bias signal can be used to reduce the deposition rate, form plasma 299, and effectively control the plasma chemicals to increase the peak energy of plasma 299 in order to form the film laminate 400 (shown in Figure 4). For example, when a pulsed bias signal is applied to target 248, thin film layers closer to stoichiometric ratios may be obtained. Further possible features include an increase in thin film quality, particularly for the film laminate 400. In addition, when a pulsed bias is applied, the thin film sheet resistance may be reduced because undesirable microvoids and columnar structures may be removed. In some examples, it will be understood that an unpulsed bias signal may be applied to bias target 248 during one or more parts of the deposition process, or in combination with a pulsed bias signal. The unpulsed bias signal may be a constant DC or RF power level bias signal.
[0034]
[0041] The substrate 201 mounted on the pedestal 236 can be biased to attract or repel ions generated in the formed plasma 299. For example, a first power supply 252 may be provided to apply RF power to the pedestal 236, biasing the substrate 201 to attract deposition material ions during the deposition process. In addition, the first power supply 252 may be configured to apply RF power to the electrodes 240 of the pedestal 236 to couple supplemental energy with the plasma 299. During the deposition process, the pedestal 236 may be electrically floating. Therefore, a negative DC bias may nevertheless appear on the pedestal 236. Alternatively, the pedestal 236 may be biased by a source with a voltage between -1000 volts and +500 volts (e.g., about -30 VDC). For example, the pedestal 236 can be biased to bias the substrate 201, thereby attracting ionized deposition material to the substrate 201. In some configurations, a capacitor tuner (not shown) can be used with a second power supply 284 to control the floating potential on the substrate 201 during processing. In an alternative example, the substrate 201 may remain electrically floating.
[0035]
[0042] If the first power supply 252 used to bias the substrate 201 through the pedestal 236 is an RF power supply, the power supply may operate at a frequency of approximately 13.56 MHz to approximately 60 MHz. The pedestal 236 may be supplied with RF power ranging from 10 watts to 5 kW. The computer-based controller 256 may be programmed to control the power level, voltage, current, and frequency. Therefore, it is understood that the above power level, voltage level, and frequency may vary depending on the program.
[0036]
[0043] The vacuum pumping system 260 includes a pump assembly 268 and a valve 264. The pump assembly 523 may include a cryopump, one or more roughing pumps (not shown) used to maintain a desired pressure within the internal space 212 of the processing chamber 200.
[0037]
[0044] The magnetron 296 is positioned adjacent to the target 248 and rotated relative to the target. The magnetron 296 includes a plurality of magnets 298. The plurality of magnets 298 includes a plurality of polarizing magnets N and a plurality of magnets S having the opposite polarization to magnets N. The magnets 298 are used to confine the plasma 299 generated in the internal space 212 by biasing the target 248 using a second power supply 284 to sputter material from the front surface 250 of the target 248. The second power supply 284 has a second power supply 288 configured to deliver DC and / or RF power to the target 248. In one example, the delivery of RF power to the second power supply 284 may also include a matching circuit 290.
[0038]
[0045] The magnetron 296 can be tilted with respect to the surface of the target 248, for example, the front surface 250 or the back surface 251. In other words, the magnetron 296 forms an angle 203 with respect to the central axis 202 or the axis of rotation of the magnetron 296. The tilt of the magnetron 296 at angle 203 can be controlled by the controller 256 via the motor 292. The degree of tilt of the magnetron 296 can be adjusted in situ between processing batches, between substrates 201, or during the processing of one or more substrates 201. The angle 203 at which the magnetron 296 tilts can be controlled based on thin film thickness or stress data feedback. The specific component of the magnetron 296 tilted at angle 203 with respect to the target 248 can vary. In one example, the longitudinal dimension of the backing plate 293 (e.g., a yoke) is tilted at angle 203 with respect to the target 248. In one example, the plane 294 (for example, parallel to the XY plane) defined by the lower end of the magnet 298 facing the back surface 251 of the target 248 is inclined at an angle 203 with respect to the target 248. In another example, the magnetron 296 is inclined with respect to the back surface 251 of the target 248. In yet another example, the magnetron is inclined with respect to the front surface 250.
[0039]
[0046] In one embodiment, as the magnetron 296 rotates around the central axis 202 by the rotary motor 292 during processing, an angle 203 is maintained between the magnetron 296 and the target 248. Thus, any point on the magnetron 296 maintains the same perpendicular distance (i.e., Z-direction distance) from the surface of the target 248, such as the back surface 251, as it rotates around the central axis 202. As the magnetron 296 rotates, the strength of the magnetic field generated by the magnetron 296 is the average of the varying strengths of the magnetic fields generated by each magnet 298. The magnetic field is averaged over the front surface 250 of the target 248. This averaging of the magnetic field strength enables uniform thin-film properties and uniform erosion of the target 248.
[0040]
[0047] The angle 203 is determined by establishing an angle between the back surface 251 of the target 248 and the plane 294 of the magnetron 296, as shown in Figure 2. Another way to determine the angle 203 is to establish an angle between the front surface 250 of the target 248 and the plane 294 of the magnetron 296. For simplicity, the description of the angle 203 formed between the magnetron 296 and the target 248 necessarily includes the surface 250 or 251 of the target 248 and the plane 294 of the magnetron 296. The angle 203 formed between the magnetron 296 and the target 248 can range from about 0.2 degrees to about 5 degrees. In another example, the angle 203 is from about 1 degree to about 2 degrees. If the tilt angle 203 of the magnetron 296 relative to the target 248 is less than about 0.2 degrees, the effect of averaging the magnetic field strength may be reduced. As described above, the angle 203 of the inclined magnetron 269 relative to the target 248 is approximately 5 degrees or less. Therefore, the magnetron 296 and the central axis 202 form an acute angle (unsigned) in the range of approximately 85 degrees to approximately 89.7 degrees. The acute angle can be in the range of approximately 88 degrees to approximately 89 degrees. The sum of angle 203 and the acute angle is usually 90 degrees.
[0041]
[0048] The first gas source 272 supplies gas to the chamber 204 through the mass flow controller 280. One example of the gas is a chemically inert noble gas such as argon (Ar). The gas can be introduced into the top of the chamber 204 or into the bottom of the chamber 204 as shown. One or more inlet pipes (not shown) pass through the opening through the bottom of the second shield 220. Alternatively, the inlet pipes may be coupled to the opening in the pedestal 236. During the PVD process, nitrogen (N) gas may be supplied from the second gas source 276 to form a layer on the substrate 201. The layer may contain a material such as aluminum nitride (AlN).
[0042]
[0049] Figure 3 is a cross-sectional view of another processing chamber 300 adapted for processing a substrate in the cluster tool shown in Figure 1. An example of a processing chamber 300 useful for this disclosure is the Pre-Clean II Chamber, available from Applied Materials, Inc. in Santa Clara, California.
[0043]
[0050] The pre-cleaning chamber 300 has a substrate support assembly 304 located within a chamber enclosure 308 below a dome 312. In one example, the dome 312 may be made of quartz. The pedestal 320 includes a substrate support assembly 304 having a substrate support 316. The substrate support 316 is located within a recess 324 on the substrate support assembly 304. During processing, the substrate 201 is placed on the substrate support 316. At least one positioning pin 328 holds the substrate in a desired lateral position on the substrate support 316.
[0044]
[0051] Coil 344 is positioned outside the dome 312 and connected to the RF power supply 332. The RF power supply 332 starts and maintains the plasma formed from the processing gas in the processing chamber 300. An RF matching network 340 is provided to match the RF power supply 332 and the coil 344. The substrate support assembly 304 is connected to a DC power supply 336 that biases the substrate support assembly 304.
[0045]
[0052] The substrate 201 may be pre-cleaned or etched using plasma in the processing chamber 300 before depositing one or more layers within the film laminate 400, as shown in Figure 4. Once the substrate 201 is positioned for processing in the processing chamber 300, a processing gas is introduced into the internal space 212. The processing gas contains hydrogen (H) between approximately 0% and approximately 100%, with the remainder being a carrier gas. The processing gas can contain between approximately 5% and approximately 50% H.
[0046]
[0053] The processing gas may contain a carrier gas such as Ar or helium (He) at a concentration between approximately 95% and 50%. The processing gas is ignited within the internal space 212 to form a plasma, thereby exposing the substrate 201 to the plasma. For example, the plasma may be generated by applying power between approximately 50W and 500W from the RF power supply 332 to the coil 344. The DC power supply 336 may also supply DC bias power between approximately 10W and 300W. The plasma may be maintained for a period between approximately 10 seconds and 300 seconds. Once the pre-cleaning process is complete, the processing chamber 300 is evacuated to remove the processing gas and reacted by-products from the processing chamber 300.
[0047]
[0054] Figure 4 is a side view of an exemplary film laminate 400 manufactured in the cluster tool disclosed in Figure 1. The film laminate 400 may include a substrate 201, an optional seed layer 402, and a bulk layer 404. In an alternative embodiment, the bulk layer 404 is formed on top of and in contact with the surface of the substrate 201. The bulk layer 404 includes one or more intermediate layers 408, each intermediate layer 408 may be represented as 408(n), where n is the number of intermediate layers 408 in the bulk layer 404, which can vary from 1 to n. For example, in the example shown in Figure 4, n=4, but in an alternative example, n may be from 1 to 40, or even from 2 to 30.
[0048]
[0055] In one example, the bulk layer 404 is scandium-doped aluminum nitride (ScAlN). In another example, the bulk layer 404 is AlN. In some examples, the substrate 201 is <001> It has a crystal orientation. The substrate 201 contains, but is not limited to, polycrystalline molybdenum and AlN, and may include other layers having a suitable lattice.
[0049]
[0056] Figure 5 is a flowchart illustrating an exemplary method 500 for manufacturing a film stack 400 within the cluster tool shown in Figure 1.
[0050]
[0057] In block 502, the substrate 201 is loaded into the loading dock 140 of the cluster tool 100. In the example, the first robot 132 moves the substrate 201 to the orientation chamber 152. The substrate 201 is then passed through the first transfer chamber 124 by the first robot 132. Inside the first transfer chamber 124, the robot 132 moves the substrate 210 from the orientation chamber 152 to the first processing chamber 160. As described above, the pressure (P) inside the first transfer chamber 124 can be about 1 microtorr. Therefore, the pressure is maintained under vacuum. As described above, the process gas is supplied to the first processing chamber 160.
[0051]
[0058] Optionally, in block 503, a seed layer 402 is formed on the substrate 201. During block 503, the substrate 201 is heated to a desired first temperature (e.g., between 200°C and 600°C) in a heated processing chamber (e.g., degassing chamber 156), and then a seed layer is formed on the substrate in a second processing chamber 164 at a second processing temperature (e.g., below the degassing temperature). The seed layer 402 may be formed in the second processing chamber, which includes components shown in the processing chamber 200. The process performed during block 503 may include sending pulsed DC, RF and / or pulsed RF bias signals to the target 248 by a second power supply 284 to form a sputtered material layer. In one example, the substrate temperature upon entry into the second processing chamber, and thus the substrate processing temperature, is higher than room temperature, for example, between about 120°C and about 600°C. In one example, the seed layer 402 has a thickness of about 10 nm to about 50 nm. It was found that maintaining a high initial temperature (e.g., degassing temperature) reduces the number of defects formed in the seed layer 402.
[0052]
[0059] In block 504, a bulk layer 404 is formed on or above the substrate 201. As described above, a process gas is supplied to the second processing chamber 164. The bulk layer 404 can be formed in the second processing chamber 164, which includes components shown in the processing chamber 200. The bulk layer 404 includes at least one intermediate layer 408 formed on or above the substrate 201 in the second processing chamber 164. In one example, the first intermediate layer 408(1) of the bulk layer 404 can be formed to a thickness of about 0.01 to 0.1 microns. In one example, the bulk layer 404 can be formed to a total thickness of about 0.2 to 10 microns, or about 0.4 to 10 microns. In another example, the bulk layer 404 can be formed to a total thickness of about 0.2 to 0.5 microns. In yet another example, the bulk layer 404 can be formed to a total thickness of approximately 0.2 microns to approximately 2 microns, or approximately 0.3 microns to approximately 2 microns, or approximately 0.5 microns to approximately 1 micron. In an alternative example, the bulk layer 404 can be any desired thickness between approximately 0.2 microns and approximately 10 microns, however, the thickness of the bulk layer 404 is not limited to this range and can be deposited on the substrate 201 to any desired thickness.
[0053]
[0060] In some embodiments, the bulk layer 404 is formed on the substrate between blocks 504 and may involve two or more processing steps, such as blocks 504-508 shown in Figure 5. In some embodiments, the first intermediate layer 408(1) of the bulk layer 404 is formed at a temperature between approximately room temperature (~20°C) and approximately 180°C. In some embodiments, the first processing chamber 160 is maintained at room temperature while the film laminate 400 is cooled within the first processing chamber 160. In some embodiments, the bulk layer 404 is formed in an environment containing Ar and N. In one example, the Ar to N ratio may be approximately 2 to 1 by volume. In another example, the Ar to N ratio may be approximately 1 to 1 by volume. Between blocks 504, a first power supply 252 applies a first power bias P1 to the substrate 201 using electrodes 240 for a first duration (t1). The first intermediate layer 408(1) is formed on the film laminate 400. The first bias power P1 is between approximately 30 watts and approximately 150 watts.
[0054]
[0061] The second intermediate layer 408(2) is formed in block 506 on top of and in contact with the first intermediate layer 408(1). In one example, the second intermediate layer 408(2) of the bulk layer 404 can be formed to a thickness of about 0.01 to 0.1 microns. A second power bias P2 is applied to the substrate 201 from the first power supply 252 through the electrode 240 for a second duration (t2). The first duration is between about 1 second and about 200 seconds. In another example, the first and second durations are between about 1 second and about 60 seconds, for example, between about 1 second and 20 seconds, or for example, between about 1 second and 40 seconds. The second duration is longer than 300 seconds and less than or equal to about 2000 seconds. In one example, the first time may be about 470 seconds and the second time may be about 1080 seconds. The second bias power P2 is less than approximately 120 watts and greater than or equal to 20 watts. For example, if the first bias power P1 is approximately 100 watts, the second bias power P2 may be approximately 60 watts. In another example, the second bias power P2 may be approximately 80 watts.
[0055]
[0062] The first intermediate layer 408(1) and the second intermediate layer 408(2) are formed within the same second processing chamber 164. In an alternative example, the first intermediate layer 408(1) may be formed in one of the second processing chambers 164, and the second intermediate layer 408(2) may be formed in a different second processing chamber 165 of the cluster tool 100. Thus, in at least one example, the first bias power P1 is higher than the second bias power P2. In the same example, the second duration (t2) is longer than the first duration (t1). An exemplary frequency for either the first bias power P1 or the second bias power P2 is approximately 13.56 MHz. In some embodiments, the process policy parameters or process variables used to deposit the first intermediate layer 408(1) are different from the process policy parameters used to deposit the second intermediate layer 408(2). In one example, the process used to deposit the first intermediate layer 408(1) and the process used to deposit the second intermediate layer 408(2) have at least one different process parameter, the at least one process parameter being selected from the group consisting of deposition process pressure, bias power, and deposition process time.
[0056]
[0063] In block 508, the temperature of the film laminate 400 is reduced. Before the temperature is reduced in block 508, the film laminate 400 includes at least a substrate 201 and a bulk layer 404. In one example, the film laminate 400 is transferred from a second processing chamber 164 to a first processing chamber 160 for cooling. The first processing chamber 160 may be maintained at a reduced temperature while the substrate 201 is cooled within the first processing chamber 160. In another example, the film laminate 400 is not transferred to the first processing chamber 160 but is exposed to a reduced temperature within the second processing chamber 164. The reduced temperature may be achieved by removing heat from the internal space 212, for example, by stopping the supply of power to the second power supply 284 or by chucking the substrate 201 on a cooled pedestal 238. In another example, the bulk layer 404 may be deposited as an intermediate layer pair 412. Each intermediate layer pair 412 is represented as 412(n), where n is the number of intermediate layers 412 in the bulk layer 404, which can vary from 1 to n. For example, in the example shown in Figure 4, n=2, but in alternative examples, n is from 1 to 15. As illustrated, the first intermediate layer pair 412(1) includes the first intermediate layer 408(1) and the second intermediate layer 408(2). In block 508, the temperature of the film laminate 400 may decrease between consecutive intermediate layer pairs 412 (e.g., 412(n) and 412(n+1)). In yet another example, the temperature in block 508 may decrease after the deposition of intermediate layer 408(n) in block 504 and before the deposition of another intermediate layer 408(n+1) in block 506. In this example, the film laminate 400 is cooled between the deposition of the intermediate layer 408(n) in block 504 and the deposition of the intermediate layer 408(n+1) in block 506.
[0057]
[0064] In one example, the temperature of the film stack 400 is such that the deposition process takes place over a certain period of time (Δt cool This can be reduced by pausing for a period of time. While deposition is paused, the plasma is not directed to the film stack 400. Deposition takes place for approximately 1 second to approximately 50 seconds, for example, approximately 3 seconds to approximately 50 seconds, Δt cool It may be suspended for the period Δt.cool may be referred to as a pause period during which the deposition process is paused. In another example, the period Δt during which deposition is paused cool is between about 10 seconds and 20 seconds. In another example, the period Δt cool is about 40 seconds or less. The period Δt cool can be from about 6 seconds to about 60 seconds. In yet another example, when the deposition of the film laminate 400 is paused, the period Δt cool can be gradually paused over any desired period between about 1 second and about 60 seconds, advancing by about 1 second.
[0058]
[0065] When the film laminate 400 is actively cooled, the substrate 201 of the film laminate 400 is placed on and in direct contact with the upper part of a temperature-controlled body such as the substrate support 316. Alternatively, the film substrate 201 can be disposed on and in direct contact with the upper part of the electrostatic chuck 240. The substrate support 316 or the electrostatic chuck 240 has a lower temperature than the substrate 201 and can thus be used to actively cool the substrate 201. The temperature decreases over the period Δt cool over the period. The period Δt cool can be any time from about 1 second to about 50 seconds. In one example, the period Δt cool is between about 10 seconds and 20 seconds. In another example, the period Δt cool is about 40 seconds. The period Δt cool As Δt increases, the stress (MPa) decreases between the crystal structures in the film laminate 400. As described above, the substrate 201, and thus the film laminate 400, can be cooled in an environment containing Ar and N2. In one example, the period Δt during which the film laminate 400 is cooled cool is shorter than the period required to deposit the intermediate layer 408. In another example, the period Δt during which the film laminate 400 is cooled cool is longer than the period required to deposit the intermediate layer 408. In yet another example, when the film laminate 400 is actively cooled, the period Δt cool is any desired period between about 1 second and about 60 seconds and advances by 1 second. The applicant, as described above, uses the same period Δt during which the deposition of the film laminate 400 is paused coolIt should be noted that the film laminate 400 can be actively cooled over this period.
[0059]
[0066] After the film laminate 400 has been processed to form a bulk layer 404 having a desired thickness by performing one or more of blocks 504-508 multiple times according to the method 500 disclosed herein, the film laminate 400 may be returned to the factory interface 104. In one example, the sequence of blocks 504-508 was performed at least twice, for example, at least four times, or even at least 20 times. The substrate 201 may be moved from the second processing chamber 164 and transferred to the first processing chamber 160. The film laminate 400 may then be transferred from the first processing chamber 160 to the loading dock 140 by the first robot 132. The film laminate 400 may then be returned to the factory interface 104.
[0060]
[0067] Figure 6 is a graph showing how the stress profile across the substrate 201 changes with respect to cooling time while forming a series of intermediate layers 408 using a desired process sequence, such as running the block 504-508 sequence multiple times.
[0061]
[0068] Graph 600 shows the cooling time (e.g., Δt) in block 508. coolThe effect of the increase in ) on the radially measured stress values across the film laminate 400 is shown. Lines 604-612 represent the stress profile radially across the substrate 201 for the bulk layer 404 deposited after running block 508. Each line 604-612 shows the stress profile across the surface of the substrate 201 with different cooling times. For example, line 604 represents the stress profile in the film laminate 400 where one or more processes performed during block 508 use a cooling time of approximately 10 seconds. Line 608 shows the stress profile in the film laminate 400 where a cooling time of approximately 20 seconds is used during block 508. Line 612 represents the stress profile in the film laminate 400 where one or more processes performed during block 508 use a cooling time of approximately 50 seconds. In at least one example, the cooling time is approximately 40 seconds during block 508. Comparative Example 998 shows the stress profile across the substrate 201 when a portion of the bulk layer 404 is deposited between blocks 508 between deposition steps without any intervening temperature decrease. In other words, in the formation of Comparative Example 998, no cooling time is introduced during layer formation.
[0062]
[0069] As illustrated in Figure 6, as the cooling time increases, the variation in the stress profile from the center to the edge decreases (e.g., standard deviation), and the average or mean stress profile across the entire substrate 201 decreases. For example, in Comparative Example 998, the maximum stress value is approximately 4.8 and the minimum stress value is approximately 1.5. However, the maximum value 612a of line 612 is approximately 2.5 and the minimum value 612b is approximately 0.6. Comparing the maximum value 612a and minimum value 612b of line 612 with the maximum and minimum stress values of Comparative Example 998, we see an average decrease in stress across the substrate 201 as the cooling time increases. In addition, as shown by line 604, at the center of the substrate 201 (i.e., when the radius of the substrate 201 is 0), there is a 21% stress reduction compared to Comparative Example 998 when the cooling time is approximately 10 seconds. Line 608 shows that there is a 32% stress reduction when the cooling step is approximately 20 seconds. Line 612 shows approximately 98% stress reduction compared to Comparative Example 998. These examples are illustrative only, and it should be understood that other examples not specifically detailed herein may be incorporated based on the differences between lines 604-612 and between lines 604-612 and Comparative Example 998.
[0063]
[0070] Figure 7 shows the change in crystallinity in a thin film layer formed from multiple consecutive intermediate layers 408 formed in various intermediate cooling steps (i.e., block 508).
[0064]
[0071] The curve shown in Figure 7 is an example of a rocking curve. Rocking curves, typically formed using the XRD inspection process, can detect the presence of one or more crystal orientations in a deposited layer formed from multiple intermediate layers 408. The resulting rocking curve allows for the identification of defect attributes found in the formed layer, such as dislocation density, mosaic extent, curvature, misorientation of adjacent crystal structures, and crystalline heterogeneity. Measuring the peaks of a given rocking curve corresponds to the regularity of interatomic spacing (i.e., d spacing), which represents the distance between the planes of atoms in the crystal structure of a given intermediate layer 408(n). Measuring the relative amplitude of the peaks can also provide parameters such as composition, strain, and relaxation. Graph 700 includes a curve 704 of a bulk layer 404 generated by decreasing the temperature between the formation of consecutive intermediate layers (e.g., 408(n) and 408(n+1)) by repeatedly using the method from block 504 to block 508. Curve 704 was formed over approximately 20 interlayer deposition times of about 10 seconds. In other words, curve 704 represents the formation of approximately 20 interlayers 408. Thus, curve 704 has a single peak 806 indicating that the interface between the continuous interlayers 408 and two adjacent groups of formed interlayers 408 has substantially the same crystal orientation. For example, the first group of interlayers could be interlayer 408(1) and interlayer 408(2), but the cooling time in block 508 occurs between interlayer 408(1) and interlayer 408(2).
[0065]
[0072] This graph shows the configuration of 20 groups of consecutive intermediate layers 408, but it was found that by forming more than 10 groups of consecutive intermediate layers 408 with the process steps of block 508 inserted between each deposition step, a film laminate 400 with properties similar to those shown in curve 704 is achieved. In addition, it was found that the cooling time between adjacent groups of consecutive intermediate layers 408 can be approximately 10 to 40 seconds. Each intermediate layer 408 represented in curve 704 was deposited over a period of approximately 10 to 50 seconds.
[0066]
[0073] Comparative Example 999 is another curve generated on a bulk film layer (not shown) containing two intermediate layers 408 deposited over a first and second period. Comparative Example 999 is deposited in block 508 in two depositions without intermediate cooling of the substrate 201. The first period is approximately 500 seconds or longer, and the second period is approximately 1500 seconds or longer. In Comparative Example 999, the first peak 996 and the second peak 997 indicate that the interface of the two consecutive intermediate layers 408 has a different crystal orientation, which may originate from the interface or small angle grain boundaries in each intermediate layer 408. As shown, Comparative Example 999 shows the first peak 996 between angle 1 and angle 2. The first peak 996 has a value of approximately 2.7. Comparative Example 999 shows the second peak 997 between angle 2 and angle 3. The second peak 997 has a value of approximately 1.8. The two peaks in Comparative Example 999 (i.e., the first peak 996 and the second peak 997) indicate the presence of an undesirable change in crystal orientation between the first intermediate layer 408(n) and the second intermediate layer 408(n+1).
[0067]
[0074] Curve 704 shows a thin film layer containing a single peak 806 between angles 0 and 5. The single peak 806 in curve 704 indicates greater uniformity of crystal orientation at the interface of the consecutive interlayer 408 compared to Comparative Example 999. When forming the bulk layer 404 in block 504-508, it is expected that the number of defects at the interface of the consecutive interlayer 408 decreases as the number of cycles increases (504-508). As the number of cycles increases to approximately 5 cycles and approximately 15 cycles, the defects between the consecutive interlayer 408 decrease significantly, leaving a single peak 806. For example, when the number of cycles increases beyond approximately 10, a single peak 806 is formed. The interface of the consecutive interlayer 408 becomes smoother, and as a result, the crystal orientation between the consecutive interlayer 408 produces an average slope of approximately 45 degrees on the rocking curve in graph 700.
[0068]
[0075] Figure 8 is a plan view of a controller 800 that can issue commands to any one of the processing chambers shown in Figures 1 and 3.
[0069]
[0076] An optional display unit 801 may be coupled to the controller 800. The controller 700 includes a processor 804, a memory 808, and a support circuit 812 coupled to each other. The controller 800 may be mounted on the cluster tool 100, or in an alternative example, the controller 800 may be mounted on one of the processing chambers in Figure 2 or Figure 3, or it may be a remote device (not shown).
[0070]
[0077] The display unit 801 includes an input control unit, such as a power supply, clock, cache, and input / output (I / O) circuits, which are coupled to various components of the display unit 801 to facilitate their control. The processor 804 is one of any form of general-purpose microprocessor or general-purpose central processing unit (CPU), each of which can be used in industrial settings such as a programmable logic control unit (PLC).
[0071]
[0078] Memory 808 is non-transient and may be one or more readily available memories such as random access memory (RAM), read-only memory (ROM), or any other form of digital storage, local or remote. When executed by processor 804, memory 808 includes instructions that facilitate the operation of any of the processing chambers shown in Figures 1 to 3. The instructions in memory 808 are in the form of a program product, such as a program that implements the method of this disclosure. The program code of the program product may conform to any one of many different programming languages. Exemplary computer-readable storage media include, but are not limited to, (i) non-write storage media on which information is stored permanently (e.g., read-only memory devices in a computer, such as a CD-ROM drive, flash memory, ROM chip, or CD-ROM disk readable by any type of solid-state non-volatile semiconductor memory), and (ii) writable storage media on which modifiable information is stored (e.g., a floppy disk in a diskette drive or hard disk drive, or any type of solid-state random access semiconductor memory). Such computer-readable storage media are examples of the disclosure when they carry computer-readable instructions that dictate the function of the methods described herein.
[0072]
[0079] In one example, the controller 800 may be implemented as a program product stored on a computer-readable storage medium (e.g., 808) for use with a computer system (not shown). One or more programs in the program product define the functions of the disclosure described herein.
Claims
1. 1. A method of forming a piezoelectric film, comprising: (a) depositing a first piezoelectric film layer on a surface of a substrate by a first physical vapor deposition (PVD) process; (b) depositing a second piezoelectric film layer on top of and in contact with the first piezoelectric film layer by a second physical vapor deposition (PVD) process; (c) reducing a temperature of the substrate after forming the first piezoelectric film layer and before forming the second piezoelectric film layer, the temperature being reduced by performing a process for a first period of time; performing processes (a), (b) and (c) one or more additional times; wherein process (c) in the additionally performed processes (a), (b) and (c) is performed for a second period of time, the second period of time being different from the first period of time.
2. 2. The method of claim 1, wherein the process for depositing the first piezoelectric film layer and the process for depositing the second piezoelectric film layer have at least one process parameter that is different, and the at least one process parameter is selected from the group consisting of a deposition process pressure, a bias power, and a deposition process time.
3. the first PVD process and the second PVD process each include: sputtering material from a target comprising scandium while flowing a process gas comprising argon and nitrogen in a ratio between about 1:1 and about 5:1; The method of claim 1 , comprising:
4. the first PVD process and the second PVD process each include: sputtering material from a target comprising aluminum while flowing a process gas comprising argon and nitrogen in a ratio between about 1:1 and about 5:1; The method of claim 1 , comprising:
5. 2. The method of claim 1, wherein the first piezoelectric film layer and the second piezoelectric film layer comprise the same combination of materials and a time for forming the first piezoelectric film layer and the second piezoelectric film layer in less than about 40 seconds.
6. Furthermore, forming a third piezoelectric film layer on the substrate at the first bias power for a third period of time by using a third PVD process; cooling the first piezoelectric film layer and the second piezoelectric film layer before forming the third piezoelectric film layer; 2. The method of claim 1, comprising:
7. 2. The method of claim 1, wherein the first period of time and the second period of time are each between about 6 seconds and about 60 seconds, and wherein inspection of the interface between the first piezoelectric film layer and the second piezoelectric film layer produces a rocking curve having substantially a single peak.
8. Furthermore, 10. The method of claim 1, comprising depositing the first piezoelectric film layer on the surface of the substrate while flowing a process gas comprising argon (Ar) and nitrogen (N).
9. 1. A method of forming a piezoelectric film, comprising: (a) depositing a first piezoelectric film layer on a surface of a substrate by a first physical vapor deposition (PVD) process in a first processing chamber; (b) depositing a second piezoelectric film layer on top of and in contact with the first piezoelectric film layer by a second PVD process in the first processing chamber; (c) reducing a temperature of the substrate after forming the first piezoelectric film layer and before forming the second piezoelectric film layer, the temperature being reduced by performing a process for a first period of time; and performing processes (a), (b) and (c) one or more additional times. wherein the additionally performed process (c) is performed for a second period of time, the second period of time being different from the first period of time.
10. 10. The method of claim 9, wherein process (c) further comprises pausing the deposition process for a pause period, the pause period being from about 3 seconds to about 50 seconds, the first period being between about 10 seconds and about 60 seconds, and the second period being between about 10 seconds and about 50 seconds.
11. 10. The method of claim 9, wherein the process for depositing the first piezoelectric film layer and the process for depositing the second piezoelectric film layer have at least one process parameter that is different, and the at least one process parameter is selected from the group consisting of a deposition process pressure, a bias power, and a deposition process time.
12. the first PVD process and the second PVD process each include: sputtering material from a target comprising scandium while flowing a process gas comprising argon and nitrogen in a ratio between about 1:1 and about 5:1; 10. The method of claim 9, comprising:
13. the first PVD process and the second PVD process each include: sputtering material from a target comprising aluminum while flowing a process gas comprising argon and nitrogen in a ratio between about 1:1 and about 5:1; 10. The method of claim 9, comprising:
14. Reducing the temperature of the substrate after forming the first piezoelectric film layer and before forming the second piezoelectric film layer may further include: actively cooling the first piezoelectric film layer before depositing the second piezoelectric film layer; depositing each of the first piezoelectric film layer and the second piezoelectric film layer in less than about 60 seconds; 10. The method of claim 9, comprising:
15. Furthermore, depositing a third piezoelectric film layer on the substrate at a first bias power for a third period of time; cooling the first piezoelectric film layer and the second piezoelectric film layer before depositing the third piezoelectric film; 10. The method of claim 9, comprising:
16. 16. The method of claim 15, further comprising cooling the first piezoelectric film layer and the second piezoelectric film layer before depositing a third piezoelectric film layer over the first piezoelectric film layer and the second piezoelectric film layer.
17. 1. An apparatus for processing a substrate, comprising: a processor coupled to at least one non-transitory computer-readable medium, the at least one non-transitory computer-readable medium comprising instructions that, when executed by the processor, are configured to perform a method; wherein the method comprises: (a) depositing a first piezoelectric film layer on a surface of a substrate by a first physical vapor deposition (PVD) process; (b) depositing a second piezoelectric film layer on top of and in contact with the first piezoelectric film by a second physical vapor deposition (PVD) process; (c) reducing a temperature of the substrate after forming the first piezoelectric film layer and before forming the second piezoelectric film layer, the temperature being reduced by performing a process for a first period of time; performing processes (a), (b) and (c) one or more additional times; wherein process (c) in the additionally performed processes (a), (b) and (c) is performed for a second period of time, the second period of time being different from the first period of time.
18. The instructions executed by the processor further include: actively cooling the first piezoelectric film layer before depositing the second piezoelectric film layer; The first piezoelectric film layer and the second piezoelectric film layer are deposited in less than about 60 seconds.
18. The apparatus of claim 17, configured to:
19. The instructions executed by the processor further include: depositing the second piezoelectric film layer on the substrate using a first bias power different from a bias power generated during the deposition of the first piezoelectric film layer; The first piezoelectric film layer and the second piezoelectric film layer are cooled from a first temperature to a second temperature before depositing a third piezoelectric film layer.
18. The apparatus of claim 17, configured to:
20. The instructions executed by the processor further include: sputtering material from a target comprising aluminum or aluminum and scandium while flowing a process gas comprising argon and nitrogen in a ratio between about 1:1 and about 5:1; 20. The device of claim 19, configured to be formed by