Testing method

Abstract

To provide an inspection method capable of inspecting the side surfaces of split pieces of a split wafer.SOLUTION: An inspection method of a divided wafer includes a wafer stacking step 101 of stacking a transfer wafer on a wafer divided into a plurality of chips, a particle transfer step 102 of positioning the transfer wafer to be superimposed on the divided wafer after performing the wafer stacking step 101, and applying vibration to the wafer superimposed on the transfer wafer to drop, onto the transfer wafer, particles adhering to the side surfaces of the chips, and an inspection step 103 of inspecting particles on the transfer wafer after performing the particle transfer step 102.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to a method for inspecting a divided wafer. [Background technology]

[0002] In a semiconductor device manufacturing process, a plurality of semiconductor devices are manufactured by forming a plurality of semiconductor devices on a wafer and then dicing the wafer using a cutting device, a laser processing device, or the like.

[0003] When singulating using a cutting blade, particles such as swarf are generated when the wafer is cut. In addition, when a modified layer is formed by irradiating a laser beam and then singulating by applying an external force, particles are generated when the wafer is divided.

[0004] If these particles remain on the wafer, they not only degrade the performance of the device, but also cause bonding failures in the subsequent bonding process if they adhere to electrodes. Therefore, it is important to reduce particle adhesion, and methods for detecting particles on the wafer have been proposed in studying and evaluating ways to reduce particle adhesion (see, for example, Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Publication No. 11-17399 [Patent Document 2] JP 2008-288423 A Summary of the Invention [Problem to be solved by the invention]

[0006] On the other hand, when a wafer is diced into individual chips, the resulting semiconductor devices are picked up from the wafer, mounted, and packaged. However, particles that are generated when the wafer is diced and adhere to the sides of the chips can fall off during pick-up or mounting, potentially causing bonding failure.

[0007] Conventionally, particles on the side of chip-shaped semiconductor devices were not evaluated. However, with the further miniaturization of electrodes and the increasing integration of devices in recent years, there is a strong demand for evaluation of the divided side of wafers.

[0008] In recent years, semiconductor devices have become smaller, and the size of electrodes and the spacing between electrodes have also become finer. In order to achieve even higher integration, methods are being considered for manufacturing stacked devices by bonding semiconductor wafers together via flat electrodes rather than protruding electrodes (bumps). When bonding wafers together on their surfaces in this way, stricter particle control is required than ever before, because particles adhering to the wafer surfaces can cause bonding failures.

[0009] An object of the present invention is to provide an inspection method capable of inspecting the side surfaces of divided pieces of a divided wafer. [Means for solving the problem]

[0010] In order to solve the above-mentioned problems and achieve the object, the inspection method of the present invention is a method for inspecting a divided wafer, and is characterized by comprising a wafer stacking step of overlaying a transfer wafer on a wafer divided into a plurality of divided pieces, a particle transfer step of positioning the transfer wafer on the bottom and the divided wafer on the top after performing the wafer stacking step and applying vibration to the wafer overlaid on the transfer wafer to cause particles adhering to the side of the divided pieces to fall onto the transfer wafer, and an inspection step of inspecting particles on the transfer wafer after performing the particle transfer step.

[0011] In the inspection method, the inspection step may inspect at least any one of the position, number, and size of particles on the transfer wafer.

[0012] In the above inspection method, the wafer and the transfer wafer each have a mark indicating a crystal orientation, and in the wafer stacking step, the wafer and the transfer wafer are overlaid using the marks on the wafer as a reference, and in the inspection step, the mark on the transfer wafer is used as a reference. Effect of the Invention

[0013] The present invention has an effect of being able to inspect the side surfaces of the divided pieces of a divided wafer. [Brief description of the drawings]

[0014] [Figure 1] FIG. 1 is a perspective view of a wafer divided into chips to be inspected by the inspection method according to the first embodiment. [Diagram 2] FIG. 2 is a flowchart showing the flow of the inspection method according to the first embodiment. [Diagram 3] FIG. 3 is a perspective view that illustrates a wafer stacking step of the inspection method illustrated in FIG. [Figure 4] FIG. 4 is a side view, partially in cross section, showing a schematic diagram of the particle transfer step of the inspection method shown in FIG. [Diagram 5] FIG. 5 is a side view, partially in cross section, showing a schematic diagram of a modified example of the particle transfer step of the inspection method shown in FIG. [Figure 6] FIG. 6 is a plan view that illustrates a wafer in an inspection step of the inspection method illustrated in FIG. [Figure 7] FIG. 7 is a plan view that illustrates a transfer wafer in an inspection step of the inspection method illustrated in FIG. [Figure 8] FIG. 8 is a plan view of a wafer on which the number of particles was counted to confirm the effect of the inspection method according to the first embodiment. [Figure 9]FIG. 9 is a plan view of a transfer wafer onto which particles of the wafer shown in FIG. 8 have been transferred by the inspection method according to the first embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] The form (embodiment) for carrying out the present invention will be described in detail with reference to the drawings. The present invention is not limited to the contents described in the following embodiment. Furthermore, the components described below include those that a person skilled in the art can easily imagine and those that are substantially the same. Furthermore, the configurations described below can be appropriately combined. Furthermore, various omissions, substitutions, or modifications of the configurations can be made without departing from the gist of the present invention.

[0016] [Embodiment 1] An inspection method according to a first embodiment of the present invention will be described with reference to the drawings. Fig. 1 is a perspective view of a wafer divided into chips to be inspected by the inspection method according to the first embodiment. Fig. 2 is a flowchart showing the flow of the inspection method according to the first embodiment.

[0017] (Wafer) The inspection method according to the first embodiment is a method for inspecting a wafer 1 shown in Fig. 1. The wafer 1 to be inspected by the inspection method according to the first embodiment is a disk-shaped semiconductor wafer or an optical device wafer, etc., with a substrate 2 made of silicon, sapphire, gallium arsenide, SiC (silicon carbide), etc. The wafer 1 has a front surface 3 and a back surface 4 on the rear side of the front surface 3, and is formed in a disk shape with the front surface 3 and the back surface 4 parallel to each other. The wafer 1 has a plurality of planned division lines 5 that intersect with the front surface 3, and devices 6 are formed in each of the areas partitioned in a lattice pattern by the planned division lines 5.

[0018] In the first embodiment, the device 6 is, for example, an integrated circuit such as an IC (Integrated Circuit) or an LSI (Large Scale Integration), or various memories (semiconductor memory devices). In the first embodiment, the device 6 includes electrodes (not shown) that electrically connect the device 6 to electrodes of a substrate on which the device 6 is mounted or other devices 6. In the first embodiment, the electrodes of the device 6 are manufactured by the same manufacturing method as the conductor patterns that constitute the integrated circuit or various memories, and are formed flat.

[0019] The wafer 1 is divided into individual chips 7 along the intended division lines 5. That is, the wafer 1 has division grooves 8 formed between the chips 7, which penetrate the wafer 1 itself. The chip 7 is composed of a part of the substrate 2 and a device 6, and has a front surface 3, a back surface 4, and a number of side surfaces connected to the front surface 3 and the back surface 4. The same parts of the wafer 1 and the chip 7 are denoted by the same reference numerals in the following description. The side surfaces are also the inner surfaces of the division grooves 8.

[0020] In embodiment 1, the wafer 1 is irradiated with a laser beam along the intended dividing lines 5 to form a modified layer, and then broken at the modified layer to be divided into chips 7. However, in the present invention, the wafer 1 may be divided into individual chips 7 by irradiating a laser beam of a wavelength absorbed by the substrate 2 along the intended dividing lines 5 to perform an ablation process, or by performing a cutting process in which a cutting blade cuts along the intended dividing lines 5, or by forming grooves along the intended dividing lines 5 by the ablation process or cutting process, and then grinding the back surface 4.

[0021] The modified layer means a region in which the density, refractive index, mechanical strength, and other physical properties are different from those of the surrounding area, and examples of such regions include a melting process region, a crack region, a dielectric breakdown region, a refractive index change region, and a region in which these regions are mixed, etc. The modified layer has a lower mechanical strength than other parts of the substrate 2.

[0022] The wafer 1 has a disk-shaped tape 21 attached to its outer edge with an annular frame 20 attached to its back surface 4, and is supported within an opening 22 inside the annular frame 20. The outer diameter of the tape 21 and the inner diameter of the annular frame 20 are larger than the outer diameter of the wafer 1. When the wafer 1 is divided into individual chips 7, particles 10 (shown in FIG. 7, etc.) are generated. The wafer 1 also has a mark 9 indicating a crystal orientation. In the first embodiment, the mark 9 is a notch formed by cutting the outer edge of the wafer 1 in an inverted V shape, but the present invention is not limited to a notch.

[0023] In addition, in the first embodiment, the wafer 1 is divided into individual chips 7, but in the present invention, the wafer may be divided into at least two chips. In this case, the wafer 1 does not need to have the devices 6 formed on the front surface 3.

[0024] (Testing method) The inspection method according to the first embodiment is an inspection method for counting the number of particles adhering to the wafer 1. The inspection method is used, for example, to select processing conditions that generate a small number of particles when selecting processing conditions for dividing the wafer 1 into individual chips 7. The inspection method according to the first embodiment includes a wafer stacking step 101, a particle transfer step 102, and an inspection step 103, as shown in FIG.

[0025] (Wafer stacking step) Fig. 3 is a perspective view that typically shows a wafer stacking step of the inspection method shown in Fig. 2. The wafer stacking step 101 is a step of stacking a transfer wafer 11 on the wafer 1 divided into a plurality of chips 7.

[0026] In the wafer stacking step 101, as shown in Fig. 3, a transfer wafer 11 is stacked on the front surface 3 of the wafer 1. The transfer wafer 11 is a wafer in which the number of particles attached thereto is controlled, such as a prime wafer or a wafer on which an oxide film is formed. In the first embodiment, the transfer wafer 11 is a prime wafer formed in a disk shape having a front surface 13 and a back surface 14 on the rear side of the front surface 13, and using silicon, sapphire, gallium arsenide, SiC (silicon carbide), or the like as the substrate 12.

[0027] In the first embodiment, the outer diameter of the transfer wafer 11 is equal to the outer diameter of the wafer 1. The transfer wafer 11 has a mark 19 indicating a crystal orientation. In the first embodiment, the mark 19 is a notch formed by cutting out the outer edge of the transfer wafer 11 in an inverted V shape, but the present invention is not limited to a notch. In the first embodiment, the mark 19 of the transfer wafer 11 has the same shape as the mark 9 of the wafer 1.

[0028] In the first embodiment, in the wafer stacking step 101, the front surface 13 of the transfer wafer 11 is stacked on the front surface 3 of the wafer 1, and they are superimposed using the marks 9 and 19 of the wafer 1 and the transfer wafer 11 as references. In the first embodiment, in the wafer stacking step 101, the marks 9 and 19 are superimposed on each other.

[0029] (Particle transfer step) Fig. 4 is a side view, partially in cross section, showing a schematic diagram of the particle transfer step of the inspection method shown in Fig. 2. Fig. 5 is a side view, partially in cross section, showing a schematic diagram of a modified example of the particle transfer step of the inspection method shown in Fig. 2. The particle transfer step 102 is a step in which, after the wafer stacking step 101 is performed, the transfer wafer 11 is positioned on the bottom and the divided wafer 1 is positioned on the top, and vibration is applied to the wafer 1 stacked on the transfer wafer 11 to cause particles adhering to the side surface of the chip 7 to fall onto the transfer wafer 11.

[0030] In the first embodiment, in the particle transfer step 102, the wafer 1 is placed on the holding surface 32 of the chuck table 31 of the transfer device 30 via the transfer wafer 11, as shown in Fig. 4. That is, in the wafer stacking step 101, of the wafer 1 and the transfer wafer 11 that are stacked on top of each other, the transfer wafer 11 is placed on the holding surface 32 of the chuck table 31 of the transfer device 30, and the wafer 1 is positioned above the transfer wafer 11.

[0031] In the particle transfer step 102, the transfer device 30 suction-holds the transfer wafer 11 on the holding surface 32 of the chuck table 31, and clamps the annular frame 20 with clamp parts 33 around the chuck table 31. In the particle transfer step 102, the transfer device 30 vibrates the chuck table 31 for a predetermined time in a direction 34 parallel to the holding surface 32, and vibrates the chuck table 31 for a predetermined time in a direction 35 perpendicular to the holding surface 32. In the particle transfer step 102, the transfer device 30 drops and transfers the particles 10 adhering to the surface 3 of the wafer 1 onto the surface 13 of the transfer wafer 11, and also drops and transfers the particles 10 adhering to the sides of the individually divided chips 7 of the wafer 1 onto the surface 13 of the transfer wafer 11.

[0032] 5, in the particle transfer step 102, the wafer 1 may be placed on the holding surface 32 of the chuck table 31 of the transfer device 30-1 via the transfer wafer 11, and the annular frame 20 may be placed on a mounting surface 36 that is flush with the holding surface 32. In this case, the transfer device 30-1 holds the transfer wafer 11 on the holding surface 32 of the chuck table 31 by suction.

[0033] In the present invention, in the particle transfer step 102, the transfer device 30-1 overlaps a disk-shaped vibration applying member 37, which has a diameter larger than the outer diameter of the wafer 1 and smaller than the inner diameter of the annular frame 20, on the back surface 4 of the wafer 1 via the tape 21. In the present invention, in the particle transfer step 102, the transfer device 30-1 applies power to the ultrasonic vibrator 38 in the vibration applying member 37 for a predetermined time, causing the ultrasonic vibrator 38 to ultrasonically vibrate (vibration having a frequency equivalent to that of ultrasonic waves). In the present invention, in the particle transfer step 102, the transfer device 30-1 may drop and transfer the particles 10 attached to the front surface 3 of the wafer 1 onto the front surface 13 of the transfer wafer 11, and may also drop and transfer the particles 10 attached to the side surfaces of the individually divided chips 7 of the wafer 1 onto the front surface 13 of the transfer wafer 11.

[0034] (Inspection step) Fig. 6 is a plan view showing a wafer in an inspection step of the inspection method shown in Fig. 2. Fig. 7 is a plan view showing a transfer wafer in an inspection step of the inspection method shown in Fig. 2. The inspection step 103 is a step of inspecting the particles 10 on the transfer wafer 11 after the particle transfer step 102 is performed.

[0035] In the first embodiment, in the inspection step 103, the wafer 1 and the transfer wafer 11 that are stacked on top of each other are separated into the wafer 1 shown in Fig. 6 and the transfer wafer 11 shown in Fig. 7. In the transfer wafer 11 shown in Fig. 7, particles 10 that have fallen from the side surfaces of each chip 7, i.e., from the inner surfaces of the division grooves 8, adhere to the surface 13, and therefore the particles 10 adhere to positions of the surface 13 that overlap the division grooves 8.

[0036] In the first embodiment, in the inspection step 103, a well-known particle counter is used to detect the position and size of each particle 10 on the surface 13 of the transfer wafer 11, and the total number (corresponding to the number) of the particles 10 on the surface 13 of the transfer wafer 11 is counted. Thus, in the embodiment, in the inspection step 103, the positions, total number, and sizes of the particles 10 on the surface 13 of the transfer wafer 11 are inspected, but in the present invention, it is sufficient to inspect at least any one of the positions, total number, and sizes of the particles 10.

[0037] In the first embodiment, the position of the particle 10 detected in the inspection step 103 is specified by the distance in the X-axis direction and the distance in the Y-axis direction from the mark 19 on the transfer wafer 11, which is a reference position. Note that in the first embodiment, the X-axis direction is parallel to one of the lattice-shaped planned dividing lines 5, and the Y-axis direction is parallel to the other of the lattice-shaped planned dividing lines 5.

[0038] 7 shows particles 10 that have fallen from the side of each chip 7, i.e., from the inner surface of the dividing groove 8, onto the front surface 13 of the transfer wafer 11, and omits other particles 10. Thus, in the inspection step 103, the position of the particle 10 is determined based on the mark 19 on the transfer wafer 11.

[0039] In the inspection method according to the first embodiment described above, in the wafer stacking step 101, the transfer wafer 11 is superimposed on the divided wafer 1, and in the particle transfer step 102, vibration is applied to the divided wafer 1 with the transfer wafer 11 facing down. Therefore, in the inspection method according to the first embodiment, the particles 10 adhering to the side surface of the chip 7 can be dropped onto the transfer wafer 11, and the particles 10 of the divided wafer 1 can be transferred to the transfer wafer 11.

[0040] Therefore, the inspection method according to the first embodiment can evaluate the particles 10 attached to the side surface of the chip 7 by inspecting the particles 10 on the front surface 13 of the transfer wafer 11 in the inspection step 103. As a result, the inspection method according to the first embodiment has an effect of being able to inspect the side surface of the chip 7 of the divided wafer 1.

[0041] Next, the inventor of the present invention confirmed the effect of the inspection method according to embodiment 1. Fig. 8 is a plan view of a wafer on which the number of particles was counted to confirm the effect of the inspection method according to embodiment 1. Fig. 9 is a plan view of a transfer wafer onto which the particles of the wafer shown in Fig. 8 have been transferred by the inspection method according to embodiment 1. Note that marks 9 and 19 are omitted in Figs. 8 and 9.

[0042] For the confirmation, a known particle counter was used to detect the position and size of each particle 10 on the surface 3 of the wafer 1 divided into chips 7 shown in Fig. 8, and the total number (corresponding to the number) of particles 10 on the surface 3 of the wafer 1 was counted. Next, the wafer stacking step 101 and the particle transfer step 102 of the inspection method according to the first embodiment were performed to transfer the particles 10 of the wafer 1 shown in Fig. 8 to the surface 13 of the transfer wafer 11 shown in Fig. 9. A known particle counter was used to detect the position and size of each particle 10 on the surface 13 of the transfer wafer 11 shown in Fig. 9, and the total number (corresponding to the number) of particles 10 on the surface 13 of the transfer wafer 11 was counted.

[0043] Particles 10 were attached to the surface 13 of the transfer wafer 11 shown in Fig. 9 along the dividing grooves 8 of the wafer 1 shown in Fig. 8. For this reason, according to the transfer wafer 11 shown in Fig. 9, in the wafer lamination step 101, the transfer wafer 11 is superimposed on the divided wafer 1, and in the particle transfer step 102, vibration is applied to the divided wafer 1 with the transfer wafer 11 facing down, so that it is possible to transfer the particles 10 attached to the inner surface of the dividing grooves 8, i.e., the side surface of the chip 7, to the transfer wafer 11, and it is therefore possible to inspect the side surface of the chip 7 of the divided wafer 1.

[0044] It should be noted that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention. [Explanation of symbols]

[0045] 1 wafer 7 Chips (split pieces) 9 Mark 10 Particles 11 Transfer wafer 19 Marks 101 Wafer stacking step 102 Particle transfer step 103 Inspection Steps

Claims

1. 1. A method for inspecting a divided wafer, comprising the steps of: a wafer lamination step of laminating a transfer wafer onto the wafer divided into a plurality of divided pieces; a particle transfer step in which, after the wafer stacking step, the transfer wafer is positioned below the divided wafer and above the divided wafer, and vibration is applied to the wafer stacked on the transfer wafer to cause particles adhering to the side surface of the divided piece to fall onto the transfer wafer; and an inspection step of inspecting the particles on the transfer wafer after carrying out the particle transfer step.

2. 2. The inspection method according to claim 1, wherein the inspection step inspects at least one of the position, the number, and the size of particles on the transfer wafer.

3. the wafer and the transfer wafer each have a mark indicating a crystal orientation; In the wafer stacking step, the wafer and the transfer wafer are stacked based on the marks of the wafer, 3. The inspection method according to claim 1, wherein the inspection step uses a mark on the transfer wafer as a reference.

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