Wiring Board

Abstract

To provide a wiring board that can efficiently dissipate heat generated from electronic components.SOLUTION: The wiring board includes: an insulating substrate on which electronic components are mounted; a first wiring arranged on a first surface of the insulating substrate that is on the side of the electronic components and connected to the electronic components; and a second wiring arranged on a second surface of the insulating substrate that is on the opposite side of the first surface of the substrate. The insulating substrate has a non-through via formed in the second surface. At least a portion of the non-through via is constituted of a material having a higher thermal conductivity than the insulating substrate.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a wiring board. [Background technology]

[0002] Conventionally, in devices including wiring boards on which electronic components such as semiconductors and light-emitting elements are mounted, various structures have been considered according to the characteristics of the electronic components mounted on the wiring board. For example, in a light-emitting device including a ceramic substrate disclosed in Patent Document 1, a light reflecting portion is provided that reflects incident light in the direction of a light-emitting observation surface in order to suppress a decrease in the luminance of light emitted by the light-emitting element mounted on the ceramic substrate. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2004-111937 A Summary of the Invention [Problem to be solved by the invention]

[0004] On the other hand, electronic components that are expected to be mounted on a wiring board generate heat according to the operation of the electronic components. Therefore, in addition to structures according to the characteristics of electronic components, structures that take heat dissipation efficiency into consideration are also being considered for wiring boards. Here, we consider heat dissipation in a structure in which wiring is arranged on each of a first surface, which is the surface of the wiring board on which electronic components are mounted, and a second surface, which is the surface opposite to the first surface. In such a structure, heat generated in the electronic components is mainly transferred from the wiring on the first surface side to the wiring on the second surface side via the wiring board. However, the heat dissipation efficiency in such a structure has not been fully considered so far, and there has been a demand for the development of a wiring board that can efficiently dissipate heat generated from electronic components.

[0005] The present invention has been made to solve at least part of the above-mentioned problems, and has an object to provide a wiring board capable of efficiently dissipating heat generated by electronic components. [Means for solving the problem]

[0006] The present invention has been made to solve at least part of the above-mentioned problems, and can be realized in the following forms.

[0007] (1) According to one aspect of the present invention, there is provided a wiring board comprising: an insulating substrate on which an electronic component is mounted, a first wiring arranged on a first surface of the insulating substrate that faces the electronic component and connects to the electronic component, and a second wiring arranged on a second surface of the insulating substrate that is opposite to the first surface, wherein non-through vias are formed on the second surface of the insulating substrate, and at least a portion of the non-through vias is made of a material having a higher thermal conductivity than the insulating substrate.

[0008] According to this configuration, the second surface of the insulating substrate is provided with non-through vias, at least a portion of which is made of a material having a higher thermal conductivity than the insulating substrate. Therefore, at least a portion of the heat generated by the electronic components is transferred to the insulating substrate and then transferred to the second surface side via the non-through vias, so that the heat generated by the electronic components can be efficiently dissipated. In addition, since the non-through vias formed on the second surface do not penetrate the insulating substrate to reach the first surface, the flatness of the first surface on which the electronic components are mounted is not impaired by the formation of the non-through vias, so that the flatness of the first surface can be maintained.

[0009] (2) In the wiring board of the above aspect, the non-through via may be formed in a portion of the second surface where the second wiring is disposed. According to this configuration, at least a part of the heat generated from the electronic component is transferred to the blind via and then to the second wiring. Generally, wiring is made of a material with high electrical conductivity, and such a material also has high thermal conductivity. Therefore, according to this configuration, the heat generated from the electronic component can be dissipated more efficiently.

[0010] (3) In the wiring board of the above aspect, the non-through via may be formed in a portion in which the second wiring is arranged, at a position closer to the center of the insulating substrate than a central position in a width direction of the second wiring. According to this configuration, when heat tends to concentrate in the vicinity of a position facing the center of the insulating substrate in the electronic component, the non-through vias are arranged close to such a position, so that the heat generated from such a position can be efficiently dissipated.

[0011] (4) In the wiring board of the above aspect, a maximum width of the non-through via may be equal to or smaller than a minimum width of the second wiring located above the non-through via. According to this configuration, the minimum width of the second wiring is designed to ensure insulation from other components, so that insulation from other components can also be ensured for non-through vias having a maximum width smaller than this minimum width.

[0012] (5) In the wiring board of the above aspect, the length from the second surface to the bottom surface of the non-through via may be less than two-thirds of the length from the first surface to the second surface in the portion where the non-through via is formed. According to this configuration, it is possible to ensure a certain degree of length from the second surface to the bottom surface of the non-through via while maintaining the rigidity of the insulating substrate.

[0013] (6) In the wiring board of the above aspect, there may be no wiring connected to a side surface of the non-through via. With this configuration, since there is no wiring connected to the side surface of the non-through via, it is possible to prevent heat generated from the wiring from concentrating on the non-through via. Therefore, while avoiding localized heat generation, the heat transferred from the insulating substrate to the non-through via can be efficiently transferred toward the second surface side.

[0014] (7) In the wiring board of the above aspect, there may be no wiring connected to the bottom surface of the non-through via. According to this configuration, it is possible to easily ensure insulation between the non-through via and the second wiring. When a wiring connected to the bottom surface of the non-through via is present, the wiring tends to be routed approximately parallel to the first surface or the second surface. Therefore, since the distance between the wiring connected to the bottom surface of the non-through via and the second wiring is small, there is a possibility that insulation cannot be ensured. In addition, when there is neither a wiring connected to the side surface of the non-through via nor a wiring connected to the bottom surface, the non-through via does not have a conductive function, and therefore, a material constituting the non-through via can be selected by considering only thermal conductivity without considering electrical conductivity.

[0015] (8) In the wiring board of the above aspect, opposing non-through vias may be formed on the first surface, and at least a portion of the opposing non-through vias may be made of a material having a higher thermal conductivity than the insulating substrate. According to this configuration, at least a portion of the heat generated by the electronic component is transferred to the insulating substrate via the opposing non-penetrating vias and then to the second surface side, thereby enabling the heat generated by the electronic component to be efficiently dissipated.

[0016] (9) In the wiring board of the above aspect, the opposing non-through vias may include an opposing non-through via formed in a portion of the first surface where the second wiring is not arranged when viewed transparently from the first surface to the second surface and where the first wiring is arranged. According to this configuration, even if the depth of the opposing non-through via (the length from the first surface to the bottom surface of the opposing non-through via) fluctuates due to processing variations and becomes deeper than the preset depth, since the second wiring is not arranged on the portion of the second surface facing the bottom surface of the opposing non-through via, insulation between the opposing non-through via and the second wiring can be ensured.

[0017] (10) In the wiring board of the above aspect, the opposing non-through vias may include an opposing non-through via that is formed in a position where at least a portion of the opposing non-through via overlaps with the non-through via when viewed through from the first surface to the second surface. With this configuration, at least a portion of the heat generated from the electronic component is easily transferred to the insulating substrate via the opposing non-through vias and then to the non-through vias, thereby enabling the heat generated from the electronic component to be efficiently dissipated.

[0018] The present invention can be realized in various forms, for example, in the form of an insulating substrate, a wiring substrate, a wiring substrate for semiconductors, and components including these, a method for manufacturing an insulating substrate, and a method for manufacturing a wiring substrate. [Brief description of the drawings]

[0019] [Figure 1] 1 is an explanatory diagram illustrating a cross-sectional configuration of a wiring board according to an embodiment of the present invention; [Diagram 2] FIG. [Diagram 3] 4 is a flowchart of a method for manufacturing a wiring board. [Figure 4] 1A to 1C are explanatory diagrams showing a manufacturing process of a wiring board. [Diagram 5] FIG. 11 is an explanatory diagram illustrating a schematic cross-sectional configuration of a wiring board according to a second embodiment. [Figure 6] FIG. 13 is an explanatory diagram illustrating a schematic cross-sectional configuration of a wiring board according to a third embodiment. [Figure 7] FIG. 13 is an explanatory diagram illustrating a cross-sectional configuration of a wiring board according to a fourth embodiment. [Figure 8]FIG. 13 is an explanatory diagram illustrating a schematic cross-sectional configuration of a wiring board according to a fifth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0020] First Embodiment FIG. 1 is an explanatory diagram showing a schematic cross-sectional configuration of a wiring board 1 according to an embodiment of the present invention. In FIG. 1, mutually orthogonal X, Y and Z axes are shown to specify the direction. FIG. 2 is a plan view of the wiring board 1. FIG. 1 is a cross-sectional view taken along the line F1-F1 in FIG. 2. The wiring board 1 is a wiring board on which a semiconductor chip SC is mounted as an electronic component. The wiring board 1 includes a first insulating substrate 10. The wiring board 1 includes a first wiring 12, a diffusion prevention layer 14, a conductive coating 16, and a bump 18 on the side on which the semiconductor chip SC is mounted as viewed from the first insulating substrate 10 (the +Z-axis direction side in FIG. 1). The wiring board 1 includes a second wiring 22, a diffusion prevention layer 24, a conductive coating 26, a solder 29, and a second insulating substrate 30 on the side opposite to the side on which the semiconductor chip SC is mounted as viewed from the first insulating substrate 10 (the -Z-axis direction side in FIG. 1).

[0021] The first insulating substrate 10 is a ceramic substrate formed of an insulating material containing Al2O3. The first insulating substrate 10 may be a substrate in which an insulating film is applied to the surface of a metal plate, as long as it has insulating properties. The first wiring 12 is arranged on a first surface 10F of the first insulating substrate 10, which is the surface on the semiconductor chip SC side (the +Z-axis direction side in FIG. 1). In the wiring substrate 1, the material constituting the first wiring 12 is Cu. The first wiring 12 includes a first wiring 12P electrically connected to each end of the semiconductor chip SC in the X-axis direction, and a first wiring 12N electrically connected to a central portion of the semiconductor chip SC in the X-axis direction. In FIG. 2, the first wiring 12 is shown by a dashed line because it is covered with a conductive coating 16 and cannot be seen.

[0022] The diffusion prevention layer 14 is disposed between the first wiring 12 and the conductive coating 16 described later, and prevents mutual movement of metal atoms between the first wiring 12 and the conductive coating 16 due to diffusion. Examples of materials constituting the diffusion prevention layer 14 include Ni, Pd, Ti, and compounds of these metals. The conductive coating 16 is a conductive film that covers the diffusion prevention layer 14. In the wiring board 1, the material constituting the conductive coating 16 is Au. The bumps 18 connect the conductive coating 16 and the semiconductor chip SC. In FIG. 1, the portions of the bumps 18 that are in contact with the semiconductor chip SC extend along the surface of the semiconductor chip SC. In the wiring board 1, the material constituting the bumps 18 is Au, similar to the conductive coating 16.

[0023] Meanwhile, second wiring 22 is arranged on second surface 10B, which is the surface of first insulating substrate 10 opposite to first surface 10F (the -Z-axis direction side in FIG. 1). In wiring board 1, second wiring 22 is made of Cu, similar to first wiring 12. In FIG. 1, second wiring 22 arranged on the -X-axis direction side is called second wiring 22L, and second wiring 22 arranged on the +X-axis direction side is called second wiring 22R.

[0024] The diffusion prevention layer 24 is similar to the above-described diffusion prevention layer 14, except that it is disposed between the second wiring 22 and a conductive coating 26 described later. The conductive coating 26 is a conductive film that covers the diffusion prevention layer 24, similar to the above-described conductive coating 16. Solder 29 connects the conductive coating 26 to a second insulating substrate 30 described later. The second insulating substrate 30 is a substrate similar to the first insulating substrate 10.

[0025] The white arrows shown in Fig. 2 indicate the current paths. As shown in Fig. 2, through vias PV1 and PV2 are formed in the first insulating substrate 10. The through via PV1 connects the second wiring 22L (shown in Fig. 1) and the first wiring 12P. The through via PV2 connects the second wiring 22R (shown in Fig. 1) and the first wiring 12N. When current is applied, the current that flows from the second wiring 22L through the through via PV1 to the first wiring 12P passes through the semiconductor chip SC, and then flows from the first wiring 12N to the second wiring 22R via the through via PV2.

[0026] As shown in FIG. 1, the first insulating substrate 10 has a non-through via NV formed on the second surface 10B. The non-through via NV is made of a material having a higher thermal conductivity than the first insulating substrate 10. The non-through via NV is formed in a portion of the second surface 10B where the second wiring 22 is arranged. In detail, the non-through via NV is formed in a position closer to the center of the first insulating substrate 10 than the center position in the width direction (X-axis direction in FIG. 1) of the second wiring 22 in the portion where the second wiring 22 is arranged. The non-through via NV is formed by forming a recess on the first insulating substrate 10 and then filling the recess with a material having a high thermal conductivity (details will be described in FIGS. 3 and 4). In the wiring substrate 1, the non-through via NV is made of Cu, so that the material constituting the second wiring 22 and the material constituting the non-through via NV are the same. 1 and 2, the non-through vias NV arranged on the -X-axis side are called non-through vias NVL, and the non-through vias NV arranged on the +X-axis side are called non-through vias NVR. In Fig. 2, the non-through vias NVL and NVR, which are not visible in reality, are shown by dashed lines.

[0027] In Figs. 1 and 2, width L1 indicates the width (length along the X-axis direction) of the non-through via NV at any XZ cross section. Width L2 indicates the width (length along the X-axis direction) at any position of the second wiring 22 arranged on the non-through via NV. Figs. 1 and 2 respectively show the maximum width of width L1 and the maximum width of width L2. Here, the maximum width of width L1 of the non-through via NV is equal to or smaller than the minimum width of width L2 of the second wiring 22 located on the non-through via NV. In the wiring board 1, since the width of the non-through via NV is constant and the width of the second wiring 22 located on the non-through via NV is also constant (see Fig. 2), it can also be said that width L1 is equal to or smaller than width L2.

[0028] In the wiring board 1, the length from the second surface 10B to the bottom surface BM of the non-through via NV (the length along the Z-axis direction in FIG. 1) is two-thirds or less of the length from the first surface 10F to the second surface 10B in the portion where the non-through via NV is formed. In this embodiment, the length from the second surface 10B to the bottom surface BM of the non-through via NV is one-third of the length from the first surface 10F to the second surface 10B in the portion where the non-through via NV is formed.

[0029] In addition, in the wiring board 1, there is no wiring connected to the side surface SD of the non-through via NV. Also, there is no wiring connected to the bottom surface BM of the non-through via NV. In other words, there is no wiring routed from the side surface SD and the bottom surface BM of the non-through via NV, and only the second wiring 22 and the first insulating substrate 10 are in contact with the non-through via NV.

[0030] FIG. 3 is a flow chart of a method for manufacturing the wiring board 1. FIGS. 4(A) to 4(F) are explanatory diagrams showing the manufacturing process of the wiring board 1. In manufacturing the wiring board 1, as shown in FIG. 4(A), first, an insulating substrate 10p is prepared (step S10). The insulating substrate 10p is a base material for the first insulating substrate 10 (FIGS. 1 and 2). Next, as shown in FIG. 4(B), a recess NVp is formed in the insulating substrate 10p (step S20), and then, as shown in FIG. 4(C), the recess NVp is filled with Cu paste Ps (step S30). The recess NVp is a base material for the non-through via NV (FIGS. 1 and 2). Next, as shown in FIG. 4(D), the portion of the solidified Cu paste Ps that protrudes from the recessed portion NVp is removed by polishing to form a non-through via NV (step S40), and then, as shown in FIG. 4(E), the first wiring 12 and the second wiring 22 are printed on the first surface 10F and the second surface 10B of the insulating substrate 10p, respectively (step S50). Next, as shown in FIG. 4(F), the first wiring 12 and the second wiring 22 are each covered with the diffusion prevention layers 14, 16 and the conductive coatings 16, 26 (step S60). Thereafter, on the first surface 10F, the conductive coating 16 and the semiconductor chip SC are connected via the bumps 18, and on the second surface 10B, the conductive coating 26 and the second insulating substrate 30 are connected via the solder 29, thereby completing the manufacturing method of the wiring substrate 1. In the above-described manufacturing method, the recessed portion NVp is filled with Cu paste when the non-through via NV is formed, but the recessed portion NVp may be filled with Cu by plating the second surface 10B. In such a case, the Cu is removed from the portion of the second surface 10B excluding the recessed portion NVp, and then the steps from step S50 onwards are performed to manufacture the wiring board 1.

[0031] As described above, according to the wiring board 1 of the present embodiment, the non-through vias NV made of a material having a higher thermal conductivity than the first insulating substrate 10 are formed on the second surface 10B. Therefore, at least a part of the heat generated from the semiconductor chip SC, which is an electronic component, is transferred to the first insulating substrate 10 and then transferred to the second surface 10B side through the non-through vias NV, so that the heat generated from the semiconductor chip SC can be efficiently dissipated. In this way, in the first insulating substrate 10 in which the non-through vias NV are formed, the heat dissipation efficiency can be ensured even if the thickness of the first insulating substrate 10 is reduced. In addition, since the non-through vias NV formed on the second surface 10B do not penetrate the first insulating substrate 10 to reach the first surface 10F, the flatness of the first surface 10F on which the semiconductor chip SC is mounted is not impaired by the formation of the non-through vias NV, so that the flatness of the first surface 10F can be maintained.

[0032] Moreover, in the wiring board 1 of this embodiment, the non-through vias NV are formed in the portion of the second surface 10B where the second wiring 22 is arranged. Therefore, in the wiring board 1, a part of the heat generated from the semiconductor chip SC is transferred to the non-through vias NV and then transferred to the second wiring 22. Generally, wiring is made of a material with high electrical conductivity, and such a material also has high thermal conductivity. Therefore, in the wiring board 1, the heat generated from the electronic components can be dissipated more efficiently.

[0033] Furthermore, in the wiring board 1 of this embodiment, the non-through vias NV are formed in a portion in which the second wirings 22 are arranged, at a position closer to the center of the first insulating substrate 10 (in the X-axis direction in FIG. 1) than the center position in the width direction of the second wirings 22 (in the X-axis direction in FIG. 1). Therefore, in cases in which heat is likely to concentrate in the semiconductor chip SC near a position facing the center of the first insulating substrate 10, the non-through vias NV are arranged closer to such a position. Therefore, the heat generated from such a position can be efficiently dissipated.

[0034] In addition, in the wiring board 1 of this embodiment, the maximum width of the non-through via NV is equal to or smaller than the minimum width of the second wiring 22 located above the non-through via. Therefore, since the minimum width of the second wiring 22 is designed to ensure insulation with other members, it is possible to ensure insulation with other members even for non-through vias NV having a maximum width smaller than this minimum width.

[0035] In the wiring board 1 of this embodiment, the length from the first surface 10F to the bottom surface BM of the non-through via NV is equal to or less than two-thirds of the length from the first surface 10F to the second surface 10B in the portion where the non-through via NV is formed. This makes it possible to ensure a certain degree of length from the second surface 10B to the bottom surface BM of the non-through via NV while maintaining the rigidity of the first insulating substrate 10.

[0036] In addition, in the wiring board 1 of this embodiment, there is no wiring connected to the side surface SD of the non-through via NV. Therefore, since there is no wiring connected to the side surface SD of the non-through via NV, it is possible to prevent the heat generated from the wiring from concentrating on the non-through via NV. Therefore, while avoiding localized heat, the heat transferred from the first insulating substrate 10 to the non-through via NV can be efficiently transferred toward the second surface 10B.

[0037] In addition, in the wiring board 1 of this embodiment, there is no wiring connected to the bottom surface of the non-through via NV. Therefore, it is possible to ensure insulation between the non-through via NV and the second wiring 22. When there is a wiring connected to the bottom surface BM of the non-through via NV, the wiring tends to be routed approximately parallel to the first surface 10F or the second surface 10B. Therefore, when such a wiring exists, there is a high possibility that insulation cannot be ensured because the distance between the wiring connected to the bottom surface BM of the non-through via NV and the second wiring 22 is small. In addition, when there is neither a wiring connected to the side surface SD of the non-through via NV nor a wiring connected to the bottom surface BM, the non-through via NV does not have a conductive function, so that a material constituting the non-through via NV can be selected by considering only thermal conductivity without considering electrical conductivity.

[0038] <Second embodiment> 5 is an explanatory diagram showing a schematic cross-sectional configuration of a wiring board 1a according to the second embodiment. The wiring board 1a according to the second embodiment differs from the wiring board 1 according to the first embodiment in that opposing non-through vias FV are further formed on the first surface 10F of the wiring board 1 according to the first embodiment.

[0039] In the second embodiment, the opposing non-through via FV is formed in a portion of the first surface 10F where the second wiring 22 is not arranged and the first wiring 12 (12N) is arranged when viewed through the first surface 10F to the second surface 10B. The opposing non-through via FV is formed by forming a recess on the first insulating substrate 10 and then filling the recess with a material having high thermal conductivity, similar to the non-through via NV. The opposing non-through via FV is made of a material having a higher thermal conductivity than the first insulating substrate 10. In the second embodiment, the opposing non-through via FV is made of Cu, and therefore the material constituting the first wiring 12 and the material constituting the opposing non-through via FV are the same.

[0040] According to the wiring board 1a of the second embodiment as described above, at least a part of the heat generated from the semiconductor chip SC is transferred to the first insulating substrate 10 through the opposing non-through vias FV and then transferred to the second surface 10B, so that the heat generated from the semiconductor chip SC can be dissipated efficiently. As shown in Fig. 5, in the second embodiment, the first insulating substrate 10 has opposing non-through vias FV formed on the first surface 10F and non-through vias NV formed on the second surface 10B, so that the heat generated from the semiconductor chip SC can be dissipated more efficiently than in a configuration in which only one of the non-through vias is formed.

[0041] Furthermore, in the wiring board 1a of the second embodiment, opposing non-through vias FV are formed in a portion of the first surface 10F where the second wiring 22 is not arranged when viewed through from the first surface 10F to the second surface 10B. Even if the depth of the opposing non-through via FV (the length from the first surface 10F to the bottom surface BT of the opposing non-through via FV) varies due to processing variations and becomes deeper than a preset depth, since the second wiring 22 is not arranged in a portion of the second surface 10B facing the bottom surface BT of the opposing non-through via FV, insulation between the opposing non-through via FV and the second wiring 22 can be ensured.

[0042] <Third embodiment> 6 is an explanatory diagram showing a schematic cross-sectional configuration of a wiring board 1b of the third embodiment. The wiring board 1b of the third embodiment is different from the wiring board 1 of the first embodiment in that opposing non-through vias FL, FVR are further formed on the first surface 10F of the wiring board 1 of the first embodiment.

[0043] The opposing non-through via FVL is a portion where the first wiring 12 (12P) is arranged, and is formed at a position where at least a part of the opposing non-through via FVL overlaps with the non-through via NVL when viewed through the first surface 10F to the second surface 10B. Similarly to the opposing non-through via FVL, the opposing non-through via FVR is a portion where the first wiring 12 (12P) is arranged, and is formed at a position where at least a part of the opposing non-through via FVR overlaps with the non-through via NVR when viewed through the first surface 10F to the second surface 10B. In the third embodiment, the opposing non-through vias FVL and FVR are formed at positions where the entirety of the opposing non-through vias FVL and FVR overlap with the non-through vias NVL and NVR, respectively. In the third embodiment, the depth of the opposing non-through via FVL from the first surface 10F and the depth of the non-through via NVL from the second surface 10B are approximately the same, and the width of the opposing non-through via FVL and the width of the non-through via NVL are approximately the same. In other words, the opposing non-through vias FVL and non-through vias NVL have approximately the same length in the Z-axis direction and the X-axis direction. Similarly, the opposing non-through vias FVR and non-through vias NVR have approximately the same length in the Z-axis direction and the X-axis direction. The opposing non-through vias FVL and FVR are made of a material having a higher thermal conductivity than the first insulating substrate 10, similar to the opposing non-through via FV of the second embodiment.

[0044] As in the second embodiment, with the wiring board 1b of the third embodiment as described above, at least a part of the heat generated from the semiconductor chip SC is transferred to the first insulating substrate 10 via the opposing non-through vias FVL and FVR, and then transferred to the second surface 10B side, so that the heat generated from the semiconductor chip SC can be efficiently dissipated. Also, as shown in Fig. 6, in the third embodiment, the opposing non-through vias FVL and FVR are formed at positions where they entirely overlap with the non-through vias NVL and NVR, respectively. Therefore, a part of the heat generated from the semiconductor chip SC is easily transferred to the first insulating substrate 10 via the opposing non-through vias FVL and FVR, and then transferred to the non-through vias NVL and NVR, so that the heat generated from the semiconductor chip SC can be efficiently dissipated.

[0045] <Fourth embodiment> 7 is an explanatory diagram illustrating a schematic cross-sectional configuration of a wiring board 1c according to a fourth embodiment. The wiring board 1c according to the fourth embodiment is different from the wiring board 1b according to the third embodiment in that it includes non-through vias NvL and NvR formed at different positions.

[0046] In the fourth embodiment, the non-through vias NvL, NvR and the opposing non-through vias FVL, FVR have substantially the same length in the Z-axis direction and the X-axis direction. Meanwhile, in the fourth embodiment, the opposing non-through vias FVL, FVR are formed at positions where they partially overlap with the non-through vias NvL, NvR. In detail, compared with the non-through vias NVL, NVR in the third embodiment (FIG. 6), in the fourth embodiment, the non-through vias NvL, NvR are formed at positions away from the center (in the X-axis direction) of the first insulating substrate 10.

[0047] The wiring board 1c of the fourth embodiment as described above can also efficiently dissipate heat generated from the semiconductor chip SC, as in the third embodiment. In addition, since the non-through vias NvL and NvR are formed at positions away from the center of the first insulating substrate 10, the heat generated from the semiconductor chip SC can be easily transferred in a direction away from the center of the first insulating substrate 10.

[0048] <Fifth embodiment> 8 is an explanatory diagram showing a schematic cross-sectional configuration of a wiring board 1d of the fifth embodiment. The wiring board 1d of the fifth embodiment differs from the wiring board 1b of the third embodiment in that it includes opposing non-through vias Fvl, Fvr different in size from opposing non-through vias FVL, FVR and non-through vias Nvl, Nvr different in size from non-through vias NVL, NVR.

[0049] In the fifth embodiment, the depth of the opposing non-through via Fvl from the first surface 10F is shallower than the depth of the non-through via Nvl from the second surface 10B, and the width of the opposing non-through via Fvl is smaller than the width of the non-through via Nvl. In other words, the opposing non-through via Fvl is smaller in size in the Z-axis direction and the X-axis direction than the non-through via NVL. Similarly, the opposing non-through via Fvr is smaller in size in the Z-axis direction and the X-axis direction than the non-through via Nvr. The wiring board 1d of the fifth embodiment described above can efficiently dissipate heat generated from the semiconductor chip SC, as in the third and fourth embodiments.

[0050] <Modifications of this embodiment> The present invention is not limited to the above-described embodiment, and can be embodied in various forms without departing from the spirit and scope of the invention. For example, the following modifications are also possible.

[0051] The above embodiment is an example of a wiring board, and the configuration of the wiring board can be modified in various ways. For example, the electronic components mounted on the wiring board are not limited to semiconductor chips, but may be light-emitting elements such as LED chips, or other electronic components. The arrangement of the first wiring and the second wiring does not have to be as illustrated in Figs. 1 and 2. The material constituting the first insulating substrate and the second insulating substrate is not limited to Al2O3, and may include any of AlN, SiN, and SiC. The material constituting the first insulating substrate and the material constituting the second insulating substrate may be different materials.

[0052] In the above embodiment, the non-through via is formed in a portion of the second surface where the second wiring is arranged, but may be formed in a portion where the second wiring is not arranged. The material constituting the non-through via is the same as the material constituting the second wiring, but may be a material different from the material constituting the second wiring. The non-through via is made of a material having a higher thermal conductivity than the first insulating substrate, but is not limited to this. A part of the non-through via may be made of a material having a higher thermal conductivity than the first insulating substrate, or a material different from the material having a higher thermal conductivity than the first insulating substrate may be included in the non-through via. The material having a high thermal conductivity constituting the non-through via may be Ag, may contain both Cu and Ag, or may contain a material different from Cu and Ag (for example, W, Au, Mo, etc.), and may not be a metal material as long as it has high thermal conductivity, and may be any type of material as long as it can be solidified. The material constituting the opposing non-through via is also the same as the non-through via. In addition, although the above embodiment is a form in which there is no wiring connected to the side surface of the non-through via and no wiring connected to the bottom surface, there may be wiring connected to at least one of the side surface and bottom surface of the non-through via.

[0053] As shown in Figs. 5 to 8, the maximum width of the opposing non-through via may be any length as long as it is equal to or less than the minimum width of the first wiring located above the opposing non-through via. The length from the first surface to the bottom surface of the opposing non-through via may be any length as long as it is equal to or less than two-thirds of the length (depth) from the first surface to the second surface in the portion where the opposing non-through via is formed. However, as shown in Figs. 6 to 8, when the opposing non-through via is formed at a position where at least a part of the opposing non-through via overlaps with the non-through via, the depth of the opposing non-through via should be set in consideration of the depth of the non-through via from the viewpoint of maintaining the rigidity of the insulating substrate. In addition, from the viewpoint of efficiently dissipating heat generated from the electronic component, it is preferable that there is no wiring connected to the side surface of the opposing non-through via and no wiring connected to the bottom surface of the opposing non-through via, but there may be a wiring connected to at least one of the side surface and the bottom surface of the opposing non-through via.

[0054] The configurations of the wiring boards 1, 1a to 1d of the first to fifth embodiments and the configurations of the modified examples may be appropriately combined. For example, in the wiring boards 1b to 1d of the third to fifth embodiments, the first insulating substrate 10 may have opposing non-through vias FV formed therein.

[0055] Although the present aspect has been described above based on the embodiment and modified examples, the above-mentioned embodiment of the aspect is intended to facilitate understanding of the present aspect and does not limit the present aspect. The present aspect may be modified or improved without departing from the spirit and scope of the claims, and equivalents are included in the present aspect. Furthermore, if a technical feature is not described as essential in this specification, it may be deleted as appropriate. [Explanation of symbols]

[0056] 1, 1a to 1d... Wiring board 10...First insulating substrate 10F…First page 10B…Second side 12, 12P, 12N...First wiring 14...Diffusion prevention layer 16...Conductive coating 18…Bump 22,22L,22R…Second wiring 24...Diffusion prevention layer 26...Conductive coating 29…Solder 30...Second insulating substrate FV, FVL, FVR, Fvl, Fvr...opposing non-through vias NV, NVL, NVR, NvL, NvR, Nvl, Nvr...Non-penetrating via PV1, PV2...Through via

Claims

1. A wiring board, An insulating substrate on which electronic components are mounted; a first wiring that is disposed on a first surface of the insulating substrate that faces the electronic component and is connected to the electronic component; a second wiring disposed on a second surface of the insulating substrate opposite to the first surface, a non-through via is formed on the second surface of the insulating substrate; At least a portion of the non-through via is made of a material having a higher thermal conductivity than the insulating substrate; the non-through via is formed in a portion of the second surface where the second wiring is disposed, An opposing non-through via is formed in the first surface, At least a portion of the opposing non-through via is made of a material having a higher thermal conductivity than the insulating substrate, A wiring board, characterized in that the opposing non-through vias include an opposing non-through via that is formed in a portion of the first surface where the second wiring is not arranged when viewed transparently from the first surface to the second surface, and where the first wiring is arranged.

2. 2. The wiring board according to claim 1, The non-through via is formed in a portion of the wiring board in which the second wiring is arranged, at a position closer to the center of the insulating substrate than a center position in a width direction of the second wiring.

3. 3. The wiring board according to claim 1, A wiring board, wherein a maximum width of the non-through via is equal to or smaller than a minimum width of the second wiring located above the non-through via.

4. 4. The wiring board according to claim 1, A wiring board, characterized in that the length from the second surface to the bottom surface of the non-through via is less than two-thirds of the distance from the first surface to the second surface in the portion where the non-through via is formed.

5. 5. The wiring board according to claim 1, A wiring board, characterized in that there is no wiring connected to a side surface of the non-through via.

6. 6. The wiring board according to claim 1, A wiring board, characterized in that there is no wiring connected to the bottom surface of the non-through via.

7. 2. The wiring board according to claim 1, A wiring board characterized in that the opposing non-through vias include an opposing non-through via that is formed in a position where at least a portion of the opposing non-through via overlaps with the non-through via when viewed through from the first surface to the second surface.

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