Printed Wiring Boards

Abstract

The printed wiring board includes a base film and wiring. The base film has a main surface. The wiring is disposed on the main surface. A side of the wiring has a curved portion. The curved portion is continuous with the main surface and extends toward the inside of the wiring. The direction perpendicular to the main surface is the z direction. A first point is a point at which the wiring is connected to the main surface in the curved portion. A second point is a point at which the curved portion is 1.6 μm away from the main surface in the z direction. The distance between the first point and the second point in the width direction of the wiring is 5 μm or less. The first width is the width of the wiring at a distance of 1.6 μm from the main surface in the z direction. The second width is the width of the wiring at a distance of 5.0 μm from the main surface in the z direction. The second width is 1.01 times or more the first width.

Description

[Technical field]

[0001] The present disclosure relates to printed wiring boards. [Background technology]

[0002] WO 2018 / 211733 (Patent Document 1) describes a printed wiring board. The printed wiring board described in Patent Document 1 has a base film, wiring, and an insulating coating layer. The base film has a main surface. The wiring is provided on the main surface. The insulating coating layer covers the wiring. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2018 / 211733 Summary of the Invention

[0004] The printed wiring board of the present disclosure includes a base film and wiring. The base film has a main surface. The wiring is disposed on the main surface. A side of the wiring has a curved portion. The curved portion is continuous with the main surface and extends toward the inside of the wiring. The direction perpendicular to the main surface is the z direction. A point at which the wiring is connected to the main surface in the curved portion is a first point. A point at which the curved portion is 1.6 μm away from the main surface in the z direction is a second point. The distance between the first point and the second point in the width direction of the wiring is 5 μm or less. The width of the wiring at a distance of 1.6 μm away from the main surface in the z direction is the first width. The width of the wiring at a distance of 5.0 μm away from the main surface in the z direction is the second width. The second width is 1.01 times or more the first width. [Brief description of the drawings]

[0005] [Figure 1] FIG. 1 is a schematic plan view of a printed wiring board according to a first embodiment. [Diagram 2]FIG. 2 is a schematic bottom view of the printed wiring board according to the first embodiment. [Diagram 3] FIG. 3 is a schematic cross-sectional view taken along line III-III in FIG. [Figure 4] FIG. 4 is a schematic enlarged partial cross-sectional view of region IV in FIG. [Diagram 5] FIG. 5 is a flow diagram illustrating a method for manufacturing a printed wiring board according to the first embodiment. [Figure 6] FIG. 6 is a schematic cross-sectional view showing a step of a method for manufacturing a printed wiring board according to the first embodiment. [Figure 7] FIG. 7 is a schematic cross-sectional view showing a step of a method for manufacturing a printed wiring board according to the first embodiment. [Figure 8] FIG. 8 is a schematic cross-sectional view showing a step of a method for manufacturing a printed wiring board according to the first embodiment. [Figure 9] FIG. 9 is a schematic cross-sectional view showing a step of a method for manufacturing a printed wiring board according to the first embodiment. [Figure 10] FIG. 10 is a schematic cross-sectional view showing a step of a method for manufacturing a printed wiring board according to the first embodiment. [Figure 11] FIG. 11 is a schematic cross-sectional view showing a step of a method for manufacturing a printed wiring board according to the first embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0006] [Problem that this disclosure aims to solve] If the adhesion between the insulating coating layer and the wiring is weak, the insulating coating layer may peel off from the wiring.

[0007] An object of the present disclosure is to provide a printed wiring board having improved adhesion between an insulating coating layer and wiring.

[0008] [Effects of this disclosure] According to the present disclosure, it is possible to provide a printed wiring board having improved adhesion between an insulating coating layer and wiring.

[0009] [Overview of the embodiment] First, embodiments of the present disclosure will be listed and described.

[0010] (1) A printed wiring board according to the present disclosure includes a base film and a wiring. The base film has a main surface. The wiring is disposed on the main surface. A side of the wiring has a curved portion. The curved portion is continuous with the main surface and extends toward the inside of the wiring. The direction perpendicular to the main surface is the z direction. In the curved portion, a point where the wiring is connected to the main surface is defined as a first point. In the curved portion, a point at a distance of 1.6 μm from the main surface in the z direction is defined as a second point. The distance between the first point and the second point in the width direction of the wiring is 5 μm or less. The width of the wiring at a distance of 1.6 μm from the main surface in the z direction is defined as a first width. The width of the wiring at a distance of 5.0 μm from the main surface in the z direction is defined as a second width. The second width is 1.01 times or more the first width. In this way, when an insulating coating layer is formed to cover the wiring, the insulating coating layer is filled in the gap formed between the curved portion and the main surface. This improves the adhesion between the insulating coating layer and the wiring.

[0011] (2) According to the printed wiring board of (1) above, the third point may be a point on the side surface that is 5.0 μm away from the main surface in the z direction. The width of the wiring may monotonically decrease from the third point to the second point. In this way, the adhesion between the insulating coating layer and the wiring is improved.

[0012] (3) According to the printed wiring board of (1) or (2) above, the wiring may include a first conductive layer and a second conductive layer covering the first conductive layer. In this way, the side surface of the wiring is formed by the second conductive layer.

[0013] (4) According to the printed wiring board of (3) above, the first conductive layer may have a top surface and a bottom surface. The top surface may be furthest from the main surface. The bottom surface may be located opposite to the top surface. The width at the top surface may be equal to or smaller than the width at the bottom surface. In this way, the adhesion between the insulating coating layer and the wiring is improved.

[0014] (5) The printed wiring board according to any one of (1) to (4) above may include an insulating coating layer. The insulating coating layer may be disposed on the main surface so as to cover the wiring. In this way, a printed wiring board having improved adhesion between the insulating coating layer and the wiring can be obtained.

[0015] (6) According to the printed wiring board of (5) above, the void ratio of the insulating coating layer in the curved portion may be 20 percent or less, thereby obtaining a printed wiring board with improved adhesion between the insulating coating layer and the wiring.

[0016] (7) According to the printed wiring board of (5) or (6) above, the wiring may include a first wiring portion and a second wiring portion. The second wiring portion may be adjacent to the first wiring portion. A groove portion may be provided in the insulating coating layer between the first wiring portion and the second wiring portion. In this way, the force generated in the insulating coating layer can be dispersed.

[0017] (8) According to the printed wiring board of (7) above, the minimum value of the gap between the upper half of the first wiring portion and the upper half of the second wiring portion may be 5 μm or more, thereby obtaining a printed wiring board with improved adhesion between the insulating coating layer and the wiring.

[0018] (9) In the printed wiring board according to the above (7) or (8), the depth of the groove may be 15 μm or more. In this way, the force generated in the insulating coating layer can be dispersed.

[0019] (10) In the printed wiring board according to any one of (5) to (9) above, the material constituting the insulating coating layer may contain parylene, thereby obtaining a printed wiring board with improved adhesion between the insulating coating layer and the wiring.

[0020] (11) According to the printed wiring board of any one of (1) to (10) above, the height of the wiring may exceed 100 μm, thereby obtaining a printed wiring board with improved adhesion between the insulating coating layer and the wiring.

[0021] [Details of the embodiment of the present disclosure] The details of the embodiment of the present disclosure will be described with reference to the drawings. In the following drawings, the same or corresponding parts are given the same reference characters, and duplicated explanations will not be repeated. The printed wiring board according to the embodiment is referred to as a printed wiring board 100.

[0022] (Printed wiring board configuration) The configuration of the printed wiring board 100 will be described below.

[0023] FIG. 1 is a schematic plan view of the printed wiring board 100 according to the first embodiment. FIG. 2 is a schematic bottom view of the printed wiring board 100 according to the first embodiment. FIG. 3 is a schematic cross-sectional view taken along line III-III in FIG. 1. FIG. 4 is a schematic enlarged cross-sectional view of a region IV in FIG. 3. FIG. 2 is a schematic plan view of the printed wiring board 100 as viewed from the opposite side of the printed wiring board 100 shown in FIG. 1 and FIG. 2 omit illustration of the insulating coating layer 31 and the insulating coating layer 32. As shown in FIG. 1 to FIG. 3 , the printed wiring board 100 has a base film 10, wiring 21 and wiring 22, and insulating coating layers 31 and 32.

[0024] The base film 10 has a principal surface 10a and a principal surface 10b. The principal surface 10b is the surface opposite to the principal surface 10a. The principal surfaces 10a and 10b are end surfaces in the thickness direction of the base film 10. The normal direction of the principal surface 10a (the normal direction of the principal surface 10b) is defined as the z direction. Viewing the printed wiring board 100 along the z direction is referred to as a planar view.

[0025] The base film 10 is made of an electrically insulating and flexible material. The material of the base film 10 is, for example, polyimide. However, the material of the base film 10 is not limited to this.

[0026] The wiring 21 is disposed on the main surface 10a. The wiring 21 has a winding portion 21a. In a plan view, the wiring 21 is wound in a spiral shape in the winding portion 21a. The wiring 21 further has a land 21b and a land 21c. The land 21b is connected to the outermost circumference of the winding portion 21a. The land 21c is connected to the innermost circumference of the winding portion 21a. The height of the wiring 21 is defined as height H1. The height H1 is the distance between the main surface 10a and the top surface 21t of the wiring 21 in the z direction. The height H1 is, for example, greater than 100 μm.

[0027] The wiring 22 is disposed on the main surface 10b. The wiring 22 has a winding portion 22a. In a plan view, the wiring 22 is wound in a spiral shape in the winding portion 22a. The wiring 22 further has a land 22b and a land 22c. The land 22b is connected to the innermost circumference of the winding portion 22a. The land 22b overlaps with the land 21c in a plan view. The land 22c is connected to the outermost circumference of the winding portion 22a.

[0028] The wiring 21 has a plurality of wiring portions 21d. Specifically, the wiring 21 includes a first wiring portion 41 and a second wiring portion 42. The direction in which each of the plurality of wiring portions 21d extends is the y direction. The y direction is perpendicular to the z direction. The direction perpendicular to the z direction and the y direction is the x direction. The x direction is the direction in which the plurality of wiring portions 21d are adjacent to each other. As described later, the x direction is the width direction of the wirings 21 and 22. The second wiring portion 42 is adjacent to the first wiring portion 41 in the x direction.

[0029] When the wiring portion 21d extends linearly in a plan view, the y direction is the direction in which the wiring portion 21d extends linearly. When the wiring portion 21d extends curvedly in a plan view, the tangential direction of the curved wiring portion 21d is regarded as the y direction.

[0030] In a cross-sectional view seen from the y direction, the multiple wiring portions 21d are arranged at intervals along the x direction. The minimum value of the interval between the upper halves of two adjacent wiring portions 21d is set to interval SP. Interval SP is, for example, 5 μm or more. In other words, the minimum value of the interval between the upper halves of the first wiring portion 41 and the second wiring portion 42 is 5 μm or more.

[0031] The wiring 22 has a plurality of wiring portions 22d. Each of the plurality of wiring portions 22d extends along the y direction. When the wiring portion 22d extends linearly in a plan view, the y direction is the direction in which the wiring portion 22d extends linearly. When the wiring portion 22d extends curvedly in a plan view, the tangential direction of the wiring portion 22d extending curvedly is regarded as the y direction. In a cross-sectional view seen from the y direction, the plurality of wiring portions 22d are arranged at intervals along the x direction.

[0032] Each of the wiring 21 and the wiring 22 includes an underlying conductive layer 23. The underlying conductive layer 23 has a first layer 23a and a second layer 23b. The first layer 23a is disposed on the main surface (main surface 10a, main surface 10b) of the base film 10. The second layer 23b is disposed on the first layer 23a. Although not shown, a through hole is formed in the base film 10 and the first layer 23a. This through hole overlaps the land 21c and the land 22b in a plan view. The second layer 23b is also disposed on the inner wall surface of this through hole. As a result, the wiring 21 is electrically connected to the wiring 22.

[0033] Each of the wiring 21 and the wiring 22 further includes a first conductive layer 24 and a second conductive layer 25. The first conductive layer 24 is disposed on the underlying conductive layer 23. The first conductive layer 24 has a top surface 24a and a bottom surface 24b. The top surface 24a is the surface of the first conductive layer 24 that is farthest from the main surface 10a. The bottom surface 24b is located opposite the top surface 24a in the z direction. The bottom surface 24b is the surface that is in contact with the second layer 23b of the underlying conductive layer 23.

[0034] In the wiring portion 21d, the width of the bottom surface 24b of the first conductive layer 24 is defined as width W2, and the width of the top surface 24a of the first conductive layer 24 is defined as width W1. Widths W1 and W2 are measured in the x direction. The second conductive layer 25 covers the first conductive layer 24. Specifically, the second conductive layer 25 covers the side surfaces of the underlying conductive layer 23, the side surfaces of the first conductive layer 24, and the top surface 24a of the first conductive layer 24. In a cross-sectional view seen from the y direction, the cross-sectional shape of the first conductive layer 24 may be trapezoidal, and width W1 is equal to or less than width W2.

[0035] The first layer 23a is formed of, for example, a nickel-chromium alloy. The first layer 23a is, for example, a sputtered layer formed by sputtering. The second layer 23b is formed of, for example, copper or a copper alloy. The second layer 23b is, for example, an electroless plating layer formed by an electroless plating method. The first conductive layer 24 and the second conductive layer 25 are, for example, formed of copper or a copper alloy. The first conductive layer 24 and the second conductive layer 25 are, for example, electrolytic plating layers formed by an electrolytic plating method.

[0036] The insulating coating layer 31 is disposed on the main surface 10a so as to cover the wiring 21. The insulating coating layer 32 is disposed on the main surface 10b so as to cover the wiring 22. The material constituting the insulating coating layer 31 and the insulating coating layer 32 includes, for example, parylene. That is, the insulating coating layer 31 and the insulating coating layer 32 are, for example, parylene coatings formed by vapor deposition of parylene.

[0037] 3, between the multiple wiring portions 21d, groove portions h are provided in each of the insulating coating layers 31 and 32. From a different perspective, between the first wiring portion 41 and the second wiring portion 42, groove portions h are provided in each of the insulating coating layers 31 and 32.

[0038] The grooves h are formed on the surfaces of the insulating coating layers 31 and 32. The grooves h are formed from the surfaces of the insulating coating layers 31 and 32 toward the base film 10. The grooves h do not have to reach the main surfaces 10a and 10b of the base film 10.

[0039] The depth D1 of the groove h in the z direction may be, for example, 15 μm or more, 20 μm or more, or 30 μm or more.

[0040] Each of the wiring 21 and the wiring 22 has a top surface 21t and a side surface 21s. For example, the top surface 21t and the side surface 21s of the wiring 21 are formed by the second conductive layer 25. The top surface 21t is the surface farthest from the main surface 10a in the z direction. The side surface 21s is a surface that is continuous with the main surface 10a and the top surface 21t. Note that while the top surface 21t and the side surface 21s of the wiring 21 have been described above, the top surface 21t and the side surface 21s of the wiring 22 have the same configuration.

[0041] As shown in Fig. 4, in a cross-sectional view seen from the y direction, the side surface 21s includes a straight portion 21L and a curved portion 21R. The straight portion 21L may extend at an angle with respect to the x direction. One end of the straight portion 21L is connected to the top surface 21t. The other end located opposite to the one end of the straight portion 21L in the z direction is connected to the curved portion 21R.

[0042] The curved portion 21R is continuous with, for example, the main surface 10a. The curved portion 21R extends toward the inside of the wiring 21. In this manner, a gap is formed between the side surface 21s and the main surface 10a, into which the insulating coating layer 31 is filled. The gap is formed by the curved portion 21R and the main surface 10a. In this manner, the insulating coating layer 31 fills the gap, improving the adhesion between the wiring 21 and the insulating coating layer 31.

[0043] As shown in FIG. 4, the first point p1 is a point at which the wiring 21 is connected to the main surface 10a in the curved portion 21R. The second point p2 is a point at which the distance T1 from the main surface 10a in the z direction is 1.6 μm in the curved portion 21R. The distance L1 between the first point p1 and the second point p2 in the width direction (x direction) of the wiring 21 is 5 μm or less. The distance L1 between the first point p1 and the second point p2 in the width direction (x direction) of the wiring 21 may be 4 μm or less, or may be 3 μm or less. The distance L1 between the first point p1 and the second point p2 in the width direction (x direction) of the wiring 21 is 0.2 μm or more. In this way, no voids are formed in the gap, and the insulating coating layer 31 is sufficiently filled.

[0044] The width of the wiring 21 when the distance T1 from the main surface 10a in the z direction is 1.6 μm is defined as the first width w1. The width of the wiring 21 when the distance T2 from the main surface 10a in the z direction is 5.0 μm is defined as the second width w2. The first width w1 is smaller than the second width w2. Specifically, the second width w2 is 1.01 times or more the first width w1. In this way, the insulating coating layer 31 is sufficiently filled in the gap, no voids are formed in the gap, and the adhesion between the wiring 21 and the insulating coating layer 31 is improved.

[0045] 4, a third point p3 is a point on the side surface 21s where the distance T2 from the main surface 10a in the z direction is 5.0 μm. As described above, the width of the wiring 21 may monotonically decrease from the third point p3 to the second point p2 such that the second width w2 is 1.01 times or more the first width w1.

[0046] In addition, on the side surface 21s, the curved portion 21R may extend from the first point p1 to the second point p2, or may extend between the second point p2 and the third point p3. In other words, as long as the width of the wiring 21 monotonically decreases from the third point p3 to the second point p2, the curved portion 21R may extend from the first point p1 to the third point p3.

[0047] 4 can be observed using a cross-section processing device such as a microtome. By exposing the cross-section of the cut printed wiring board 100, the first width w1, the second width w2, and the distance L1 can be measured using a microscope or the like.

[0048] (Printed Wiring Board Manufacturing Method) A method for manufacturing the printed wiring board 100 will now be described.

[0049] Fig. 5 is a flow diagram that illustrates a schematic diagram of a method for manufacturing the printed wiring board 100 according to the first embodiment. Fig. 6 to Fig. 11 are schematic cross-sectional views that illustrate steps of the method for manufacturing the printed wiring board 100 according to the first embodiment. As illustrated in Fig. 5, the method for manufacturing the printed wiring board 100 includes a preparation step S1, an electroless plating step S2, a resist pattern forming step S3, a first electrolytic plating step S4, a resist pattern removing step S5, an etching step S6, a second electrolytic plating step S7, and an insulating coating layer forming step S8.

[0050] First, a preparation step S1 is performed. In the preparation step S1, a base film 10 is prepared. A first layer 23a is formed on a main surface 10a and a main surface 10b of the base film 10 prepared in the preparation step S1. Furthermore, before the electroless plating step S2 is performed, through holes are formed in the base film 10 and the first layer 23a. The through holes are formed by, for example, laser processing or drilling. After the preparation step S1, an electroless plating step S2 is performed.

[0051] Next, an electroless plating process S2 is performed. In the electroless plating process S2, as shown in Fig. 6, electroless plating is performed to form a second layer 23b on the first layer 23a. At this time, the second layer 23b is also formed on the inner wall surface of the through hole formed in the base film 10. After the electroless plating process S2, a resist pattern formation process S3 is performed.

[0052] Next, a resist pattern forming step S3 is performed. As shown in Fig. 7, in the resist pattern forming step S3, a resist pattern 50 is formed on the underlying conductive layer 23. In the resist pattern forming step S3, first, a plurality of dry film resists 51 are attached in a stacked manner to form a resist layer on the underlying conductive layer 23. The number of dry film resists 51 is not particularly limited, but is, for example, three.

[0053] Secondly, the resist layer is exposed and developed. As a result, the resist layer is patterned to form a resist pattern 50. The resist pattern 50 has openings 52. The underlying conductive layer 23 is exposed from the openings 52. The opening width of the openings 52 increases as the openings approach the underlying conductive layer 23. After the resist pattern formation step S3, a first electrolytic plating step S4 is performed.

[0054] Next, a first electrolytic plating step S4 is performed. As shown in Fig. 8, in the first electrolytic plating step S4, electrolytic plating is performed to form a first conductive layer 24 on the underlying conductive layer 23 exposed from the opening 52. After the first electrolytic plating step S4, a resist pattern removal step S5 is performed.

[0055] Next, a resist pattern removing step S5 is performed. As shown in Fig. 9, in the resist pattern removing step S5, the resist pattern 50 is removed. After the resist pattern removing step S5, an etching step S6 is performed.

[0056] Next, an etching step S6 is performed. As shown in Fig. 10, in the etching step S6, the underlying conductive layer 23 that was located under the resist pattern 50 is removed by etching. After the etching step S6, a second electrolytic plating step S7 is performed.

[0057] Next, a second electrolytic plating step S7 is performed. As shown in Fig. 11, in the second electrolytic plating step S7, electrolytic plating is performed to form a second conductive layer 25 on the side surface of the base conductive layer 23, on the side surface of the first conductive layer 24, and on the top surface 24a of the first conductive layer 24. Examples of the plating solution used to form the second conductive layer 25 include copper sulfate pentahydrate, sulfuric acid, chlorine ions (chloride ions), disodium 3,3'-dithiobis(1-propanesulfonate) (SPS), polyethylene glycol, and the like.

[0058] In the second electrolytic plating step S7, the concentration of copper sulfate pentahydrate contained in the plating solution is 75 g / L or more and 250 g / L or less, the jet speed of the plating solution is 0.05 L / min or more, and the current density (unit: Ampere per Square Decimator) is 0.7 ASD or more and 1.4 ASD or less. In this way, a wiring 21 is formed in which the distance L1 between the first point p1 and the second point p2 is 5 μm or less and the second width w2 is 1.01 times or more the first width w1. After the second electrolytic plating step S7, an insulating coating layer forming step S8 is performed.

[0059] Next, an insulating coating layer forming step S8 is performed. In the insulating coating layer forming step S8, for example, by vapor deposition, an insulating coating layer 31 is formed on the main surface 10a so as to cover the wiring 21, and an insulating coating layer 32 is formed on the main surface 10b so as to cover the wiring 22. In this manner, the printed wiring board 100 shown in FIG. 1 can be manufactured.

[0060] (Action and effect) A printed wiring board 100 according to the present disclosure includes a base film 10 and a wiring 21. The base film 10 has a main surface 10a. The wiring 21 is disposed on the main surface 10a. A side surface 21s of the wiring 21 has a curved portion 21R. The curved portion 21R is continuous with the main surface 10a and extends toward the inside of the wiring 21. The direction perpendicular to the main surface 10a is defined as the z direction. In the curved portion 21R, a point where the wiring 21 is connected to the main surface 10a is defined as a first point p1. In the curved portion 21R, a point at a distance T1 from the main surface 10a in the z direction is defined as a second point p2. A distance L1 between the first point p1 and the second point p2 in the width direction of the wiring 21 is 5 μm or less. The width of the wiring 21 at a distance T1 from the main surface 10a in the z direction is defined as a first width w1. The width of the wiring 21 at a distance T2 from the main surface 10a in the z direction of 5.0 μm is defined as a second width w2. The second width w2 is 1.01 times or more the first width w1.

[0061] In this way, the insulating coating layer 31 fills the gap formed between the curved portion 21R and the main surface 10a, improving the adhesion between the insulating coating layer 31 and the wiring 21. Also, the insulating coating layer 31 sufficiently fills the gap formed between the side surface 21s of the wiring 21 and the main surface 10a without forming a void.

[0062] According to the above-described printed wiring board 100, a point on side surface 21s at a distance T2 of 5.0 μm from main surface 10a in the z direction may be set as third point p3. The width of wiring 21 may monotonically decrease from third point p3 to second point p2.

[0063] This improves the adhesion between the insulating coating layer 31 and the wiring 21. In addition, the insulating coating layer 31 is sufficiently filled in the gap formed between the side surface 21s of the wiring 21 and the main surface 10a without forming a void.

[0064] According to the above-described printed wiring board 100, the wiring 21 includes a first conductive layer 24 and a second conductive layer 25 that covers the first conductive layer 24.

[0065] In this manner, the side surface 21s of the wiring 21 is formed by the second conductive layer 25. According to the above-described printed wiring board 100, the first conductive layer 24 has a top surface 24a and a bottom surface 24b. The top surface 24a is the furthest from the main surface 10a. The bottom surface 24b is located opposite the top surface 24a. The width W1 at the top surface 24a is equal to or smaller than the width W2 at the bottom surface 24b.

[0066] In this way, the adhesion between the insulating coating layer 31 and the wiring 21 is improved. The printed wiring board 100 includes an insulating coating layer 31. The insulating coating layer 31 is disposed on the main surface 10a so as to cover the wiring 21.

[0067] In this way, printed wiring board 100 with improved adhesion between insulating coating layer 31 and wiring 21 can be obtained.

[0068] According to the above-described printed wiring board 100, the void ratio of the insulating coating layer 31 at the curved portion 21R is 20 percent or less.

[0069] In this way, printed wiring board 100 with improved adhesion between insulating coating layer 31 and wiring 21 can be obtained.

[0070] According to the above-described printed wiring board 100, the wiring 21 may include a first wiring portion 41 and a second wiring portion 42. The second wiring portion 42 is adjacent to the first wiring portion 41. Between the first wiring portion 41 and the second wiring portion 42, a groove portion h is provided in the insulating coating layer 31.

[0071] In this way, the force generated in the insulating coating layer 31 can be dispersed. According to the above-described printed wiring board 100, the minimum value of the distance between the upper half of the first wiring portion 41 and the upper half of the second wiring portion 42 is 5 μm or more.

[0072] In this way, printed wiring board 100 with improved adhesion between insulating coating layer 31 and wiring 21 can be obtained.

[0073] According to the above-mentioned printed wiring board 100, the depth D1 of the groove portion h is 15 μm or more. In this way, the force generated in the insulating coating layer 31 can be dispersed.

[0074] According to the above-described printed wiring board 100, the material constituting the insulating coating layer 31 includes parylene.

[0075] In this way, printed wiring board 100 with improved adhesion between insulating coating layer 31 and wiring 21 can be obtained.

[0076] According to the above-described printed wiring board 100, the height H1 of the wiring 21 exceeds 100 μm. In this way, printed wiring board 100 with improved adhesion between insulating coating layer 31 and wiring 21 can be obtained.

[0077] (Example) Samples 1 to 4 were prepared as samples of the printed wiring board 100. Table 1 shows the distance L1 between the first point p1 and the second point p2, the ratio of the second width w2 to the first width w1 (=second width w2 / first width w1) and the porosity of the insulating coating layer 31 at the curved portion 21R in the printed wiring boards 100 of Samples 1 to 4. Table 1 shows, from the top, the concentration of copper sulfate contained in the plating solution used in the second electrolytic plating step S7, the jet velocity of the plating solution, the current density, the distance L1 between the first point p1 and the second point p2, the ratio of the second width w2 to the first width w1 and the porosity of the insulating coating layer 31.

[0078] [Table 1]

[0079] It should be noted that the first width w1, the second width w2, and the distance L1 can be measured using a microscope or the like by observing the cross section of the cut printed wiring board 100 using a cross section processing device such as a microtome.

[0080] The foot of a perpendicular line drawn from the second point p2 perpendicularly to the main surface 10a is defined as a fourth point p4 (not shown). In the triangular region formed by the first point p1, the second point p2, and the fourth point p4, the region occupied by the voids and the region other than the region occupied by the voids are binarized, and the area of ​​the region occupied by the voids is measured, whereby the void ratio of the insulating coating layer 31 in the curved portion 21R can be calculated. In other words, the void ratio of the insulating coating layer 31 in the curved portion 21R is the ratio of the area of ​​the region occupied by the voids to the area of ​​the triangle formed by the first point p1, the second point p2, and the fourth point p4.

[0081] As shown in Table 1, Sample 1 is a printed wiring board 100 manufactured under conditions in the second electrolytic plating step S7 where the concentration of copper sulfate pentahydrate is 40 g / L, the jet speed of the plating solution is 0.03 L / min, and the current density is 0.8 ASD. Sample 2 is a printed wiring board 100 manufactured under conditions in the second electrolytic plating step S7 where the concentration of copper sulfate pentahydrate is 240 g / L, the jet speed of the plating solution is 0.10 L / min, and the current density is 0.5 ASD.

[0082] Thus, in the sample 1 manufactured using the plating solution with a copper sulfate pentahydrate concentration of less than 75 g / L in the second electrolytic plating step S7, the distance L1 between the first point p1 and the second point p2 was 7 μm, and the porosity of the insulating coating layer 31 in the curved portion 21R was 39 percent. In other words, the distance L1 between the first point p1 and the second point p2 was large, and the insulating coating layer 31 did not sufficiently enter the gap formed between the curved portion 21R and the main surface 10a. As a result, voids were formed in the gap, and the adhesion between the wiring 21 and the insulating coating layer 31 was low.

[0083] In addition, in sample 2 manufactured under the condition that the current density in the second electrolytic plating step S7 was less than 0.7 ASD, the distance L1 between the first point p1 and the second point p2 was 0.1 μm, and the ratio of the second width w2 to the first width w1 was 1.0. That is, the shape of the wiring 21 in sample 2 is rectangular, and no gap is formed, so that the adhesion between the wiring 21 and the insulating coating layer 31 is low.

[0084] On the other hand, Sample 3 and Sample 4 are printed wiring boards 100 manufactured under the conditions that, in the second electrolytic plating step S7, the concentration of copper sulfate pentahydrate contained in the plating solution is 75 g / L or more and 250 g / L or less, the jet speed of the plating solution is 0.05 L / min or more, and the current density is 0.7 ASD or more and 1.4 ASD or less. Specifically, Sample 3 is a printed wiring board 100 manufactured under the conditions that, in the second electrolytic plating step S7, the concentration of copper sulfate pentahydrate is 240 g / L, the jet speed of the plating solution is 0.10 L / min, and the current density is 1.4 ASD. Sample 4 is a printed wiring board 100 manufactured under the conditions that, in the second electrolytic plating step S7, the concentration of copper sulfate pentahydrate is 240 g / L, the jet speed of the plating solution is 0.10 L / min, and the current density is 1.0 ASD.

[0085] In each of Sample 3 and Sample 4, the porosity of the insulating coating layer 31 in the curved portion 21R was 20 percent or less. Specifically, in Sample 3, the distance L1 between the first point p1 and the second point p2 was 3.8 μm, and the porosity of the insulating coating layer 31 in the curved portion 21R was 18 percent. In Sample 4, the distance L1 between the first point p1 and the second point p2 was 2.5 μm, and the porosity of the insulating coating layer 31 in the curved portion 21R was 5 percent. Thus, in Sample 3 and Sample 4, it was confirmed that the porosity of the insulating coating layer 31 in the curved portion 21R was small, and the insulating coating layer 31 was sufficiently filled in the gap formed between the side surface 21s and the main surface 10a.

[0086] For this reason, if the distance L1 between the first point p1 and the second point p2 in the width direction of the wiring 21 is 5 μm or less, and the second width w2 is 1.01 times the first width w1 or more, the insulating coating layer 31 will sufficiently fill the gap, and a printed wiring board 100 will be obtained with improved adhesion between the insulating coating layer 31 and the wiring 21.

[0087] The embodiments and examples disclosed herein are illustrative in all respects and should not be considered as limiting. The scope of the present disclosure is defined by the claims, not the above-described embodiments, and is intended to include the meaning equivalent to the claims and all modifications within the scope. [Explanation of symbols]

[0088] 10 base film, 10a main surface, 10b main surface, 21 wiring, 21a winding portion, 21b land, 21c land, 21d wiring portion, 21L straight portion, 21R curved portion, 21s side surface, 21t top surface, 22 wiring, 22a winding portion, 22b land, 22c land, 22d wiring portion, 23 underlying conductive layer, 23a first layer, 23b second layer, 24 first conductive layer, 24a top surface, 24b bottom surface, 25 second conductive layer, 31 insulating coating layer, 32 insulating coating layer, 41 first wiring portion, 42 second wiring portion, 50 resist pattern, 51 dry film resist, 52 opening, 100 printed wiring board, h groove portion, SP spacing, W1 width, W2 width, T1 distance, T2 Distance, w1 1st width, w2 2nd width.

Claims

1. A base film having a main surface; wiring disposed on the main surface; a side surface of the wiring has a curved portion that is continuous with the main surface and extends toward an inside of the wiring, If the direction perpendicular to the main surface is the z direction, a first point is a point at which the wiring is connected to the main surface in the curved portion; If a point on the curved portion at a distance of 1.6 μm from the main surface in the z direction is defined as a second point, the distance between the first point and the second point in the width direction of the wiring is 5 μm or less; a width of the wiring at a distance of 1.6 μm from the main surface in the z direction is defined as a first width; If the width of the wiring at a distance of 5.0 μm from the main surface in the z direction is a second width, The second width is 1.01 times or more the first width.

2. If a point on the side surface that is 5.0 μm away from the main surface in the z direction is defined as a third point, 2. The printed wiring board according to claim 1, wherein the width of the wiring monotonically decreases from the third point to the second point.

3. 3. The printed wiring board according to claim 1, wherein the wiring includes a first conductive layer and a second conductive layer covering the first conductive layer.

4. the first conductive layer has a top surface furthest from the major surface and a bottom surface opposite the top surface; The printed wiring board according to claim 3 , wherein the width at the top surface is equal to or smaller than the width at the bottom surface.

5. 3. The printed wiring board according to claim 1, further comprising an insulating coating layer disposed on said main surface so as to cover said wiring.

6. The printed wiring board according to claim 5 , wherein a porosity of the insulating coating layer in the curved portion is 20 percent or less.

7. the wiring includes a first wiring portion and a second wiring portion adjacent to the first wiring portion, The printed wiring board according to claim 5 , wherein a groove portion is provided in the insulating coating layer between the first wiring portion and the second wiring portion.

8. 8. The printed wiring board according to claim 7, wherein a minimum value of a distance between an upper half of the first wiring portion and an upper half of the second wiring portion is 5 [mu]m or more.

9. 8. The printed wiring board according to claim 7, wherein the groove has a depth of 15 [mu]m or more.

10. The printed wiring board according to claim 5 , wherein a material constituting the insulating coating layer includes parylene.

11. 3. The printed wiring board according to claim 1, wherein the height of the wiring is more than 100 μm.

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