Surface-emitting laser

The surface-emitting laser design addresses the challenge of achieving high light output and low driving voltage by utilizing a specific layer structure that reduces light absorption and maintains low resistance values.

JP7685986B2Active Publication Date: 2025-05-30SONY SEMICON SOLUTIONS CORP
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Patent Information

Application Number
JP2022505109
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-03-05
Filing Date
2021-02-17
Publication Date
2025-05-30
Estimated Expiration
2041-02-17

AI Technical Summary

Technical Problem

Existing surface-emitting lasers face challenges in achieving high light output while maintaining low driving voltage, due to light absorption issues in the contact layer and increased resistance values.

Method used

The surface-emitting laser design includes a mesa portion with a specific layer structure, featuring a first conductivity type contact layer and a first conductivity type semiconductor layer with lower impurity concentration, which reduces light absorption and maintains low resistance values.

Benefits of technology

This design effectively suppresses light absorption by the contact layer while keeping the resistance value low, thereby achieving both high light output and low driving voltage.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

A surface emitting laser according to an embodiment of the present invention is provided with a mesa part including a first conductivity-type DBR layer, an active layer, a second conductivity-type DBR layer, and a second conductivity-type contact layer in this order. This surface emitting laser is further provided with: a first conductivity-type contact layer provided to a region of the first conductivity-type DBR layer side in a positional relationship with the mesa part; a first conductivity-type semiconductor layer that has an impurity concentration lower than that of the first conductivity-type contact layer, is disposed at a position facing the mesa part with the first conductivity-type contact layer therebetween, and makes contact with the first conductivity-type contact layer; a first electrode layer in contact with the first conductivity-type contact layer; and a second electrode layer in contact with the second conductivity-type contact layer.
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Description

Technical Field

[0001] The present disclosure relates to a surface-emitting laser.

Background Art

[0002] A surface-emitting laser that emits laser light from the upper surface of a mesa portion is known (for example, Patent Document 1).

Prior Art Document

Patent Document

[0003]

Patent Document 1

Summary of the Invention

[0004] By the way, when laser light is emitted from the back surface, it is conceivable to use a semi-insulating substrate as the substrate, provide a contact layer between the substrate and the DBR (distributed Bragg reflector) layer, and provide an electrode on this contact layer. By using a semi-insulating substrate as the substrate, light absorption can be suppressed. The contact layer is responsible for both reducing the contact resistance between the electrode and the DBR layer and hole transport from the electrode into the mesa portion. Therefore, light absorption due to impurities in the contact layer occurs. Although it is possible to suppress light absorption by thinning the contact layer between the substrate and the DBR layer, in such a case, the resistance value of the contact layer increases and the driving voltage also increases. Therefore, it is desirable to provide a surface-emitting laser capable of achieving both high light output and low driving voltage.

[0005] The surface-emitting laser according to one embodiment of the present disclosure includes a mesa portion including a first conductivity type DBR layer, an active layer, a second conductivity type DBR layer, and a second conductivity type contact layer in this order. The surface-emitting laser further includes, in relation to the mesa portion, a first conductivity type contact layer provided in a region on the first conductivity type DBR layer side, and a first conductivity type semiconductor layer having an impurity concentration lower than that of the first conductivity type contact layer and being disposed at a position facing the mesa portion via the first conductivity type contact layer and in contact with the first conductivity type contact layer, a first electrode layer in contact with the first conductivity type contact layer, and a second electrode layer in contact with the second conductivity type contact layer.

[0006] In the surface-emitting laser according to one embodiment of the present disclosure, in relation to the mesa portion, a first conductivity type contact layer and a first conductivity type semiconductor layer having an impurity concentration lower than that of the first conductivity type contact layer and being in contact with the first conductivity type contact layer are formed in a region on the first conductivity type DBR layer side. Thereby, for example, by relatively reducing the thickness of the first conductivity type contact layer having a relatively high impurity concentration and relatively increasing the thickness of the first conductivity type semiconductor layer having a relatively low impurity concentration, it is possible to suppress light absorption by the first conductivity type contact layer while keeping the resistance value between the first electrode layer and the first conductivity type DBR layer low.

Brief Description of the Drawings

[0007]

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Embodiments for Carrying Out the Invention

[0008] Hereinafter, embodiments for carrying out the present disclosure will be described in detail with reference to the drawings. The following description is a specific example of the present disclosure, and the present disclosure is not limited to the following aspects. Also, the present disclosure is not limited to the arrangement, dimensions, dimensional ratios, etc. of each component shown in each figure.

[0009] <Embodiment> [Configuration] A surface-emitting laser 1 according to an embodiment of the present disclosure will be described. FIG. 1 shows a cross-sectional configuration example of the surface-emitting laser 1.

[0010] The surface-emitting laser 1 includes a vertical resonator on a substrate 10. The vertical resonator is configured to oscillate at an oscillation wavelength λ by two DBR (distributed Bragg reflector) layers (p-type DBR layer 23, n-type DBR layer 27) facing each other in the normal direction of the substrate 10. 0 The p-type DBR layer 23 corresponds to a specific example of the "first conductivity type DBR layer" of the present disclosure. The n-type DBR layer 27 corresponds to a specific example of the "second conductivity type DBR layer" of the present disclosure. The p-type DBR layer 23 is formed closer to the substrate 10 than the n-type DBR layer 27. The n-type DBR layer 27 is formed at a position farther from the substrate 10 than the p-type DBR layer 23. The surface-emitting laser 1 is configured such that laser light L is emitted from the p-type DBR layer 23 side. Therefore, the surface-emitting laser 1 is a back-surface emission type laser having a light emission surface 1S of the laser light L on the back surface.

[0011] The surface-emitting laser 1 includes an epitaxial stack structure 20 formed on a substrate 10 by an epitaxial crystal growth method using the substrate 10 as a crystal growth substrate. The epitaxial stack structure 20 includes, for example, a p-type current diffusion layer 21, a p-type contact layer 22, a p-type DBR layer 23, a spacer layer 24, an active layer 25, a spacer layer 26, an n-type DBR layer 27, and an n-type contact layer 28, in this order from the substrate 10 side. The p-type contact layer 22 corresponds to a specific example of the "first conductivity type contact layer" of the present disclosure. The p-type current diffusion layer 21 corresponds to a specific example of the "first conductivity type semiconductor layer" of the present disclosure.

[0012] In the epitaxial stack structure 20, the p-type DBR layer 23, the spacer layer 24, the active layer 25, the spacer layer 26, the n-type DBR layer 27, and the n-type contact layer 28 constitute a columnar mesa portion 20A extending in the normal direction of the substrate 10. The p-type current diffusion layer 21 and the p-type contact layer 22 are provided in a region on the p-type DBR layer 23 side in relation to the position of the mesa portion 20A. The substrate 10 is disposed at a position facing the mesa portion 20A via the p-type current diffusion layer 21 and the p-type contact layer 22.

[0013] The surface-emitting laser 1 includes an electrode layer 32 in contact with the top of the mesa portion 20A (that is, the n-type contact layer 28), and an electrode layer 31 in contact with the p-type contact layer 22 extending to the skirt of the mesa portion 20A. The n-type contact layer 28 is a layer for making the n-type DBR layer 27 and the electrode layer 32 in ohmic contact with each other. The p-type contact layer 22 is a layer for making the p-type DBR layer 23 and the electrode layer 31 in ohmic contact with each other. The electrode layer 32 is formed at least at a position facing the light-emitting region of the active layer 25. The electrode layer 32 corresponds to a specific example of the "second electrode layer" of the present disclosure. The electrode layer 31 corresponds to a specific example of the "first electrode layer" of the present disclosure.

[0014] The surface-emitting laser 1 is formed of, for example, a arsenide semiconductor. The arsenide semiconductor refers to a compound semiconductor containing an arsenic (As) element and at least one element or more of aluminum (Al), gallium (Ga), and indium (In). The substrate 10 is, for example, a semi-insulating semiconductor substrate. Examples of the semi-insulating semiconductor substrate that can be used for the substrate 10 include a GaAs substrate. The substrate 10 may be a p-type semiconductor substrate. Examples of the p-type semiconductor substrate that can be used for the substrate 10 include a GaAs substrate having a p-type impurity concentration lower than the p-type impurity concentration of the p-type current diffusion layer 21. The resistivity of the substrate 10 is, for example, greater than 1.0×10 6 ohm and smaller than 1.0×10 12 ohm and is in such a value.

[0015] The p-type current diffusion layer 21 is in contact with the p-type contact layer 22 and is electrically connected to the p-type contact layer 22. The p-type current diffusion layer 21, together with the p-type contact layer 22, constitutes a current path flowing between the electrode layer 31 and the p-type DBR layer 23. The p-type current diffusion layer 21 is disposed at a position facing the mesa portion 20A via the p-type contact layer 22. The p-type current diffusion layer 21 is formed of, for example, p-type Al x1 Ga 1-x1 As (0≦x1<1). The p-type contact layer 22 is formed of, for example, p-type Al x2 Ga 1-x2 As (0≦x2<1). The p-type impurity concentration of the p-type current diffusion layer 21 is lower than the p-type impurity concentration of the p-type contact layer 22. When the p-type impurity concentration of the p-type contact layer 22 is 2.0×10 19 cm -3 , the p-type impurity concentration of the p-type current diffusion layer 21 is 2.0×10 18 cm -3(One digit lower in concentration than the p-type contact layer 22). The p-type impurity concentration in the p-type current diffusion layer 21 may be uniform in the thickness direction and the direction orthogonal to the thickness, or may have a concentration distribution in the thickness direction. The thickness of the p-type current diffusion layer 21 is greater than the thickness of the p-type contact layer 22. When the thickness of the p-type contact layer 22 is 1000 nm, the thickness of the p-type current diffusion layer 21 is 2000 nm (about twice the thickness of the p-type contact layer 22).

[0016] The p-type DBR layer 23 is formed by alternately stacking a low refractive index layer (not shown) and a high refractive index layer (not shown). In the p-type DBR layer 23, the low refractive index layer is, for example, p-type Al 0 ×1 / 4 (λ 0 is the oscillation wavelength) of p-type Al x3 Ga 1-x3 As (0 < x3 < 1), and the high refractive index layer is, for example, p-type Al 0 ×1 / 4 of p-type Al x4 Ga 1-x4 As (0 ≤ x4 < x3). The spacer layer 24 is, for example, p-type Al x5 Ga 1-x5 As (0 ≤ x5 < 1). Examples of the p-type impurity in the p-type current diffusion layer 21, the p-type contact layer 22, the p-type DBR layer 23, and the spacer layer 24 include carbon (C).

[0017] The active layer 25 is, for example, a multiple quantum well structure formed by alternately stacking an undoped In x6 Ga 1-x6 As (0 < x6 < 1) well layer (not shown) and an undoped In x7 Ga 1-x7 As (0 < x7 < x6) barrier layer (not shown). Note that the region of the active layer 25 facing the current injection region 29B (described later) becomes the light emitting region.

[0018] The spacer layer 26 is, for example, n-type Al x8 Ga 1-x8It consists of As(0 ≦ x8 < 1). The n-type DBR layer 27 is formed by alternately laminating a low refractive index layer (not shown) and a high refractive index layer (not shown). In the n-type DBR layer 27, the low refractive index layer is, for example, n-type Al 0 Ga x9 As(0 < x9 < 1) with an optical thickness of λ 1-x9 ×1 / 4, and the high refractive index layer is, for example, n-type Al 0 Ga x10 As(0 ≦ x10 < x9) with an optical thickness of λ 1-x10 ×1 / 4. The n-type DBR layer 27 is configured to have a large reflectance with respect to the oscillation wavelength λ 0 of the vertical resonator in the mesa portion 20A as compared with the p-type DBR layer 23. The n-type DBR layer 27 is formed thicker, for example, than the p-type DBR layer 23. The n-type contact layer 28 is, for example, n-type Al x11 Ga 1-x11 As(0 ≦ x11 < 1). Examples of the n-type impurity in the spacer layer 26, the n-type DBR layer 27, and the n-type contact layer 28 include silicon (Si).

[0019] The epitaxial stack structure 20 has a current confinement layer 29 within the p-type DBR layer 23 or between the p-type DBR layer 23 and the spacer layer 24. The current confinement layer 29 has a current injection region 29B and a current confinement region 29A. The current confinement region 29A is formed in the peripheral region of the current injection region 29B. The current injection region 29B is, for example, p-type Al x12 Ga 1-x12 As(0 < x12 ≦ 1). The current confinement region 29A is configured to contain, for example, Al 2 O 3 (aluminum oxide), and is obtained, for example, by oxidizing the high concentration of Al contained in the oxidized layer 29D (described later) from the side. Therefore, the current confinement layer 29 has a function of confining the current.

[0020] The electrode layer 31 is in contact with the surface of the p-type contact layer 22 on the mesa portion 20A side. The electrode layer 31 is composed of a non-alloy, and for example, is a laminate formed by laminating Ti, Pt, and Au in this order from the p-type contact layer 22 side. The electrode layer 32 is composed of an alloy containing, and for example, is a laminate formed by laminating AuGe, Ni, and Au in this order from the n-type contact layer 28 side. An insulating layer 33 is formed around the mesa portion 20A. The insulating layer 33 is a layer for protecting the mesa portion 20A, and for example, is composed of a laminate formed by laminating SiO 2 , Si, and SiO 2 in this order.

[0021] [Manufacturing Method] Next, a method for manufacturing the surface-emitting laser 1 according to the present embodiment will be described. FIGS. 2 to 6 show an example of the manufacturing procedure of the surface-emitting laser 1.

[0022] In order to manufacture the surface-emitting laser 1, for example, a compound semiconductor is integrally formed on a substrate 10 made of GaAs by an epitaxial crystal growth method such as the MOCVD (Metal Organic Chemical Vapor Deposition) method. At this time, as raw materials for the compound semiconductor, for example, methyl-based organometallic gases such as trimethylaluminum (TMAl), trimethylgallium (TMGa), and trimethylindium (TMIn), and arsine (AsH 3 ) gas are used. As raw materials for donor impurities, for example, disilane (Si 2 H 6 ) is used, and as raw materials for acceptor impurities, for example, carbon tetrabromide (CBr 4 ) is used.

[0023] First, an epitaxial stack structure 20 including a p-type current diffusion layer 21, a p-type contact layer 22, a p-type DBR layer 23, a spacer layer 24, an active layer 25, a spacer layer 26, an n-type DBR layer 27, and an n-type contact layer 28 is formed on the surface of the substrate 10 by an epitaxial crystal growth method such as the MOCVD method (FIG. 2).

[0024] Next, for example, after forming a circular resist layer (not shown), using this resist layer as a mask, the epitaxial stack structure 20 is selectively etched, and the epitaxial stack structure 20 is etched to a depth reaching the p-type contact layer 22. At this time, for example, it is preferable to use RIE (Reactive Ion Etching) with a Cl-based gas. In this way, for example, as shown in FIG. 3, a columnar mesa portion 20A is formed. At this time, the p-type contact layer 22 is exposed at the base of the mesa portion 20A. Also, the oxidized layer 29D is exposed on the side surface of the mesa portion 20A. Then, the resist layer is removed.

[0025] Next, in a water vapor atmosphere, an oxidation treatment is performed at a high temperature to selectively oxidize the Al contained in the oxidized layer 29D from the side surface of the mesa portion 20A. Alternatively, by a wet oxidation method, the Al contained in the oxidized layer 29D is selectively oxidized from the side surface of the mesa portion 20A. As a result, in the mesa portion 20A, the outer edge region of the oxidized layer 29D becomes an insulating layer (aluminum oxide), and the current constriction layer 29 is formed (FIG. 4).

[0026] Next, after forming an electrode layer 32 in contact with the upper surface of the mesa portion 20A (for example, the n-type contact layer 28), an insulating layer 33 covering the mesa portion 20A is formed (FIGS. 5 and 6). At this time, an opening 33B is formed at a predetermined position at the base of the mesa portion 20A. Next, an electrode layer 31 in contact with the surface of the p-type contact layer 22 on the mesa portion 20A side is formed in the opening 33B. In this way, the surface-emitting laser 1 is manufactured.

[0027] [Operation] In the surface-emitting laser 1 having such a configuration, when a predetermined voltage is applied between the electrode layer 31 electrically connected to the p-type DBR layer 23 and the electrode layer 32 electrically connected to the n-type DBR layer 27, the current constricted by the current constriction layer 29 is injected into the active layer 25, and as a result, light emission due to the recombination of electrons and holes occurs. As a result, the oscillation wavelength λ is determined by the vertical resonator in the mesa portion 20A. 0Laser oscillation occurs. Then, the light leaking from the p-type DBR layer 23 becomes the beam-shaped laser light L and is output to the outside from the light output surface 1S.

[0028] [Effect] Next, the effect of the surface-emitting laser 1 according to the present embodiment will be described.

[0029] When emitting laser light from the back surface, it is conceivable to use a semi-insulating substrate, provide a contact layer between the substrate and the DBR layer, and provide an electrode on this contact layer. By using a semi-insulating substrate, light absorption can be suppressed. The contact layer is responsible for both reducing the contact resistance between the electrode and the DBR layer and hole transport from the electrode into the mesa portion. Therefore, light absorption due to impurities in the contact layer will occur. Although it is possible to suppress light absorption by thinning the contact layer between the substrate and the DBR layer, in such a case, the resistance value of the contact layer increases, and the driving voltage also increases.

[0030] On the other hand, in the present embodiment, in the positional relationship with the mesa portion 20A, in the region on the p-type DBR layer 23 side, a p-type contact layer 22 and a p-type current diffusion layer 21 having an impurity concentration lower than that of the p-type contact layer 22 and in contact with the p-type contact layer 22 are formed. Thereby, by relatively thinning the thickness of the p-type contact layer 22 with a relatively high impurity concentration and relatively thickening the thickness of the p-type current diffusion layer 21 with a relatively low impurity concentration, it is possible to suppress light absorption by the p-type contact layer 22 while keeping the resistance value between the electrode layer 31 and the p-type DBR layer 23 low. Therefore, it is possible to achieve both high light output and low driving voltage.

[0031] In the present embodiment, the substrate 10 is provided at a position facing the mesa portion 20A via the p-type contact layer 22 and the p-type current diffusion layer 21, and the electrode layer 31 is provided at a position in contact with the surface of the p-type contact layer 22 on the mesa portion 20A side. Thereby, while suppressing light absorption in the substrate 10, the mesa portion 20A and the electrode layer 31 can be supported by the substrate 10. Further, since the electrode layers 31 and 32 are provided in a region opposite to the light emission surface 1S in the positional relationship with the substrate 10, for example, by bonding the surface emitting laser 1 and a circuit board including a circuit for driving the surface emitting laser 1 to each other, electrical contact can be made between the surface emitting laser 1 and the circuit for driving the surface emitting laser 1.

[0032] In the present embodiment, the p-type current diffusion layer 21, the p-type contact layer 22, the p-type DBR layer 23, the spacer layer 24, the active layer 25, the spacer layer 26, the n-type DBR layer 27, and the n-type contact layer 28 are formed by an epitaxial crystal growth method using the substrate 10 as a crystal growth substrate. Thereby, the thickness and impurity concentration of the p-type current diffusion layer 21 and the p-type contact layer 22 can be accurately controlled. For example, by making the thickness of the p-type contact layer 22 with a relatively high impurity concentration relatively thin and making the thickness of the p-type current diffusion layer 21 with a relatively low impurity concentration relatively thick, while suppressing light absorption by the p-type contact layer 22, the resistance value between the electrode layer 31 and the p-type DBR layer 23 can be kept low. Therefore, high light output and low drive voltage can be achieved simultaneously.

[0033] In the present embodiment, the n-type DBR layer 27 is configured to have a larger reflectance with respect to the oscillation wavelength λ of the vertical resonator in the mesa portion 20A than the p-type DBR layer 23. 0 Thereby, most of the laser light L amplified by the vertical resonator in the mesa portion 20A can be emitted from the p-type DBR layer 23 side.

[0034] In this embodiment, the semiconductor layers (p-type current diffusion layer 21, p-type contact layer 22, p-type DBR layer 23, spacer layer 24) provided on the light-emitting side in the epitaxial stack structure 20 are made of a p-type semiconductor. The p-type impurity is a material that is more likely to cause optical absorption loss for the laser light L compared to the n-type impurity. Therefore, in order to reduce the optical absorption loss, it is necessary to lower the concentration of the p-type impurity. Since the laser light L passes through a part of the current path between the electrode layer 31 and the p-type DBR layer 23, in order to reduce the optical absorption loss, in the current path between the electrode layer 31 and the p-type DBR layer 23, it is necessary that the thickness of the layer with a high p-type impurity concentration is as thin as possible. In this embodiment, by thinning the p-type contact layer 22, which is a layer with a high p-type impurity concentration, and thickening the p-type current diffusion layer 21, while suppressing the optical absorption by the p-type contact layer 22, the resistance value between the electrode layer 31 and the p-type DBR layer 23 is kept low. Therefore, even when the semiconductor layer provided on the light-emitting side in the epitaxial stack structure 20 is composed of a p-type semiconductor, it is possible to achieve both high light output and low driving voltage.

[0035] <Modification example> [Modification example A] In the above embodiment, the epitaxial stack structure 20 may have an undoped layer 34, for example, between the substrate 10 and the p-type current diffusion layer 21 as shown in FIG. 7. The undoped layer 34 is made of, for example, undoped Al x13 Ga 1-x13 As (0 < x13 ≤ 1). By providing the undoped layer 34, it becomes difficult for current to flow into the high defect density region existing in the substrate 10. Therefore, it is possible to more efficiently reduce the contact resistance between the electrode layer 31 and the p-type DBR layer 23, and the p-type current diffusion layer 21 can be responsible for the efficient injection of hole carriers into the mesa portion 20A. Therefore, it is possible to achieve both high light output and low driving voltage.

[0036] [Modification example B] In the above-described embodiments and their modifications, for example, as shown in FIG. 8, the substrate 10 may be omitted. For example, a lift-off layer may be provided between the substrate 10 and the epitaxial stack structure 20, and the substrate 10 can be peeled off by irradiating the lift-off layer with a laser or the like. By peeling off the substrate 10 in this way, it is possible to eliminate the optical absorption loss due to the substrate 10 and the increase in contact resistance. Therefore, it is possible to achieve both high light output and low drive voltage. In this modification, the electrode 31 may be in contact with the surface of the p-type contact layer 22 on the mesa portion 20A side, or may be in contact with the surface of the p-type contact layer 22 on the side opposite to the mesa portion 20A (the light-emitting surface).

[0037] [Modification Example C] In the above-described embodiments and their modifications, in the epitaxial stack structure 20, the semiconductor layer provided on the light-emitting side was composed of a p-type semiconductor, and the semiconductor layer provided on the side opposite to the light-emitting side in the epitaxial stack structure 20 was composed of an n-type semiconductor. However, in the above-described embodiments and their modifications, in the epitaxial stack structure 20, the semiconductor layer provided on the light-emitting side may be composed of an n-type semiconductor, and the semiconductor layer provided on the side opposite to the light-emitting side in the epitaxial stack structure 20 may be composed of a p-type semiconductor.

[0038] [Modification Example D] In the above-described embodiments and their modifications, the case where the surface-emitting laser 1 is formed of a group III-V semiconductor containing arsenic was exemplified. However, in the above-described embodiments and their modifications, the surface-emitting laser 1 may be formed of, for example, a group III-V semiconductor containing nitrogen (N), boron (B), antimony (Sb), and phosphorus (P).

[0039] The present disclosure has been described by way of embodiments and their modifications. However, the present disclosure is not limited to the above embodiments and the like, and various modifications are possible. Note that the effects described in this specification are merely examples. The effects of the present disclosure are not limited to the effects described in this specification. The present disclosure may have effects other than those described in this specification.

[0040] Also, for example, the present disclosure can have the following configuration. (1) A mesa portion including a first conductivity type DBR (distributed Bragg reflector) layer, an active layer, a second conductivity type DBR layer, and a second conductivity type contact layer in this order, A first conductivity type contact layer provided in a region on the first conductivity type DBR layer side in a positional relationship with the mesa portion, A first conductivity type semiconductor layer having an impurity concentration lower than that of the first conductivity type contact layer, which is disposed at a position facing the mesa portion via the first conductivity type contact layer and is in contact with the first conductivity type contact layer, A first electrode layer in contact with the first conductivity type contact layer, A second electrode layer in contact with the second conductivity type contact layer and a surface emitting laser. (2) Further including a semi-insulating semiconductor substrate or a second conductivity type semiconductor substrate at a position facing the mesa portion via the first conductivity type contact layer and the first conductivity type semiconductor layer, The first electrode is in contact with the surface on the mesa portion side of the first conductivity type contact layer The surface emitting laser according to (1). (3) The first conductivity type semiconductor layer, the first conductivity type contact layer, the first conductivity type DBR layer, the active layer, the second conductivity type DBR layer, and the second conductivity type contact layer are formed by an epitaxial crystal growth method using the semi-insulating semiconductor substrate or the second conductivity type semiconductor substrate as a crystal growth substrate The surface emitting laser according to (2). (4) further comprising an undoped semiconductor layer between the semi-insulating semiconductor substrate or the second conductivity type semiconductor substrate and the first conductivity type semiconductor layer The surface emitting laser according to (2) or (3). (5) The first conductivity type semiconductor layer is thicker than the first conductivity type contact layer The surface emitting laser according to any one of (1) to (4). (6) The second conductivity type DBR layer is configured to have a higher reflectivity with respect to the oscillation wavelength of the vertical resonator within the mesa portion as compared with the first conductivity type DBR layer The surface emitting laser according to any one of (1) to (5). (7) The first conductivity type is p-type The second conductivity type is n-type The surface emitting laser according to any one of (1) to (6).

[0041] According to the surface emitting laser according to an embodiment of the present disclosure, on the first conductivity type DBR layer side of the mesa portion, a first conductivity type contact layer electrically connected to the first conductivity type DBR layer, and a first conductivity type semiconductor layer in contact with the first conductivity type contact layer and having an impurity concentration lower than that of the first conductivity type contact layer are formed. Therefore, for example, by relatively thinning the thickness of the first conductivity type contact layer having a relatively high impurity concentration and relatively thickening the thickness of the first conductivity type semiconductor layer having a relatively low impurity concentration, while suppressing light absorption by the first conductivity type contact layer, the resistance value between the first electrode layer and the first conductivity type DBR layer can be kept low. Therefore, high light output and low drive voltage can be achieved simultaneously.

[0042] This application claims priority based on Japanese Patent Application No. 2020-037915 filed with the Japan Patent Office on March 5, 2020, and all contents of this application are incorporated herein by reference.

[0043] Those skilled in the art can conceive of various modifications, combinations, sub - combinations, and changes according to design requirements and other factors, and it is understood that they are included within the scope of the appended claims and their equivalents.

Claims

1. A mesa portion including a first conductivity type DBR (distributed Bragg reflector) layer, an active layer, a second conductivity type DBR layer, and a second conductivity type contact layer in this order, A first conductivity type contact layer provided in a region on the first conductivity type DBR layer side in a positional relationship with the mesa portion, A first conductivity type semiconductor layer having an impurity concentration lower than that of the first conductivity type contact layer, which is disposed at a position facing the mesa portion via the first conductivity type contact layer and is in contact with the first conductivity type contact layer, A first electrode layer in contact with the first conductivity type contact layer, A second electrode layer in contact with the second conductivity type contact layer, A semi-insulating semiconductor substrate or a first conductivity type semiconductor substrate disposed at a position facing the mesa portion via the first conductivity type contact layer and the first conductivity type semiconductor layer and comprising, the first conductivity type semiconductor layer is thicker than the first conductivity type contact layer, the first electrode layer is in contact with the surface of the first conductivity type contact layer on the mesa portion side, a surface emitting laser.

2. The first conductivity type semiconductor layer, the first conductivity type contact layer, the first conductivity type DBR layer, the active layer, the second conductivity type DBR layer, and the second conductivity type contact layer are formed by an epitaxial crystal growth method using the semi-insulating semiconductor substrate or the first conductivity type semiconductor substrate as a crystal growth substrate. The surface emitting laser according to Claim 1.

3. The surface emitting laser according to Claim 1, further comprising an undoped semiconductor layer between the semi-insulating semiconductor substrate or the first conductivity type semiconductor substrate and the first conductivity type semiconductor layer. The surface emitting laser according to Claim 1.

4. The second conductivity type DBR layer is configured to have a larger reflectivity with respect to the oscillation wavelength of the vertical resonator in the mesa portion as compared with the first conductivity type DBR layer. The surface emitting laser according to Claim 1.

5. The first conductivity type is p-type, the second conductivity type is n-type. The surface emitting laser according to Claim 1.

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