Semiconductor device and method of manufacturing the same

Abstract

The purpose of the present invention is to provide a technology capable of inhibiting misalignment from occurring when an electrode terminal is mounted on a circuit pattern of an insulation substrate. This semiconductor device comprises: an insulation substrate 1 having a circuit pattern 3 formed on the upper surface; a semiconductor element 5 mounted on the circuit pattern 3; and an electrode terminal 6 which has a joint 6a joined to the upper surface of the circuit pattern 3 and which is electrically connected to the semiconductor element 5. The circuit pattern 3 is provided with a fitting part, and the joint 6a of the electrode terminal 6 is provided with a fitting mating part fitted with the fitting part.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device.

Background Art

[0002] Conventionally, pads with steps are formed on an insulating substrate, and leads (corresponding to electrode terminals) are mounted in accordance with the steps of the pads to prevent misalignment of the leads (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, the steps of the pads described in Patent Document 1 are provided to suppress solder flow during the reflow process, and the size of the steps is formed larger than the size of the joint portion of the leads by the amount of solder applied to the steps. Therefore, when the leads are mounted on the steps of the pads by machine or by hand, misalignment is likely to occur. When misalignment occurs, there is a problem that the semiconductor device becomes defective in quality.

[0005] Therefore, an object of the present disclosure is to provide a technique capable of suppressing misalignment when an electrode terminal is mounted on a circuit pattern of an insulating substrate.

Means for Solving the Problems

[0006] The semiconductor device according to the present disclosure includes an insulating substrate having a circuit pattern formed on its upper surface, and an electrode terminal having a joint portion joined to the upper surface of the circuit pattern. A fitting portion is provided in the circuit pattern, and a fitted portion to be fitted with the fitting portion is provided in the joint portion of the electrode terminal. The fitting portion is a recess provided in the circuit pattern, and the fitted portion is a drooping surface that protrudes downward from the outer peripheral surface of the joint portion of the electrode terminal. By fitting the drooping surface into the recess, the electrode terminal is positioned on the circuit pattern. 。

Advantages of the Invention

[0007] According to the present disclosure, by fitting the fitted portion of the electrode terminal to the fitting portion of the circuit pattern, it is possible to suppress misalignment when the electrode terminal is mounted on the circuit pattern of the insulating substrate.

[0008] The object, features, aspects, and advantages of this disclosure will become clearer from the following detailed description and the accompanying drawings.

Brief Description of the Drawings

[0009]

Figure 1

Figure 2

Figure 3

Figure 4

Embodiments for Carrying Out the Invention

[0010] <Embodiment 1> Embodiment 1 will be described below with reference to the drawings. FIG. 1 is a schematic cross-sectional view of the joint portion 6a of the electrode terminal 6 included in the semiconductor device according to Embodiment 1 and its surroundings.

[0011] As shown in FIG. 1, the semiconductor device includes an insulating substrate 1, a semiconductor element 5, and an electrode terminal 6. The insulating substrate 1 includes an insulating layer 2, a circuit pattern 3, and a base plate 4. The insulating layer 2 is made of ceramic or the like. A plurality of conductive circuit patterns 3 are provided on the upper surface of the insulating layer 2. The circuit pattern 3 is made of, for example, Cu. A base plate 4 is provided on the lower surface of the insulating layer 2.

[0012] An electrode terminal 6 is joined to the upper surface of the circuit pattern 3 by a joining material 7. Also, a plurality of semiconductor elements 5 such as IGBT (Insulated Gate Bipolar Transistor) and FWDI (Free Wheeling Diode) are joined by solder (not shown) to the upper surface of the circuit pattern 3 adjacent to the circuit pattern 3 to which the electrode terminal 6 is joined. The adjacent circuit patterns 3 are connected by an aluminum wire (not shown). Further, the insulating substrate 1, the semiconductor element 5, and the electrode terminal 6 are protected by a case (not shown) and a sealing material such as gel (not shown). Note that, instead of the IGBT, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) may be mounted as the semiconductor element 5. Also, instead of the FWDI, an SBD (Schottky diode) may be mounted.

[0013] The electrode terminal 6 is electrically connected to the semiconductor element 5 via an aluminum wire (not shown). The electrode terminal 6 is made of, for example, Al. The electrode terminal 6 includes a joint portion 6a provided on one end side of the electrode terminal 6, and a bent portion 6b that bends upward from the joint portion 6a. The joint portion 6a is a portion that extends parallel to the upper surface of the circuit pattern 3 and is a portion that is joined to the upper surface of the circuit pattern 3. The lower surface of the joint portion 6a is flat and is in contact with the circuit pattern 3 over the entire surface. A sag surface 6c that protrudes downward from the outer peripheral surface is provided on the joint portion 6a. The sag surface 6c is provided over a part or the entire circumference of the outer peripheral surface of the joint portion 6a of the electrode terminal 6. When the sag surface 6c is provided only on a part of the outer peripheral surface of the joint portion 6a, it is preferably provided on the tip side of the joint portion 6a. The tip side of the joint portion 6a is the left side in FIG. 1, that is, the side opposite to the bent portion 6b.

[0014] A recess 3a that can be fitted with the sag surface 6c is provided in a portion of the upper surface of the circuit pattern 3 that is joined to the electrode terminal 6. Specifically, the tip of the sag surface 6c is fitted into the recess 3a. The recess 3a is provided at a position facing the sag surface 6c on the upper surface of the circuit pattern 3 and is formed to have a size that can be fitted with the tip of the sag surface 6c. By fitting the sag surface 6c into the recess 3a, the electrode terminal 6 is positioned on the circuit pattern 3. Here, the recess 3a corresponds to the fitting portion, and the sag surface 6c corresponds to the portion to be fitted.

[0015] The bonding material 7 is disposed so as to cover the joint portion 6a of the electrode terminal 6 and a part of the bent portion 6b. The bonding material 7 is, for example, solder.

[0016] Next, a method for forming the sagging surface 6c included in the method of manufacturing a semiconductor device will be briefly described without using drawings. First, a metal plate that will become the electrode terminal 6 is placed in the lower mold. Next, in order to plastically deform the metal plate, a gap is created between the lower mold and the upper mold facing it, and the metal plate is punched out. Thereby, the electrode terminal 6 having the sagging surface 6c is produced. In a general semiconductor device, the electrode terminal 6 is produced with the gap between the upper mold and the lower mold minimized so that the sagging surface 6c is not formed. However, in the present embodiment, the electrode terminal 6 having the sagging surface 6c is produced by widening the gap between the upper mold and the lower mold more than that.

[0017] As described above, the semiconductor device according to Embodiment 1 includes an insulating substrate 1 having a circuit pattern 3 formed on the upper surface, and an electrode terminal 6 having a joint portion 6a joined to the upper surface of the circuit pattern 3. A fitting portion is provided in the circuit pattern 3, and a fitted portion that is fitted to the sagging surface 6c is provided in the joint portion 6a of the electrode terminal 6. Specifically, the fitting portion is a recess 3a provided in the circuit pattern 3, and the fitted portion is a sagging surface 6c that protrudes downward from the outer peripheral surface of the joint portion 6a of the electrode terminal 6. By fitting the sagging surface 6c into the recess 3a, the electrode terminal 6 is positioned on the circuit pattern 3.

[0018] Therefore, by fitting the sagging surface 6c as the fitted portion of the electrode terminal 6 into the recess 3a as the fitting portion of the circuit pattern 3, it is possible to suppress misalignment when the electrode terminal 6 is mounted on the circuit pattern 3 of the insulating substrate 1. Thereby, it is also possible to suppress misalignment during the joining of the circuit pattern 3 and the electrode terminal 6.

[0019] In addition, by providing the sagging surface 6c on the electrode terminal 6, it becomes easier to form a solder fillet. From the above, the yield of the semiconductor device is improved and the durability is improved.

[0020] Further, in the method for manufacturing the semiconductor device of Embodiment 1, a metal plate that becomes the electrode terminal 6 is disposed in the lower mold, and the metal plate is punched out with a gap between the lower mold and the upper mold facing the lower mold, thereby plastically deforming the metal plate to form the sag surface 6c. Therefore, since the sag surface 6c can be formed in the punching process for manufacturing the electrode terminal 6, an increase in the manufacturing process can be suppressed.

[0021] <Embodiment 2> Next, a semiconductor device according to Embodiment 2 will be described. FIG. 2 is a schematic cross-sectional view of the joint portion 6a of the electrode terminal 6 included in the semiconductor device according to Embodiment 2 and its surroundings. In Embodiment 2, the same components as those described in Embodiment 1 are denoted by the same reference numerals and the description thereof is omitted.

[0022] As shown in FIG. 2, in Embodiment 2, without providing the sag surface 6c (see FIG. 1) in the joint portion 6a of the electrode terminal 6, the entire lower end portion of the joint portion 6a functions as a fitted portion.

[0023] The recess 3a provided in the circuit pattern 3 is formed to have a size that can fit the entire lower end portion of the joint portion 6a. Further, the maximum depth of the recess 3a is 1 / 2 or less of the thickness of the circuit pattern 3. More preferably, the maximum depth of the recess 3a is 1 / 4 or more and 1 / 2 or less of the thickness of the circuit pattern 3.

[0024] As described above, in the semiconductor device according to Embodiment 2, the fitting portion is the recess 3a provided in the circuit pattern 3, the maximum depth of the recess 3a is 1 / 2 or less of the thickness of the circuit pattern 3, the fitted portion is the lower end portion of the joint portion 6a of the electrode terminal 6, and the lower end portion of the joint portion 6a of the electrode terminal 6 is fitted into the recess 3a, whereby the electrode terminal 6 is positioned on the circuit pattern 3.

[0025] Therefore, by fitting the lower end portion of the joint portion 6a as the fitted portion of the electrode terminal 6 into the recess 3a as the fitting portion of the circuit pattern 3, it is possible to suppress the positional deviation when the electrode terminal 6 is mounted on the circuit pattern 3 of the insulating substrate 1. Thereby, it is also possible to suppress the positional deviation at the time of joining the circuit pattern 3 and the electrode terminal 6.

[0026] Further, since the thickness of the circuit pattern 3 at the portion where the electrode terminal 6 is joined becomes thinner, the thermal resistance from the electrode terminal 6 to a heat dissipation fin (not shown) attached on the lower surface of the base plate 4 decreases. Thereby, the heat generated at the electrode terminal 6 can be easily dissipated from the heat dissipation fin.

[0027] <Embodiment 3> Next, a semiconductor device according to Embodiment 3 will be described. FIG. 3 is a schematic cross-sectional view before caulking of the joint portion 6a of the electrode terminal 6 included in the semiconductor device according to Embodiment 3 and its periphery. FIG. 4 is a schematic cross-sectional view after caulking of the joint portion 6a of the electrode terminal 6 included in the semiconductor device according to Embodiment 3 and its periphery. In Embodiment 3, the same components as those described in Embodiments 1 and 2 are denoted by the same reference numerals and the description thereof is omitted.

[0028] As shown in FIG. 3, in Embodiment 3, a protrusion 8 protruding upward is provided on the upper surface of the circuit pattern 3. The protrusion 8 is formed in a columnar or cylindrical shape and is formed integrally with the circuit pattern 3. The vertical length of the protrusion 8 is formed longer than the thickness of the joint portion 6a of the electrode terminal 6.

[0029] A through hole 6d into which a protrusion 8 can be fitted is provided in a joint portion 6a of the electrode terminal 6. The diameter of the through hole 6d is formed slightly larger than the diameter of the protrusion 8 in order to allow deformation of the protrusion 8 when the tip of the protrusion 8 is caulked. By fitting the through hole 6d to the protrusion 8, the electrode terminal 6 is positioned on the circuit pattern 3. After being positioned, as shown in FIG. 4, the tip of the protrusion 8 is caulked in a state of being fitted to the through hole 6d. Thereby, the electrode terminal 6 and the circuit pattern 3 are joined without using a bonding material 7 (see FIG. 1). Here, the protrusion 8 corresponds to the fitting portion, and the through hole 6d corresponds to the fitted portion.

[0030] Next, a caulking method for the tip of the protrusion 8 included in the method of manufacturing a semiconductor device will be briefly described. First, as shown in FIG. 3, the electrode terminal 6 is arranged on the circuit pattern 3 so that the through hole 6d in the joint portion 6a fits onto the protrusion 8 of the circuit pattern 3. Next, a load is applied to the tip of the protrusion 8 with an ultrasonic bonding tool (not shown). As a result, as shown in FIG. 4, the tip of the protrusion 8 is caulked.

[0031] As described above, in the semiconductor device according to Embodiment 3, the fitting portion is the protrusion 8 provided on the circuit pattern 3, the fitted portion is the through hole 6d provided in the joint portion 6a of the electrode terminal 6, and by fitting the through hole 6d to the protrusion 8, the electrode terminal 6 is positioned on the circuit pattern 3.

[0032] Therefore, by fitting the through hole 6d of the joint portion 6a as the fitted portion of the electrode terminal 6 to the protrusion 8 as the fitting portion of the circuit pattern 3, it is possible to suppress misalignment when the electrode terminal 6 is mounted on the circuit pattern 3 of the insulating substrate 1. Thereby, misalignment during joining of the circuit pattern 3 and the electrode terminal 6 can also be suppressed.

[0033] In addition, since the tip of the protrusion 8 is caulked in a state of being fitted to the through hole 6d, the circuit pattern 3 and the electrode terminal 6 can be joined without using the bonding material 7.

[0034] In addition, even in the joining of the electrode terminal 6 made of Al and the circuit pattern 3 made of Cu, which was difficult to join conventionally without raising the temperature, the electrical connection between the electrode terminal 6 and the circuit pattern 3 becomes easy. Further, by caulking the tip of the protrusion 8 in a state of being fitted with the through hole 6d, the reliability of the joining between the electrode terminal 6 and the circuit pattern 3 is improved.

[0035] In addition, since the protrusion 8 is integrated with the circuit pattern 3, the joining between the protrusion 8 and the circuit pattern 3 becomes unnecessary, so that the reliability of the joining between the electrode terminal 6 and the circuit pattern 3 is further improved.

[0036] In addition, since the protrusion 8 is formed in a columnar or cylindrical shape, it is possible to achieve close contact with the through hole 6d due to uniform deformation of the protrusion 8. As a result, the joining between the circuit pattern 3 and the electrode terminal 6 becomes stronger.

[0037] Although this disclosure has been described in detail, the above description is illustrative in all aspects and not limiting. Innumerable variations that are not illustrated can be conceived.

[0038] It should be noted that the embodiments can be freely combined, or each embodiment can be appropriately modified or omitted.

Explanation of Reference Numerals

[0039] 1 Insulating substrate, 3 Circuit pattern, 3a Depression, 6 Electrode terminal, 6a Joining portion, 6c Sagging surface, 6d Through hole, 8 Protrusion.

Claims

1. An insulating substrate having a circuit pattern formed thereon, and an electrode terminal having a joint portion joined to the upper surface of the circuit pattern, wherein a fitting portion is provided in the circuit pattern, a fitted portion to be fitted with the fitting portion is provided in the joint portion of the electrode terminal, the fitting portion is a recess provided in the circuit pattern, the fitted portion is a sagging surface protruding downward from the outer peripheral surface of the joint portion of the electrode terminal, and the semiconductor device in which the electrode terminal is positioned on the circuit pattern by fitting the sagging surface into the recess.

2. A manufacturing method for manufacturing the semiconductor device according to Claim 1, wherein a metal plate to be the electrode terminal is disposed in a lower mold, and the metal plate is punched with a gap between the lower mold and an upper mold facing the lower mold to plastically deform the metal plate to form the sagging surface.

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