Driver device for a voltage-controlled semiconductor device

Abstract

To perform temperature monitoring of a semiconductor chip of a voltage control type semiconductor element at high accuracy.SOLUTION: A drive circuit 24 drives a gate of IGBT 10. A gate resistance 26 is arranged between the drive circuit 24 and the gate of IGBT 10. A delay circuit 28 delays by a prescribed time until a drive signal outputted by the drive circuit 24 reaches within a Miller effect period occurred in a period in which a gate voltage changes transiently. A one-shot circuit 30 outputs a pulse signal which has a pulse width shorter than the Miller effect period from a rising front edge or a fall rear edge of a delay signal outputted by the delay circuit 28. A sample hold circuit 40 fetches a chip temperature of the IGBT 10 and a gate voltage having temperature dependency at a period when the pulse signal is inputted and holds the gate voltage when there is no input of the pulse signal and outputs it.SELECTED DRAWING: Figure 4

Description

Technical Field

[0001] The present invention relates to a driving device for a voltage-controlled semiconductor element having a function of externally outputting the chip temperature of the voltage-controlled semiconductor element.

Background Art

[0002] There are semiconductor devices that perform switching control of inductive loads or power conversion. Some such semiconductor devices include a semiconductor switching element and a driving device that drives this semiconductor switching element. As the semiconductor switching element, a voltage-controlled semiconductor element such as an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is used.

[0003] For a voltage-controlled semiconductor element, the allowable temperature is defined by the absolute maximum rating. If the voltage-controlled semiconductor element operates above the maximum allowable temperature, the semiconductor chip may undergo thermal breakdown. To prevent or avoid this thermal breakdown of the semiconductor chip, the chip temperature is monitored, and when the chip temperature is assumed to be high, the voltage-controlled semiconductor element is operated below the rated value or stopped.

[0004] As a method for detecting the chip temperature of a voltage-controlled semiconductor element, it is known to provide a thermistor in a semiconductor device, detect the temperature inside the case, and predict the chip temperature from the operating conditions. Also, a temperature detection diode is integrally formed on the chip of the voltage-controlled semiconductor element, and the chip temperature is directly measured from the temperature characteristics of the temperature detection diode.

[0005] The method for predicting the chip temperature using a thermistor has the characteristic that since the thermistor is mounted at a position away from the semiconductor chip, it cannot follow the rapid temperature rise caused by the flow of overcurrent due to load fluctuations. On the other hand, in the method for measuring the chip temperature using a temperature detection diode, since the temperature detection diode is incorporated on the semiconductor chip, the active area decreases. Furthermore, since a dedicated electrode for the diode is provided on the semiconductor chip, the active area further decreases. For this reason, when a temperature detection diode is mounted on a chip of a semiconductor switching element with a small current rating, the chip size becomes enlarged.

[0006] Therefore, a method for detecting the temperature of a chip of a voltage-controlled semiconductor element without using a thermistor or a temperature detection diode has been proposed (see, for example, Patent Document 1 and Patent Document 2).

[0007] According to the technique described in Patent Document 1, when turning off the IGBT, the duration of the mirror plateau is detected, and the temperature is detected by converting the length of the duration of this mirror plateau into temperature. That is, in the technique of Patent Document 1, taking advantage of the fact that the time delay of the mirror plateau has an interdependence with the junction temperature of the IGBT, the junction temperature of the IGBT is determined from the time delay of the mirror plateau.

[0008] In the technique of Patent Document 2, the time change of the gate voltage during the switching operation of the semiconductor device is measured, and taking advantage of the fact that the time change of the gate voltage has a temperature dependence on the temperature of the semiconductor device, the temperature of the semiconductor device is estimated from the measured time change of the gate voltage.

Prior Art Documents

Patent Documents

[0009]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0010] However, the technology of Patent Document 1 has a problem that it is difficult to accurately detect the mirror effect period, which is the time delay of the mirror plateau. Further, the technology of Patent Document 2 has a configuration in which the gate voltage rise time is measured and the temperature of the semiconductor device corresponding to the gate voltage rise time is calculated by a microcomputer with reference to temperature-dependent information, so there is a problem that the driving device becomes large-sized.

[0011] The present invention has been made in view of such points, and an object thereof is to provide a driving device for a voltage-controlled semiconductor element that can monitor the temperature of a semiconductor chip with high accuracy and does not increase the size of the configuration for detecting the temperature of the semiconductor chip.

Means for Solving the Problems

[0012] The present invention provides a driving device for a voltage-controlled semiconductor element. The driving device for driving this voltage-controlled semiconductor element includes a drive circuit that drives the gate of the voltage-controlled semiconductor element, a gate resistor installed between the drive circuit and the gate of the voltage-controlled semiconductor element, a delay circuit that delays the drive signal output by the drive circuit by a predetermined time until it reaches within the mirror effect period that occurs during a period in which the gate voltage transiently changes, a one-shot circuit that outputs a pulse signal having a pulse width shorter than the mirror effect period from the rising front edge or falling trailing edge of the delay signal output by the delay circuit, and a sample-and-hold circuit that captures the gate voltage that is temperature-dependent on the chip temperature of the voltage-controlled semiconductor element during the period when the pulse signal is input and holds and outputs the gate voltage when the input of the pulse signal disappears.

[0013] Furthermore, the present invention provides yet another driving device for a voltage-controlled semiconductor device. The driving device for driving the voltage-controlled semiconductor device includes a drive circuit for driving the gate of the voltage-controlled semiconductor device, a gate resistor installed between the drive circuit and the gate of the voltage-controlled semiconductor device, a delay circuit that delays the drive signal output by the drive circuit by a predetermined time until it reaches within a mirror effect period that occurs during a period when the gate voltage transiently changes, a one-shot circuit that outputs a pulse signal having a pulse width shorter than the mirror effect period from the rising front edge or the falling trailing edge of the delayed signal output by the delay circuit, a comparator that compares the gate voltage having a temperature dependency on the chip temperature of the voltage-controlled semiconductor device with a reference voltage corresponding to the overheat detection threshold voltage, an AND circuit that inputs the pulse signal output by the one-shot circuit and the output signal of the comparator and outputs an overheat detection signal when the gate voltage exceeds the reference voltage, and a sample-and-hold circuit that captures the gate voltage having a temperature dependency on the chip temperature of the voltage-controlled semiconductor device during the period when the pulse signal is input and holds and outputs the gate voltage when the input of the pulse signal ceases.

Advantages of the Invention

[0014] The driving device for the voltage-controlled semiconductor device configured as described above can directly and in real time monitor the chip temperature of the voltage-controlled semiconductor device, so that the chip temperature can be monitored with high precision, and a configuration for detecting the chip temperature can be realized with a small-scale circuit configuration.

Brief Description of the Drawings

[0015]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Embodiments for Carrying Out the Invention

[0016] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings by taking as an example the case where an IGBT is used as a voltage - controlled semiconductor element and applied to a driving device for driving the IGBT. In the drawings, parts denoted by the same reference numerals indicate the same components.

[0017] FIG. 1 is a circuit diagram showing a configuration example of a driving device for an IGBT according to a first embodiment, FIG. 2 is a diagram showing the relationship between the gate voltage and the chip temperature during the Miller effect period, and FIG. 3 is a time chart for explaining the operation of the driving device for an IGBT according to the first embodiment.

[0018] In FIG. 1, an IGBT 10 which is a semiconductor switching element and a driving device 20 for driving the IGBT 10 are shown. The IGBT 10 and the driving device 20 are incorporated in, for example, one package to form a semiconductor device called an intelligent power module.

[0019] The IGBT 10 has a FWD (Free Wheeling Diode) 12 connected in anti - parallel, which functions to return the energy stored in the inductive load when the IGBT 10 is turned off to the power supply side. That is, the anode of the FWD 12 is connected to the emitter of the IGBT 10, and the cathode of the FWD 12 is connected to the collector of the IGBT 10.

[0020] The driving device 20 includes a pre - driver 22, a drive circuit 24, and a gate resistor 26. The pre - driver 22 has a terminal IN to which a PWM (Pulse Width Modulation) signal is input from an external upper - level device, and the output terminal of the pre - driver 22 is connected to the input terminal of the drive circuit 24.

[0021] The output terminal of the drive circuit 24 is connected to one terminal of the gate resistor 26, and the other terminal of the gate resistor 26 is connected to the terminal G which is connected to the gate of the IGBT 10. The drive circuit 24 is also connected to the terminal E which is connected to the emitter of the IGBT 10. The PWM signal input to the terminal IN is converted into a drive signal SDRV via the pre-driver 22 and the drive circuit 24. The drive signal SDRV becomes the gate voltage VGE via the gate resistor 26 and is supplied to the terminal G.

[0022] The drive device 20 also includes a delay circuit 28, a one-shot circuit 30, resistors 32, 34, a comparator 36, and an AND circuit 38. The input terminal of the delay circuit 28 is connected to the connection part between the output terminal of the drive circuit 24 and one terminal of the gate resistor 26, and the output terminal of the delay circuit 28 is connected to the input terminal of the one-shot circuit 30. One terminal of the resistor 32 is connected to the power line, the other terminal of the resistor 32 is connected to one terminal of the resistor 34, and the other terminal of the resistor 34 is connected to the ground.

[0023] The resistors 32, 34 form a voltage dividing circuit and output a reference voltage Vref. The reference voltage Vref corresponds to the overheat detection threshold voltage, for example, a voltage corresponding to 175°C which is the upper limit of the operating guaranteed temperature of the IGBT 10.

[0024] The non-inverting input terminal of the comparator 36 is connected to the connection part between the other terminal of the gate resistor 26 and the terminal G, and the inverting input terminal of the comparator 36 is connected to the connection part between the other terminal of the resistor 32 and one terminal of the resistor 34. The output terminal of the one-shot circuit 30 is connected to the first input terminal of the AND circuit 38, and the output terminal of the comparator 36 is connected to the second input terminal of the AND circuit 38. The output terminal of the AND circuit 38 is connected to an alarm output terminal ALM which notifies an external higher-level device of an overheat detection signal.

[0025] Here, during the mirror effect period when the IGBT10 is turned on, the gate voltage VGE has a temperature dependence on the chip temperature Tvj of the IGBT10. As shown in FIG. 2, since this temperature dependence is a characteristic in which the gate voltage VGE changes linearly with respect to the chip temperature Tvj, the chip temperature Tvj can be detected from the gate voltage VGE.

[0026] Next, the operation of the drive device 20 with the above configuration will be described with reference to the time chart of FIG. 3. In the time chart of FIG. 3, from top to bottom, the drive signal SDRV output from the drive circuit 24, the gate voltage VGE between the gate resistor 26 and the terminal G, the delay signal output from the delay circuit 28, the pulse signal output from the one-shot circuit 30, and the overheat detection signal of the alarm output terminal ALM are shown.

[0027] When a PWM signal is input to the terminal IN of the drive device 20, the PWM signal is input to the drive circuit 24 via the pre-driver 22 and output as a drive signal SDRV from the drive circuit 24. When this drive signal SDRV is applied to the gate of the IGBT10 via the gate resistor 26, the gate voltage VGE changes as shown in FIG. 3.

[0028] When the drive signal SDRV rises from the low (L) level to the high (H) level, the voltage of the H level charges the gate-emitter capacitance of the IGBT10 via the gate resistor 26. When the charging voltage of the gate-emitter capacitance exceeds the on-threshold voltage of the IGBT10, the IGBT10 turns on, and the collector-emitter of the IGBT10 becomes almost short-circuited. As a result, the gate-emitter capacitance and the gate-collector capacitance (mirror capacitance) are connected to the gate of the IGBT10, and the IGBT10 operates as a mirror integrator. During the mirror effect period Tm, which is the operation period, the gate voltage VGE maintains a constant state. When the mirror effect period Tm ends, since further charging to the gate of the IGBT10 continues, the gate voltage VGE rises until it reaches the H level of the drive signal SDRV.

[0029] After the drive signal SDRV becomes the L level, following the change opposite to the change in the gate voltage VGE when IGBT10 turns on, the gate voltage VGE decreases until it reaches the potential of the L level of the drive signal SDRV.

[0030] The drive signal SDRV is also input to the delay circuit 28. The delay circuit 28 outputs a delayed signal obtained by delaying the drive signal SDRV by a delay time Td. This delay time Td is the time from the rising front edge of the drive signal SDRV to an arbitrary point during the Miller effect period Tm, and is determined based on the switching characteristics of IGBT10. The delayed signal is input to the one-shot circuit 30, and the one-shot circuit 30 outputs a pulse signal having a certain width from the rising front edge of the delayed signal. The pulse signal output by the one-shot circuit 30 has a pulse width shorter than the Miller effect period Tm, and becomes a signal for obtaining the gate voltage VGE during the Miller effect period Tm.

[0031] The gate voltage VGE is also supplied to the non-inverting input terminal of the comparator 36. Since the comparator 36 receives a reference voltage Vref corresponding to the overheat detection threshold voltage at its inverting input terminal, it constitutes a binarization circuit for determining whether the gate voltage VGE has reached the overheat detection threshold voltage. The comparator 36 outputs an L-level signal when the gate voltage VGE is less than the reference voltage Vref corresponding to the overheat detection threshold voltage, and outputs an H-level signal when the gate voltage VGE is equal to or higher than the reference voltage Vref.

[0032] The AND circuit 38 receives the pulse signal output by the one-shot circuit 30 at its first input terminal and the output signal of the comparator 36 at its second input terminal. Thereby, the AND circuit 38 permits the passage of the output signal of the comparator 36 only during the period when it receives the pulse signal.

[0033] When the chip temperature of IGBT10 is at room temperature within the operating guaranteed temperature range, the gate voltage VGE during the Miller effect period Tm is less than the reference voltage Vref. Therefore, the comparator 36 outputs an L-level signal, and for this reason, the AND circuit 38 outputs an L-level signal.

[0034] When the chip temperature of IGBT10 is high and exceeds the range of the guaranteed operating temperature, the gate voltage VGE during the Miller effect period Tm becomes equal to or higher than the reference voltage Vref. Therefore, the comparator 36 outputs a signal at the H level, and the AND circuit 38 outputs a signal at the H level. This signal at the H level is notified as an overheat detection signal from the alarm output terminal ALM to an external host device.

[0035] In this embodiment, the overheat detection signal is output from the alarm output terminal ALM to the outside. However, it may be input to an overheat detection protection circuit (not shown) to forcibly turn off the IGBT10.

[0036] FIG. 4 is a circuit diagram showing a configuration example of a driving device for an IGBT according to a second embodiment. The driving device 20a for the IGBT10 according to the second embodiment is configured to detect and output the chip temperature in real time, while the driving device 20 in the first embodiment detects overheating of the IGBT10 and outputs an alarm.

[0037] The driving device 20a includes a pre-driver 22, a drive circuit 24, a gate resistor 26, a delay circuit 28, and a one-shot circuit 30. Since these are the same as those included in the driving device 20 of the first embodiment, detailed description thereof is omitted here.

[0038] The drive device 20a also includes a sample-and-hold circuit 40. The sample-and-hold circuit 40 includes an operational amplifier 42, a switch element 44, a capacitor 46, and an operational amplifier 48. The operational amplifier 42 connects its inverting input terminal to its output terminal to form a voltage follower circuit, and its non-inverting input terminal is connected to a terminal G that is connected to the gate of the IGBT 10. The output terminal of the operational amplifier 42 is connected to one terminal of the switch element 44, and the other terminal of the switch element 44 is connected to one terminal of the capacitor 46 and the non-inverting input terminal of the operational amplifier 48. The other terminal of the capacitor 46 is connected to ground. The control terminal of the switch element 44 is connected to the output terminal of the one-shot circuit 30. The operational amplifier 48 connects its inverting input terminal to its output terminal to form a voltage follower circuit. The output terminal of the operational amplifier 48 is connected to the chip temperature output terminal TMP.

[0039] According to the sample-and-hold circuit 40 of this drive device 20a, by configuring the gate voltage VGE to be received by the operational amplifier 42 with a high input impedance, the influence of connecting the sample-and-hold circuit 40 to the terminal G is minimized. Since the operational amplifier 42 forms a voltage follower circuit, it outputs the gate voltage VGE input to the non-inverting input terminal as it is. When the switch element 44 receives the high-level pulse signal output by the one-shot circuit 30 at its control terminal, it turns on (conducts) only during the period when it receives the pulse signal, and applies the voltage output by the operational amplifier 42 (≈ gate voltage VGE) to the capacitor 46. At this time, the terminal voltage of the capacitor 46 becomes a voltage that follows the voltage output by the operational amplifier 42.

[0040] When the pulse signal output by the one-shot circuit 30 becomes low level, the switch element 44 turns off (non-conducts), and the terminal voltage of the capacitor 46 is held at the voltage when the switch element 44 turned off. The voltage held in the capacitor 46 is directly output as a chip temperature detection signal by the operational amplifier 48 that forms a voltage follower circuit, and is notified to an external higher-level device from the chip temperature output terminal TMP.

[0041] In addition, in an external host device, when receiving a chip temperature detection signal from the drive device 20a, the chip temperature is obtained from the chip temperature detection signal. That is, the host device has data representing the relationship between the gate voltage VGE and the chip temperature Tvj during the mirror effect period shown in FIG. 2, and converts the gate voltage VGE indicated by the chip temperature detection signal into the corresponding chip temperature Tvj.

[0042] Thus, this drive device 20a can directly and in real time monitor the chip temperature of the IGBT 10, so that the monitoring of the chip temperature can be performed with high precision, and a configuration for detecting the chip temperature can be realized with a small-scale circuit configuration.

[0043] FIG. 5 is a circuit diagram showing a configuration example of a drive device for an IGBT according to the third embodiment. The drive device 20b for the IGBT 10 according to the third embodiment has the overheat detection function of the IGBT 10 that the drive device 20 in the first embodiment has, and the chip temperature detection function of the IGBT 10 that the drive device 20a in the second embodiment has.

[0044] The drive device 20b includes a pre-driver 22, a drive circuit 24, a gate resistor 26, a delay circuit 28, a one-shot circuit 30, resistors 32 and 34, a comparator 36, an AND circuit 38, and a sample-and-hold circuit 40. The components of the drive device 20b above are the same as those included in the drive device 20 in the first embodiment and the drive device 20a in the second embodiment. However, the gate voltage VGE input to the non-inverting input terminal of the comparator 36 is obtained from the output terminal of the operational amplifier 42 of the sample-and-hold circuit 40.

[0045] Thus, this drive device 20b is the same as those included in the drive device 20 of the first embodiment and the drive device 20a of the second embodiment, and its operation is also the same as that of the drive devices 20 and 20a. Therefore, detailed description thereof will be omitted here. According to this drive device 20b, both overheat detection and temperature detection can be realized.

[0046] In the above embodiment, the gate voltage VGE during the mirror effect period when turning on the IGBT 10 is detected, and the chip temperature corresponding to the gate voltage VGE is obtained. However, it may be changed to detect the gate voltage VGE during the mirror effect period when turning off the IGBT 10 or during both the mirror effect periods when turning on and off the IGBT 10 to obtain the chip temperature. In this case, the delay circuit 28 outputs a delay signal delayed by the time from the trailing edge of the falling edge of the drive signal SDRV to an arbitrary point in time during the mirror effect period Tm of the gate voltage VGE. Also, the drive devices 20 and 20a may be devices that drive a MOSFET instead of the IGBT 10.

[0047] As described above, based on the embodiments, one aspect of the temperature detection method and the drive device of the voltage control type semiconductor element of the present invention has been described. However, these are merely examples and are not limited to the above description.

Description of Reference Numerals

[0048] 10 IGBT 12 FWD 20, 20a, 20b Drive device 22 Predriver 24 Drive circuit 26 Gate resistor 28 Delay circuit 30 One-shot circuit 32, 34 Resistor 36 Comparator 38 AND circuit 40 Sample-and-hold circuit 42 Operational amplifier 44 Switching element 46 Capacitor 48 Operational Amplifier

Claims

1. A drive device for driving a voltage-controlled semiconductor element, comprising: a drive circuit for driving a gate of the voltage controlled semiconductor element; a gate resistor disposed between the drive circuit and the gate of the voltage-controlled semiconductor device; a delay circuit that delays the drive signal output by the drive circuit by a predetermined time until the drive signal reaches a Miller effect period that occurs during a period in which the gate voltage changes transiently; a one-shot circuit that outputs a pulse signal having a pulse width shorter than the Miller effect period from a leading edge of a rising edge or a trailing edge of a falling edge of the delayed signal output by the delay circuit; a sample-and-hold circuit that captures the gate voltage, which is temperature-dependent and corresponds to the chip temperature of the voltage-controlled semiconductor element, during a period in which the pulse signal is being input, and holds and outputs the gate voltage when the input of the pulse signal is no longer present; A driving device for a voltage-controlled semiconductor element comprising:

2. 2. The drive device for a voltage-controlled semiconductor device according to claim 1, further comprising a chip temperature output terminal for notifying an external device of a signal output from said sample-and-hold circuit as a chip temperature detection signal.

3. A drive device for driving a voltage-controlled semiconductor element, comprising: a drive circuit for driving a gate of the voltage controlled semiconductor element; a gate resistor disposed between the drive circuit and the gate of the voltage-controlled semiconductor device; a delay circuit that delays the drive signal output by the drive circuit by a predetermined time until the drive signal reaches a Miller effect period that occurs during a period in which the gate voltage changes transiently; a one-shot circuit that outputs a pulse signal having a pulse width shorter than the Miller effect period from a leading edge of a rising edge or a trailing edge of a falling edge of the delayed signal output by the delay circuit; a comparator for comparing the gate voltage, which is temperature-dependent and corresponds to a chip temperature of the voltage-controlled semiconductor device, with a reference voltage corresponding to an overheat detection threshold voltage; an AND circuit that receives the pulse signal output by the one-shot circuit and an output signal of the comparator, and outputs an overheat detection signal when the gate voltage exceeds the reference voltage; a sample-and-hold circuit that captures the gate voltage, which is temperature-dependent and corresponds to the chip temperature of the voltage-controlled semiconductor element, during a period in which the pulse signal is being input, and holds and outputs the gate voltage when the input of the pulse signal is no longer present; A driving device for a voltage-controlled semiconductor element comprising:

4. 4. The driving device for a voltage-controlled semiconductor element according to claim 3, further comprising: an alarm output terminal for notifying an external device of the overheat detection signal output by the AND circuit; and a chip temperature output terminal for notifying an external device of the signal output by the sample-and-hold circuit as a chip temperature detection signal.

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