Method of manufacturing a semiconductor device and inspection method

Abstract

To improve a screening accuracy in manufacturing a semiconductor device.SOLUTION: A manufacturing method of a semiconductor device comprising a semiconductor substrate, includes: an interlayer insulation film formation step of forming an interlayer insulation film above the semiconductor substrate; a metal electrode formation step of forming a metal electrode above the interlayer insulation film; a defect candidate detection step of acquiring an image of the metal electrode, and detecting a defect candidate on a front surface of the metal electrode on the basis of the image; and an inspection step of determining the quality of the semiconductor device on the basis of height information on a direction vertical to the front surface of the metal electrode of each of detected defect candidates.SELECTED DRAWING: Figure 11

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a semiconductor device and a method for inspecting the same.

Background Art

[0002] Conventionally, in the manufacture of semiconductor devices, a technique for detecting the presence or absence of defects on the surface of a semiconductor device by an image has been known (see, for example, Patent Document 1). In addition, a technique for discriminating defects on the surface of a semiconductor device by a laser has been known (see, for example, Patent Document 2). Patent Document 1 Japanese Patent Application Laid-Open No. 2020-126937 Patent Document 2 Japanese Patent Application Laid-Open No. 2002-98645

Summary of the Invention

Problems to be Solved by the Invention

[0003] In the manufacture of semiconductor devices, it is preferable to improve screening accuracy.

Means for Solving the Problems

[0004] In order to solve the above problems, in one aspect of the present invention, there is provided a method for manufacturing a semiconductor device provided on a semiconductor substrate. The method for manufacturing a semiconductor device may include an interlayer insulating film forming step. In the interlayer insulating film forming step, an interlayer insulating film may be formed above the semiconductor substrate. The method for manufacturing a semiconductor device may include a metal electrode forming step. In the metal electrode forming step, a metal electrode may be formed above the interlayer insulating film. The method for manufacturing a semiconductor device may include a defect candidate detection step. In the defect candidate detection step, an image of the metal electrode may be acquired. In the defect candidate detection step, defect candidates on the surface of the metal electrode may be detected based on the image. The method for manufacturing a semiconductor device may include an inspection step. In the inspection step, the quality of the semiconductor device may be determined based on the height information in the direction perpendicular to the surface of the metal electrode of each detected defect candidate.

[0005] In the inspection stage, it may be determined whether the defect candidate of the metal electrode has a concave shape or a convex shape. In the inspection stage, based on the shape of the defect candidate, the pass / fail criteria for the height information may be changed. In the inspection stage, based on the shape of the defect candidate, the reference value for comparison with the height information may be changed.

[0006] In the inspection stage, when the defect candidate of the metal electrode has a concave shape, the pass / fail of the semiconductor device may be determined based on whether the concave shape is above the upper end of the interlayer insulating film 38. In the inspection stage, the pass / fail of the semiconductor device may be determined based on whether the distance between the defect candidate of the metal electrode and the interlayer insulating film 38 is 10 μm or more.

[0007] In the inspection stage, the pass / fail of the semiconductor device may be determined based on the comparison between the depth of the defect candidate of the metal electrode and a threshold value based on the thickness of the metal electrode. In the inspection stage, the pass / fail of the semiconductor device may be determined based on whether the depth of the defect candidate of the metal electrode is 40% or less of the thickness of the metal electrode.

[0008] In the inspection stage, when the defect candidate of the metal electrode has a convex shape, the pass / fail of the semiconductor device may be determined based on the comparison between the height of the defect candidate of the metal electrode and a certain threshold value. In the inspection stage, the pass / fail of the semiconductor device may be determined based on whether the height of the defect candidate of the metal electrode is 4 μm or more.

[0009] The method for manufacturing a semiconductor device may include an electroplated electrode formation stage after the inspection stage. In the electroplated electrode formation stage, an electroplated electrode may be formed above the metal electrode.

[0010] In the defect candidate detection stage, a defect candidate of the metal electrode having a size of 5 μm or more on the surface of the metal electrode may be detected.

[0011] In a second aspect of the present invention, there is provided a method for inspecting a semiconductor device including a semiconductor substrate and a metal electrode provided above the semiconductor substrate. The method for inspecting a semiconductor device may include a defect candidate detection step. In the defect candidate detection step, an image of the metal electrode may be acquired. In the defect candidate detection step, defect candidates on the surface of the metal electrode may be detected based on the image. The method for inspecting a semiconductor device may include an inspection step. In the inspection step, the pass / fail of the semiconductor device may be determined based on the height information in a direction perpendicular to the surface of the metal electrode of each detected defect candidate.

[0012] Note that the above summary of the invention does not list all the features of the present invention. Also, sub-combinations of these feature groups may also be inventions.

Brief Description of the Drawings

[0013]

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Embodiments for Carrying Out the Invention

[0014] Hereinafter, the present invention will be described through embodiments of the invention. However, the following embodiments do not limit the invention according to the claims. Also, not all combinations of features described in the embodiments are essential for the solution means of the invention. In this specification and the drawings, elements having substantially the same function and configuration are denoted by the same reference numerals to omit redundant description, and elements not directly related to the present invention are omitted from the illustration. Also, in one drawing, elements having the same function and configuration may be represented by representative reference numerals, and other reference numerals may be omitted.

[0015] In this specification, one side in the direction parallel to the depth direction of the semiconductor substrate is referred to as "upper", and the other side is referred to as "lower". Of the two main surfaces of the substrate, layer or other member, one surface is referred to as the upper surface and the other surface is referred to as the lower surface. The directions of "upper" and "lower" are not limited to the direction of gravity or the direction at the time of mounting the semiconductor module.

[0016] In this specification, technical matters may be described using orthogonal coordinate axes of the X-axis, Y-axis, and Z-axis. The orthogonal coordinate axes only specify the relative positions of components and do not limit a specific direction. For example, the Z-axis does not limit and indicate the height direction with respect to the ground. Note that the +Z-axis direction and the -Z-axis direction are opposite directions. When described as the Z-axis direction without specifying positive or negative, it means directions parallel to the +Z-axis and -Z-axis. In this specification, orthogonal axes parallel to the upper and lower surfaces of the semiconductor substrate are defined as the X-axis and Y-axis. Also, an axis perpendicular to the upper and lower surfaces of the semiconductor substrate is defined as the Z-axis. In this specification, the direction of the Z-axis may be referred to as the depth direction. Also, in this specification, directions parallel to the upper and lower surfaces of the semiconductor substrate, including the X-axis and Y-axis, may be referred to as the horizontal direction.

[0017] When referred to as "identical" or "equal" in this specification, it may include cases having errors due to manufacturing variations or the like. Such errors are, for example, within 10%.

[0018] FIG. 1 is a diagram for explaining an example of a flowchart of a method for manufacturing a semiconductor device 100 (see FIG. 2). The method for manufacturing the semiconductor device 100 includes an interlayer insulating film forming step S101, a metal electrode forming step S102, a defect candidate detecting step S103, an inspection step S104, and a plating electrode step S105. First, in FIGS. 2 to 4, the interlayer insulating film forming step S101, the metal electrode forming step S102, and the plating electrode step S105 will be described.

[0019] FIG. 2 is a diagram for explaining an example of the interlayer insulating film forming step S101. In FIG. 2, a part near the gate structure of the semiconductor device 100 after forming the interlayer insulating film 38 is shown.

[0020] The semiconductor device 100 functions as a power conversion device such as an inverter, for example. The semiconductor device 100 may include MOS transistors. In this example, the semiconductor device 100 includes IEMOS (Implantation and Epitaxial Metal Oxide Semiconductor) transistors. The semiconductor device 100 may include insulated gate bipolar transistors (IGBTs), diodes such as FWD (Free Wheel Diodes), and RC (Reverse Conducting)-IGBTs combining these. The semiconductor device 100 does not have to be limited to these examples. The semiconductor device 100 may be a so-called power semiconductor element.

[0021] The semiconductor device 100 is provided on the semiconductor substrate 10. The semiconductor substrate 10 in this example is a wafer having a substantially circular shape in a top view. A plurality of semiconductor devices 100 may be provided on the semiconductor substrate 10. A plurality of semiconductor devices 100 may be manufactured by dicing the semiconductor substrate 10. The semiconductor substrate 10 is a substrate formed of a semiconductor material. In this example, the semiconductor substrate 10 is a silicon carbide (SiC) substrate. The material of the semiconductor substrate 10 is not limited to silicon carbide. The material of the semiconductor substrate 10 may be silicon. A plurality of semiconductor devices 100 may be provided on the semiconductor substrate 10. In FIG. 2, the semiconductor device 100 includes the semiconductor substrate 10. The semiconductor substrate 10 has an upper surface 11. Before the interlayer insulating film forming step S101, a trench 40 may be formed on the upper surface 11. The trench 40 is a groove provided from the upper surface 11 of the semiconductor substrate 10 to the inside of the semiconductor substrate 10. The trench 40 may penetrate the P-type base region 14. The trench 40 is provided to extend in the Y-axis direction. Also, a plurality of trenches 40 are arranged at a predetermined interval in the X-axis direction.

[0022] The upper surface 11 of the semiconductor substrate 10 may be a surface on which a gate structure such as an IGBT or a MOS transistor is formed. The gate structure is a structure including at least one of, for example, a gate electrode 44, a gate insulating film 42, an N-type source region 12, and a P-type base region 14. In the example of FIG. 2, a gate electrode 44 formed of polysilicon or the like and a gate insulating film 42 that insulates the gate electrode 44 from the semiconductor substrate 10 are provided in the trench 40. The gate structure may be formed before the interlayer insulating film formation step S101.

[0023] In the interlayer insulating film formation step S101, an interlayer insulating film 38 is formed above the semiconductor substrate 10. The interlayer insulating film 38 is a film including at least one layer of an insulating film such as silicate glass doped with impurities such as boron or phosphorus, a thermal oxide film, and other insulating films.

[0024] In this example, the interlayer insulating film 38 is formed on the upper surface 11. The interlayer insulating film 38 of this example insulates the gate electrode 44 from the metal electrode 52 (see FIG. 3). The interlayer insulating film 38 may cover the trench 40. A part of the interlayer insulating film 38 may be formed in the trench 40. The interlayer insulating film 38 may not be formed in the trench 40. Further, the interlayer insulating film 38 insulates the semiconductor substrate 10 from the metal electrode 52. The interlayer insulating film 38 may be provided with a contact hole 54 for connecting the semiconductor substrate 10 and the metal electrode 52. The interlayer insulating film 38 may be formed by a known method and patterned as shown in FIG. 2 by a known method.

[0025] The interval D3 between the interlayer insulating films 38 may be 0.25 μm or more. The interval D3 between the interlayer insulating films 38 may be the shortest distance between the interlayer insulating films 38. In this example, the interval D3 between the interlayer insulating films 38 is the interval in the X-axis direction. The interval D3 between the interlayer insulating films 38 may be 2.5 μm or less.

[0026] Also, the cell pitch D4 of the semiconductor device 100 may be 0.50 μm or more. The cell pitch D4 of the semiconductor device 100 may be the distance between the centers of the trenches 40. In this example, the distance between the centers of the trenches 40 is the interval in the X-axis direction. The cell pitch D4 of the semiconductor device 100 may be 5.0 μm or less.

[0027] FIG. 3 is a diagram for explaining an example of the metal electrode formation step S102. In FIG. 3, the semiconductor device 100 after the formation of the metal electrode 52 is shown.

[0028] In the metal electrode formation step S102, the metal electrode 52 is formed above the interlayer insulating film 38. In this example, the metal electrode 52 is formed above the upper surface 11 and the interlayer insulating film 38. In this example, the metal electrode 52 is connected to the semiconductor substrate 10 through the contact hole 54 between the interlayer insulating films 38. Note that the upper surface of the metal electrode 52 is defined as the surface 53.

[0029] The metal electrode 52 is an electrode containing a metal such as aluminum. In this example, the metal electrode 52 is AlSi. The metal electrode 52 may be formed by a known method.

[0030] FIG. 4 is a diagram for explaining an example of the plating electrode step S105. In FIG. 4, the semiconductor device 100 after the formation of the plating electrode 56 is shown.

[0031] In the plating electrode formation step S105, the plating electrode 56 is formed above the metal electrode 52. In this example, the plating electrode 56 is formed on the surface 53 of the metal electrode 52. The stacked structure of the metal electrode 52 and the plating electrode 56 may function as an emitter electrode or a source electrode. The plating electrode 56 is, for example, NiAu plating. The plating electrode 56 may be formed using a plating solution.

[0032] FIGS. 5 and 6 are diagrams for explaining another example of the metal electrode formation step S102. FIGS. 5 and 6 are different from FIG. 3 in that the surface 53 of the metal electrode 52 has defect candidates 60. Other configurations of FIGS. 5 and 6 may be the same as those of FIG. 3.

[0033] In this specification, a defect refers to unevenness on the surface 53 of the metal electrode 52. When unevenness that satisfies predetermined conditions is found during screening, the semiconductor device 100 is determined to be a defective product. A defect candidate 60 refers to a candidate for unevenness that satisfies predetermined conditions.

[0034] In FIG. 5, the defect candidate 60 of the metal electrode 52 has a concave shape. That the defect candidate 60 of the metal electrode 52 has a concave shape may mean that a part of the surface 53 of the metal electrode 52 is missing, or that a part of the surface 53 of the metal electrode 52 is lower in the height direction (Z-axis direction) than other parts due to other causes. When the defect candidate 60 of the metal electrode 52 has a concave shape, the distance in the Z-axis direction from the surface 53 to the lower end of the defect candidate 60 is referred to as the depth of the defect candidate 60.

[0035] In FIG. 6, the defect candidate 60 of the metal electrode 52 has a convex shape. That the defect candidate 60 of the metal electrode 52 has a convex shape may mean that a part of the surface 53 of the metal electrode 52 is raised. For example, if a foreign object such as a resist residue exists under the metal electrode 52, the metal electrode 52 may be locally raised. That the defect candidate 60 of the metal electrode 52 has a convex shape may mean that a part of the surface 53 of the metal electrode 52 is higher in the height direction (Z-axis direction) than other parts. When the defect candidate 60 of the metal electrode 52 has a convex shape, the distance in the Z-axis direction from the surface 53 to the upper end of the defect candidate 60 is referred to as the height of the defect candidate 60.

[0036] As shown in FIG. 5, when the defect candidate 60 has a concave shape with a depth equal to or greater than a certain value, in the plating electrode formation step S105, the plating solution may enter the defect candidate 60, and movable ions in the plating solution may diffuse into the semiconductor device 100, which may cause characteristic defects. It is also conceivable to detect such characteristic defects by applying a predetermined voltage to the gate electrode 44 of the semiconductor device 100 and performing electrical screening. However, even for non-defective products, since the characteristics vary greatly when the semiconductor device 100 is turned on, it is difficult to detect such characteristic defects by electrical screening. Therefore, it is preferable to perform an appearance inspection and screening of the surface 53 of the metal electrode 52.

[0037] In the appearance inspection screening, the shape, color tone, and size of the defect candidate 60 generated in the semiconductor device 100 are confirmed by an image or the like. If the defect candidate 60 meets the judgment criteria, the defect candidate 60 is judged as a defective product as a defect. However, it is difficult to judge whether a product is good or defective based only on the information of the shape, color tone, and size of the defect candidate 60, and a semiconductor device 100 that is originally a non-defective product may be treated as a defective product. For example, even when the defect candidate 60 has a concave shape as shown in FIG. 5, if the depth is below a certain value, no characteristic defect will occur. Also, when the defect candidate 60 has a convex shape as shown in FIG. 6, if the height is below a certain value, it can be estimated that there is no foreign matter under the metal electrode 52 or there is only a very small foreign matter, and there is no problem in considering the semiconductor device 100 as a non-defective product. However, if the quality is judged only based on the shape, color tone, and size of the defect candidate 60, the height or depth of the defect candidate 60 cannot be determined, and a semiconductor device 100 that is originally a non-defective product may be judged as a defective product. The manufacturing method in this example determines the quality of the semiconductor device 100 based on the height or depth of the defect candidate 60. Thereby, the probability of misjudging a semiconductor device 100 that is originally a non-defective product as a defective product can be reduced, and the non-defective product rate of the semiconductor device 100 can be improved.

[0038] FIG. 7 is a diagram for explaining an example of the defect candidate detection step S103 when the defect candidate 60 has a concave shape. In this example, the case where the defect candidate 60 has a concave shape as shown in FIG. 5 will be described.

[0039] In the defect candidate detection step S103, a defect candidate 60 on the surface 53 of the metal electrode 52 is detected. In the defect candidate detection step S103, the device 70 detects the defect candidate 60. The device 70 is, for example, a visual inspection device. The device 70 may have a CCD (Charge Coupled Device) camera.

[0040] In the defect candidate detection step 103, the device 70 acquires an image of the metal electrode 52. In the defect candidate detection step S103, the device 70 may detect a defect candidate 60 on the surface 53 of the metal electrode 52 based on the image of the metal electrode 52. For example, the device 70 acquires information on the shape, color tone, and surface size of the elements included in the image from the image of the metal electrode 52, and detects the defect candidate 60. An element included in the image is a part having a predetermined contour in the image. The contour of the element can be identified by the difference in luminance or chrominance between pixels. The device 70 may acquire any one of the information on the shape, color tone, and surface size of each element from the image of the metal electrode 52, or may acquire all of the information on the shape, color tone, and size of each element from the image of the metal electrode 52.

[0041] In the defect candidate detection step S103, the device 70 may detect, as a defect candidate 60, an element having a size D1 on the surface 53 of the metal electrode 52 that is equal to or greater than the threshold value A1. In this example, the size D1 on the surface 53 of the metal electrode 52 is the size in the X-axis direction. The size D1 on the surface 53 of the metal electrode 52 may be the maximum width of the defect candidate 60 in the XY plane.

[0042] The threshold value A1 is, for example, 5 μm. The threshold value A1 may be 5 μm or more. That is, in the defect candidate detection step S103, a defect candidate 60 having a size D1 on the surface 53 of the metal electrode 52 that is 5 μm or more may be detected. If the size D1 of the defect candidate 60 on the surface 53 of the metal electrode 52 is less than 5 μm, it may not be regarded as a defect candidate 60.

[0043] Also, in the defect candidate detection stage S103, the apparatus 70 may detect a defect candidate 60 in which the intensity of a predetermined color on the surface 53 of the metal electrode 52 is equal to or greater than a predetermined threshold value. The color intensity may be the luminance of each color in a predetermined color space, such as the luminance of any one of RGB in the RGB color space. The color intensity of the defect candidate 60 may use the average value of the color in the defect candidate 60, or may use the maximum value. In the defect candidate detection stage S103, the apparatus 70 may detect a defect candidate 60 having a specific shape. For example, the apparatus 70 may detect the defect candidate 60 based on the ratio of the width in the major axis direction of the defect candidate 60 to the width in the minor axis direction. The major axis refers to a straight line passing through the centroid of the two-dimensional shape of the defect candidate 60 and having the maximum length of the defect candidate 60. The minor axis refers to a straight line passing through the centroid of the two-dimensional shape of the defect candidate 60 and having the minimum length of the defect candidate 60. The apparatus 70 may detect the defect candidate 60 based on the degree of similarity to a preset shape. The degree of similarity of the shape may be calculated by a known method. The apparatus 70 may determine the defect candidate 60 using all information on the shape, color tone, and size of each element.

[0044] FIG. 8 is a diagram for explaining an example of the inspection stage S104 when the defect candidate 60 has a concave shape. In this example, the case where the defect candidate 60 has a concave shape as shown in FIG. 5 will be described.

[0045] In the inspection stage S104, the apparatus 80 determines the quality of the semiconductor device 100. As an example, the apparatus 80 is an appearance inspection apparatus. The apparatus 80 may be the same as the apparatus 70.

[0046] In this example, the apparatus 80 determines the quality based on the height (or depth) information in the direction perpendicular to the surface 53 of the metal electrode 52 of each detected defect candidate 60. In this specification, both "height" and "depth" may be simply referred to as "height". That is, when referred to as "height", it may include both the "height" upward from the surface 53 and the "depth" downward from the surface 53. In FIG. 8, the height information is the height or depth information in the Z-axis direction. Note that the method of measuring the height information will be described with reference to FIGS. 12 and 13.

[0047] Conventionally, the determination of whether the semiconductor device 100 is a good product or a defective product has been carried out only based on the shape, color tone, and size information on the surface of the defect candidate 60. However, in this example, in addition to the shape, color tone, and size information on the surface of the defect candidate 60, height information is used to determine whether the semiconductor device 100 is a good product or a defective product. Therefore, the screening accuracy can be improved.

[0048] A specific inspection method will be described. In this example, in the inspection step S104, it is determined whether the defect candidate 60 of the metal electrode 52 has a concave shape or a convex shape. Then, in the inspection step S104, based on the shape of the defect candidate 60, the pass / fail determination criteria for the height information are changed. That is, in the inspection step S104, based on the shape of the defect candidate 60, the reference value for comparison with the height information may be changed. Examples of the reference value will be described later. That is, the pass / fail determination criteria when the defect candidate 60 has a concave shape and the pass / fail determination criteria when the defect candidate 60 has a convex shape are set respectively. As described in FIGS. 5 and 6, the types of defects are different depending on whether the defect candidate 60 is concave or convex. Therefore, by setting the pass / fail determination criteria for the semiconductor device 100 depending on whether the defect candidate 60 is concave or convex, the screening accuracy can be improved.

[0049] In FIG. 8, the case where the defect candidate 60 of the metal electrode 52 has a concave shape will be described. The first determination criterion, the second determination criterion, and the third determination criterion when the defect candidate 60 of the metal electrode 52 has a concave shape will be described respectively.

[0050] As a first determination criterion, at the inspection stage S104, the quality of the semiconductor device 100 may be determined based on whether the concave shape is above the upper end of the interlayer insulating film 38. For example, when the concave shape of the defect candidate 60 is not above the upper end of the interlayer insulating film 38, that is, when the defect candidate 60 is formed deeper than the height position of the upper end of the interlayer insulating film 38, the semiconductor device 100 may be determined as a defective product. When the concave shape is above the upper end of the interlayer insulating film 38, that is, when the defect candidate 60 is shallower than the height position of the upper end of the interlayer insulating film 38, the semiconductor device 100 may be determined as a non-defective product. When the defect candidate 60 is above the upper end of the interlayer insulating film 38, since the defect candidate 60 does not affect the interlayer insulating film 38, the screening accuracy can be improved by setting such a criterion.

[0051] As a second determination criterion, at the inspection stage S104, the quality of the semiconductor device 100 may be determined based on a comparison between the depth H1 of the defect candidate 60 of the metal electrode 52 and a threshold value A4 based on the thickness T1 of the metal electrode 52. The threshold value A4 is an example of a reference value. That is, at the inspection stage S104, the reference value for comparison with the depth H1 of the defect candidate 60 may be set as the threshold value A4. The depth H1 of the defect candidate 60 of the metal electrode 52 may be the maximum depth of the defect candidate 60 of the metal electrode 52. The thickness T1 of the metal electrode 52 may be the average thickness of the metal electrode 52.

[0052] The threshold value A4 is, as an example, 40% of the thickness T1 of the metal electrode 52. That is, at the inspection stage S104, the quality of the semiconductor device 100 may be determined based on whether the depth H1 of the defect candidate 60 of the metal electrode 52 is 40% or less of the thickness T1 of the metal electrode 52. For example, when the depth H1 of the defect candidate 60 of the metal electrode 52 is 40% or less of the thickness T1 of the metal electrode 52, the semiconductor device 100 may be determined as a non-defective product. When the depth H1 of the defect candidate 60 of the metal electrode 52 is greater than 40% of the thickness T1 of the metal electrode 52, the semiconductor device 100 may be determined as a non-defective product. Depending on the thickness T1 of the metal electrode 52, whether the defect candidate 60 of the metal electrode 52 affects the interlayer insulating film 38 changes. Therefore, it is preferable to determine the quality of the semiconductor device 100 based on a comparison with the threshold value A4 based on the thickness T1 of the metal electrode 52.

[0053] As a third criterion, in inspection step S104, the quality of the semiconductor device 100 may be determined based on whether the distance between the defect candidate 60 of the metal electrode 52 and the interlayer insulating film 38 is equal to or greater than a threshold value A3. The distance between the defect candidate 60 of the metal electrode 52 and the interlayer insulating film 38 may be the shortest distance in the XY plane. In this example, since the defect candidate 60 of the metal electrode 52 is present above the interlayer insulating film 38 (i.e., they overlap in a top view of the XY plane), the distance is 0 μm.

[0054] The threshold value A3 is, for example, 10 μm. That is, in inspection step S104, the quality of the semiconductor device 100 may be determined based on whether the distance between the defect candidate 60 of the metal electrode 52 and the interlayer insulating film 38 is equal to or greater than the threshold value A3. For example, when the distance between the defect candidate 60 of the metal electrode 52 and the interlayer insulating film 38 is 10 μm or more, the semiconductor device 100 may be determined to be a non-defective product regardless of the height information of the defect candidate 60. When the distance between the defect candidate 60 of the metal electrode 52 and the interlayer insulating film 38 is less than 10 μm, the semiconductor device 100 may be determined based on the height information of the defect candidate 60. When the distance between the defect candidate 60 of the metal electrode 52 and the interlayer insulating film 38 is 10 μm or more, since the defect candidate 60 does not affect the interlayer insulating film 38, the screening accuracy can be improved by setting such a criterion.

[0055] For the determination using the height information such as the first determination criterion and the second determination criterion, either only one of the determination criteria may be determined, or all of the determination criteria may be implemented. For the defect candidate 60 that satisfies the third determination criterion, the determination may be made using the height information.

[0056] FIG. 9 is a diagram for explaining an example of the defect candidate detection step S103 when the defect candidate 60 has a convex shape. FIG. 9 is the same as FIG. 7 except that the defect candidate 60 has a convex shape. In the defect candidate detection step S103, as in FIG. 9, when the size D1 on the surface 53 of the metal electrode 52 of the defect candidate 60 is 5 μm or less, the defect candidate 60 may not be regarded as such.

[0057] FIG. 10 is a diagram for explaining an example of the inspection step S104 when the defect candidate 60 has a convex shape. In this example, the case where the defect candidate 60 has a convex shape as shown in FIG. 6 will be described.

[0058] As a fourth determination criterion, in the inspection step S104, the pass / fail of the semiconductor device 100 may be determined based on a comparison between the height H2 of the defect candidate of the metal electrode 52 and a certain threshold value A5. The height H2 of the defect candidate 60 of the metal electrode 52 may be the maximum height of the defect candidate 60 of the metal electrode 52. The threshold value A5 is an example of a reference value. That is, in the inspection step S104, the reference value may be changed to the threshold value A5.

[0059] The threshold value A5 is, as an example, 4 μm. That is, in the inspection step S104, the pass / fail of the semiconductor device 100 may be determined based on whether the height H2 of the defect candidate 60 of the metal electrode 52 is 4 μm or more. For example, when the height H2 of the defect candidate 60 of the metal electrode 52 is 4 μm or more, the semiconductor device 100 may be regarded as a defective product. When the height H2 of the defect candidate 60 of the metal electrode 52 is less than 4 μm, the semiconductor device 100 may be regarded as a non-defective product. When the defect candidate 60 has a convex shape, if the height H2 of the defect candidate 60 of the metal electrode 52 is too high, it will cause defects. Therefore, the height H2 of the defect candidate 60 of the metal electrode 52 may be compared with a certain threshold value A5 regardless of the thickness T1 of the metal electrode 52. By setting it in this way, the screening accuracy can be improved.

[0060] FIG. 11 is a diagram showing an example of the flowchart of inspection step S104. First, it is determined whether the defect candidate 60 of the metal electrode 52 has a concave shape or a convex shape (S201). Next, when the defect candidate 60 of the metal electrode 52 has a concave shape, the quality of the semiconductor device 100 is determined according to the second determination criterion described above (S202). Also, when the defect candidate 60 of the metal electrode 52 has a convex shape, the quality of the semiconductor device 100 is determined according to the fourth determination criterion described above (S203). In this way, by changing the determination criterion according to whether the defect candidate 60 of the metal electrode 52 has a concave shape or a convex shape, the screening accuracy can be improved. Further, in S202, only the semiconductor device 100 determined to be a non-defective product according to the first determination criterion and the third determination criterion may be determined as to whether it is a non-defective product according to the second determination criterion.

[0061] FIGS. 12 and 13 are diagrams for explaining a method of measuring the height information of the defect candidate 60. FIG. 12 is a diagram showing an example of the surface 53 of the metal electrode 52 divided by a grid. FIG. 13 is a diagram showing the distribution of height and the number of grids.

[0062] First, as shown in FIG. 12, the surface 53 of the metal electrode 52 is divided into grids. Next, the height of each grid is measured. In this example, the height of each grid is measured by a vertical scanning type low coherence interferometry method. For example, for each grid, light is irradiated from a low coherence light source such as a white light source. The light traveling toward the metal electrode 52 and the reference light not traveling toward the metal electrode 52 are split by a beam splitter or the like. Then, the interference between the reflected light from the metal electrode 52 and the reference light is measured. The peak height of the interference intensity in each grid is measured, and the height of the surface 53 in each grid is measured. The magnitude of the peak height value of the interference intensity corresponds to the height of the surface 53. The height of each grid may be expressed as a discrete value. In this example, the height of each grid is set to an integer from 1 to 5. Then, as shown in FIG. 13, the height distribution of each grid is created. As indicated by the peak position in FIG. 13 (2 in this example), the height at which the number of grids indicating the height is the largest is set as the reference height. The reference height corresponds to the height of the surface 53 of the metal electrode 52. The difference between the reference height and each height is used as the height information of each grid.

[0063] The above method is a length measurement method by a vertical scanning type low coherence interferometry method, but height information may also be measured by other methods. The height information may be measured by a laser displacement meter.

[0064] FIG. 14 is a diagram for explaining another example of the metal electrode formation step S102. FIG. 14 is different from FIG. 5 in that the interlayer insulating film 38 has a substantially rectangular shape. Other configurations of FIG. 14 may be the same as those of FIG. 5. Even when the interlayer insulating film 38 has a substantially rectangular shape, in the inspection step S104, the quality can be determined based on the height (or depth) information in the direction perpendicular to the surface 53 of the metal electrode 52 of each detected defect candidate 60.

[0065] As described above, the present invention has been explained using embodiments, but the technical scope of the present invention is not limited to the scope described in the above embodiments. It is obvious to those skilled in the art that various changes or improvements can be made to the above embodiments. It is clear from the description of the claims that forms with such changes or improvements can also be included in the technical scope of the present invention.

Explanation of Reference Numerals

[0066] 10... semiconductor substrate, 11... upper surface, 12... source region, 14... base region, 38... interlayer insulating film, 40... trench, 42... gate insulating film, 44... gate electrode, 52... metal electrode, 53... surface, 54... contact hole, 56... plating electrode, 60... defect candidate, 70... device, 80... device, 100... semiconductor device

Claims

1. A method for manufacturing a semiconductor device including a semiconductor substrate, an interlayer insulating film forming step of forming an interlayer insulating film above the semiconductor substrate, a metal electrode forming step of forming a metal electrode above the interlayer insulating film, a defect candidate detection step of acquiring an image of the metal electrode and detecting a defect candidate that is a concave shape or a convex shape of the metal electrode on the surface of the metal electrode based on the image, an inspection step of determining the quality of the semiconductor device based on height information in a direction perpendicular to the surface of the metal electrode of each detected defect candidate A method for manufacturing a semiconductor device including these steps.

2. A method for manufacturing a semiconductor device including a semiconductor substrate, an interlayer insulating film forming step of forming an interlayer insulating film above the semiconductor substrate, a metal electrode forming step of forming a metal electrode above the interlayer insulating film, a defect candidate detection step of acquiring an image of the metal electrode and detecting a defect candidate on the surface of the metal electrode based on the image, an inspection step of determining the quality of the semiconductor device based on height information in a direction perpendicular to the surface of the metal electrode of each detected defect candidate including in the inspection step, determining whether the defect candidate of the metal electrode has a concave shape or a convex shape, and changing a quality determination criterion for the height information based on the shape of the defect candidate A method for manufacturing a semiconductor device.

3. In the inspection step, changing a reference value for comparison with the height information based on the shape of the defect candidate The method for manufacturing a semiconductor device according to claim 1 or 2.

4. In the inspection stage, when the defect candidate of the metal electrode has the concave shape, the quality of the semiconductor device is determined based on whether the concave shape is above the upper end of the interlayer insulating film. A method for manufacturing a semiconductor device according to any one of claims 1 to 3.

5. In the inspection stage, the quality of the semiconductor device is determined based on whether the distance between the defect candidate of the metal electrode and the interlayer insulating film is 10 μm or more. A method for manufacturing a semiconductor device according to claim 4.

6. In the inspection stage, the quality of the semiconductor device is determined based on a comparison between the depth of the defect candidate of the metal electrode and a threshold value based on the thickness of the metal electrode. A method for manufacturing a semiconductor device according to claim 4 or 5.

7. In the inspection stage, the quality of the semiconductor device is determined based on whether the depth of the defect candidate of the metal electrode is 40% or less of the thickness of the metal electrode. A method for manufacturing a semiconductor device according to claim 6.

8. In the inspection stage, when the defect candidate of the metal electrode has the convex shape, the quality of the semiconductor device is determined based on a comparison between the height of the defect candidate of the metal electrode and a certain threshold value. A method for manufacturing a semiconductor device according to any one of claims 1 to 3.

9. In the inspection stage, the quality of the semiconductor device is determined based on whether the height of the defect candidate of the metal electrode is 4 μm or more. A method for manufacturing a semiconductor device according to claim 8.

10. After the inspection stage, the method further includes a plating electrode forming stage of forming a plating electrode above the metal electrode. A method for manufacturing a semiconductor device according to any one of claims 1 to 9.

11. In the defect candidate detection stage, detect the defect candidates of the metal electrodes having a size of 5 μm or more on the surface of the metal electrodes A method for manufacturing a semiconductor device according to any one of claims 1 to 10.

12. An inspection method for a semiconductor device including a semiconductor substrate and a metal electrode provided above the semiconductor substrate, A defect candidate detection stage of acquiring an image of the metal electrode and detecting defect candidates that are concave or convex shapes of the metal electrode on the surface of the metal electrode based on the image; An inspection stage of determining the quality of the semiconductor device based on the height information in the direction perpendicular to the surface of the metal electrode of each detected defect candidate An inspection method for a semiconductor device comprising:

13. An inspection method for a semiconductor device including a semiconductor substrate and a metal electrode provided above the semiconductor substrate, A defect candidate detection stage of acquiring an image of the metal electrode and detecting defect candidates on the surface of the metal electrode based on the image; An inspection stage of determining the quality of the semiconductor device based on the height information in the direction perpendicular to the surface of the metal electrode of each detected defect candidate Comprising, In the inspection stage, Determine whether the defect candidate of the metal electrode has a concave shape or a convex shape, Based on the shape of the defect candidate, change the pass / fail determination criterion for the height information An inspection method for a semiconductor device.

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