Method of manufacturing a semiconductor device

Abstract

To provide a method for manufacturing a semiconductor device capable of preventing corrosion of an etching stopper while securing excellent productivity.SOLUTION: A method for manufacturing a semiconductor device includes the steps of: forming a semiconductor layer on an upper surface of a substrate; forming an etching stopper on the upper surface of the semiconductor layer; forming a metal mask including a seed film and a plating film on a lower surface of the substrate and comprising an opening inside the etching stopper in a plan view; forming a through hole reaching from the lower surface of the substrate to the etching stopper on the substrate and the semiconductor layer through the opening; and removing the plating film by anode reaction in an electrolytic solution after the step of forming the through hole.SELECTED DRAWING: Figure 17

Description

Technical Field

[0001] The present disclosure relates to a method for manufacturing a semiconductor device.

Background Art

[0002] There is known a semiconductor device in which a semiconductor layer is formed on a substrate, an etching stopper made of metal is formed on the semiconductor layer, a through hole reaching the etching stopper is formed in the substrate and the semiconductor layer, and a back surface electrode connected to the etching stopper through the through hole is formed on the lower surface of the substrate. When manufacturing such a semiconductor device, a metal mask is formed on the lower surface of the substrate and the substrate is etched to form a through hole.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0004] In addition to the etching stopper, an electrode is formed on the semiconductor layer. When the etching stopper and the electrode are formed using the same material at the same time, the etching stopper is likely to be corroded when removing the metal mask. Since the etching stopper is connected to semiconductor elements such as transistors formed in the semiconductor layer, if the etching stopper is corroded, the characteristics of the semiconductor elements may be affected.

[0005] It is possible to prevent corrosion of the etching stopper by temporarily stopping the etching near the interface between the substrate and the semiconductor layer to remove the metal film, and then reaching the through hole to the etching stopper. However, if the etching rate of the substrate is not controlled low, it is difficult to stop the etching near the interface between the substrate and the semiconductor layer, and when the etching rate of the substrate is lowered, the time required for etching becomes longer. Further, it is possible to prevent corrosion of the etching stopper by forming the etching stopper using a material different from that of the electrode. However, in this case, a process for forming the etching stopper is required, resulting in a decrease in productivity.

[0006] An object of the present disclosure is to provide a method for manufacturing a semiconductor device capable of preventing corrosion of an etching stopper while ensuring good productivity.

Means for Solving the Problems

[0007] A method for manufacturing a semiconductor device according to the present disclosure includes a step of forming a semiconductor layer on an upper surface of a substrate, a step of forming an etching stopper on an upper surface of the semiconductor layer, a step of forming a metal mask including a seed film and a plating film on a lower surface of the substrate and having an opening inside the etching stopper in a plan view, a step of forming a through hole reaching the etching stopper from the lower surface of the substrate in the substrate and the semiconductor layer through the opening, and a step of removing the plating film by an anodic reaction in an electrolytic solution after the step of forming the through hole.

Effects of the Invention

[0008] According to the present disclosure, corrosion of the etching stopper can be prevented while ensuring good productivity.

Brief Description of the Drawings

[0009]

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Best Mode for Carrying Out the Invention

[0010] [Description of Embodiments of the Present Disclosure] First, embodiments of the present disclosure will be listed and described.

[0011] 〔1〕A method for manufacturing a semiconductor device according to an aspect of the present disclosure includes a step of forming a semiconductor layer on an upper surface of a substrate, a step of forming an etching stopper on the upper surface of the semiconductor layer, a step of forming a metal mask including a seed film and a plating film on a lower surface of the substrate, the metal mask having an opening inside the etching stopper in a plan view, a step of forming a through hole reaching the etching stopper from the lower surface of the substrate through the opening in the substrate and the semiconductor layer, and a step of removing the plating film by an anodic reaction in an electrolytic solution after the step of forming the through hole.

[0012] Since the plating film is removed by an anodic reaction in an electrolytic solution, corrosion of the etching stopper during removal of the plating film can be prevented.

[0013] 〔2〕In 〔1〕, a step of forming a gate electrode simultaneously with the etching stopper may be included. By forming the etching stopper and the gate electrode simultaneously, higher productivity can be obtained compared to the case of forming them separately.

[0014] 〔3〕In 〔2〕, the step of forming the etching stopper and the gate electrode may include a step of forming a first metal film that forms a Schottky contact with the semiconductor layer. In this case, it is easy to obtain good gate controllability.

[0015] 〔4〕In 〔3〕, the first metal film may be a Ni film. Ni is a material having a large work function and is likely to form a Schottky barrier.

[0016] 〔5〕In 〔3〕 or 〔4〕, a step of forming a Pd film on the upper surface of the first metal film and a step of forming an Au film on the upper surface of the Pd film may be included. In this case, it is easy to form a low-resistance wiring.

[0017] 〔6〕In [1] to [5], the substrate may be a SiC substrate, and the semiconductor layer may be a nitride semiconductor layer. In this case, it is easy to form a high electron mobility transistor capable of high breakdown voltage and high-speed operation.

[0018] 〔7〕In [1] to [6], after the step of removing the plating film, a step of removing the seed film may be included. The seed film can be removed, for example, by dry etching, and corrosion of the etching stopper can be prevented even when the seed film is removed.

[0019] 〔8〕In [7], after the step of removing the seed film, a step of forming a conductive film on the lower surface of the etching stopper, the inner wall surface of the through hole, and the lower surface of the substrate may be included. In this case, the conductive film can be used as a back surface electrode, and heat can be dissipated through the conductive film.

[0020] 〔9〕A method for manufacturing a semiconductor device according to another aspect of the present disclosure includes a step of forming a nitride semiconductor layer on the upper surface of a SiC substrate, a step of simultaneously forming a gate electrode including a Ni film that forms a Schottky contact with the nitride semiconductor layer and an etching stopper on the upper surface of the nitride semiconductor layer, a step of forming a metal mask including a seed film and a plating film on the lower surface of the SiC substrate and having an opening inside the etching stopper in plan view, a step of forming a through hole that reaches the etching stopper from the lower surface of the SiC substrate through the opening in the SiC substrate and the nitride semiconductor layer, a step of removing the plating film by an anodic reaction in an electrolytic solution after the step of forming the through hole, a step of removing the seed film after the step of removing the plating film, and a step of forming a conductive film on the lower surface of the etching stopper, the inner wall surface of the through hole, and the lower surface of the SiC substrate after the step of removing the seed film.

[0021] Since the plating film is removed by an anodic reaction in the electrolytic solution, corrosion of the etching stopper during the removal of the plating film can be prevented. In addition, it is easy to form a high electron mobility transistor capable of high withstand voltage and high-speed operation.

[0022] [Details of Embodiments of the Present Disclosure] Hereinafter, embodiments of the present disclosure will be described in detail, but the present disclosure is not limited thereto. In the present specification and drawings, components having substantially the same functional configuration may be denoted by the same reference numerals, and redundant descriptions may be omitted.

[0023] Embodiments of the present disclosure relate to a method for manufacturing a semiconductor device including a GaN-based high electron mobility transistor (HEMT). FIGS. 1 to 16 are cross-sectional views showing a method for manufacturing a semiconductor device 100 according to the embodiment.

[0024] In the present embodiment, first, as shown in FIG. 1, a nitride semiconductor layer 10 containing Ga is formed on the upper surface of a substrate 1 by, for example, a metal organic chemical vapor deposition (MOCVD) method. The nitride semiconductor layer 10 includes, for example, a channel layer and a barrier layer. The substrate 1 is, for example, a substrate for growing a GaN-based semiconductor, and in one example, a semi-insulating SiC substrate. For example, the channel layer is a GaN layer, and the barrier layer is an AlGaN layer. The nitride semiconductor layer 10 is an example of a semiconductor layer. For example, the thickness of the substrate 1 is set to about 100 μm, and the thickness of the nitride semiconductor layer 10 is set to about 0.4 μm.

[0025] Next, as shown in FIG. 2, a first insulating film 21 including a source opening 21S, a drain opening 21D, and a gate opening 21G is formed on the upper surface of the nitride semiconductor layer 10. The first insulating film 21 is, for example, a silicon nitride (SiN) film.

[0026] Next, as shown in FIG. 3, a source electrode 31 is formed inside the opening 21S, and a drain electrode 32 is formed inside the opening 21D. In forming the source electrode 31 and the drain electrode 32, first, a plurality of metal layers constituting the source electrode 31 and the drain electrode 32 are deposited. For example, after depositing a Ta layer, an Al layer is deposited to form a laminated structure. Then, this laminated structure is heat-treated to perform alloying. The source electrode 31 is formed so as to include an opening 31S where the nitride semiconductor layer 10 is exposed.

[0027] Next, as shown in FIG. 4, a second insulating film 22 having a source opening 22S and a gate opening 22G is formed on the upper surfaces of the first insulating film 21 and the nitride semiconductor layer 10 so as to cover the source electrode and the drain electrode 32. The second insulating film 22 is, for example, a SiN film.

[0028] Next, as shown in FIG. 5, a gate electrode 33 that makes a Schottky contact with the nitride semiconductor layer 10 is formed through the opening 22G and the opening 21G, and an etching stopper 30 is formed on the upper surface of the nitride semiconductor layer 10 inside the opening 31S. As shown in FIG. 6, for the formation of the gate electrode 33 and the etching stopper 30, an Ni film 71 is formed on the upper surface of the nitride semiconductor layer 10, a Pd film 72 is formed on the upper surface of the Ni film 71, and an Au film 73 is formed on the upper surface of the Pd film 72. That is, the etching stopper 30 and the gate electrode 33 are formed simultaneously using the same material. The Ni film 71 is preferable for forming a good Schottky barrier in the gate electrode 33 of the GaN-based HEMT. The Au film 73 is preferable for reducing the electrical resistance. The Pd film 72 is preferable for suppressing the interdiffusion between the Ni film 71 and the Au film 73. For example, the thickness of the Ni film 71 is set to about 60 nm, the thickness of the Pd film 72 is set to about 40 nm, and the thickness of the Au film 73 is set to about 350 nm.

[0029] Next, as shown in FIG. 7, a second insulating film 22, an etching stopper 30, and a third insulating film 41 covering the nitride semiconductor layer 10 are formed. An opening 41A reaching the etching stopper 30 is formed in the third insulating film 41, and a wiring 42 in contact with the etching stopper 30 is formed in the opening 41A. The wiring 42 is electrically connected to, for example, the source electrode 31. Simultaneously with the formation of the wiring 42, a wiring (not shown) electrically connected to the drain electrode 32 and a wiring (not shown) electrically connected to the gate electrode 33 may be formed.

[0030] Next, as shown in FIG. 8, a seed film 51 is formed on the lower surface of the substrate 1. The seed film 51 is later removed by dry etching. For this reason, the material of the seed film 51 is preferably a material having a low boiling point of a substance generated by reacting with an etching gas. Examples of the material of the seed film 51 include Ti, Nb, Ta, and W.

[0031] Next, as shown in FIG. 9, a mask 61 covering a region where a through hole is to be formed is formed on the lower surface of the seed film 51. The mask 61 is, for example, a photoresist mask.

[0032] Next, as shown in FIG. 10, a plating film 52 is formed on the portion of the lower surface of the seed film 51 exposed from the mask 61. Examples of the material of the plating film 52 include Ni, Ni alloy, Zn, Zn alloy, Cu, Cu alloy, Pt, and Pt alloy.

[0033] Next, as shown in FIG. 11, the mask 61 is removed. Further, the portion of the seed film 51 exposed from the plating film 52 is removed. As a result, a metal mask 50 including the seed film 51 and the plating film 52 and having an opening 50A in a region where a through hole is to be formed is formed on the lower surface of the substrate 1.

[0034] Next, as shown in FIG. 12, by performing dry etching on the substrate 1 and the nitride semiconductor layer 10 using the metal mask 50, through holes 62 reaching the etching stopper 30 are formed in the substrate 1 and the nitride semiconductor layer 10. In this dry etching, for example, a mixed gas of SF6 and O2 is used, the flow rate of SF6 is 65 sccm, the flow rate of O2 is 130 sccm, the pressure in the processing chamber is 0.5 Pa, and the bias power is 400 W. This dry etching is stopped, for example, by time control. For example, as shown in FIG. 13, the through hole 62 may reach midway in the thickness direction of the Au film 73. The through hole 62 may reach midway in the thickness direction of the Ni film 71 or the Pd film 72.

[0035] Next, as shown in FIG. 14, the plating film 52 is removed. The plating film 52 is removed by an anodic reaction in an electrolytic solution. Here, a method for removing the plating film 52 will be described. FIG. 17 is a diagram showing an example of an electrochemical reaction apparatus that causes an anodic reaction.

[0036] In an example of the electrochemical reaction apparatus 200 shown in FIG. 17, an electrolytic solution 92 is placed in the processing layer 91, and an anode 94 and a cathode 95 are inserted into the electrolytic solution 92. The anode 94 is made of metal. The anode 94 is connected to the positive electrode of the DC power supply 93, and the cathode 95 is connected to the negative electrode of the DC power supply 93. In this example, metal cations 96 dissolve out from the metal anode 94, and the cations 96 in the electrolytic solution 92 are deposited on the surface of the cathode 95 as metal. Therefore, by using the plating film 52 as the anode 94, the plating film 52 can be dissolved and removed. Such an anodic reaction is sometimes called reverse plating. The components of the electrolytic solution 92 are determined according to the material of the plating film 52.

[0037] Next, as shown in FIG. 15, the seed film 51 is removed. The seed film 51 can be removed, for example, by dry etching using CF4. When removing the plating film 52 by an anodic reaction in an electrolytic solution, the seed film 51 may also be removed together.

[0038] Next, as shown in FIG. 16, a conductive film 63 is formed on the lower surface of the etching stopper 30, the inner wall surface of the through hole 62, and the lower surface of the substrate 1. The conductive film 63 is used, for example, as the back surface electrode of the semiconductor device 100. The conductive film 63 is provided with a wiring layer (not shown) and is electrically connected to the source electrode 31 via the metal etching stopper 30. By grounding the conductive film 63, a ground potential is applied to the source electrode 31. The conductive film 63 includes, for example, an Au film. In forming the conductive film 63, formation of a seed film and formation of a plating film may be performed.

[0039] In this way, the semiconductor device 100 can be manufactured.

[0040] In this manufacturing method, since the plating film 52 is removed by an anodic reaction in the electrolytic solution, corrosion of the etching stopper 30 during removal of the plating film 52 can be prevented.

[0041] Note that when the plating film 52 is removed using an acidic solution after the through hole 62 is formed, the Ni film 71 exposed in the through hole 62 is corroded.

[0042] It is also conceivable to temporarily stop etching near the interface between the substrate 1 and the nitride semiconductor layer 10, remove the plating film 52, and then cause the through hole 62 to reach the etching stopper 30. In this case, if the etching rate of the substrate 1 is not controlled low, it is difficult to stop the etching near the interface between the substrate 1 and the nitride semiconductor layer 10. And when the etching rate of the substrate 1 is lowered, the time required for etching becomes longer.

[0043] Also, it is conceivable to prevent corrosion of the etching stopper 30 by forming the etching stopper 30 using a material different from that of the gate electrode 33. In this case, in addition to the step of forming the gate electrode 33, a step for forming the etching stopper 30 is required, resulting in a decrease in productivity.

[0044] Since the substrate 1 is a SiC substrate and the nitride semiconductor layer 10 is formed, it is easy to configure a HEMT capable of high breakdown voltage and high-speed operation. In the present embodiment, even when the substrate 1 is a SiC substrate, etching for forming the through hole 62 can be easily stopped by the etching stopper 30 by time control, so that the through hole 62 can be formed at high speed.

[0045] Also, since the seed film 51 can be removed by, for example, dry etching, corrosion of the etching stopper 30 can be prevented even when the seed film 51 is removed. Further, the conductive film 63 can be used as a back surface electrode. Also, heat generated in the HEMT can be easily transmitted to the lower surface side of the substrate 1 through the conductive film 63. By joining the conductive film 63 to a heat spreader or the like, the heat dissipation performance can be improved.

[0046] Although the embodiments have been described in detail above, the present invention is not limited to the specific embodiments, and various modifications and changes are possible within the scope described in the claims.

Explanation of Reference Numerals

[0047] 1: Substrate 10: Nitride semiconductor layer 21: First insulating film 21D, 21G, 21S: Openings 22: Second insulating film 22G, 22S: Openings 30: Etching stopper 31: Source electrode 31S: Opening 32: Drain electrode 33: Gate electrode 41: Third insulating film 41A: Opening 42: Wiring 50: Metal mask 50A: Opening 51: Seed film 52: Plated film 61: Mask 62: Through hole 63: Conductive film 71: Ni film 72: Pd film 73: Au film 91: Treatment layer 92: Electrolyte solution 93: DC power supply 94: Anode 95: Cathode 96: Cation 100: Semiconductor device 200: Electrochemical reaction device

Claims

1. A step of forming a semiconductor layer on the upper surface of a substrate; A step of forming an etching stopper on the upper surface of the semiconductor layer; A step of forming a metal mask on the lower surface of the substrate, the metal mask including a seed film and a plating film and having an opening inside the etching stopper in a plan view; A step of forming a through hole that reaches the etching stopper from the lower surface of the substrate through the opening in the substrate and the semiconductor layer; A step of removing the plating film by an anodic reaction in an electrolytic solution after the step of forming the through hole; A method for manufacturing a semiconductor device having the above steps.

2. The method for manufacturing a semiconductor device according to claim 1, further comprising a step of forming a gate electrode simultaneously with the etching stopper.

3. The method for manufacturing a semiconductor device according to claim 2, wherein the step of forming the etching stopper and the gate electrode includes a step of forming a first metal film that makes a Schottky contact with the semiconductor layer.

4. The method for manufacturing a semiconductor device according to claim 3, wherein the first metal film is a Ni film.

5. A step of forming a Pd film on the upper surface of the first metal film; A step of forming an Au film on the upper surface of the Pd film; The method for manufacturing a semiconductor device according to claim 3 or claim 4, having the above steps.

6. The substrate is a SiC substrate, The semiconductor layer is a nitride semiconductor layer. The method for manufacturing a semiconductor device according to any one of claims 1 to 5.

7. The method for manufacturing a semiconductor device according to any one of claims 1 to 6, further comprising a step of removing the seed film after the step of removing the plating film.

8. The method for manufacturing a semiconductor device according to claim 7, further comprising a step of forming a conductive film on the lower surface of the etching stopper, the inner wall surface of the through hole, and the lower surface of the substrate after the step of removing the seed film.

9. A step of forming a nitride semiconductor layer on the upper surface of a SiC substrate; A step of simultaneously forming a gate electrode and an etching stopper including a Ni film that makes a Schottky contact with the nitride semiconductor layer on the upper surface of the nitride semiconductor layer; A step of forming a metal mask on the lower surface of the SiC substrate, the metal mask including a seed film and a plating film and having an opening inside the etching stopper in a plan view; A step of forming a through hole that reaches the etching stopper from the lower surface of the SiC substrate through the opening in the SiC substrate and the nitride semiconductor layer; After the step of forming the through hole, a step of removing the plating film by an anodic reaction in an electrolytic solution; After the step of removing the plating film, a step of removing the seed film; After the step of removing the seed film, a step of forming a conductive film on the lower surface of the etching stopper, the inner wall surface of the through hole, and the lower surface of the SiC substrate; A method for manufacturing a semiconductor device having the above steps.

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