Method for operating a high-speed startup oscillator system and high-speed startup oscillator system

Abstract

To provide a method for operating an oscillator system having a quartz oscillator and a reference oscillator, with fast start-up and phase-locked operation.SOLUTION: A method includes the steps of: parameterizing a calculation unit 25 for starting a quartz oscillator 12 during a start-up phase of the quartz oscillator 12; generating excitation bursts to oscillate the quartz oscillator 12 and to be supplied to the quartz oscillator 12 and a phase realignment period, in successive different periods in the within the start-up phase of the quartz oscillator 12; determining a phase deviation in different successive periods between the oscillation of a reference oscillator 45 and the oscillation of the quartz oscillator 12; calculating a frequency error in the calculation unit 25 based on the phase deviation or a derivative of phase variation slope; and correcting the frequency of the reference oscillator 45 to the frequency of the quartz oscillator 12 within a limited acceptable margin of error.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a method for operating an oscillator system having a crystal oscillator and a reference oscillator, involving fast start-up and phase synchronization operation.

[0002] The present invention also relates to an oscillator system intended to be operated by this driving method.

Background Art

[0003] In a fast-start crystal oscillator system, as described in European Patent Application No. 3965290 (A1) or European Patent Application No. 3965291 (A1), the frequency of a CMOS-type reference oscillator is calibrated during the test stage after the circuit is assembled. This frequency has a certain error compared to the frequency of the crystal oscillator, and this error tends to change naturally over time depending on different PVT states of the integrated circuit and further according to the aging criteria of the crystal used.

[0004] U.S. Patent No. 10,951,166 (B1) describes an oscillator circuit that generates a vibrating voltage signal when switched on. The crystal of the oscillator has a first electrode and a second electrode. The oscillator circuit has a power supply with a power supply terminal and a reference terminal. The oscillator circuit includes a switching circuit arranged between the power supply and the crystal. The switching circuit alternately connects the power supply terminal of the power supply voltage source to the first and second electrodes of the crystal so that the amplitude of the vibrating voltage signal increases during the start-up stage. This document provides fast start-up of the oscillator circuit, but nevertheless, there are various switchings in the oscillator stage, which generally makes it impossible to accurately perform fast start-up with good oscillation frequency accuracy, which is a disadvantage.

[0005] Figure 1 shows an embodiment of a crystal oscillator system 10 as described in European Patent Application No. 3965291 (A1). The oscillator 11 includes a crystal resonator 12 connected to an electronic oscillator circuit 14. The crystal resonator 12 is electrically coupled to the electronic oscillator circuit 14. Typically, the crystal resonator 12 is connected in parallel to the electronic oscillator circuit 14. The oscillator structure 11 includes a first terminal 13 and a second terminal 15 respectively connected to the first and second terminals of the crystal resonator 12 and the electronic oscillator circuit 14. An output terminal 50 of the electronic oscillator circuit 14 that supplies a master clock signal is provided for use in an electronic device, which may be a watch worn by a user.

[0006] The crystal oscillator system 10 further includes a start controller 16 configured and operable to perform a high-speed oscillation start procedure using the crystal oscillator 10. The start controller 16 generally includes not only a processor 25 but also a memory 26 and additional memory or storage memory 27. The crystal oscillator 10 further includes a comparator 30 having a first input terminal 31 connected to the first terminal 13. The comparator further includes a second input terminal 32 connected to the second terminal 15 of the oscillator structure 11. A master clock signal may also be present, or the master clock signal may be fed back to the start oscillator 16.

[0007] The crystal oscillator system 10 further includes a synchronization device 35. The synchronization device 35 includes an input terminal, also called a synchronization input 37 or a comparator output. The input 37 of the synchronization device is directly connected to the output terminal 33 of the comparator 30. In this way, a comparison signal indicating the comparison result of the first oscillation signal and the second oscillation signal present at the first terminal 13 and the second terminal 15 can be supplied to the synchronization device 35.

[0008] The crystal oscillator system 10 further includes an oscillator 45 generally implemented as an RC oscillator. The operation of the oscillator 45 can be controlled by the start controller 16. In this case, many frequencies for driving the oscillator 45 can be stored in the memory unit 26. The oscillator 45 is further connected or coupled to a phase-locked loop (PLL) 55. The phase-locked loop 55 includes an output terminal 56 connected to the clock input 38 of the synchronization device 35. The output terminal 56 of the phase-locked loop 55 and the output terminal 36 of the synchronization device 35 are individually connected or coupled to the corresponding input terminals 72, 71 of the phase shift unit 70. The phase shift unit is coupled to the digital memory 27.

[0009] The digital memory 27 may be supplied with a look-up table 28. As shown in FIG. 1, the phase shift unit 70 is coupled to the digital storage device 27 and is thus configured to read or retrieve the digital data stored in the digital storage device 27. Generally, the digital data provided by the digital storage device indicates or characterizes the switching delay of the comparator 30. In this way, the result or influence that the switching delay of the comparator 30, and thus the variation of the comparison signal generated by the comparator 30, has on the comparator 30 can be effectively compensated by the phase shift unit 70. The phase shift unit 70 includes an output terminal 73 connected to the start controller 16.

[0010] The signal supplied to the output terminal 73 and fed back to the start controller 16 can be used as a timing signal that triggers the start controller 16 and / or its processor 25 to generate an oscillation signal.

[0011] In FIG. 1, the startup controller 16 includes a phase output 17 connected to a first logic gate 51 and a second logic gate 52. The input of the second logic gate 52 is inverted by an inverter 60 with respect to the input of the first logic gate 51. The two logic gates 51, 52 are further connected to a startup control output 18. The outputs of the first logic gate 51 and the second logic gate 52, which are AND gates for example, are connected or coupled to a first buffer amplifier 41 and a second buffer amplifier 42. The corresponding outputs of the first buffer amplifier 41 and the second buffer amplifier 42 are respectively connected to a first capacitor 21 and a second capacitor 22. The capacitors 21, 22 are driven in a phase shift mode by the startup controller 16.

Prior Art Documents

Patent Documents

[0012]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0013] The present invention relates to a method for operating a high-speed startup oscillator system with phase synchronization of a reference oscillator by overcoming the disadvantages mentioned in the prior art.

[0014] The present invention also relates to an electronic system that operates by a method for driving a high-speed startup oscillator system to be phase synchronized in order to correct the frequency error of the reference oscillator of the oscillator system and thereby overcome the aforementioned disadvantages of the prior art.

Means for Solving the Problems

[0015] For this purpose, a method for operating a fast start oscillator system is first proposed, the method comprising the features defined in independent claim 1.

[0016] Various preferred steps of the method for operating an electronic system are defined in dependent claims 2 to 7.

[0017] For this purpose, an oscillator system operating by a driving method further comprising the features defined in independent claim 8 is provided.

[0018] Specific embodiments of the system are defined in dependent claims 9 to 12.

[0019] The advantages of the system or method for operating an oscillator system are, on the one hand, that the frequency of the reference oscillator always exists during the start-up phase of the crystal oscillator, i.e., the reference oscillator can be maintained in the switched-on state always, or at least before the crystal oscillator starts. On the other hand, the phase of this reference oscillator is continuously realigned with the free oscillation phase of the crystal oscillator. Under these conditions, it is possible to deduce the frequency difference using only the phase fluctuations obtained in each phase realignment. Thus, this frequency difference can be used to correct the frequency of the reference oscillator. Specifically, a frequency tolerance of ±1% with respect to the frequency of the switched-on crystal oscillator can be corrected.

[0020] When the reference oscillator is frequency-corrected by determining the phase deviation at each phase realignment stage within the start-up time of the crystal oscillator, the crystal oscillator is no longer maintained by the reference oscillator, which is preferably an RC oscillator. However, the next start-up of the crystal oscillator is improved.

[0021] Advantageously, it is easier to determine the phase deviation between the reference oscillator and the crystal oscillator and then easily determine the frequency deviation for correcting the oscillation frequency of the reference oscillator at each phase realignment. Mainly, the phase fluctuations obtained at each phase realignment stage are used to deduce the frequency difference for correcting the frequency of the reference oscillator.

[0022] Heretofore, it has not been considered to directly and easily correct the frequency deviation or frequency error between a reference oscillator and a crystal oscillator by directly using the phase deviation. Thus, the present invention presents an oscillator system, where the reference oscillator can operate continuously to determine any phase deviation between the reference oscillator and the crystal oscillator, and to quickly determine the frequency error using differentiation in order to correct the frequency of the reference oscillator.

[0023] The objectives, advantages, and features of a high-speed startup oscillator system with phase synchronization or frequency synchronization will become more apparent in the following non-limiting description with reference to the accompanying drawings.

Brief Description of the Drawings

[0024]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Embodiments for Carrying Out the Invention

[0025] The following description relates to all components of a high-startup oscillator system with phase-locked control that enables correction of the frequency error of a reference oscillator based on a crystal oscillator switched on via a reference oscillator and a startup controller. The main object of the present invention is to measure the phase deviation during successive drive periods or excitation periods when starting up the crystal oscillator so as to correct the frequency error between the frequency of the crystal oscillator and the frequency of the reference oscillator. Therefore, when the frequency error is above or below a specific threshold value, a phase control and adaptation method for determining this frequency error is provided to enable correction of the reference oscillator frequency. For this purpose, the frequency error is determined by differentiating the phase deviation of these successive periods using the phase variation during successive periods within the startup time of the crystal oscillator. Mainly, the frequency error is obtained by differentiating the slope of the phase variation after each phase realignment or after several phase realignments during at least a part of the startup time of the crystal oscillator. As already described, the reference oscillator may remain continuously switched on if there is sufficient power supply to the oscillator system to keep itself in a switched-on state.

[0026] In prior art documents, even when the reference oscillator remains continuously switched on as shown in the oscillator system of FIG. 1, it is not at all conceivable to use phase fluctuations to determine the frequency of the reference oscillator and then directly correct the frequency of the reference oscillator in order to keep it within a limited error range with respect to the frequency of the crystal oscillator, specifically. Naturally, after this start-up time, all phase values or phase fluctuations can be stored mainly in a (FIFO) memory integrated in the start-up controller and, during the next start-up of the crystal oscillator, be led to the frequency of the reference oscillator signal within an acceptable error range. Mainly, all phase values or phase fluctuations can be stored in a non-volatile type of memory, and the frequency error can be obtained based on the phase fluctuations during consecutive periods within the start-up time of the crystal oscillator or the phase fluctuations after the start-up of the crystal oscillator has ended. The frequency of such a high-frequency type of crystal oscillator is generally on the order of 26 MHz or higher.

[0027] Note that once the switch of the crystal oscillator is fully on and the reference oscillator frequency is corrected, for example, to +1% or -1% of the crystal oscillator frequency, no further parameter changes are necessary to guarantee the accuracy of the reference oscillator with respect to the crystal oscillator, except when the parameters drift over time.

[0028] First, a method for operating or driving an electronic system by frequency adaptation mainly in the start-up phase will be described, based on the phase fluctuations during each consecutive signal adaptation period to correct the frequency of the reference oscillator in order to adapt and switch on the oscillator system.

[0029] More specifically, a method for operating the oscillator system will be described with reference to FIGS. 2 and 3. Mainly, the phase deviation is determined during the high-speed start-up operation of the crystal oscillator, even within the high-speed start-up time of the crystal oscillator or even after the start-up of the crystal oscillator has ended, each time a phase realignment is performed during consecutive periods of the crystal oscillator excitation signal generated by the start-up controller 16. The start-up time may be defined as a start-up parameter. This start-up time may be on the order of milliseconds (ms), or longer or shorter.

[0030] Refer to FIG. 2 to describe the driving method for the oscillator system 10. Various elements of the oscillator system 10 are arranged in parts that symbolize different steps of phase control so as to correct the frequency error. In the first part of the oscillator system 10, the crystal oscillator is schematically shown by its resonator 12 and the RC reference oscillator 45. The block including the crystal oscillator and the reference oscillator 45 is part of a start controller that provides start parameters to a computing unit 25, which is preferably a processor or a microprocessor. These start parameters are related to, for example, oscillating the crystal oscillator within a start time range, exciting the crystal oscillator, and controlling the phase deviation with respect to the reference oscillator. More specifically, these parameters are the number of drive bursts or excitation bursts provided to the crystal oscillator, followed by a phase alignment time later, and are also intended to define the start time of the crystal oscillator.

[0031] The selected number of crystal oscillator drive bursts and the phase alignment time must be provided in each successive period. The number of drive bursts or excitation bursts of the crystal oscillator can be 5 or 10 or 15 or 20 bursts in each successive start period. This means that the higher the number of bursts in each successive period, the higher the frequency of these supplied bursts. In addition, it is also noted that when the number of excitation bursts in each successive period is larger, the amplitude of the crystal oscillator increases more rapidly than when the number of excitation bursts of the crystal oscillator is smaller.

[0032] These startup bursts may be on the order of 750 mV peak-to-peak. Several consecutive periods are required within the startup time of the complete oscillator system 10, and this period may be set, for example, to 1 ms or even 1.5 ms. Options for phase values for each consecutive adaptation period are also provided from the block with the startup controller. Primarily, the consecutive phase corrections, which can be used for another crystal oscillator startup operation, are stored in a memory 26, such as a FIFO memory in detail. Thus, the calculation unit 25 receives these phase deviations for consecutive periods to determine the calculated frequency error during startup of the complete oscillator system 10 based on the received startup parameters. Primarily determine the slope of the phase variation for each consecutive period or several consecutive periods, and this slope is derived on the premise of the frequency error to be corrected between the frequency of the crystal oscillator and the frequency of the reference oscillator.

[0033] In this case, FIG. 2 shows the change in the phase value that increases from 10 to N with a pitch of 10 added to each preceding value in the shown memory 26. However, naturally, it is quite reasonable that the value selected subsequently from the preceding phase adaptation decreases by a pitch of less than 10 to approach the appropriate phase value. And finally, the calculation unit 25 determines the frequency error to be corrected based on the phase variation. The calculation unit 25 supplies the frequency error in the storage register 27 to adapt the oscillation frequency of the reference oscillator to the oscillation frequency of the crystal oscillator.

[0034] FIG. 3 shows generating a sequence of several excitation signals 110, 112, 114 within the start-up time of the crystal oscillator and the range of the phase realignment time between each group of the excitation signals. Within the time interval of each phase realignment, individual oscillation signals 111, 113 of the crystal oscillator that are detectable between consecutive excitation signals 110, 112, 114 can be observed. It can be understood that the oscillation of the crystal oscillator from one sequence to the next sequence has an increasing amplitude, which is desirable. The phase realigns until the specified crystal oscillator start-up time ends. In addition, the oscillation frequency of the reference oscillator can be corrected based on determining the phase deviation and the derivative of the slope of the phase fluctuation during the start-up of the crystal oscillator and within the range of the specified start-up time.

[0035] FIG. 4 shows a first embodiment of a fast start oscillator system 10 with a phase-locked loop for correcting the frequency error of a reference oscillator 45 based on a crystal oscillator 11. The oscillator system 10 includes a crystal oscillator stage 11 equivalent to the crystal oscillator stage described with reference to FIG. 1 of the prior art. The frequency error correction is performed during the start-up time of the crystal oscillator.

[0036] Accordingly, the oscillator 11 includes a crystal resonator 12 connected to an electronic oscillator circuit 14. The crystal resonator 12 is electrically connected in parallel with the electronic oscillator circuit 14. The oscillator structure 11 includes a first terminal X1 and a second terminal X2 respectively connected to the first terminal and the second terminal of the crystal resonator 12 and the electronic oscillator circuit 14. The output terminal mck of the electronic oscillator circuit 14 is arranged to provide a master clock signal mck for use by an electronic device which may be a watch worn by a user. In this case, the master clock signal mck is configured to perform a fast start procedure of the crystal oscillator 11 via the reference oscillator 45 and is provided to a start controller 16 at which the switch is turned on. As already mentioned, the reference oscillator 45 is preferably an RC oscillator that can generally operate continuously with low power consumption. The reference oscillator 45 must at least be switched on before performing the start-up procedure for the crystal oscillator 11.

[0037] The start controller 16 includes a calculation unit 25, which may also be a memory unit 26 for storing data related to the reference oscillator 45 and for starting the crystal oscillator 11, not only a processor 25 or a microcontroller. The memory unit 26 may be composed of a RAM type memory such as a FIFO memory, for example. The oscillator system 10 includes a comparator 30 having a first input terminal X1 connected to the first terminal of the crystal oscillator 11 and a second input terminal X2 connected to the second terminal of the crystal oscillator 11. A master clock signal mck may also exist, but is mainly dedicated to the start oscillator 16.

[0038] The start controller 16 includes a phase output 17 connected to a first logic gate 51 and a second logic gate 52, which may be AND gates. The input of the second logic gate 52 is inverted by an inverter 60 with respect to the input of the first logic gate 51. The two logic gates 51, 52 are further connected to a start control output 18. The outputs of the first logic gate 51 and the second logic gate 52 are connected or coupled to a first buffer amplifier 41 and a second buffer amplifier 42. The outputs of the first buffer amplifier 41 and the second buffer amplifier 42 are respectively connected to a first capacitor 21 and a second capacitor 22. The capacitors 21, 22 are driven in a phase shift mode by the start controller 16.

[0039] The oscillator system 10 further includes a synchronizer 35. The synchronizer 35 includes an input terminal also called a synchronization input 33 or a comparator output 30. In this way, a comparison signal indicating the comparison result of the first oscillation signal and the second oscillation signal existing at the first terminal X1 and the second terminal X2 can be supplied to the synchronizer 35.

[0040] A reference oscillator 45, such as an RC oscillator, can be controlled by a start controller 16. In this case, many frequencies or mainly phase deviations leading to the calculation of a frequency error for driving the oscillator 45 can be stored in the memory unit 26. The reference oscillator 45 usually receives a frequency signal f0 from the start controller 16. The reference oscillator 45 also provides a time reference signal rck for the start controller 16 and is connected to the clock input 38 of the synchronization device 35. The output terminal 36 of the synchronization device 35 is directly connected to the start controller 16, and the phase deviation of the crystal oscillator from the reference oscillator signal is determined first.

[0041] As mentioned above, it is preferable to determine the phase fluctuation rather than immediately determine the frequency error to be adapted. If the phase fluctuation is determined after the start of the crystal oscillator 11 and the reference oscillator 45 during continuous operation, the phase fluctuation between the oscillating signal of the crystal oscillator 11 and the oscillating signal of the reference oscillator 45 is controlled by the start controller 16 based on the output signal 36 of the synchronization device. In the case of a phase deviation, the corresponding frequency deviation is immediately determined by performing only the differentiation of the phase deviation in the start controller 16. This frequency deviation related to the phase deviation is stored in the memory unit 26. When the crystal oscillator 11 is maintained in an oscillation state without phase fluctuation, the stored phase deviation can be used to quickly control the reference oscillator 45 to a known oscillation frequency. Phase realignment measurements are also performed several times over time to maintain the frequency accuracy of the reference oscillator 45 corresponding to the frequency of the crystal oscillator within an error range of +1% or -1% of the frequency of the crystal oscillator 11.

[0042] FIG. 5 and FIG. 6 show a second embodiment and a third embodiment of the oscillator system 10. All the components in FIG. 5 and FIG. 6 will not be repeated since the only difference from the first embodiment shown in FIG. 4 is the clock input 38 of the synchronization device 35.

[0043] In FIG. 5, the time reference signal rck obtained from the reference oscillator 45 is supplied on the one hand to the start controller 16 and on the other hand to a phase-locked loop (PLL) 55 whose output terminal is connected to the clock input 38 of the synchronization device 35.

[0044] In FIG. 6, the time reference signal rck obtained from the reference oscillator 45 is supplied to the start controller 16 on the one hand and to the delay lock loop (DLL) 55' whose output terminal is connected to the clock input 38 of the synchronizer 35 on the other hand.

[0045] FIG. 7 shows a fourth implementation form of the oscillator system 10 which differs only in the reference oscillator 45, the synchronizer 35, and the start controller 16. For all other components, they have already been described in the first embodiment of FIG. 4 above, and thus will not be repeated in this fourth embodiment. In each of these modified embodiments, in order to control the reference oscillator so as to have an accurately corrected frequency substantially equal to the frequency of the crystal oscillator, the same determination is made in detail regarding the phase deviation.

[0046] FIG. 7 also shows two mixers 60, 61 which receive the time reference signal rck from the reference oscillator 45 and receive signals from the synchronizer 35 respectively corresponding thereto. The output of each of these mixers 60, 61 is supplied to an adder 62 whose output is connected to the clock input 38 of the synchronizer 35.

[0047] Naturally, without departing from the scope of the present invention defined by the claims, those skilled in the art may consider other possibilities for operating the oscillator system to create a high-speed start oscillator system.

Explanation of Reference Numerals

[0048] 10 Crystal oscillator system, crystal oscillator, oscillator system, high-speed start oscillator system 11 Oscillator, oscillator structure, crystal oscillator, crystal oscillator stage 12 Crystal resonator 13 First terminal of oscillator structure 14 Electronic oscillator circuit 15 Second terminal of oscillator structure 16 Start controller 17 Phase output 18 Start control output 21 First capacitor 22 Second capacitor 25 Processor, computing unit 26 Memory, storage unit, memory unit 27 Additional memory or storage memory, digital memory, digital storage device, storage register 28 Look-up table 30 Comparator, comparator output 31 First input terminal of the comparator 32 Second input terminal of the comparator 33 Output terminal of the comparator, synchronous input 35 Synchronizer 36 Output terminal of the synchronizer, output signal of the synchronizer 37 Synchronous input of the synchronizer 38 Clock input of the synchronizer 41 First buffer amplifier 42 Second buffer amplifier 45 Oscillator, RC reference oscillator, reference oscillator 50 Output terminal of the electronic oscillator circuit 51 First logic gate 52 Second logic gate 55 Phase-locked loop (PLL) 55’ Delay-locked loop (DLL) 56 Output terminal of the phase-locked loop 60 Inverter 60, 61 Mixer 62 Adder 70 Phase shift unit 72, 71 Input terminals of the phase shift unit 73 Output terminal of the phase shift unit 110, 112, 114 Excitation signal 111, 113 Oscillation signal f0 Frequency signal mck Output terminal, master clock signal, output terminal of the electronic oscillator circuit rck Time reference signal The first terminal of the X1 oscillator structure, the first terminal of the electronic oscillator circuit, the first input terminal connected to the first terminal of the crystal oscillator The second terminal of the X2 oscillator structure, the second terminal of the electronic oscillator circuit, the second input terminal connected to the second terminal of the crystal oscillator

Claims

1. A method for operating a fast start-up oscillator system (10), comprising a reference oscillator (45), a crystal oscillator (12) connected to an electronic oscillator circuit (14), and a crystal oscillator (11) with a first terminal (X1) and a second terminal (X2) connected to a first terminal and a second terminal of said crystal oscillator (12) and said electronic oscillator circuit (14), an output terminal of said electronic oscillator circuit (14) is provided for providing a master clock signal (mck) to a start-up controller (16) configured and switched on to perform a fast start-up procedure of said crystal oscillator (11) via said reference oscillator (45), said start-up controller (16) comprising not only a calculation unit (25) but also a memory unit (26) for storing data related to said reference oscillator (45) and for starting up said crystal oscillator (11), said method comprising the steps of: - providing start-up parameters to the calculation unit (25) for starting the crystal oscillator (11), the start-up parameters relating to the control of the excitation of the crystal oscillator and its phase deviation with respect to the reference oscillator, causing the crystal oscillator to oscillate within the start-up time of the crystal oscillator; - generating excitation bursts to be supplied to the crystal oscillator (11) for oscillating the crystal oscillator (11) at successively different periods within the start-up time of the crystal oscillator (11), and a phase realignment time; - determining the phase deviation between the oscillations of the reference oscillator and the oscillations of the crystal oscillator (11) during the successive different time periods; - calculating a frequency error in said calculation unit (25) based on said phase deviation; - correcting the frequency of said reference oscillator (45) to the frequency of said crystal oscillator (11) within a limited error range; 23. A method comprising:

2. 2. The method according to claim 1, characterized in that the start-up time is defined before the start-up of the oscillator system or when the calculation unit is parameterized.

3. 3. The method according to claim 2, characterized in that the start-up time can be adapted according to different operations of the oscillator system (10) and that the start-up time is defined in the order of 1 ms or 1.5 ms.

4. 2. The method according to claim 1, characterized in that the number of excitation bursts of the crystal oscillator (11) is set to 5 or 10 or 15 or 20 or more before the oscillator system (10) is started or when the calculation unit (25) is parameterized.

5. 2. The method of claim 1, characterized in that not only the phase realignment time but also the number of excitation bursts is defined for each successive period within the start-up time, and in that each successive period is first provided with the defined number of excitation bursts followed by the phase realignment time.

6. 2. The method according to claim 1, characterized in that the frequency error is calculated based on the phase deviation of several consecutive periods substantially at the end of the start-up time of the crystal oscillator (11).

7. 2. The method of claim 1, wherein the reference oscillator (45) is continuously maintained active before each start of the crystal oscillators (11) in the oscillator system (10).

8. A fast start-up oscillator system (10) intended to be operated according to the method of claim 1, comprising a reference oscillator (45), a crystal oscillator (12) connected to an electronic oscillator circuit (14), and a crystal oscillator (11) with a first terminal (X1) and a second terminal (X2) connected respectively to a first terminal and a second terminal of said crystal oscillator (12) and said electronic oscillator circuit (14), an output terminal of said crystal oscillator (11) being provided to supply a master clock signal (mck) to a start-up controller (16) configured and switched on to perform a fast start-up procedure of said crystal oscillator (11) via said reference oscillator (45), said start-up controller (16) comprising not only a calculation unit (25) but also a memory unit (26) for storing data related to said reference oscillator (45) and for starting up said crystal oscillator (11), The oscillator system (10) is characterized in that the reference oscillator (45) is arranged to operate continuously to determine any phase deviation between the reference oscillator (45) and the crystal oscillator (11) at each start-up time of the oscillator system (10), with the intention of determining the frequency error directly based on the phase deviation so that the frequency error can be corrected at the end of the start-up time.

9. The oscillator system (10) comprises the reference oscillator (45), which is an RC oscillator intended to be left in continuous operation with low power consumption; the start-up controller (16) comprises the calculation unit (25), which is a processor or microcontroller, and the memory unit (26) for storing data related to the reference oscillator (45); the oscillator system (10) comprises a comparator (30) having a first input terminal (X1) connected to a first terminal of the crystal oscillator (11) and a second input terminal (X2) connected to a second terminal of the crystal oscillator (11); the oscillator system (10) comprises a synchronization input ( 9. The oscillator system (10) according to claim 8, further comprising a synchronizer (35) having a comparator output (30) or a comparator output (33), a frequency signal (f0) obtained from the start-up controller (16) is supplied to the reference oscillator (45) intended to provide a time reference signal (rck) for the start-up controller (16) and connected to a clock input (38) of the synchronizer (35), and an output terminal (36) of the synchronizer (35) is directly connected to the start-up controller (16) in order to determine, when the oscillator system (10) is started, a phase deviation of the signal of the crystal oscillator (11) from the signal of the reference oscillator (45).

10. The oscillator system (10) comprises the reference oscillator (45), which is an RC oscillator intended to be left in continuous operation with low power consumption; the start-up controller (16) comprises the calculation unit (25), which is a processor or microcontroller, and the memory unit (26) for storing data related to the reference oscillator (45); the oscillator system (10) comprises a comparator (30) having a first input terminal (X1) connected to the first terminal of the crystal oscillator (11) and a second input terminal (X2) connected to the second terminal of the crystal oscillator (11); the oscillator system (10) comprises a synchronization input (33) or a comparator (30) having a first input terminal (X1) connected to the first terminal of the crystal oscillator (11) and a second input terminal (X2) connected to the second terminal of the crystal oscillator (11); 9. An oscillator system (10) according to claim 8, characterized in that it comprises a synchronizer (35) having a clock output (30), a frequency signal (f0) obtained from the start-up controller (16) is supplied to the reference oscillator (45) intended to supply a time reference signal (rck) to the start-up controller (16) on the one hand and to a phase locked loop (55) whose output terminal is connected to a clock input (38) of the synchronizer (35) on the other hand, and the output terminal (36) of the synchronizer (35) is directly connected to the start-up controller (16) in order to determine, when the oscillator system (10) is started, a phase deviation of the signal of the crystal oscillator (11) from the signal of the reference oscillator (45).

11. The oscillator system (10) comprises the reference oscillator (45), which is an RC oscillator intended to be left in continuous operation with low power consumption; the start-up controller (16) comprises the calculation unit (25), which is a processor or microcontroller, and the memory unit (26) for storing data related to the reference oscillator (45); the oscillator system (10) comprises a comparator (30) having a first input terminal (X1) connected to the first terminal of the crystal oscillator (11) and a second input terminal (X2) connected to the second terminal of the crystal oscillator (11); the oscillator system (10) comprises a synchronization input (33) or a comparator (30) having a first input terminal (X1) connected to the first terminal of the crystal oscillator (11) and a second input terminal (X2) connected to the second terminal of the crystal oscillator (11); 9. An oscillator system (10) according to claim 8, characterized in that it comprises a synchronizer (35) having a clock output (30), a frequency signal (f0) obtained from the start-up controller (16) is supplied to the reference oscillator (45) intended to supply a time reference signal (rck) to the start-up controller (16) on the one hand and to a delay locked loop (55') whose output terminal is connected to a clock input (38) of the synchronizer (35) on the other hand, and the output terminal (36) of the synchronizer (35) is directly connected to the start-up controller (16) in order to determine a phase deviation of a signal of the crystal oscillator (11) from a signal of the reference oscillator (45) when the oscillator system (10) is started.

12. The reference oscillator (45) is an RC oscillator with a synchronous IQ mixer intended to be left in continuous operation with low power consumption; the start-up controller (16) comprises the calculation unit (25) which is a processor or microcontroller, and the memory unit (26) for storing data related to the reference oscillator (45); the oscillator system (10) comprises a comparator (30) having a first input terminal (X1) connected to the first terminal of the crystal oscillator (11) and a second input terminal (X2) connected to the second terminal of the crystal oscillator (11); the oscillator system (10) comprises a synchronizer (35) with a synchronization input (33) or a comparator output (30); 10. The oscillator system (10) according to claim 8, characterized in that a frequency signal (f0) obtained from a crystal oscillator (11) is supplied to the reference oscillator (45), the oscillator system (10) comprises two mixers (60, 61) for receiving a time reference signal (rck) from the reference oscillator (45) and, respectively, a signal from the synchronizer (35), the output of each of the mixers (60, 61) is supplied to a summer (62) whose output is connected to a clock input (38) of the synchronizer (35), and the output terminal (36) of the synchronizer (35) is directly connected to the start-up controller (16) for determining, when the oscillator system (10) is started, a phase deviation of a signal of the crystal oscillator (11) from a signal of the reference oscillator (45).

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