Monolithic photomos relay and method for manufacturing the same

Abstract

To provide a monolithic photo-MOS relay and a manufacturing method thereof.SOLUTION: A method for manufacturing a monolithic photo-MOS relay uses a lightly doped substrate and forms a first P-N structure, a second P-N structure, and an N-P-N structure on an epitaxial layer. The epitaxial layer is divided into electrically isolated high-voltage and low-voltage regions by dry etching. An isolation layer is then deposited on the epitaxial layer, and a number of patterns are formed by photomask etching. A metal layer is then deposited to form a light-emitting diode in the first P-N structure, a photodiode in the second P-N structure, and at least one metal oxide semiconductor field effect transistor in the N-P-N structure on the basis of the patterns.SELECTED DRAWING: Figure 7

Description

Technical Field

[0001] The present invention relates to a monolithic opto - mosfet relay and a method for manufacturing the same. Specifically, the present invention uses the same process and the same low - doped silicon carbide substrate to fabricate the components of the monolithic opto - mosfet relay.

Background Art

[0002] Currently, silicon substrates are often used in the manufacture of photo - mos relays. The light - emitting end, that is, a light - emitting diode (LED), is manufactured by a gallium arsenide (GaAs) process. The light - receiving end, that is, a photodiode (PD) and a metal - oxide - semiconductor field - effect transistor (MOSFET), are an optical sensor and an AC switch made of silicon. Therefore, two wafers need to be used separately and two different processes need to be performed, making the packaging complicated and inefficient.

[0003] In addition, there is a limit to the breakdown voltage of the output end of a conventional silicon photogate. Without adding a silicon carbide element, it is at most about 800 to 900 volts.

[0004] In view of the above circumstances, the present invention provides a silicon carbide optoelectronic relay that can improve the breakdown voltage and simplify the manufacturing process.

Summary of the Invention

[0005] An object of the present invention is to provide a monolithic photo MOS relay and a method for manufacturing the same. The monolithic photo MOS relay uses a low-doped silicon carbide substrate, and by fabricating a light-emitting element (light-emitting diode) and a light-receiving element (photodiode) required for the monolithic photo MOS relay on the same silicon carbide substrate, the manufacturing process can be simplified. As a result, it is possible to significantly increase the withstand voltage of the AC switch up to 1700 volts without adding components, reduce the chip area, and lower the cost of the module.

[0006] To achieve the above object, the present invention provides a monolithic photo MOS relay connected to an input circuit and an output circuit. The monolithic photo MOS relay includes a substrate, an epitaxial layer, an isolation layer, a light emitting diode (LED), a blue ultraviolet reflection film, a photodiode (PD), a first metal oxide semiconductor field effect transistor (MOSFET), and a second metal oxide semiconductor field effect transistor. The epitaxial layer is formed on the substrate. A trench is formed in the epitaxial layer to divide the epitaxial layer into a high voltage region and a low voltage region. The high voltage region and the low voltage region are electrically insulated from each other. The isolation layer is formed on the epitaxial layer. The light emitting diode is formed in the low voltage region of the epitaxial layer, receives an input signal from the input circuit, and generates light in response to the input signal. The blue ultraviolet reflection film reflects light to form reflected light. The photodiode is formed in the high voltage region of the epitaxial layer, detects the reflected light, and generates a detection voltage. The first metal oxide semiconductor field effect transistor is formed in the high voltage region of the epitaxial layer, is electrically connected to the photodiode, is driven in response to the detection voltage, generates a first output current, and outputs the first output current to the output circuit. The second metal oxide semiconductor field effect transistor is formed in the high voltage region of the epitaxial layer, is electrically connected to the photodiode, is driven in response to the detection voltage, generates a second output current, and outputs the second output current to the output circuit. The light emitting diode, the photodiode, the first metal oxide semiconductor field effect transistor, and the second metal oxide semiconductor field effect transistor are formed adjacent to each other on the substrate.

[0007] In an embodiment of the present invention, the substrate is made of silicon carbide (SiC) and is doped with a low ion concentration.

[0008] In an embodiment of the present invention, after the blue ultraviolet reflection film is coated on the isolation layer, the monolithic photomos relay is sealed with a sealant. The light reaches the blue ultraviolet reflection film through the isolation layer and is reflected by the blue ultraviolet reflection film to the photodiode.

[0009] In an embodiment of the present invention, the monolithic photomos relay is sealed with a sealant, and the blue ultraviolet reflection film is coated on the outer surface of the sealant. The light reaches the blue ultraviolet reflection film through the sealant and is reflected by the blue ultraviolet reflection film to the photodiode.

[0010] In an embodiment of the present invention, the monolithic photomos relay is sealed with a metal case, and the blue ultraviolet reflection film is coated on the inner surface of the metal case. The light reaches the blue ultraviolet reflection film through the air inside the metal case and is reflected by the blue ultraviolet reflection film to the photodiode.

[0011] In an embodiment of the present invention, the epitaxial layer is doped with N-type.

[0012] In an embodiment of the present invention, the light has a wavelength of 300 nanometers to 500 nanometers.

[0013] In an embodiment of the present invention, the monolithic photomos relay is electrically connected to the photodiode, the first gate of the first metal oxide semiconductor field effect transistor, and the second gate of the second metal oxide semiconductor field effect transistor, and further includes a control circuit for controlling the first voltage response time of the first metal oxide semiconductor field effect transistor and the second voltage response time of the second metal oxide semiconductor field effect transistor.

[0014] In addition, the present invention also provides a method for manufacturing a monolithic photomos relay. The manufacturing method includes a step of forming an epitaxial layer on a substrate, a step of implanting a plurality of ions into the epitaxial layer to form a first P-N structure, a second P-N structure, and an N-P-N structure in the epitaxial layer, a step of performing dry etching to form a trench that divides the epitaxial layer into a high-voltage region and a low-voltage region that are electrically insulated from each other, a step of depositing an isolation layer on the epitaxial layer and the trench, a step of performing photomask etching to form a plurality of patterns, and a step of depositing a metal layer to form a light emitting diode (LED) in the first P-N structure, a photodiode (PD) in the second P-N structure, and a first metal oxide semiconductor field effect transistor (MOSFET) and a second metal oxide semiconductor field effect transistor in the N-P-N structure based on the patterns.

[0015] In an embodiment of the present invention, the method for manufacturing the monolithic photomos relay further includes a step of coating a blue ultraviolet reflection film on the isolation layer and a step of encapsulating the monolithic photomos relay with a sealant.

[0016] In an embodiment of the present invention, light reaches the blue ultraviolet reflection film through the isolation layer and is reflected by the blue ultraviolet reflection film to the photodiode.

[0017] In an embodiment of the present invention, the method for manufacturing the monolithic photomos relay further includes a step of encapsulating the monolithic photomos relay with a sealant and a step of coating a blue ultraviolet reflection film on the outer surface of the sealant.

[0018] In an embodiment of the present invention, light reaches the blue ultraviolet reflection film through the encapsulant and is reflected by the blue ultraviolet reflection film to the photodiode.

[0019] In an embodiment of the present invention, the method for manufacturing the monolithic photomos relay further includes the steps of encapsulating the monolithic photomos relay with a metal case and coating a blue ultraviolet reflection film on the inner surface of the metal case.

[0020] In an embodiment of the present invention, light reaches the blue ultraviolet reflection film through the air inside the metal case and is reflected by the blue ultraviolet reflection film to the photodiode.

[0021] In an embodiment of the present invention, the substrate is made of silicon carbide (SiC) and is doped with a low ion concentration.

[0022] In an embodiment of the present invention, the method for manufacturing the monolithic photomos relay further includes the steps of electrically connecting a control circuit to the photodiode, the first gate of the first metal-oxide-semiconductor field-effect transistor, and the second gate of the second metal-oxide-semiconductor field-effect transistor, and controlling, by the control circuit, the first voltage response time of the first metal-oxide-semiconductor field-effect transistor and the second voltage response time of the second metal-oxide-semiconductor field-effect transistor when the photodiode generates a detection voltage.

[0023] Those skilled in the art can understand other objects of the present invention, as well as the technical means and embodiments of the present invention, by referring to the drawings and the embodiments described below.

Brief Description of the Drawings

[0024]

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Embodiments for Carrying Out the Invention

[0025] Hereinafter, the content of the present invention will be described through examples. Note that the examples of the present invention show examples of embodiments, and are not intended to be limited to the environments, applications, or specific aspects as described in the examples. Therefore, the description of the examples is for explaining the present invention, but does not limit the present invention. In the embodiments and the drawings, components not directly related to the present invention are omitted and not shown. The dimensional relationships of the components in the drawings are for easy understanding and do not limit the actual dimensions.

[0026] FIGS. 1 to 8 are diagrams showing a first embodiment of the present invention. FIG. 1 is a schematic diagram showing a circuit of a monolithic photomos relay 100 according to the present invention. The monolithic photomos relay 100 is connected to an input circuit 200 and an output circuit 300. The monolithic photomos relay 100 includes a light emitting diode (LED) 110, a series of photodiodes (PD) 130, a first metal oxide semiconductor field effect transistor (MOSFET) 150, and a second metal oxide semiconductor field effect transistor 170. The first metal oxide semiconductor field effect transistor 150 has a first gate 151, a first source 153, and a first drain 155. The second metal oxide semiconductor field effect transistor 170 has a second gate 171, a second source 173, and a second drain 175.

[0027] The light emitting diode 110 receives an input signal from the input circuit 200 and generates light 111 in response to the input signal. The light 111 is reflected to become reflected light 113. When the series of photodiodes 130 detects the reflected light 113, a response current is generated, and a voltage difference occurs across the series. This voltage difference is used to control the first gate 151 of the first metal oxide semiconductor field effect transistor 150 and the second gate 171 of the second metal oxide semiconductor field effect transistor 170.

[0028] In the prior art, a photomos relay requires a chip for making a light-emitting diode and another chip for making a photodiode and a metal-oxide-semiconductor field-effect transistor. In other words, in the prior art, at least two chips were required to manufacture a photomos relay. Since the chip for making a light-emitting diode is different from the chip for making a photodiode and a metal-oxide-semiconductor field-effect transistor, the process of manufacturing a light-emitting diode is different from the processes of manufacturing a photodiode and a metal-oxide-semiconductor field-effect transistor. Note that there is a limit to the breakdown voltage at the output end of a conventional photomos relay using a silicon substrate, and it is at most about 800 to 900 volts unless a silicon carbide element is added.

[0029] In order to simplify the manufacturing process, reduce the cost of the product, and at the same time improve the off state voltage, the present invention proposes to simplify the manufacturing process by manufacturing a light-emitting element (i.e., a light-emitting diode) and a light-receiving element (i.e., a photodiode) of a photomos relay on the same silicon carbide substrate. Specifically, it will be described with reference to FIGS. 2 to 8. FIGS. 2 to 7 are cross-sectional views showing each stage of the manufacturing process of the monolithic photomos relay 100. FIG. 8 is a top view showing the circuit layout of the monolithic photomos relay 100. In the process of manufacturing the monolithic photomos relay 100 of the present invention, first, an epitaxial layer 192 is formed on a substrate 191. A plurality of ions are implanted into the epitaxial layer 192, and as shown in FIGS. 2 and 3, a first P-N structure 1921, a second P-N structure 1922, and an N-P-N structure 1923 are formed in the epitaxial layer 192.

[0030] The substrate 191 is made of silicon carbide (SiC) doped with a low ion concentration, and its ion concentration is generally 1E15 (1 / cm 3) is less than. Silicon carbide has various crystal structures, such as hexagonal silicon carbide (6H-SiC), cubic silicon carbide (4H-SiC), and cubic silicon carbide (3C-SiC). Silicon carbide has high-temperature stability, high electron mobility, high voltage resistance, and excellent thermal conductivity. Therefore, compared with the conventional photomos relay using a silicon substrate, in the present invention, silicon carbide is used to fabricate the monolithic photomos relay 100, so that the breakdown voltage of the AC switch can be significantly improved.

[0031] In this embodiment, the epitaxial layer 192 is doped with N-type. The ions are N-type ions or P-type ions. Specifically, as shown in FIG. 3, the hatched portion in FIG. 3 is a P-type doped region, and the gray portion is an N-type doped region. The first P-N structure 1921 is a P-N structure composed of a P-type doped region formed by implanting P-type ions into the N-type epitaxial layer by ion implantation and the N-type epitaxial layer. The second P-N structure 1922 is a P-N structure formed by implanting N-type ions into the P-type doped region formed by implanting P-type ions into the N-type epitaxial layer by ion implantation again. Similar to the second P-N structure 1922, the N-P-N structure 1923 is a structure formed by forming a P-type doped region by implanting P-type ions into the N-type epitaxial layer by ion implantation and implanting N-type ions into two different regions in the P-type doped region by ion implantation.

[0032] Next, as shown in FIG. 4, dry etching is performed to form a trench 1924 in the epitaxial layer 192. Dry etching selectively removes material from the wafer surface with plasma. The trench 1924 divides the epitaxial layer 192 into a low voltage region 1925 and a high voltage region 1926. In order to electrically insulate the low voltage region 1925 and the high voltage region 1926, dry etching needs to reach the substrate 191 and expose the surface of the substrate 191. In this case, the low voltage region 1925 and the high voltage region 1926 are connected only by the substrate 191. Since the substrate 191 is a substrate doped with a low ion concentration, the electrical resistance of the substrate 191 is high. That is, the substrate 191 can prevent electrical changes between the low voltage region 1925 and the high voltage region 1926 and completely electrically insulate the low voltage region 1925 and the high voltage region 1926.

[0033] After the dry etching is completed, an isolation layer 194 is deposited on the epitaxial layer 192 and the trench 1924. Also, photomask etching is performed to form a plurality of patterns (not shown). Next, as shown in FIGS. 5 and 6, by depositing a metal layer 195, a light emitting diode 110 is formed in the first P-N structure 1921, a photodiode 130 is formed in the second P-N structure 1922, and a first metal oxide semiconductor field effect transistor 150 and a second metal oxide semiconductor field effect transistor 170 are formed in the N-P-N structure 1923 based on the patterns.

[0034] In this embodiment, the isolation layer 194 is formed by a deposition method such as chemical vapor deposition, physical vapor deposition, or sputtering. The material of the isolation layer 194 is silicon dioxide (SiO2) or silicon nitride (Si3N4). Silicon dioxide and silicon nitride are insulating materials and are used, for example, in the manufacture of the isolation layer 194 to prevent the flow of current between different crystal regions of the low voltage region 1925 and the high voltage region 1926.

[0035] As shown in FIG. 6, the positions of the patterns formed by photomask etching correspond to the first P-N structure 1921, the second P-N structure 1922, and the N-P-N structure 1923. Therefore, after depositing the metal layer 195, as shown in FIGS. 7 and 8, a light-emitting diode 110 is formed in the first P-N structure 1921, a photodiode 130 is formed in the second P-N structure 1922, and a first metal-oxide-semiconductor field-effect transistor 150 and a second metal-oxide-semiconductor field-effect transistor 170 are formed in the N-P-N structure 1923.

[0036] The light-emitting diode 110 is formed in the low-voltage region 1925 of the epitaxial layer 192, receives an input signal from the input circuit, and generates light 111 in response to the input signal. The photodiode 130 is formed in the high-voltage region 1926 of the epitaxial layer 192, detects the reflected light 113, and generates a detection voltage. The first metal-oxide-semiconductor field-effect transistor 150 is formed in the high-voltage region 1926 of the epitaxial layer 192, is electrically connected to the photodiode 130, is driven in response to the detection voltage, generates a first output current, and outputs it to the output circuit 300. The second metal-oxide-semiconductor field-effect transistor 170 is formed in the high-voltage region 1926 of the epitaxial layer 192, is electrically connected to the photodiode 130, is driven in response to the detection voltage, generates a second output current, and outputs it to the output circuit.

[0037] In this way, the light-emitting diode 110, the photodiode 130, the first metal-oxide-semiconductor field-effect transistor 150, and the second metal-oxide-semiconductor field-effect transistor 170 are fabricated on the same substrate 191 by the same process and are formed adjacent to each other on the substrate 191. Therefore, the present invention can significantly increase the breakdown voltage of the AC switch to 1700 volts (V) or more, reduce the chip area, and lower the module cost (BOM cost) without adding components.

[0038] In the second embodiment of the present invention, FIG. 9 is a cross-sectional view showing the monolithic photo MOS relay 100. The second embodiment is an extension of the first embodiment. In this embodiment, the packaging method of the monolithic photo MOS relay 100 will be described in detail. Specifically, the monolithic photo MOS relay 100 is sealed with a blue-violet transparent sealant 400. The outer surface of the sealant 400 is coated with a blue ultraviolet reflection film 500. The blue ultraviolet reflection film 500 reflects the light 111 to form a reflected light 113. Thereby, the light 111 emitted by the light emitting diode 110 reaches the blue ultraviolet reflection film 500 through the sealant 400 and is reflected by the blue ultraviolet reflection film 500 to the photo diode 130. The light 111 emitted by the light emitting diode 110 is mainly blue to ultraviolet light. The light 111 has a wavelength of 300 nanometers to 500 nanometers.

[0039] In the third embodiment of the present invention, FIG. 10 is a cross-sectional view showing another embodiment of the monolithic photo MOS relay 100. The third embodiment is an extension of the first embodiment. Different from the second embodiment, in this embodiment, first, the blue ultraviolet reflection film 500 is coated on the isolation layer 194, and then the monolithic photo MOS relay 100 is sealed with the sealant 400. Thereby, the light 111 emitted by the light emitting diode 110 reaches the blue ultraviolet reflection film 500 through the isolation layer 194 and is reflected by the blue ultraviolet reflection film 500 to the photo diode 130.

[0040] In the fourth embodiment of the present invention, FIG. 11 is a cross-sectional view showing the monolithic photo MOS relay 100. The fourth embodiment is an extension of the first embodiment. Different from the second and third embodiments, in this embodiment, the monolithic photo MOS relay 100 is sealed with a metal case 600, and then the blue ultraviolet reflection film 500 is coated on the inner surface of the metal case. The metal case is not filled with a sealant. Thereby, the light emitted by the light emitting diode reaches the blue ultraviolet reflection film through the air in the metal case and is reflected by the blue ultraviolet reflection film to the photo diode.

[0041] In the fifth embodiment of the present invention, FIG. 12 is a schematic diagram showing a control circuit 700 of a monolithic photomos relay in the present invention. The fifth embodiment is an extension of the first embodiment. The control circuit 700 includes at least one metal oxide semiconductor field effect transistor 710, at least one resistor 730, and at least one diode 750. A schematic circuit of the control circuit 700 is shown in FIG. 12. The control circuit 700 is electrically connected to a photodiode 130, a first gate 151 of a first metal oxide semiconductor field effect transistor 150, and a second gate 171 of a second metal oxide semiconductor field effect transistor 170, and controls a first voltage response time of the first metal oxide semiconductor field effect transistor 150 and a second voltage response time of the second metal oxide semiconductor field effect transistor 170. In the manufacturing process, the control circuit 700, the light emitting diode 110, the photodiode 130, the first metal oxide semiconductor field effect transistor 150, and the second metal oxide semiconductor field effect transistor 170 are fabricated on the same silicon carbide substrate 191 by the same process.

[0042] In the sixth embodiment of the present invention, FIG. 13 is a flowchart showing a manufacturing method of a monolithic photomos relay according to the present invention. The manufacturing method of the monolithic photomos relay is applicable to the manufacture of the monolithic photomos relay 100 of the above embodiment. For the manufacture of the monolithic photomos relay, semiconductor devices such as, for example, a vapor deposition apparatus, an ion implantation apparatus, a photolithography apparatus, an etching apparatus, a cleaning apparatus, a sputtering apparatus, a test apparatus, and a packaging apparatus are used, but are not limited thereto.

[0043] First, in step S1302, an epitaxial layer is formed on a substrate. For example, as shown in FIGS. 2 to 7, an epitaxial layer 192 is formed on a substrate 191. The substrate is made of silicon carbide and is doped with a low ion concentration. In step S1304, a plurality of ions are implanted into the epitaxial layer to form a first P-N structure, a second P-N structure, and an N-P-N structure in the epitaxial layer. In step S1306, dry etching is performed to form trenches in the epitaxial layer. The trenches divide the epitaxial layer into a high voltage region and a low voltage region. The high voltage region and the low voltage region are electrically insulated from each other.

[0044] Thereafter, in step S1308, an isolation layer is deposited on the epitaxial layer and the trenches. In step S1310, photomask etching is performed to form a plurality of patterns. In step S1312, a metal layer is deposited to form a light emitting diode in the first P-N structure, a photodiode in the second P-N structure, and a first metal oxide semiconductor field effect transistor and a second metal oxide semiconductor field effect transistor in the N-P-N structure based on the patterns.

[0045] In an embodiment of the present invention, the monolithic photomos relay is sealed with a sealant, and a blue ultraviolet reflection film is coated on the outer surface of the sealant. As described in the second embodiment and shown in FIG. 9, light reaches the blue ultraviolet reflection film through the sealant and is reflected by the blue ultraviolet reflection film to the photodiode.

[0046] In other embodiments, first, a blue ultraviolet reflection film is coated on the isolation layer, and then the monolithic photomos relay is sealed with a sealant. In that case, as described in the third embodiment and shown in FIG. 10, light reaches the blue ultraviolet reflection film through the isolation layer and is reflected by the blue ultraviolet reflection film to the photodiode.

[0047] In other embodiments, the monolithic photomos relay is encapsulated with a metal case, and a blue ultraviolet reflection film is coated on the inner surface of the metal case. Thereby, as described in the fourth embodiment and shown in FIG. 11, light reaches the blue ultraviolet reflection film through the air in the metal case and is reflected by the blue ultraviolet reflection film to the photodiode.

[0048] In addition, in other embodiments, the manufacturing method of the monolithic photomos relay of the present invention electrically connects a control circuit to the photodiode, the first gate of the first metal oxide semiconductor field effect transistor, and the second gate of the second metal oxide semiconductor field effect transistor. When the photodiode generates a detection voltage, the control circuit controls the first voltage response time of the first metal oxide semiconductor field effect transistor and the second voltage response time of the second metal oxide semiconductor field effect transistor.

[0049] In addition to the steps described above, the manufacturing method of the monolithic photomos relay in this embodiment can execute the steps described in the foregoing embodiments and exhibit the same functions. Based on the above-described embodiments, those skilled in the art can easily understand how to execute these steps and functions, so the description thereof is omitted.

[0050] As described above, the monolithic photomos relay according to the present invention uses a low-doped silicon carbide substrate. Compared with the conventional one using a silicon substrate, the dielectric breakdown strength of silicon carbide is 10 times that of silicon. Note that the silicon carbide substrate is applicable to the manufacture of both the light-emitting element and the light-receiving element. Therefore, in the present invention, an epitaxial layer is formed on the silicon carbide substrate, ions are implanted, the epitaxial layer is divided into two parts by dry etching, an isolation layer is deposited, photomask etching is performed, and finally a metal layer is deposited. Thus, the light-emitting diode, the photodiode, and the metal-oxide-semiconductor field-effect transistor are simultaneously formed on the two parts of the epitaxial layer. In this way, the present invention uses the same process and the same substrate to fabricate all the components of the monolithic photomos relay. Without adding components, it is possible to significantly increase the withstand voltage of the AC switch, reduce the chip area, and lower the cost of the module.

[0051] The above-described embodiments illustrate the embodiments of the present invention and explain the characteristic configurations of the present invention. The present invention is not limited to the above embodiments. Modifications or equivalent arrangements that can be easily made by those skilled in the art are also within the scope of the present invention. The scope of protection of the rights of the present invention shall be based on the scope of the claims.

Description of Reference Numerals

[0052] 100 Monolithic photomos relay 110 Light-emitting diode 111 Light 113 Reflected light 130 Photodiode 150 First metal-oxide-semiconductor field-effect transistor 151 First gate 153 First source 155 First drain 170 Second metal-oxide-semiconductor field-effect transistor 171 Second gate 173 Second source 175 Second drain 191 Substrate 192 Epitaxial layer 1921 First P-N structure 1922 Second P-N structure 1923 N-P-N structure 1924 Trench 1925 High voltage region 1926 Low voltage region 194 Isolation layer 195 Metal layer 200 Input circuit 300 Output circuit 400 Sealing agent 500 Blue ultraviolet reflection film 600 Metal case 700 Control circuit S1302~S1314 Steps

Claims

1. A monolithic photoMOS relay connected to an input circuit and an output circuit, a silicon carbide substrate; an N-type epitaxial layer formed on a silicon carbide substrate, in contact with the silicon carbide substrate, the N-type epitaxial layer being divided into a high voltage region and a low voltage region that are electrically isolated by a trench; an isolation layer formed on the N-type epitaxial layer; a light emitting diode formed as a first PN structure in the low voltage region of the N-type epitaxial layer, the light emitting diode receiving an input signal from the input circuit and generating light in response to the input signal; a blue ultraviolet reflective film that reflects the light to form a reflected light; a photodiode formed as a second PN structure in the high voltage region of the N-type epitaxial layer, the photodiode detecting the reflected light and generating a detection voltage; a first metal oxide semiconductor field effect transistor formed in the high voltage region of the N-type epitaxial layer as an N-P-N structure, electrically connected to the photodiode, and driven in response to the detection voltage to generate a first output current and output the first output current to the output circuit; a second metal oxide semiconductor field effect transistor formed in the high voltage region of the N-type epitaxial layer as an N-P-N structure, electrically connected to the photodiode, and driven in response to the detection voltage to generate a second output current and output the second output current to the output circuit; the light emitting diode, the photodiode, the first metal oxide semiconductor field effect transistor, and the second metal oxide semiconductor field effect transistor are formed adjacent to one another on the silicon carbide substrate.

2. 2. A monolithic photoMOS relay according to claim 1, wherein said silicon carbide substrate is doped with a low ion concentration of 1E15 (1 / cm 3 ) or less.

3. 2. The monolithic photoMOS relay of claim 1, wherein the blue ultraviolet reflective film is coated on the isolation layer, and the monolithic photoMOS relay is encapsulated with an encapsulant.

4. 4. The monolithic photoMOS relay of claim 3, wherein the light passes through the isolation layer, reaches the blue ultraviolet reflective film, and is reflected by the blue ultraviolet reflective film to the photodiode.

5. 2. The monolithic photoMOS relay according to claim 1, wherein the monolithic photoMOS relay is sealed with a sealant, and the blue ultraviolet reflective film is coated on an outer surface of the sealant.

6. 6. The monolithic photoMOS relay of claim 5, wherein the light passes through the encapsulant, reaches the blue ultraviolet reflective film, and is reflected by the blue ultraviolet reflective film to the photodiode.

7. 2. The monolithic photoMOS relay according to claim 1, wherein the monolithic photoMOS relay is sealed in a metal case, and the blue ultraviolet reflective film is coated on an inner surface of the metal case.

8. 8. The monolithic photoMOS relay according to claim 7, wherein the light passes through the air in the metal case, reaches the blue ultraviolet reflective film, and is reflected by the blue ultraviolet reflective film to the photodiode.

9. 2. A monolithic photoMOS relay according to claim 1, wherein said light has a wavelength of 300 nanometers to 500 nanometers.

10. 2. The monolithic photoMOS relay of claim 1, further comprising a control circuit electrically connected to the photodiode, a first gate of the first metal oxide semiconductor field effect transistor, and a second gate of the second metal oxide semiconductor field effect transistor, for controlling a first voltage response time of the first metal oxide semiconductor field effect transistor and a second voltage response time of the second metal oxide semiconductor field effect transistor.

11. A method for manufacturing a monolithic photoMOS relay, comprising the steps of: forming an N-type epitaxial layer on a silicon carbide substrate; implanting a plurality of ions into the N-type epitaxial layer to form a first PN structure, a second PN structure, and an N-PN structure in the N-type epitaxial layer; performing a dry etch to form a trench dividing the N-type epitaxial layer into electrically isolated high voltage and low voltage regions; depositing an isolation layer on the N-type epitaxial layer and on the trench; performing photomask etching to form a plurality of patterns; and forming a light emitting diode in the first P-N structure, a photodiode in the second P-N structure, and a first metal oxide semiconductor field effect transistor and a second metal oxide semiconductor field effect transistor in the N-P-N structure based on the pattern by evaporating a metal layer.

12. coating the isolation layer with a blue ultraviolet reflective film; 12. The method of claim 11, further comprising the step of sealing the monolithic photoMOS relay with a sealant.

13. 13. The method for manufacturing a monolithic photoMOS relay according to claim 12, wherein light passes through the isolation layer, reaches the blue ultraviolet reflective film, and is reflected by the blue ultraviolet reflective film to the photodiode.

14. encapsulating the monolithic photoMOS relay with an encapsulant; 12. The method of claim 11, further comprising the step of: coating an outer surface of the encapsulant with a blue ultraviolet reflective film.

15. 15. The method for manufacturing a monolithic photoMOS relay according to claim 14, wherein light passes through the encapsulant, reaches the blue ultraviolet reflective film, and is reflected by the blue ultraviolet reflective film to the photodiode.

16. encapsulating the monolithic photoMOS relay in a metal case; 12. The method of claim 11, further comprising the step of coating an inner surface of the metal case with a blue ultraviolet reflective film.

17. 17. The method for manufacturing a monolithic photoMOS relay according to claim 16, wherein light passes through the air in the metal case, reaches the blue ultraviolet reflective film, and is reflected by the blue ultraviolet reflective film to the photodiode.

18. The method for manufacturing a monolithic photoMOS relay according to claim 11, wherein the silicon carbide substrate is doped with a low ion concentration of 1E15 (1 / cm 3 ) or less.

19. electrically connecting a control circuit to the photodiode, a first gate of the first metal-oxide-semiconductor field effect transistor, and a second gate of the second metal-oxide-semiconductor field effect transistor; 12. The method of claim 11, further comprising: controlling a first voltage response time of the first metal-oxide-semiconductor field effect transistor and a second voltage response time of the second metal-oxide-semiconductor field effect transistor by the control circuit when the photodiode generates a detection voltage.

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