Method for manufacturing a wafer and method for manufacturing a stacked device chip

Abstract

To provide a method for manufacturing a wafer with which a wafer not including a defective device can be efficiently manufactured.SOLUTION: A method for manufacturing a wafer includes: a wafer preparation step of preparing a wafer including a semiconductor device formed in each of a plurality of regions demarcated by a plurality of streets intersecting each other; a removal step of removing, from the wafer, a defective device region including a semiconductor device determined to be a defective product among the plurality of semiconductor devices formed in the wafer; an expansion step of expanding a removed region formed by removing the defective device region from the wafter; and a fitting step of fitting, into the expanded removed region, a device chip including a semiconductor device as a non-defective product having a same function as that of the semiconductor device determined to be a defective product.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a wafer including a plurality of semiconductor devices and a method for manufacturing a stacked device chip including a plurality of stacked semiconductor devices.

Background Art

[0002] In the manufacturing process of a device chip, a wafer in which semiconductor devices are formed in a plurality of regions partitioned by a plurality of streets (division planned lines) arranged in a grid pattern is used. By dividing this wafer along the streets, a plurality of device chips each including a semiconductor device can be obtained. The device chips are incorporated into various electronic devices such as mobile phones and personal computers.

[0003] In recent years, a technique for manufacturing a device chip (stacked device chip) including a plurality of stacked semiconductor devices has been put into practical use. For example, a stacked device chip can be obtained by stacking a plurality of device chips and connecting semiconductor devices to each other with through electrodes (TSV: Through-Silicon Via) that penetrate the device chips vertically. When through electrodes are used, the wiring for connecting semiconductor devices can be shortened compared to the case of using wire bonding or the like, so that the stacked device chip can be miniaturized and the processing speed can be improved.

[0004] As a method for manufacturing a stacked device chip, a method called WoW (Wafer on Wafer) has been proposed. In this method, a plurality of wafers are stacked, and a stacked wafer is formed by connecting semiconductor devices included in each wafer with electrodes formed so as to penetrate the stacked wafers. Then, the stacked wafer is divided along the streets to manufacture a stacked device chip.

[0005] However, wafers used in the manufacture of stacked device chips may contain defective semiconductor devices (defective devices). When a stacked wafer formed by stacking wafers containing defective devices is divided, stacked device chips containing defective devices are manufactured. If some of the semiconductor devices included in the stacked device chip are defective, even if the other semiconductor devices are non-defective, the entire stacked device chip will be determined to be defective (defective chip). Therefore, in the manufacture of stacked device chips, the influence of the reduction in yield due to defective devices is significant.

[0006] Therefore, before stacking a plurality of wafers, an inspection is performed to determine whether each semiconductor device included in each wafer is non-defective or defective. Then, for example, based on the number, arrangement, etc. of defective devices included in the wafer, an optimal combination of wafers used for manufacturing the stacked device chip is determined (see Patent Document 1). As a result, the number of stacked device chips containing defective devices is minimized, and the reduction in yield is suppressed.

[0007] However, as long as wafers containing defective devices are used, it is inevitable that at least a certain number of defective chips will be manufactured, and there is a limit to reducing the number of defective chips. Therefore, a method has been proposed in which a region containing a defective device (defective device region) is cut out from the wafer, and a device chip equipped with a non-defective semiconductor device is fitted into the gap formed by cutting out the defective device region (see Patent Document 2). By using this method, a wafer that does not contain defective devices can be obtained, and the yield of the stacked device chip is improved.

Prior Art Documents

Patent Documents

[0008]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0009] As described above, by punching out defective device regions and fitting device chips, a wafer that does not contain defective devices can be manufactured. However, the semiconductor devices formed on the wafer are fine and are often arranged at high density. Therefore, although it is possible to punch out the defective device regions from the wafer itself, it may be difficult to precisely control the size of the gaps formed in the wafer due to the punching out of the defective device regions.

[0010] And if the gaps in the wafer are not formed to the desired size and an error occurs between the dimensions of the gaps in the wafer and the dimensions of the device chips, the device chips may not be correctly fitted into the gaps in the wafer. In this case, operations such as fine adjustment of the dimensions of the device chips and remaking of the device chips are required, and the labor and cost required for manufacturing a wafer that does not contain defective devices increase.

[0011] The present invention has been made in view of such problems, and an object thereof is to provide a method for manufacturing a wafer capable of efficiently manufacturing a wafer that does not contain defective devices, and a method for manufacturing a stacked device chip using the wafer obtained by the method for manufacturing the wafer.

Means for Solving the Problems

[0012] According to one aspect of the present invention, a wafer preparation step of preparing a wafer in which semiconductor devices are formed in a plurality of regions partitioned by a plurality of streets intersecting each other, and a removal step of removing a defective device region including the semiconductor device determined to be defective among the plurality of semiconductor devices formed on the wafer from the wafer, After the removing step, An expanding step of expanding a removal area formed by removing the defective device area from the wafer, and a fitting step of fitting a device chip including a non-defective semiconductor device having the same function as the semiconductor device determined to be defective into the expanded removal area are provided. A method for manufacturing a wafer is provided.

[0013] Also, according to another aspect of the present invention, a wafer preparation step of preparing a wafer in which semiconductor devices are respectively formed in a plurality of regions partitioned by a plurality of streets intersecting each other, and a defective semiconductor device among the plurality of semiconductor devices formed on the wafer are provided. A removing step of removing a defective device region including the semiconductor device determined to be a defective product from the wafer, an expanding step of expanding a removed region formed by removing the defective device region from the wafer, and a non-defective semiconductor having the same function as the semiconductor device determined to be a defective product. A fitting step of fitting a device chip including a device into the expanded removed region, and In the expanding step, the removal area is expanded by heating the wafer. A method for manufacturing a wafer is provided.

[0014] Further, according to another aspect of the present invention, a wafer preparation step of preparing a first wafer and a second wafer in which semiconductor devices are respectively formed in a plurality of regions partitioned by a plurality of streets intersecting each other, and a defective semiconductor device among the plurality of semiconductor devices formed on the first wafer are provided. A removal step of removing the defective device area including the semiconductor device determined to be defective from the first wafer, After the removing step, An expanding step of expanding a removal area formed by removing the defective device area from the first wafer, a fitting step of fitting a device chip including a non-defective semiconductor device having the same function as the semiconductor device determined to be defective into the expanded removal area, a wafer stacking step of forming a stacked wafer by stacking the second wafer on the first wafer, and a dividing step of dividing the stacked wafer along the street to form a stacked device chip including a plurality of stacked semiconductor devices are provided. A method for manufacturing a stacked device chip is provided. Also, according to another aspect of the present invention, a wafer preparation step of preparing a first wafer and a second wafer in which semiconductor devices are respectively formed in a plurality of regions partitioned by a plurality of streets intersecting each other, and a defective semiconductor device among the plurality of semiconductor devices formed on the first wafer are provided. A removing step of removing a defective device region including the semiconductor device determined to be a defective product from the first wafer, an expanding step of expanding a removed region formed by removing the defective device region from the first wafer, and a non-defective semiconductor having the same function as the semiconductor device determined to be a defective product. A fitting step of fitting a device chip including a device into the expanded removed region, a wafer stacking step of forming a stacked wafer by stacking the second wafer on the first wafer, and a dividing step of dividing the stacked wafer along the street to form a stacked device chip including a plurality of stacked semiconductor devices. In the expanding step, a method for manufacturing a stacked device chip is provided in which the removed region is expanded by heating the first wafer.

[0015] Preferably , the In the wafer stacking step, the removal step, the expanding step, and the fitting step are performed on the second wafer stacked on the first wafer.

Advantages of the Invention

[0016] In the method for manufacturing a wafer according to one aspect of the present invention, a defective device region including a semiconductor device determined to be defective is removed from the wafer, and a device chip including a non-defective semiconductor device is fitted into the removal region formed by the removal of the defective device region. Thereby, a wafer not including a defective device can be manufactured. Further, by laminating wafers not including defective devices to form a laminated wafer and dividing this laminated wafer, a laminated device chip not including a defective device can be manufactured. As a result, a decrease in the yield of the laminated device chip is suppressed.

[0017] Further, in the method for manufacturing a wafer according to the present embodiment, before a device chip is fitted into the removal region formed by the removal of the defective device region, the removal region is expanded. Therefore, even when the size of the removal region is not sufficient at the stage where the defective device region has been removed, the device chip can be surely fitted into the removal region. Thereby, operations such as adjustment of the dimensions of the device chip and remaking of the device chip become unnecessary, and it becomes possible to efficiently manufacture a wafer not including a defective device.

Brief Description of the Drawings

[0018]

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Mode for Carrying Out the Invention

[0019] (Embodiment 1) Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. First, a configuration example of a wafer that can be used in the present embodiment will be described. FIG. 1(A) is a perspective view showing a wafer 11, and FIG. 1(B) is a cross-sectional view showing the wafer 11.

[0020] For example, the wafer 11 is a silicon wafer formed in a disk shape, and includes a surface (first surface) 11a and a back surface (second surface) 11b on the side opposite to the surface 11a. The surface 11a and the back surface 11b are formed substantially parallel to each other.

[0021] The wafer 11 is partitioned into a plurality of rectangular regions by a plurality of streets (division planned lines) 13 arranged in a grid pattern so as to intersect each other. Then, semiconductor devices 15 such as IC (Integrated Circuit), LSI (Large Scale Integration), LED (Light Emitting Diode), and MEMS (Micro Electro Mechanical Systems) are formed in each of the plurality of regions partitioned by the streets 13 on the surface 11a side of the wafer 11.

[0022] Note that there are no restrictions on the material, shape, structure, size, etc. of the wafer 11. For example, the wafer 11 may be a wafer made of a semiconductor other than silicon (GaAs, InP, GaN, SiC, etc.), glass, ceramics, resin, metal, etc. Also, there are no restrictions on the type, quantity, shape, structure, size, arrangement, etc. of the semiconductor devices 15.

[0023] FIG. 1(C) is a perspective view showing the semiconductor device 15. For example, the semiconductor device 15 includes a plurality of electrodes 17 that are exposed on the surface of the semiconductor device 15 and are connected to other wirings, electrodes, semiconductor devices, etc. Note that connection electrodes such as bumps may be formed on the surface of the electrode 17.

[0024] Also, a plurality of electrodes (via electrodes, through electrodes) 19 are embedded inside each of the plurality of regions partitioned by the streets 13 of the wafer 11. The electrodes 19 are formed in a columnar shape along the thickness direction of the wafer 11 and are connected to the electrodes 17 of the semiconductor device 15. Note that the material of the electrode 19 is not limited, and for example, metals such as copper, tungsten, and aluminum are used.

[0025] Each of the electrodes 19 is formed from the semiconductor device 15 toward the back surface 11b side of the wafer 11, and the length (height) of the electrode 19 is less than the thickness of the wafer 11. Therefore, the electrode 19 is not exposed on the back surface 11b side of the wafer 11 and is in a state of being buried inside the wafer 11. Also, an insulating layer (not shown) for insulating the wafer 11 and the electrode 19 is provided between the wafer 11 and the electrode 19.

[0026] When the wafer 11 is thinned by performing grinding, etching, or the like on the back surface 11b side of the wafer 11, the electrode 19 is exposed on the back surface 11b side of the wafer 11. Then, when a plurality of wafers 11 in a state where the electrode 19 is exposed on the back surface 11b side are stacked, a stacked wafer including a plurality of semiconductor devices 15 stacked so as to overlap each other is obtained. The stacked semiconductor devices 15 are connected to each other via the electrode 19.

[0027] The stacked wafer is divided along the street 13 by cutting, laser processing, or the like. As a result, a device chip (stacked device chip) including a plurality of stacked semiconductor devices 15 is manufactured.

[0028] Note that the wafer 11 may contain defective semiconductor devices 15 (defective devices). FIGS. 1(A) and 1(B) show an example in which the wafer 11 contains a defective device 15a. For example, the defective device 15a corresponds to a semiconductor device 15 that does not meet a predetermined standard of electrical characteristics.

[0029] By laminating wafers 11 containing the defective device 15a to form a laminated wafer, and dividing this laminated wafer, a laminated device chip containing the defective device 15a is manufactured. Then, if some of the semiconductor devices 15 included in the laminated device chip are the defective device 15a, even if the other semiconductor devices 15 are non-defective, the entire laminated device chip is determined to be a defective product (defective chip).

[0030] Therefore, in the method for manufacturing a wafer according to the present embodiment, the defective device 15a is removed from the wafer 11. Then, a non-defective semiconductor device 15 is fitted into the removal region (gap) formed in the wafer 11 by removing the defective device 15a. Thereby, a wafer 11 that does not contain the defective device 15a is manufactured. Hereinafter, a specific example of the method for manufacturing a wafer according to the present embodiment will be described.

[0031] First, a wafer 11 (see FIGS. 1(A) and 1(B)) in which semiconductor devices 15 are formed in a plurality of regions partitioned by a plurality of streets 13 intersecting each other is prepared (wafer preparation step). In order to form a laminated wafer by laminating a plurality of wafers in a later process, it is preferable to prepare at least two or more wafers in the wafer preparation step.

[0032] Next, the wafer 11 is ground and thinned (grinding step). For example, a grinding device is used for grinding the wafer 11. FIG. 2 is a front view showing the grinding device 2. The grinding device 2 includes a chuck table 4 that holds the wafer 11 and a grinding unit 6 that grinds the wafer 11.

[0033] The upper surface of the chuck table 4 constitutes a flat holding surface 4a for holding the wafer 11. The holding surface 4a is connected to a suction source (not shown), such as an ejector, via a flow path (not shown) formed inside the chuck table 4. Further, a moving mechanism (not shown) for moving the chuck table 4 along the horizontal direction is connected to the chuck table 4. As the moving mechanism, a ball screw type moving mechanism, a turntable that supports and rotates the chuck table 4, or the like is used. Furthermore, a rotation drive source (not shown), such as a motor, for rotating the chuck table 4 around a rotation axis substantially parallel to the vertical direction (up and down direction) is connected to the chuck table 4.

[0034] Above the chuck table 4, a grinding unit 6 is arranged. The grinding unit 6 includes a cylindrical spindle 8 arranged along the vertical direction. A disk-shaped mount 10 made of metal or the like is fixed to the tip (lower end) of the spindle 8. Further, a rotation drive source (not shown), such as a motor, for rotating the spindle 8 is connected to the base end (upper end) of the spindle 8.

[0035] A grinding wheel 12 for grinding the wafer 11 is mounted on the lower surface side of the mount 10. The grinding wheel 12 includes an annular base 14 made of metal such as stainless steel or aluminum and formed to have substantially the same diameter as the mount 10. A plurality of grinding wheels 16 are fixed to the lower surface side of the base 14. For example, the plurality of grinding wheels 16 are formed in a rectangular parallelepiped shape and are arranged at substantially equal intervals along the outer periphery of the base 14.

[0036] The grinding wheel 12 rotates around a rotation axis substantially parallel to the vertical direction by the power transmitted from the rotation drive source via the spindle 8 and the mount 10. Further, a ball screw type moving mechanism (not shown) for raising and lowering the grinding unit 6 along the vertical direction is connected to the grinding unit 6. Furthermore, in the vicinity of the grinding unit 6, a nozzle 18 for supplying a grinding fluid 20, such as pure water, to the wafer 11 held by the chuck table 4 and the plurality of grinding wheels 16 is provided.

[0037] The back surface 11b side of the wafer 11 is ground by the grinding device 2. In this case, first, the protective member 21 is adhered to the front surface 11a side of the wafer 11 on which the semiconductor device 15 is formed. Thereby, the semiconductor device 15 is covered and protected by the protective member 21.

[0038] As the protective member 21, a circular tape (protective tape) including a film-like base material and an adhesive layer (paste layer) on the base material can be used. For example, the base material is made of a resin such as polyolefin, polyvinyl chloride, or polyethylene terephthalate, and the adhesive layer is made of an epoxy-based, acrylic-based, or rubber-based adhesive. Also, as the adhesive layer, an ultraviolet curable resin that cures by irradiation with ultraviolet rays may be used.

[0039] Then, the wafer 11 is held by the chuck table 4. Specifically, the wafer 11 is placed on the chuck table 4 such that the front surface 11a side (the protective member 21 side) faces the holding surface 4a and the back surface 11b side is exposed upward. In this state, when a negative pressure of a suction source is applied to the holding surface 4a, the front surface 11a side of the wafer 11 is suction-held by the chuck table 4 via the protective member 21.

[0040] Next, the chuck table 4 is moved below the grinding unit 6. Then, while rotating the chuck table 4 and the grinding wheel 12 in a predetermined direction at a predetermined rotational speed, the grinding wheel 12 is lowered toward the chuck table 4. The lowering speed of the grinding wheel 12 at this time is adjusted so that the grinding wheel 16 is pressed against the wafer 11 with an appropriate force.

[0041] When the grinding wheel 16 contacts the back surface 11b side of the wafer 11, the back surface 11b side of the wafer 11 is scraped off. Thereby, the back surface 11b side of the wafer 11 is ground and the wafer 11 is thinned. Then, when the wafer 11 is thinned to a predetermined thickness, the grinding is stopped. After that, the protective member 21 is peeled off from the wafer 11 and removed.

[0042] Before or after the grinding step, an inspection is performed to determine whether each of the semiconductor devices 15 included in the wafer 11 is a good product or a defective product. In the inspection of the semiconductor device 15, for example, a metal probe (probe) is applied to the electrode 17 exposed on the surface of the semiconductor device 15 to measure the electrical characteristics of the semiconductor device 15 (probing). Then, based on whether the measured electrical characteristics meet a predetermined standard, it is determined whether the semiconductor device 15 is a good product or a defective product.

[0043] If the wafer 11 contains a defective semiconductor device 15 (defective device 15a), the semiconductor device 15 is determined to be a defective product by the inspection. Then, the position of the semiconductor device 15 determined to be a defective product is recorded.

[0044] Next, a defective device region including the semiconductor device 15 (defective device 15a) determined to be a defective product among the plurality of semiconductor devices 15 formed on the wafer 11 is removed from the wafer 11 (removal step). FIG. 3(A) is a cross-sectional view showing the wafer 11 in the removal step.

[0045] For example, in the removal step, the wafer 11 is removed along the four streets 13 surrounding the defective device 15a. As a result, a rectangular parallelepiped-shaped defective device region 11c including the defective device 15a is cut out and separated from the wafer 11. Then, at the location where the defective device region 11c of the wafer 11 existed, a rectangular parallelepiped-shaped through hole (removal region) 11d extending from the front surface 11a to the back surface 11b of the wafer 11 is formed.

[0046] FIG. 3(B) is a perspective view showing a wafer 11 in which a through hole 11d is formed. By removing the defective device region 11c, a wafer 11 that does not include defective devices 15a is obtained. Note that, before performing the removal step, if the above-described grinding step (see FIG. 2) is performed, the wafer 11 is thinned, and it becomes easier to remove the defective device region 11c from the wafer 11. However, if there is no problem in removing the defective device region 11c, the grinding step may be omitted.

[0047] Various methods can be used to remove the defective device region 11c. For example, the defective device region 11c is separated from the wafer 11 by irradiating a laser beam along a street 13 surrounding the defective device 15a. Hereinafter, an example in which the wafer 11 is laser processed in the removal step will be described.

[0048] FIG. 4(A) is a cross-sectional view showing a wafer 11 irradiated with a laser beam 32A. In the removal step, first, the surface 11a side of the wafer 11 is fixed to a support substrate 23 that supports the wafer 11. For example, the support substrate 23 is a plate-like member made of silicon, glass, ceramics, or the like, and the surface 11a side of the wafer 11 is fixed to the support substrate 23 via an adhesive layer 25. Thereby, the wafer 11 is supported by the support substrate 23 with the back surface 11b side exposed.

[0049] There is no limitation on the material of the adhesive layer 25, and it is appropriately selected according to the materials of the wafer 11 and the support substrate 23. For example, as the adhesive layer 25, an adhesive made of a thermosetting resin that cures by heating, an adhesive made of a thermoplastic resin that softens by heating, an adhesive made of an ultraviolet curable resin that cures by irradiation with ultraviolet rays, or the like can be used.

[0050] Further, the adhesive layer 25 may be a sheet (thermocompression bonding sheet) that can be fixed to the wafer 11 and the support substrate 23 by heating and pressurization. For example, the adhesive layer 25 is a flexible sheet made of a thermoplastic resin having a melting point lower than that of the wafer 11 and the support substrate 23, and does not contain an adhesive (paste layer). When the wafer 11 is pressed against the support substrate 23 through the thermocompression bonding sheet while heating the thermocompression bonding sheet, the thermocompression bonding sheet adheres closely to the wafer 11 and the support substrate 23. Thereby, the wafer 11 is fixed to the support substrate 23. Specific examples of the sheet include a polyolefin (PO)-based sheet and a polyester (PE)-based sheet.

[0051] The polyolefin-based sheet is a sheet made of a polymer synthesized using an alkene as a monomer. Examples of the polyolefin-based sheet include a polyethylene sheet, a polypropylene sheet, and a polystyrene sheet. Further, a sheet made of a copolymer of propylene and ethylene or a sheet made of an olefin-based elastomer can also be used.

[0052] The polyester-based sheet is a sheet made of a polymer synthesized using a dicarboxylic acid (a compound having two carboxyl groups) and a diol (a compound having two hydroxyl groups) as monomers. Examples of the polyester-based sheet include a polyethylene terephthalate sheet and a polyethylene naphthalate sheet. Further, a polytrimethylene terephthalate sheet, a polybutylene terephthalate sheet, or polybutylene naphthalate can also be used.

[0053] When fixing the wafer 11 to the support substrate 23 via the adhesive layer 25, it is preferable that the adhesive layer 25 is not firmly adhered to the wafer 11 and the support substrate 23, but the wafer 11 is temporarily fixed to the support substrate 23. Thereby, when separating the defective device region 11c from the wafer 11 in a later process (see FIG. 8(B)), the defective device region 11c is easily peeled off from the adhesive layer 25.

[0054] For example, when the adhesive layer 25 is an adhesive made of a thermosetting resin, a heat treatment at a lower temperature or for a shorter time is performed than when the thermosetting resin is completely fixed to the wafer 11 and the support substrate 23, and the wafer 11 is fixed to the support substrate 23. Further, when the adhesive layer 25 is an adhesive made of a thermoplastic resin, the wafer 11 is fixed to the support substrate 23 in a state where the thermoplastic resin is heated to a predetermined temperature and softened.

[0055] When the adhesive layer 25 is an adhesive made of an ultraviolet curable resin, the wafer 11 is fixed to the support substrate 23 without performing a heat treatment on the ultraviolet curable resin. Further, when the adhesive layer 25 is a thermocompression bonding sheet, a heat treatment at a lower temperature or for a shorter time is performed than when the thermocompression bonding sheet is completely fixed to the wafer 11 and the support substrate 23, and the wafer 11 is fixed to the support substrate 23.

[0056] Alternatively, instead of the support substrate 23, a tape made of resin or the like may be attached to the surface 11a side of the wafer 11. Examples of the structure and material of the tape are the same as those of the protective member 21 (see FIG. 2).

[0057] Next, laser processing is performed on the wafer 11. A laser processing apparatus is used for the laser processing of the wafer 11. The laser processing apparatus includes a chuck table (not shown) that holds the wafer 11 and a laser irradiation unit 30A that irradiates the wafer 11 with a laser beam 32A. The laser irradiation unit 30A includes a laser oscillator that oscillates a laser of a predetermined wavelength and a condenser (condensing lens) that condenses the laser beam emitted from the laser oscillator.

[0058] The irradiation conditions of the laser beam 32A are set such that the area of the wafer 11 irradiated with the laser beam 32A is modified (altered) by multiphoton absorption. Specifically, the wavelength of the laser beam 32A is set such that at least a part of the laser beam 32A penetrates the wafer 11. That is, the laser irradiation unit 30A irradiates the wafer 11 with a laser beam 32A having a wavelength that is transmissive to the wafer 11. Also, other irradiation conditions (output, pulse width, spot diameter, repetition frequency, etc.) of the laser beam 32A are set such that the wafer 11 is appropriately modified.

[0059] Then, with the focus point of the laser beam 32A positioned inside the wafer 11, the laser beam 32A is irradiated along the four streets 13 surrounding the defective device 15a. Note that the laser beam 32A only needs to be irradiated so as to surround the defective device 15a, and the specific scanning path of the laser beam 32A is set as appropriate.

[0060] Examples of the scanning paths of the laser beam 32A are shown in FIGS. 5(A) to 5(C). FIG. 5(A) is a plan view showing a path 34A having a rounded rectangular shape, FIG. 5(B) is a plan view showing a path 34B having a rectangular shape, and FIG. 5(C) is a plan view showing a plurality of linear paths 34C. The path 34A, the path 34B, and the plurality of paths 34C are each set to overlap with the street 13.

[0061] For example, the laser beam 32A is scanned along a substantially rectangular path 34A with rounded corners so as to surround the defective device 15a. Also, the laser beam 32A may be scanned along a rectangular path 34B surrounding the defective device 15a. When the laser beam 32A is scanned along the path 34A or the path 34B, the wafer 11 is continuously irradiated (drawn in one stroke) with the laser beam 32A so as to surround the defective device 15a.

[0062] Further, the laser beam 32A may be scanned along four linear paths 34C along the four streets 13 surrounding the defective device 15a. Note that the paths 34C are not connected to each other, and the laser beam 32A is intermittently irradiated so as to surround the defective device 15a.

[0063] FIG. 4(B) is a cross-sectional view showing the wafer 11 in which the modified layer (altered layer) 27 is formed. When the laser beam 32A is irradiated along the street 13 surrounding the defective device 15a, the wafer 11 is modified by multi-photon absorption, and the modified layer 27 is formed along the street 13 inside the wafer 11. Then, the region where the modified layer 27 is formed becomes more brittle than other regions of the wafer 11. Therefore, for example, when an external force is applied to the wafer 11, the wafer 11 breaks along the modified layer 27. That is, the modified layer 27 functions as a starting point (trigger) for the separation of the defective device region 11c.

[0064] In particular, it has been confirmed that when the laser beam 32A is irradiated along the path 34A shown in FIG. 5(A) or the path 34C shown in FIG. 5(C), the occurrence of unintended irregular cracks (cracks) at the four corners (corner portions) of the paths 34A and 34C is effectively suppressed. In this case, the modified layer 27 formed at the four corners of the paths 34A and 34C functions correctly as a starting point for division, and the defective device region 11c is more likely to be accurately separated.

[0065] Note that the modified layer 27 may be formed by irradiating the laser beam 32A a plurality of times along each street 13 while changing the height position of the focus point of the laser beam 32A. In this case, the modified layer 27 is composed of modified regions formed in a plurality of stages along the thickness direction of the wafer 11.

[0066] FIG. 4(C) is a cross-sectional view showing the modified layer 27 including a plurality of modified regions (altered regions) 27a. For example, inside the wafer 11, a plurality of stages of modified regions 27a are formed at different depth positions in the thickness direction of the wafer 11 along each street 13.

[0067] Note that the plurality of modification regions 27a may be formed so as not to overlap in a plan view. Specifically, as shown in FIG. 4(C), the plurality of modification regions 27a are formed at positions farther from the defective device 15a in the horizontal direction (a direction perpendicular to the thickness direction of the wafer 11) as the modification regions 27a formed on the back surface 11b side of the wafer 11. In this case, a modified layer 27 inclined with respect to the thickness direction of the wafer 11 is formed (see FIG. 4(B)), and it becomes easier to separate the defective device region 11c from the wafer 11 in a later process (see FIG. 8(B)). However, there is no limitation on the shape of the modified layer 27, and the modified layer 27 may be formed parallel to the thickness direction of the wafer 11.

[0068] Next, by grinding the back surface 11b side of the wafer 11, the processed region (modified layer 27) processed by the irradiation of the laser beam 32A or the crack that has propagated from the processed region (modified layer 27) is exposed on the back surface 11b side of the wafer 11. For example, the grinding apparatus 2 shown in FIG. 2 is used for grinding the wafer 11.

[0069] By bringing the grinding wheel 16 into contact with the back surface 11b side of the wafer 11 held by the chuck table 4, the back surface 11b side of the wafer 11 is ground. Then, for example, the wafer 11 is ground and thinned until the modified layer 27 is exposed on the back surface 11b side of the wafer 11.

[0070] FIG. 6 is a cross-sectional view showing the wafer 11 after grinding. When the grinding wheel 16 (see FIG. 2) is pressed against the wafer 11 to grind the wafer 11, an external force (pressure) is applied to the wafer 11, and the wafer 11 breaks along the modified layer 27. In addition, the crack 29 generated in the modified layer 27 propagates and reaches the surface 11a of the wafer 11. As a result, the defective device region 11c is separated from the wafer 11.

[0071] Note that cracks 29 that progress from the modified layer 27 to the surface 11a of the wafer 11 may occur when the modified layer 27 is formed by irradiation with the laser beam 32A (see FIGS. 4(A) and 4(B)). Specifically, by appropriately setting the irradiation conditions of the laser beam 32A and the position where the modified layer 27 is formed, the cracks 29 that occur simultaneously with the formation of the modified layer 27 can reach the surface 11a of the wafer 11.

[0072] Further, after the wafer 11 is ground, it is preferable to perform an etching process on the wafer 11. For example, the wafer 11 is subjected to plasma etching. A plasma processing apparatus is used for plasma etching. The plasma processing apparatus includes a chuck table having a holding surface for holding the wafer 11 and a chamber (processing chamber) for accommodating the chuck table.

[0073] FIG. 7(A) is a cross-sectional view showing the wafer 11 to which plasma etching is applied. When performing plasma etching, with the wafer 11 held by the chuck table, the chamber is sealed, and an etching gas (etching gas) 36 is supplied into the chamber. Then, the plasma processing apparatus turns the gas 36 in the chamber into a plasma state containing ions and radicals by applying a high-frequency voltage. Thereby, the plasmaized gas 36 is supplied to the wafer 11.

[0074] For example, when the wafer 11 is a silicon wafer, fluorine-based gases such as CF4 and SF6 are used as the gas 36. However, the components of the gas 36 are appropriately selected according to the material of the wafer 11. Then, the plasma state gas 36 acts on the wafer 11, and the wafer 11 is subjected to plasma etching.

[0075] FIG. 7(B) is a cross-sectional view showing the wafer 11 after plasma etching. When the plasma gas 36 is supplied to the back surface 11b side of the wafer 11, the gas 36 enters the modified layer 27 and the crack 29, and etching is performed inside the modified layer 27 and the crack 29. As a result, the gap between the wafer 11 and the defective device region 11c is expanded, and the defective device region 11c is surely separated from the wafer 11.

[0076] However, the gas 36 may be plasmaized outside the chamber and then supplied into the chamber through a metal supply pipe. In this case, when the plasmaized gas 36 passes through the supply pipe, the ions contained in the gas are adsorbed on the inner wall of the supply pipe, making it difficult to reach the inside of the chamber. As a result, the gas 36 with a high radical ratio is introduced into the chamber and supplied to the wafer 11. Since the gas 36 with a high radical ratio easily enters a narrow region in the wafer 11, it becomes easier to perform an etching process inside the modified layer 27 and the crack 29 by the gas 36.

[0077] Also, the type of etching process is not limited to plasma etching. For example, wet etching may be performed on the wafer 11 by supplying an etching solution to the back surface 11b side of the wafer 11. Specifically, when the wafer 11 is a silicon wafer, an etching solution containing potassium hydroxide (KOH), tetramethylammonium hydroxide (TMAH), etc. is supplied to the wafer 11. Then, when the etching solution enters the modified layer 27 and the crack 29, etching is performed inside the modified layer 27 and the crack 29, and the modified layer 27 and the crack 29 are expanded.

[0078] When the modified layer 27 (see FIG. 4(B)) formed by the irradiation of the laser beam 32A exists on the back surface 11b side of the wafer 11 rather than the electrode 19, it is preferable to grind and thin the wafer 11 until the entire modified layer 27 is removed. In this case, a wafer 11 is obtained that does not include the modified layer 27 and only the crack 29 that has progressed from the modified layer 27 remains. By removing the modified layer 27 from the wafer 11 in this way, a decrease in the flexural strength (bending strength) of the device chip obtained by finally dividing the wafer 11 is prevented.

[0079] When the modified layer 27 is removed from the wafer 11 as described above, the crack 29 is exposed on the back surface 11b side of the wafer 11 by grinding, and the defective device region 11c is separated from the wafer 11. Then, the plasmaized gas 36 or the etching solution is supplied into the crack 29, and the crack 29 is expanded.

[0080] Also, when the modified layer 27 is formed by the irradiation of the laser beam 32A (see FIGS. 4(A) and 4(B)), or when the back surface 11b side of the wafer 11 is ground (see FIG. 6), cracks (cracks) may occur that progress from the modified layer 27 toward the back surface 11b side of the wafer 11. In this case, when the crack is exposed on the back surface 11b of the wafer 11 by grinding the wafer 11, the defective device region 11c is separated from the wafer 11.

[0081] Next, the defective device region 11c is removed from the wafer 11. Specifically, the defective device region 11c is separated from the wafer 11 by peeling the defective device region 11c from the adhesive layer 25 and picking it up.

[0082] When separating the defective device region 11c from the wafer 11, it is preferable to first perform a process (pre-treatment) for partially reducing the adhesive strength of the adhesive layer 25. For example, by supplying a chemical solution to the adhesive layer 25 through the modified layer 27 and the crack 29, the adhesive strength of the adhesive layer 25 is partially reduced, or the adhesive layer 25 is partially removed.

[0083] In addition, when the adhesive layer 25 is made of a material whose adhesive force decreases by applying a predetermined energy (heating, irradiation with electromagnetic waves, etc.), the adhesive force of the adhesive layer 25 may be decreased by applying energy to the adhesive layer 25. For example, when the adhesive layer 25 is an adhesive made of a thermoplastic resin, the adhesive force of the adhesive layer 25 can be decreased by heating the adhesive layer 25. Also, when the adhesive layer 25 is an adhesive made of an ultraviolet curable resin, the adhesive force of the adhesive layer 25 can be decreased by irradiating the adhesive layer 25 with ultraviolet rays.

[0084] Also, as the adhesive layer 25, a tape including a film-like base material, a thermally foaming layer provided on one surface side of the base material, and an adhesive layer provided on the other surface side of the base material can be used. The thermally foaming layer of this tape is formed by incorporating an expanding material that expands by heating into an adhesive.

[0085] As the adhesive of the thermally foaming layer, an acrylic adhesive, a rubber adhesive, a vinyl alkyl ether adhesive, a silicone adhesive, a polyester adhesive, a polyamide adhesive, a urethane adhesive, etc. can be used. Also, as the expanding material of the thermally foaming layer, microspheres (thermally expandable microspheres) that expand by heating, a foaming material that foams by heating, etc. can be used.

[0086] The thermally expandable microspheres are constituted by encapsulating a substance that expands by heating in an elastic microcapsule. As the substance that expands by heating, for example, propane, propylene, butene, etc. can be used. An example of a commercially available product of a tape containing thermally expandable microspheres is Rivarpha (registered trademark) manufactured by Nitto Denko Corporation. Also, as the foaming material that foams by heating, for example, inorganic foaming agents such as ammonium carbonate, ammonium hydrogen carbonate, sodium hydrogen carbonate, ammonium nitrite, sodium borohydride, azides, and various organic foaming agents can be used.

[0087] The above tape is adhered to the wafer 11 and the support substrate 23 such that the thermally foamed layer side contacts the wafer 11 and the adhesive layer side contacts the support substrate 23. When the tape is heated, the expanding material contained in the thermally foamed layer expands in the heated area of the tape to form irregularities, and the adhesive force of the tape to the wafer 11 decreases.

[0088] FIG. 8(A) is a cross-sectional view showing the wafer 11 when the adhesive layer 25 is pre-treated. For example, a mask 38 is fixed to the side (lower surface) of the support substrate 23 opposite to the surface (upper surface) to which the wafer 11 is fixed. The mask 38 has an opening 38a penetrating the mask 38 vertically, and is fixed so that the opening 38a overlaps the defective device region 11c.

[0089] Further, an energy applying unit 40 for applying energy to the adhesive layer 25 is disposed below the support substrate 23. The energy applying unit 40 applies energy to the adhesive layer 25 through the opening 38a of the mask 38. The type of energy applied from the energy applying unit 40 to the adhesive layer 25 is selected according to the properties of the adhesive layer 25.

[0090] For example, when the adhesive layer 25 is an adhesive made of a thermoplastic resin or a tape including a thermally foamed layer, a heater is used as the energy applying unit 40. Also, a heat insulating member is used as the mask 38. Then, heat is applied from the energy applying unit 40 to the region of the support substrate 23 overlapping the opening 38a of the mask 38, and the heat of the support substrate 23 is conducted to the adhesive layer 25. Thereby, the region of the adhesive layer 25 overlapping the opening 38a of the mask 38 is partially heated.

[0091] Also, when the adhesive layer 25 is an adhesive made of an ultraviolet-curable resin, a light source (lamp) that irradiates ultraviolet rays is used as the energy application unit 40. Further, a member having ultraviolet transmissivity is used as the support substrate 23, and a member having ultraviolet light-shielding properties is used as the mask 38. Then, ultraviolet rays are irradiated onto the adhesive layer 25 from the energy application unit 40 through the opening 38a of the mask 38 and the support substrate 23. As a result, the region of the adhesive layer 25 that overlaps with the opening 38a of the mask 38 is partially irradiated with ultraviolet rays.

[0092] When energy is applied from the energy application unit 40 to the adhesive layer 25, the adhesive force of the region of the adhesive layer 25 that overlaps with the defective device region 11c is partially reduced. As a result, the defective device region 11c can be easily peeled off from the adhesive layer 25.

[0093] FIG. 8(B) is a cross-sectional view showing the wafer 11 when the defective device region 11c is separated. After performing a pretreatment on the wafer 11 as necessary, the defective device region 11c is held and separated from the wafer 11. As a result, the defective device region 11c is peeled off from the adhesive layer 25 and punched out from the wafer 11.

[0094] Note that when separating the defective device region 11c from the wafer 11, the separation of the defective device region 11c may be assisted by irradiating the wafer 11 or the support substrate 23 with ultrasonic waves. FIG. 9 is a cross-sectional view showing the ultrasonic irradiation unit 42.

[0095] The ultrasonic irradiation unit 42 includes a box-shaped container 44 formed in a rectangular parallelepiped shape. A liquid 46 such as pure water is stored in the container 44. Further, an ultrasonic transmitter 48 that emits ultrasonic waves is provided in the container 44.

[0096] The wafer 11 with the modified layer 27 and the crack 29 formed thereon is accommodated in the container 44 so as to be immersed in the liquid 46. At this time, the wafer 11 is arranged, for example, such that the support substrate 23 faces the ultrasonic transmitter 48. In this state, when the ultrasonic transmitter 48 transmits ultrasonic waves, the ultrasonic waves propagate through the liquid 46 as a medium and reach the support substrate 23, and vibrations (ultrasonic vibrations) at a frequency belonging to the ultrasonic band are imparted to the support substrate 23.

[0097] Even if the wafer 11 is not sufficiently broken along the modified layer 27 and the crack 29, when ultrasonic vibrations are imparted to the support substrate 23, the breakage of the wafer 11 is promoted by the vibration of the support substrate 23. Further, the bonding between the defective device region 11c and the adhesive layer 25 is weakened by the vibration of the support substrate 23. As a result, the defective device region 11c is likely to be separated from the wafer 11. Note that the ultrasonic waves may be partially irradiated to the region of the support substrate 23 that overlaps with the defective device region 11c.

[0098] In this way, the defective device region 11c is separated from the wafer 11. Then, a through hole 11d that penetrates the wafer 11 in the thickness direction is formed at the location where the defective device region 11c of the wafer 11 existed (see FIG. 8(B)).

[0099] Note that, as an example above, the method of breaking the wafer 11 along the modified layer 27 and the crack 29 formed by the irradiation of the laser beam 32A has been described. However, the content of the laser processing applied to the wafer 11 is not limited to the formation of the modified layer 27 and the crack 29. For example, in the removal step, the defective device region 11c can also be separated from the wafer 11 by performing ablation processing on the wafer 11.

[0100] FIG. 10(A) is a cross-sectional view showing a wafer 11 irradiated with a laser beam 32B. When performing ablation processing on the wafer 11, a laser irradiation unit 30B that irradiates the wafer 11 with the laser beam 32B is used. Note that the configuration of the laser irradiation unit 30B is the same as that of the laser irradiation unit 30A (see FIG. 4(A)).

[0101] However, the irradiation conditions of the laser beam 32B are set such that the region of the wafer 11 irradiated with the laser beam 32B is removed by ablation processing. Specifically, the wavelength of the laser beam 32B is set such that at least a part of the laser beam 32B is absorbed by the wafer 11. That is, the laser irradiation unit 30B irradiates the wafer 11 with a laser beam 32B having a wavelength that is absorbent to the wafer 11. Also, other irradiation conditions of the laser beam 32B are set such that ablation processing is appropriately performed on the wafer 11.

[0102] For example, the laser beam 32B is irradiated onto the surface 11a side of the wafer 11. Specifically, the wafer 11 is held by a chuck table (not shown) of a laser processing apparatus such that the surface 11a side is exposed. Then, with the condensing point of the laser beam 32B positioned on the street 13 of the wafer 11, the laser beam 32B is irradiated along the four streets 13 surrounding the defective device 15a. Note that there is no restriction on the scanning path of the laser beam 32B. For example, the laser beam 32B is scanned along the path 34A or path 34B shown in FIGS. 5(A) and 5(B).

[0103] FIG. 10(B) is a cross-sectional view showing the wafer 11 in which grooves 31 are formed. When the laser beam 32B is irradiated along the four streets 13 surrounding the defective device 15a, the region along the street 13 on the surface 11a side of the wafer 11 is removed by ablation processing. As a result, rectangular grooves 31 are formed along the streets 13 on the surface 11a side of the wafer 11 in plan view.

[0104] Note that there is no limitation on the shape of the groove 31. For example, the groove 31 may be formed to have a constant width in the thickness direction of the wafer 11, or may be formed to have a wider width toward the back surface 11b side of the wafer 11 as shown in FIG. 10(B).

[0105] Also, when forming the groove 31, the surface 11a side of the wafer 11 may be covered with a protective film, and the wafer 11 may be irradiated with a laser beam 32B through the protective film. For example, as the protective film, a resin tape or a film made of a water-soluble resin such as PVA (polyvinyl alcohol) or PEG (polyethylene glycol) can be used. When a protective film is formed on the surface 11a side of the wafer 11, it is possible to prevent the processing debris (debris) generated during the ablation process from adhering to the surface 11a of the wafer 11, and contamination of the wafer 11 and the semiconductor device 15 can be avoided.

[0106] Further, an etching process may be performed on the wafer 11 by supplying a plasma gas or an etching solution to the processed region (groove 31) processed by the irradiation of the laser beam 32B. Thereby, the groove 31 is expanded and the fine unevenness formed on the inner wall of the groove 31 by the ablation process is removed.

[0107] When performing the etching process on the wafer 11, it is preferable to form a mask that covers the surface 11a side of the wafer 11. This mask is provided with an opening that exposes the region of the wafer 11 where the groove 31 is formed. Then, the plasma gas or the etching solution is supplied to the wafer 11 through the mask. Thereby, the semiconductor device 15 formed on the surface 11a side of the wafer 11 is protected.

[0108] Note that there is no limitation on the material of the mask used for the etching process. For example, a resist made of a photosensitive resin is used as the mask. Also, as the mask, the above-described protective film (PVA, PEG, etc.) formed on the surface 11a side of the wafer 11 during the irradiation of the laser beam 32B can also be used.

[0109] Next, by grinding the back surface 11b side of the wafer 11, the processed region (groove 31) processed by the irradiation of the laser beam 32B is exposed on the back surface 11b side of the wafer 11. When grinding the wafer 11, first, the wafer 11 is fixed to the support substrate. FIG. 11(A) is a cross-sectional view showing the wafer 11 fixed to the support substrate 23. When grinding the back surface 11b side of the wafer 11, the front surface 11a side of the wafer 11 is fixed to the support substrate 23 via the adhesive layer 25.

[0110] Next, the wafer 11 is ground by the grinding device 2 (see FIG. 2). Specifically, the back surface 11b side of the wafer 11 is ground by bringing the grinding wheel 16 into contact with the back surface 11b side of the wafer 11. Then, the wafer 11 is ground and thinned until the groove 31 is exposed on the back surface 11b side of the wafer 11.

[0111] FIG. 11(B) is a cross-sectional view showing the wafer 11 after grinding. When the groove 31 is exposed on the back surface 11b side of the wafer 11, the defective device region 11c is separated from the wafer 11. Thereafter, as described above, the defective device region 11c is separated from the wafer 11, and a through hole 11d is formed in the wafer 11 (see FIGS. 8(A), 8(B), and 9).

[0112] Also, in the removal step, the wafer 11 may be cut by irradiating a laser beam. Specifically, by ablation processing, a kerf (cut) extending from the front surface 11a to the back surface 11b of the wafer 11 is formed along the street 13.

[0113] FIG. 12(A) is a cross-sectional view showing the wafer 11 irradiated with the laser beam 32C. For cutting the wafer 11, a laser irradiation unit 30C that irradiates the wafer 11 with the laser beam 32C is used. Note that the configuration of the laser irradiation unit 30C is the same as that of the laser irradiation unit 30A (see FIG. 4(A)).

[0114] However, the irradiation conditions of the laser beam 32C are set such that the region from the front surface 11a to the back surface 11b of the wafer 11 is removed by ablation processing. Specifically, the wavelength of the laser beam 32C is set such that at least a part of the laser beam 32C is absorbed by the wafer 11. That is, the laser irradiation unit 30C irradiates the wafer 11 with a laser beam 32C having a wavelength that is absorbable by the wafer 11. Also, the other irradiation conditions of the laser beam 32C are set such that the region from the front surface 11a to the back surface 11b of the wafer 11 is removed.

[0115] When irradiating the wafer 11 with the laser beam 32C, first, a protective member 33 such as a tape is attached to the wafer 11. For example, when irradiating the front surface 11a side of the wafer 11 with the laser beam 32C, a tape is attached as the protective member 33 to the back surface 11b side of the wafer 11.

[0116] Next, the laser beam 32C is irradiated onto the front surface 11a side of the wafer 11. Specifically, with the condensing point of the laser beam 32C positioned on the street 13 of the wafer 11, the laser beam 32C is irradiated along the four streets 13 surrounding the defective device 15a. Note that there is no restriction on the scanning path of the laser beam 32C. For example, the laser beam 32C is scanned along the path 34A or path 34B shown in FIGS. 5(A) and 5(B).

[0117] When the laser beam 32C is irradiated along the street 13 surrounding the defective device 15a, the wafer 11 is removed along the street 13. As a result, a kerf (cut) 35 extending from the front surface 11a to the back surface 11b is formed along the street 13 on the wafer 11. As a result, the defective device region 11c is separated from the wafer 11.

[0118] In the case where it is difficult to form the kerf 35 reaching the back surface 11b of the wafer 11 by simply scanning the laser beam 32C once along the street 13, the laser beam 32C may be scanned a plurality of times along each street 13. Thereafter, as described above, the defective device region 11c is separated from the wafer 11, and the through hole 11d is formed in the wafer 11 (see FIGS. 8(A), 8(B), and 9).

[0119] After the defective device region 11c is separated from the wafer 11, the wafer 11 is fixed to the support substrate 23. FIG. 12(B) is a cross-sectional view showing the wafer 11 fixed to the support substrate 23. After the kerf 35 is formed in the wafer 11 and the defective device region 11c is separated, the support substrate 23 is fixed to the surface 11a side of the wafer 11 via the adhesive layer 25. Thereafter, the protective member 33 is peeled off and removed from the back surface 11b side of the wafer 11.

[0120] Also, in the removal step, the wafer 11 can be processed by a laser beam (aqueous laser) irradiated through a liquid. FIG. 13(A) is a cross-sectional view showing the wafer 11 irradiated with the laser beam 32C through the liquid column 50.

[0121] The laser irradiation unit 30C may incorporate an injection unit (nozzle) that injects a liquid toward the wafer 11. In this case, by continuously supplying the liquid from the injection unit to the wafer 11, the liquid column 50 reaching from the laser irradiation unit 30C to the wafer 11 is formed. The liquid column 50 is a column composed of the flowing liquid and functions as an optical path for propagating the laser beam 32C. For example, water is injected from the injection unit and a water column is formed.

[0122] The wafer 11 is held by the holding table 52. The upper surface of the holding table 52 constitutes a flat holding surface 52a for holding the wafer 11. Further, the holding table 52 is provided with an opening 52b that penetrates the holding table 52 vertically. The opening 52b is formed in a rectangular shape in plan view corresponding to the four streets 13 surrounding the semiconductor device 15. The wafer 11 is placed on the holding table 52 such that the four streets 13 surrounding the defective device 15a overlap the opening 52b respectively.

[0123] Then, a liquid is ejected from the laser irradiation unit 30C to form a liquid column 50, and a laser beam 32C is irradiated from the laser irradiation unit 30C. At this time, the focal point of the laser beam 32C is positioned inside the liquid column 50. Then, the laser beam 32C is irradiated onto the wafer 11 through the liquid column 50.

[0124] As described above, when the laser beam 32C is irradiated onto the liquid column 50, the laser beam 32C can be guided to the street 13 of the wafer 11 without precisely controlling the height position of the focal point of the laser beam 32C. Further, the processing debris generated by the laser processing is washed away by the liquid.

[0125] Then, the laser beam 32C is scanned along the street 13 together with the liquid column 50. Thereby, a kerf 35 is formed along the street 13 on the wafer 11, and the defective device region 11c is separated from the wafer 11. The liquid ejected from the laser irradiation unit 30C is discharged through the opening 52b provided in the holding table 52.

[0126] Thereafter, the wafer 11 is fixed to the support substrate. FIG. 13(B) is a cross-sectional view showing the wafer 11 fixed to the support substrate 23. After the kerf 35 is formed in the wafer 11 and the defective device region 11c is separated, the support substrate 23 is fixed to the surface 11a side of the wafer 11 via the adhesive layer 25.

[0127] In addition, an etching process may be performed by supplying a gas converted into plasma or an etching liquid to a processed region (kerf 35) processed by irradiation with the laser beam 32C. As a result, the kerf 35 is expanded, and fine irregularities formed on the inner wall of the kerf 35 by ablation processing are removed.

[0128] In the above description, the method of separating the defective device region 11c from the wafer 11 by laser processing has been described. However, a method other than laser processing can also be used to separate the defective device region 11c. For example, so-called plasma dicing, in which the wafer 11 is cut by plasma etching, can also be used.

[0129] When performing plasma dicing, first, the support substrate 23 is fixed to the surface 11a side of the wafer 11 (see Fig. 4(A)). Then, a mask for plasma etching is formed on the back surface 11b side of the wafer 11.

[0130] Fig. 14(A) is a cross-sectional view showing the wafer 11 on which the mask layer 37 is formed. The mask layer 37 is made of a material that functions as a mask for plasma etching and is formed so as to cover the entire back surface 11b of the wafer 11. For example, as the mask layer 37, a resist made of a photosensitive resin, a water-soluble resin such as PVA or PEG, can be used.

[0131] Next, a region of the mask layer 37 that overlaps the four streets 13 surrounding the defective device 15a is removed. For example, by irradiating the mask layer 37 with the laser beam 56 from the laser irradiation unit 54, the mask layer 37 is removed along the streets 13. Note that the irradiation conditions of the laser beam 56 are set so that the mask layer 37 is removed by ablation processing when the mask layer 37 is irradiated with the laser beam 56.

[0132] When the laser beam 56 is irradiated onto the mask layer 37 along the four streets 13 surrounding the defective device 15a, a rectangular opening that exposes the four streets 13 is formed in the mask layer 37. As a result, the mask layer 37 is patterned, and a mask 39 for plasma etching (see FIG. 14(B)) is formed.

[0133] Next, the wafer 11 is subjected to plasma etching using the mask 39. For example, the aforementioned plasma processing apparatus is used for the plasma etching of the wafer 11.

[0134] FIG. 14(B) is a cross-sectional view showing the wafer 11 on which plasma etching is performed. When plasma etching is carried out, the plasma-etched etching gas (etching gas) 58 is supplied to the wafer 11 through the opening of the mask 39. As a result, etching is performed on the region along the street 13 surrounding the defective device 15a on the wafer 11, and a groove is formed on the back surface 11b side of the wafer 11.

[0135] FIG. 14(C) is a cross-sectional view showing the wafer 11 after plasma etching. When the groove formed on the back surface 11b side of the wafer 11 reaches the surface 11a as the etching progresses, a kerf 35 extending from the surface 11a to the back surface 11b of the wafer 11 is formed along the street 13, and the defective device region 11c is separated from the wafer 11. Thereafter, the defective device region 11c is separated from the wafer 11, and a through hole 11d is formed in the wafer 11 (see FIGS. 8(A), 8(B), and 9).

[0136] Note that plasma etching may be performed by supplying the plasmaized gas 58 to the surface 11a side of the wafer 11. In this case, before fixing the wafer 11 to the support substrate 23, a mask 39 is formed on the surface 11a side of the wafer 11. Then, the gas 58 is supplied to the wafer 11 through the mask 39, and grooves are formed on the surface 11a side of the wafer 11. When these grooves reach the back surface 11b, a kerf 35 is formed, and the defective device region 11c is separated from the wafer 11. Thereafter, the support substrate 23 is fixed to the surface 11a side of the wafer 11.

[0137] Through the above steps, the defective device region 11c is separated from the wafer 11, and a through hole 11d is formed in the wafer 11. As a result, as shown in FIG. 3(B), a wafer 11 that does not include the defective device 15a is obtained.

[0138] Next, a device chip of a size that can be fitted into the through hole 11d and includes a non-defective semiconductor device 15 of the same type as the defective semiconductor device 15 (defective device 15a) that has been determined to be defective is prepared. For example, a wafer having the same structure as the wafer 11 is used for manufacturing the device chip. FIG. 15(A) is a perspective view showing a wafer 51 for preparing the device chip.

[0139] The wafer 51 is made of the same material as the wafer 11 and includes a surface (first surface) 51a and a back surface (second surface) 51b. The wafer 51 is partitioned into a plurality of regions by a plurality of streets (division planned lines) 53 arranged in a grid pattern so as to intersect each other. Semiconductor devices 55 are formed in the plurality of regions partitioned by the streets 53 on the surface 51a side of the wafer 51, respectively.

[0140] The semiconductor device 55 has the same functions as the semiconductor device 15 shown in Fig. 1(A) and the like. Also, the structure of the semiconductor device 55 is the same as that of the semiconductor device 15, and an electrode (via electrode, through electrode) 57 (see Fig. 18(A)) is connected to the semiconductor device 55. The structure and material of the electrode 57 are the same as those of the electrode 19 shown in Fig. 1(B) and the like.

[0141] By dividing the wafer 51 along the streets 53, a plurality of device chips each including the semiconductor device 55 are manufactured. The division of the wafer 51 is performed, for example, by the aforementioned laser processing or plasma etching.

[0142] Also, a cutting device can be used for dividing the wafer 51. The cutting device includes a chuck table for holding the wafer 51 and a cutting unit for cutting the wafer 51 held by the chuck table. An annular cutting blade is attached to the cutting unit. By rotating the cutting blade and making it cut into the wafer 51, the wafer 51 is divided along the streets 53. As a result, a plurality of device chips each including the semiconductor device 55 are obtained.

[0143] Fig. 15(B) is a perspective view showing the wafer 51 divided into a plurality of device chips 59. Note that, before or after the division of the wafer 11, inspection of the plurality of semiconductor devices 55 formed on the wafer 51 is performed, and it is determined whether each semiconductor device 55 is a good product or a defective product. Then, from the plurality of device chips 59 obtained by dividing the wafer 51, the device chips 59 including the semiconductor device 55 determined to be a defective product are excluded.

[0144] Thereby, device chips 59 each including the same semiconductor device 55 as the good semiconductor device 15 (see Fig. 1(A) and the like) formed on the wafer 11 are obtained. That is, the device chip 59 includes a good semiconductor device 55 (a semiconductor device 55 having the functions that the defective device 15a (see Fig. 1(A) and the like) should originally have) having the same functions as the defective device 15a.

[0145] Note that there is no limitation on the timing for preparing the device chip 59. For example, after the preparation of the wafer 51 and the inspection of the semiconductor device 55 are carried out at the same timing as the preparation of the wafer 11 and the inspection of the semiconductor device 15, the device chip 59 is manufactured by dividing the wafer 51.

[0146] Next, the through hole 11d of the wafer 11 is expanded (expansion step). For example, in the expansion step, the through hole 11d is expanded by heating and expanding the wafer 11. When the through hole 11d is expanded, it becomes easier to fit the device chip 59 into the through hole 11d in the subsequent fitting step.

[0147] FIG. 16(A) is a cross-sectional view showing the heating unit 60. For example, in the expansion step, the wafer 11 is heated by the heating unit 60. As the heating unit 60, a hot plate or the like capable of heating the wafer 11 can be used.

[0148] Specifically, the heating unit 60 includes a columnar plate 62 made of metal or the like. The upper surface of the plate 62 is a flat surface formed along the horizontal direction and constitutes the holding surface 60a of the heating unit 60. Further, a heat source (heater) 64 is provided inside the plate 62. When power is supplied to the heat source 64, the heat source 64 generates heat and the plate 62 is heated.

[0149] For example, the wafer 11 is disposed on the holding surface 60a of the heating unit 60 via the support substrate 23. When the heat source 64 generates heat in this state, the heat of the heat source 64 is transmitted to the plate 62 and the holding surface 60a is heated. As a result, the wafer 11 and the support substrate 23 are heated and expanded. For example, when the wafer 11 and the support substrate 23 are silicon wafers, the heating temperature (the temperature of the heat source 64) can be set to 50°C or higher and 200°C or lower, and the heating time can be set to 10 seconds or longer and 10 minutes or shorter.

[0150] FIG. 16(B) is a cross-sectional view showing the wafer 11 in the expansion step. When the wafer 11 and the support substrate 23 are heated and expanded by the heating unit 60, as the wafer 11 expands, the inner wall of the through hole 11d moves toward the outside of the through hole 11d, and the through hole 11d is expanded. Then, the heating of the wafer 11 is continued until the through hole 11d reaches a desired size. Note that the size of the through hole 11d after expansion can be controlled by adjusting the heating temperature and the heating time.

[0151] Note that there is no limitation on the method of heating the wafer 11. For example, the wafer 11 may be heated by blowing warm air onto the wafer 11. For blowing warm air, a heat gun or the like is used. The heat gun includes a heat source (heating mechanism) such as a heating wire and a blowing mechanism such as a fan, and heats and injects air. Alternatively, the wafer 11 may be heated by irradiating the wafer 11 with infrared rays from an infrared lamp. Further, the wafer 11 may be heated by placing the wafer 11 in an oven.

[0152] In addition, in the expansion step, the through hole 11d can also be expanded by a method other than heating the wafer 11. For example, the through hole 11d may be expanded by supplying a gas in a plasma state (see the gas 36 in FIG. 7(A)) to the through hole 11d and performing plasma etching on the inner wall of the through hole 11d. For example, when the wafer 11 is a silicon wafer, a fluorine-based gas such as CF4 or SF6 is used. The conditions of the plasma etching (etching time, etc.) are appropriately set so that the through hole 11d reaches a desired size.

[0153] Alternatively, the through hole 11d may be expanded by supplying an etching solution to the through hole 11d and performing wet etching on the inner wall of the through hole 11d. For example, when the wafer 11 is a silicon wafer, an etching solution containing potassium hydroxide (KOH), tetramethylammonium hydroxide (TMAH), or the like is used. The conditions of the wet etching (etching time, etc.) are appropriately set so that the through hole 11d reaches a desired size.

[0154] Next, the device chip 59 is fitted into the enlarged through-hole 11d (fitting step). FIG. 17 is a perspective view showing the wafer 11 in the fitting step.

[0155] When the surface 11a side (semiconductor device 15 side) of the wafer 11 is fixed to the support substrate 23, the device chip 59 is positioned such that the surface side (front side) on which the semiconductor device 55 is formed faces the support substrate 23. Then, the device chip 59 is fitted into the through-hole 11d of the wafer 11.

[0156] FIG. 18(A) is a cross-sectional view showing the wafer 11 into which the device chip 59 is fitted. The device chip 59 is fitted into the through-hole 11d so as to contact the adhesive layer 25 exposed within the through-hole 11d. Thereby, the device chip 59 is fixed to the support substrate 23 via the adhesive layer 25.

[0157] Here, the device chip 59 is fitted into the through-hole 11d enlarged by the aforementioned expansion step. Therefore, even if the through-hole 11d is smaller than the device chip 59 immediately after the defective device region 11c is separated from the wafer 11 (see FIG. 8(B)), the device chip 59 can be surely fitted into the through-hole 11d in the fitting step. This eliminates the need for operations such as adjusting the dimensions of the device chip 59 or remaking the device chip 59. Note that the fitting of the device chip 59 into the through-hole 11d may be performed while the heating of the wafer 11 in the aforementioned expansion step is continued.

[0158] When the wafer 11 is temporarily fixed to the support substrate 23 by the adhesive layer 25 and the bonding between the wafer 11 and the support substrate 23 is weak, after the device chip 59 is fitted into the through-hole 11d, a process of firmly fixing the wafer 11 to the support substrate 23 (main fixing process) is performed. Thereby, the wafer 11 and the device chip 59 are firmly fixed to the support substrate 23 via the adhesive layer 25.

[0159] For example, when the adhesive layer 25 is an adhesive made of a thermosetting resin, heat treatment at a higher temperature or for a longer period than during temporary fixing is performed to cure the thermosetting resin, thereby strengthening the bonding between the wafer 11 and the support substrate 23. Further, when the adhesive layer 25 is an adhesive made of an ultraviolet curable resin, heat treatment is performed on the ultraviolet curable resin to strengthen the bonding between the wafer 11 and the support substrate 23. Furthermore, when the adhesive layer 25 is a thermocompression bonding sheet, while performing heat treatment at a higher temperature or for a longer period than during temporary fixing, the wafer 11 and the support substrate 23 are pressed against the thermocompression bonding sheet to strengthen the bonding between the wafer 11 and the support substrate 23.

[0160] Also, in the removal step, when the wafer 11 is temporarily fixed to the support substrate 23 using the adhesive layer 25 having a weak adhesive force, the wafer 11 and the support substrate 23 may be separated once before the fitting step, and the wafer 11 may be fixed to the support substrate 23 again using another adhesive layer having a higher adhesive force than the adhesive layer 25.

[0161] FIG. 18(B) is a plan view showing the through hole 11d. In the above-described expansion step, the through hole 11d is expanded so as to be larger than the device chip 59. Specifically, the length L of the through hole 11d in the first direction (left - right direction in the drawing) A1 is larger than the length L of the device chip 59 in the first direction. B1 Also, the length L of the through hole 11d in the second direction (a direction perpendicular to the first direction, up - down direction in the drawing) A2 is larger than the length L of the device chip 59 in the second direction. B2 Therefore, when the device chip 59 is fitted into the through hole 11d, a gap 61 is formed so as to surround the device chip 59 between the wafer 11 and the device chip 59.

[0162] In a subsequent process (the resin filling step described later), the gap 61 is filled with resin. Therefore, it is preferable that the width of the gap 61 (the distance between the inner wall of the through hole 11d and the side surface of the device chip 59) is ensured to be a certain value or more. For example, the size of the through hole 11d or the device chip 59 is adjusted so that the width of the gap 61 is 2 μm or more, preferably 5 μm or more, and more preferably 10 μm or more.

[0163] The specific dimensions of the through hole 11d can be appropriately set in consideration of the positions of the semiconductor devices 15 and 55, etc. For example, on the surface 11a side of the wafer 11, the distance between the end (inner wall) of the through hole 11d and the end of the semiconductor device 15 is set to 2 μm or more, preferably 5 μm or more. Also, on the surface 11a side of the wafer 11, the end of the through hole 11d may be arranged on the semiconductor device 15 side rather than at the center in the width direction of the street 13. Further, when the inner wall of the through hole 11d is inclined with respect to the thickness direction of the wafer 11 as shown in Fig. 18(A), a part of the region of the through hole 11d on the back surface 11b side of the wafer 11 may overlap with a part of the semiconductor device 15 formed on the wafer 11.

[0164] There is no limitation on the specific dimensions of the device chip 59 as long as the device chip 59 can be fitted into the through hole 11d. For example, on the surface side of the device chip 59, the distance between the end of the semiconductor device 55 and the end of the device chip 59 is set to be 1 / 2 or less of the width of the street 13 set for the wafer 11.

[0165] In the fitting step, instead of fixing the device chip 59 to the adhesive layer 25, the device chip 59 with the adhesive layer attached may be fitted into the through hole 11d. Specifically, after removing the adhesive layer 25 exposed inside the through hole 11d by a process such as plasma etching or wet etching (chemical solution treatment), the device chip 59 with the adhesive layer attached may be fixed to the support substrate 23 via the adhesive layer.

[0166] FIG. 19(A) is a cross-sectional view showing the wafer 11 when the adhesive layer 25 is subjected to plasma etching. For example, by supplying a gas (etching gas) 66 made into plasma to the back surface 11b side of the wafer 11, the region of the adhesive layer 25 that overlaps with the through hole 11d is removed. In addition, when performing plasma etching on the wafer 11 in the above-described expansion step, the expansion of the through hole 11d and the removal of the adhesive layer 25 may be performed simultaneously by the plasma etching.

[0167] FIG. 19(B) is a cross-sectional view showing the wafer 11 in a state where a part of the adhesive layer 25 has been removed. When the region of the adhesive layer 25 that overlaps with the through hole 11d is removed, the region of the upper surface of the support substrate 23 that overlaps with the through hole 11d is exposed. In addition, when performing plasma etching on the wafer 11, a mask for exposing the through hole 11d may be formed on the back surface 11b side of the wafer 11.

[0168] Next, the device chip 59 to which the adhesive layer is attached is fitted into the through hole 11d. FIG. 19(C) is a cross-sectional view showing the wafer 11 in which the device chip 59 to which the adhesive layer 63 is attached is fitted. An adhesive layer 63 is provided on the surface side (semiconductor device 55 side) of the device chip 59. Note that an example of the material of the adhesive layer 63 is the same as that of the adhesive layer 25. The device chip 59 is fixed to the upper surface of the support substrate 23 that is exposed inside the through hole 11d via the adhesive layer 63.

[0169] Then, after the device chip 59 is fitted into the through hole 11d, the main fixing process is performed on the adhesive layers 25 and 63 as necessary. Thereby, the wafer 11 and the device chip 59 are firmly fixed to the support substrate 23 via the adhesive layers 25 and 63.

[0170] Next, the gap 61 between the wafer 11 and the device chip 59 is filled with resin (resin filling step). FIG. 20(A) is a cross-sectional view showing the wafer 11 in the resin filling step.

[0171] In the resin filling step, resin 65 is formed on the back surface 11b side of the wafer 11. The resin 65 is formed, for example, by applying a liquid resin such as an epoxy resin to the back surface 11b side of the wafer 11 and curing it. However, there is no limitation on the material of the resin 65.

[0172] When a liquid resin is applied to the back surface 11b side of the wafer 11, a part of the liquid resin flows into the gap 61 (see FIGS. 18(A) and 18(B), etc.) between the wafer 11 and the device chip 59 and fills the gap 61. When the liquid resin is cured in this state, the wafer 11 and the device chip 59 are bonded via the resin 65, and the device chip 59 is fixed to the wafer 11.

[0173] Next, the resin 65 formed outside the gap 61 is ground (resin grinding step). In the resin grinding step, the resin 65 formed on the back surface 11b side of the wafer 11 is removed by grinding. For example, a grinding device 2 (see FIG. 2) is used for grinding the resin 65.

[0174] FIG. 20(B) is a cross-sectional view showing the wafer 11 in the resin grinding step. For example, in the resin grinding step, the resin 65 formed outside the gap 61 is removed by grinding, and the back surface 11b side of the wafer 11 is ground. Then, the wafer 11 is thinned until the electrodes 19 and 57 are exposed on the back surface 11b side of the wafer 11.

[0175] However, there is no limitation on the method of exposing the electrodes 19 and 57. For example, after grinding the resin 65 until the back surface 11b side of the wafer 11 is exposed in the resin grinding step, the electrodes 19 and 57 may be exposed by performing an etching process such as plasma etching or wet etching on the back surface 11b side of the wafer 11. In this case, it is possible to prevent the grinding wheel 16 (see FIG. 2) from contacting the electrodes 19 and 57 and the metal contained in the electrodes 19 and 57 from scattering.

[0176] Through the above steps, a wafer 11 having electrodes 19 and 57 exposed on the back surface 11b side is obtained. Thereby, it becomes possible to connect the semiconductor devices 15 and 55 and semiconductor devices (not shown) included in other wafers laminated on the back surface 11b side of the wafer 11 via the electrodes 19 and 57. That is, by the method for manufacturing a wafer according to the present embodiment, a wafer 11 that can be used for forming a stacked wafer is manufactured.

[0177] Next, a specific example of a method for manufacturing a device chip (stacked device chip) including a plurality of stacked semiconductor devices using the above wafer 11 will be described. When manufacturing a stacked device chip, first, a stacked wafer having a plurality of stacked wafers is formed (wafer stacking step). FIG. 21 is a cross-sectional view showing a stacked wafer 79.

[0178] In the wafer stacking step, the wafer 11 (first wafer) after the resin grinding step and another wafer 71 (second wafer) prepared in the above wafer preparation step are used. Note that the configuration of the wafer 71 is the same as that of the wafer 11.

[0179] Specifically, the wafer 71 is made of the same material as the wafer 11 and includes a front surface (first surface) 71a and a back surface (second surface) 71b. The wafer 71 is partitioned into a plurality of rectangular regions by a plurality of streets (division planned lines) 73 arranged in a grid pattern so as to intersect each other. Semiconductor devices 75 are formed in the plurality of regions partitioned by the streets 73 on the front surface 71a side of the wafer 71.

[0180] The structure of the semiconductor device 75 is the same as that of the semiconductor device 15. An electrode (via electrode, through electrode) 77 is connected to the semiconductor device 75. The structure and material of the electrode 77 are the same as those of the electrode 19.

[0181] Wafer 71 is stacked on wafer 11. For example, wafer 71 is bonded to wafer 11 such that the surface 71a side faces the back surface 11b side of wafer 11. Note that there is no limitation on the method of bonding wafer 11 and wafer 71. For example, wafer 11 and wafer 71 are bonded by direct bonding. Specifically, the back surface 11b side of wafer 11 and the surface 71a side of wafer 71 are bonded by surface-activated bonding.

[0182] However, wafer 11 and wafer 71 may be bonded by indirect bonding. For example, wafer 11 and wafer 71 can also be bonded by stacking wafer 71 on wafer 11 via a permanent adhesive.

[0183] In addition, when the plurality of semiconductor devices 75 formed on wafer 71 include defective devices, before or after wafer 71 is stacked on wafer 11, a grinding step, a removal step, an expansion step, a fitting step, a resin filling step, and a resin grinding step are performed on wafer 71. As a result, the defective devices are removed from wafer 71, and device chips 59 including non-defective semiconductor devices 55 are fitted into wafer 71.

[0184] Wafer 11 and wafer 71 are bonded such that street 13 and street 73 overlap, and semiconductor devices 15, 55 included in wafer 11 and semiconductor devices 75, 55 included in wafer 71 overlap. As a result, semiconductor devices 15, 55 included in wafer 11 and semiconductor devices 75, 55 included in wafer 71 are connected via electrodes 19, 57.

[0185] In this way, a stacked wafer 79 including a wafer 11 and a wafer 71 stacked on each other is formed. In the wafer stacking step, a plurality of wafers 71 may be stacked on the wafer 11. For example, another wafer 71 may be further stacked on the wafer 71 stacked on the wafer 11. In this case, for each of the plurality of wafers 71 stacked on the wafer 11, a grinding step, a removal step, an expansion step, a fitting step, a resin filling step, and a resin grinding step are performed. Thereby, a stacked wafer 79 including three or more wafers is obtained.

[0186] Next, by dividing the stacked wafer 79 along the streets 13 and 73, a stacked device chip including a plurality of stacked semiconductor devices is formed (division step). FIG. 22(A) is a cross-sectional view showing the stacked wafer 79 in the division step.

[0187] In the division step, for example, the stacked wafer 79 is cut with a cutting device. The cutting device includes a chuck table that holds the stacked wafer 79 and a cutting unit that cuts the stacked wafer 79 held by the chuck table. The cutting unit includes a cylindrical spindle that rotates by a rotational drive source such as a motor. An annular cutting blade 68 for cutting the stacked wafer 79 is attached to the tip of the spindle.

[0188] As the cutting blade 68, for example, a hub type cutting blade (hub blade) is used. The hub blade is configured by integrating an annular base made of metal or the like and an annular cutting edge formed along the outer peripheral edge of the base. The cutting edge of the hub blade is configured by an electroformed grindstone in which abrasive grains made of diamond or the like are fixed by a binder such as nickel plating.

[0189] Also, a washer type cutting blade (washer blade) can be used as the cutting blade 68. The washer blade is configured by an annular cutting edge in which abrasive grains are fixed by a binder made of metal, ceramics, resin, or the like.

[0190] By rotating the cutting blade 68 and causing it to cut into the stacked wafer 79, the stacked wafer 79 is divided. Specifically, with the lower end of the cutting blade 68 positioned below the surface 11a (the upper surface of the adhesive layer 25) of the wafer 11, while rotating the cutting blade 68, the cutting blade 68 and the stacked wafer 79 are relatively moved horizontally along the horizontal direction, so that the cutting blade 68 is caused to cut into the stacked wafer 79 along the streets 13, 73. Then, when the stacked wafer 79 is cut along all the streets 13, 73, the stacked wafer 79 is divided into a plurality of stacked device chips.

[0191] FIG. 22(B) is a cross-sectional view showing the stacked wafer 79 divided into a plurality of stacked device chips 81. Each of the stacked device chips 81 includes one semiconductor device 15 or semiconductor device 55 (first semiconductor device) included in the wafer 11, and one semiconductor device 75 or semiconductor device 55 (second semiconductor device) included in the wafer 71. And the first semiconductor device and the second semiconductor device are stacked on each other and connected via the electrode 19 or the electrode 57.

[0192] As described above, in the method for manufacturing a wafer according to the present embodiment, the defective device region 11c is removed from the wafer 11, and a device chip 59 including the non-defective semiconductor device 15 is fitted into the space (removal region) formed by the removal of the defective device region 11c. Thereby, a wafer 11 that does not include the defective device 15a can be manufactured. Further, by stacking wafers 11 that do not include the defective device 15a to form a stacked wafer 79 and dividing the stacked wafer 79, a stacked device chip 81 that does not include the defective device 15a can be manufactured. As a result, a decrease in the yield of the stacked device chip 81 is suppressed.

[0193] Also, in the method for manufacturing a wafer according to the present embodiment, before the device chip 59 is fitted into the through hole 11d formed by removing the defective device region 11c, the through hole 11d is expanded by heating the wafer 11 or the like. Therefore, even when the size of the through hole 11d is not sufficient at the stage where the defective device region 11c is removed, the device chip 59 can be surely fitted into the through hole 11d. As a result, operations such as adjusting the dimensions of the device chip 59 and remaking the device chip 59 become unnecessary, and it becomes possible to efficiently manufacture the wafer 11 that does not include the defective device 15a.

[0194] (Embodiment 2) In Embodiment 1, an example in which the defective device region 11c is separated by irradiation with a laser beam in the removal step has been described, but other methods may be used for separating the defective device region 11c. In the present embodiment, after the wafer preparation step and the grinding step (see FIG. 2) are performed, a method of separating the defective device region 11c by a crushing process of crushing the wafer 11 in the removal step will be described.

[0195] The crushing process used in the present embodiment is not limited as long as the wafer 11 can be processed. Examples of the crushing process that can be used for processing the wafer 11 include sandblasting, water jet machining, and drill machining.

[0196] FIG. 23(A) is a cross-sectional view showing a wafer 11 in which a groove 93 is formed by sandblasting. For sandblasting, a sandblasting unit 72 that injects an abrasive 74 is used. For example, the sandblasting unit 72 includes a compressor that compresses and sends out a gas such as air, and a blast gun that injects the abrasive 74 together with the compressed gas. The wafer 11 is processed by the abrasive 74 injected from the sandblasting unit 72 colliding with the wafer 11.

[0197] When performing crushing processing, first, a protective layer 91 is formed on the wafer 11. For example, when processing the surface 11a side of the wafer 11, the surface 11a side of the wafer 11 is covered by the protective layer 91, and the semiconductor device 15 is protected. Note that there is no limitation on the material of the protective layer 91, and for example, water-soluble resins such as PVA and PEG can be used. Also, when damage to the semiconductor device 15 due to crushing processing is unlikely to occur, formation of the protective layer 91 may be omitted.

[0198] Next, the wafer 11 is held by a holding table 70. The upper surface of the holding table 70 constitutes a flat holding surface 70a for holding the wafer 11. For example, the wafer 11 is arranged on the holding table 70 such that the surface 11a side is exposed upward and the back surface 11b side faces the holding surface 70a.

[0199] Then, abrasive 74 is sprayed from a sandblasting unit 72 along four streets 13 surrounding the defective device 15a. As a result, strip-shaped grooves 93 are formed along the streets 13 on the surface 11a side of the wafer 11. These grooves 93 are formed in a rectangular shape in plan view so as to surround the defective device 15a.

[0200] FIG. 23(B) is a cross-sectional view showing the wafer 11 in which the groove 93 is formed by water jet machining. For water jet machining, a water jet unit 76 that sprays a liquid 78 such as water is used. The water jet unit 76 includes a nozzle that sprays the liquid 78 pressurized by a pump. Note that the liquid 78 may contain abrasive grains. The wafer 11 is machined when the liquid 78 sprayed from the water jet unit 76 collides with the wafer 11.

[0201] Specifically, the liquid 78 sprayed from the water jet unit 76 is sprayed along four streets 13 surrounding the defective device 15a. As a result, strip-shaped grooves 93 are formed along the streets 13 on the surface 11a side of the wafer 11. These grooves 93 are formed in a rectangular shape in plan view so as to surround the defective device 15a.

[0202] FIG. 23(C) is a cross-sectional view showing a wafer 11 in which a groove 93 is formed by drilling. For the drilling, a drill unit 80 to which a rod-shaped drill bit 82 is attached is used. The drill unit 80 includes a rotational drive source such as a motor that rotates the drill bit 82 attached to the drill unit 80. The wafer 11 is processed by bringing the tip of the drill bit 82 into contact with the wafer 11 while rotating the drill bit 82.

[0203] Specifically, first, the rotating drill bit 82 is brought into contact with a region overlapping the street 13 of the wafer 11 to form a columnar groove in the wafer 11. Next, the holding table 70 or the drill bit 82 is moved along the street 13. Note that the amount of movement at this time is set to be less than the diameter of the columnar groove formed in the wafer 11. Thereafter, a new groove is formed in the wafer 11 with the drill bit 82. As a result, the groove already formed in the wafer 11 and the newly formed groove are connected.

[0204] By repeating the above procedure, a plurality of grooves are formed along the four streets 13 surrounding the defective device 15a. As a result, a belt-shaped groove 93 is formed along the street 13 on the surface 11a side of the wafer 11. This groove 93 is composed of a plurality of columnar grooves formed so as to be connected to each other.

[0205] As described above, by performing crushing processing along the street 13 surrounding the defective device 15a, a groove 93 is formed in the wafer 11. Thereafter, by grinding the back surface 11b side of the wafer 11, the processed region (groove 93) processed by the crushing processing is exposed on the back surface 11b side of the wafer 11.

[0206] When grinding the wafer 11, first, the wafer 11 is fixed to the support substrate 23. FIG. 24(A) is a cross-sectional view showing the wafer 11 fixed to the support substrate 23. When grinding the back surface 11b side of the wafer 11, the front surface 11a side of the wafer 11 is fixed to the support substrate 23 via the adhesive layer 25.

[0207] Next, the wafer 11 is ground by the grinding device 2 (see FIG. 2). Specifically, the back surface 11b side of the wafer 11 is ground by bringing the grinding wheel 16 into contact with the back surface 11b side of the wafer 11. Then, the wafer 11 is ground and thinned until the groove 93 is exposed on the back surface 11b side of the wafer 11.

[0208] FIG. 24(B) is a cross-sectional view showing the ground wafer 11. When the groove 93 is exposed on the back surface 11b side of the wafer 11, the defective device region 11c is separated from the wafer 11. Thereafter, the defective device region 11c is separated from the wafer 11 and a through hole 11d is formed in the wafer 11 by the same procedure as in Embodiment 1 (see FIGS. 8(A), 8(B), and 9).

[0209] In the removal step, the defective device region 11c may be separated by forming a through hole penetrating the wafer 11 by crushing. Specifically, a through hole extending from the front surface 11a to the back surface 11b of the wafer 11 is formed along the street 13 by crushing.

[0210] FIG. 25(A) is a cross-sectional view showing the wafer 11 in which the through hole 95 is formed by sandblasting. When forming the through hole 95 by crushing, the holding table 70 is provided with an opening 70b penetrating the holding table 70 vertically. The opening 70b is formed in a rectangular shape in plan view corresponding to the four streets 13 surrounding the semiconductor device 15. Then, the wafer 11 is placed on the holding table 70 such that the four streets 13 surrounding the defective device 15a overlap the opening 70b respectively.

[0211] Next, abrasive 74 is jetted from the sandblasting unit 72 along four streets 13 surrounding the defective device 15a. Note that the jetting conditions of the abrasive 74 are set such that holes penetrating the wafer 11 from the front surface 11a to the back surface 11b are formed in the area of the wafer 11 where the abrasive 74 has collided.

[0212] Therefore, when the abrasive 74 is jetted along the streets 13, strip-shaped through holes 95 reaching from the front surface 11a to the back surface 11b are formed in the wafer 11 along the streets 13. These through holes 95 are formed in a rectangular shape in plan view so as to surround the defective device 15a. As a result, the defective device region 11c is separated from the wafer 11.

[0213] FIG. 25(B) is a cross-sectional view showing the wafer 11 in which the through hole 95 is formed by water jet machining. When forming the through hole 95 by water jet machining, the liquid 78 jetted from the water jet unit 76 is jetted along four streets 13 surrounding the defective device 15a. Note that the jetting conditions of the liquid 78 are set such that holes penetrating the wafer 11 from the front surface 11a to the back surface 11b are formed in the area of the wafer 11 where the liquid 78 has collided.

[0214] Therefore, when the liquid 78 is jetted along the streets 13, strip-shaped through holes 95 reaching from the front surface 11a to the back surface 11b are formed in the wafer 11 along the streets 13. These through holes 95 are formed in a rectangular shape in plan view so as to surround the defective device 15a. As a result, the defective device region 11c is separated from the wafer 11.

[0215] FIG. 25(C) is a cross-sectional view showing the wafer 11 in which the through hole 95 is formed by drill machining. When forming the through hole 95 by drill machining, first, while rotating the drill bit 82, it is brought into contact with the wafer 11 to form a columnar hole penetrating the wafer 11 from the front surface 11a to the back surface 11b.

[0216] Thereafter, the same procedure is repeated to form a plurality of holes along the four streets 13 surrounding the defective device 15a. Note that each of the plurality of holes is formed so as to be connected to the holes already formed in the wafer 11. As a result, a strip-shaped through hole 95 extending from the front surface 11a to the back surface 11b is formed in the wafer 11 along the streets 13, and the defective device region 11c is separated from the wafer 11.

[0217] During the implementation of sandblasting (see Fig. 25(A)), the abrasive 74 that has passed through the through hole 95 of the wafer 11 is discharged through the opening 70b of the holding table 70. Similarly, during the implementation of water jet machining (see Fig. 25(B)), the liquid 78 that has passed through the through hole 95 of the wafer 11 is discharged through the opening 70b of the holding table 70. Therefore, it is possible to prevent the abrasive 74 and the liquid 78 from colliding with the holding surface 70a of the holding table 70 and damaging the holding table 70.

[0218] Also, during the implementation of sandblasting (see Fig. 25(C)), the tip of the drill bit 82 is inserted into the opening 70b of the holding table 70. Therefore, it is possible to prevent the drill bit 82 from contacting the holding table 70 and damaging the holding table 70.

[0219] Note that Figs. 25(A), 25(B), and 25(C) show how the wafer 11 is processed from the front surface 11a side, but the wafer 11 may be processed from the back surface 11b side. That is, the abrasive 74 or the liquid 78 may be made to collide with the back surface 11b side of the wafer 11, or the drill bit 82 may be brought into contact with the back surface 11b side of the wafer 11.

[0220] Next, the protective layer 91 is removed from the wafer 11, and the defective device region 11c is separated from the wafer 11. Thereafter, the wafer 11 is fixed to the support substrate 23. Fig. 26 is a cross-sectional view showing the wafer 11 fixed to the support substrate 23. For example, the front surface 11a side of the wafer 11 is fixed to the support substrate 23 via the adhesive layer 25.

[0221] Note that the wafer 11 in which the through holes 11d are formed by crushing may be subjected to an etching process. For example, by supplying a gas in a plasma state to the through holes 11d of the wafer 11, plasma etching is performed inside the through holes 11d. Further, by supplying an etching solution to the through holes 11d of the wafer 11, wet etching is performed inside the through holes 11d.

[0222] FIG. 27 is a cross-sectional view showing the wafer 11 to which plasma etching is applied. When the plasma-etched etching gas 84 is supplied to the wafer 11, plasma etching is performed on the inner wall of the through hole 11d. As a result, the size of the through hole 11d increases. Further, the fine irregularities formed on the inner wall of the through hole 11d by the crushing process are removed by the plasma etching.

[0223] FIG. 28(A) is a plan view showing a region (work region) 97A processed by sandblasting or water jet machining. Further, FIG. 28(B) is a plan view showing a region (work region) 97B processed by drilling. In FIGS. 28(A) and 28(B), patterns are provided in the regions 97A and 97B.

[0224] When the wafer 11 is processed by sandblasting, for example, the abrasive 74 is sprayed onto the region 97A along the outer peripheral edge of the defective device 15a. Similarly, when the wafer 11 is processed by water jet machining, for example, the liquid 78 is sprayed onto the region 97A along the outer peripheral edge of the defective device 15a. As a result, grooves 93 (see FIGS. 23(A) and 23(B)) or through holes 95 (see FIGS. 25(A) and 25(B)) are formed so as to surround the defective device 15a. Note that the abrasive 74 and the liquid 78 may be sprayed so as to collide with a part of the defective device 15a, or may be sprayed only on the street 13 so as not to collide with the defective device 15a.

[0225] When the wafer 11 is processed by drilling, for example, the drill bit 82 sequentially processes a plurality of regions 97B along the outer peripheral edge of the defective device 15a. Note that each of the plurality of regions 97B is set to overlap a part of another adjacent region 97. Thereby, a groove 93 (see FIG. 23(C)) or a through hole 95 (see FIG. 25(C)) is formed so as to surround the defective device 15a. Note that the drill bit 82 may contact a part of the defective device 15a, or may contact only on the street 13 so as not to contact the defective device 15a.

[0226] Also, when the wafer 11 is processed by drilling, while the drill bit 82 is inserted into the wafer 11 (see FIGS. 23(C) and 25(C)), the groove 93 or the through hole 95 may be formed by moving the drill bit 82 horizontally along the street 13 while rotating the drill bit 82. In this case, the operation of raising and lowering the drill bit 82 a number of times on the street 13 becomes unnecessary.

[0227] Then, an expansion step (see FIG. 16(B)) is performed on the wafer 11 in which the through hole 11d is formed. Thereby, the width of the through hole 11d becomes larger, and an expanded through hole 11d as shown in FIGS. 28(A) and 28(B) is formed. Note that in the expansion step, by performing an etching process (such as plasma etching or wet etching) on the wafer 11, fine irregularities remaining in the regions 97A and 97B where the crushing process has been performed may be removed.

[0228] As described above, in the removal step, the defective device region 11c can also be separated from the wafer 11 by the crushing process. Note that the processes omitted in this embodiment among the processes included in the removal step are the same as those in the first embodiment. Also, in this embodiment, the processes other than the removal step (wafer preparation step, grinding step, expansion step, fitting step, resin filling step, resin grinding step, wafer stacking step, dicing step, etc.) can be performed in the same manner as in the first embodiment. Furthermore, this embodiment can be appropriately combined with other embodiments.

[0229] (Embodiment 3) In Embodiments 1 and 2, an example of separating the defective device region 11c from the wafer 11 by processing the wafer 11 along the streets 13 in the removal step has been described. However, there is no limitation on the method of removing the defective device region 11c from the wafer 11. In this embodiment, after the implementation of the wafer preparation step and the grinding step (see FIG. 2), a method of destroying and removing the defective device region 11c by irradiating a laser beam in the removal step will be described.

[0230] FIG. 29(A) is a cross-sectional view showing the wafer 11 irradiated with the laser beam 32D. When destroying the defective device region 11c by irradiating a laser beam, a laser irradiation unit 30D that irradiates the wafer 11 with the laser beam 32D is used. Note that the configuration of the laser irradiation unit 30D is the same as that of the laser irradiation unit 30A (see FIG. 4(A)).

[0231] However, the irradiation conditions of the laser beam 32D are set such that the region of the wafer 11 irradiated with the laser beam 32D is removed by ablation processing. Specifically, the wavelength of the laser beam 32D is set such that at least a part of the laser beam 32D is absorbed by the wafer 11. That is, the laser irradiation unit 30D irradiates the wafer 11 with a laser beam 32D having a wavelength that is absorbable by the wafer 11. Also, the other irradiation conditions of the laser beam 32D are set such that ablation processing is appropriately performed on the wafer 11.

[0232] For example, the laser beam 32D is irradiated to the surface 11a side of the wafer 11. Specifically, the laser beam 32D is irradiated with the condensing point of the laser beam 32D positioned inside the four streets 13 surrounding the defective device 15a. Thereby, ablation processing is performed on the defective device region 11c, and the defective device region 11c is destroyed. As a result, grooves (recesses) are formed on the surface 11a side of the wafer 11.

[0233] FIG. 29(B) is a cross-sectional view showing a wafer 11 in which a groove (removal region) 101 is formed. For example, the laser beam 32D is scanned so as to irradiate the entire rectangular region in a plan view located inside the four streets 13 surrounding the defective device 15a. As a result, a rectangular parallelepiped groove 101 is formed on the surface 11a side of the wafer 11 by ablation processing. Note that the depth of the groove 101 is adjusted so that the bottom surface of the groove 101 is formed below the lower end of the electrode 19. As a result, the defective device 15a and the electrode 19 are removed.

[0234] FIG. 30 is a plan view showing a path 34D along which the laser beam 32D is scanned. For example, a plurality of paths 34D are set from one end side to the other end side of the defective device region 11c. Then, the laser beam 32D is scanned along the path 34D so as to reciprocate between one end and the other end of the defective device region 11c. Thereby, the entire defective device region 11c is irradiated with the laser beam 32D, and the defective device region 11c is removed. However, there is no limitation on the scanning path of the laser beam 32D as long as the defective device region 11c can be removed.

[0235] Note that when forming the groove 101, the surface 11a side of the wafer 11 may be covered with a protective film, and the wafer 11 may be irradiated with the laser beam 32D through the protective film. For example, as the protective film, a resin tape or a film made of a water-soluble resin such as PVA or PEG can be used. When the protective film is formed on the surface 11a side of the wafer 11, it is possible to prevent the processing debris (debris) generated during the ablation processing from adhering to the surface 11a of the wafer 11, and contamination of the wafer 11 and the semiconductor device 15 is avoided.

[0236] Next, by grinding the back surface 11b side of the wafer 11, the processed region (groove 101) processed by the irradiation of the laser beam 32D is exposed on the back surface 11b side of the wafer 11. When grinding the wafer 11, first, the wafer 11 is fixed to the support substrate. FIG. 31(A) is a cross-sectional view showing the wafer 11 fixed to the support substrate 23. When grinding the back surface 11b side of the wafer 11, the front surface 11a side of the wafer 11 is fixed to the support substrate 23 via the adhesive layer 25.

[0237] Next, the wafer 11 is ground by the grinding device 2 (see FIG. 2). Specifically, the back surface 11b side of the wafer 11 is ground by bringing the grinding wheel 16 into contact with the back surface 11b side of the wafer 11. Then, the wafer 11 is ground and thinned until the groove 101 is exposed on the back surface 11b side of the wafer 11.

[0238] FIG. 31(B) is a cross-sectional view showing the wafer 11 after grinding. When the groove 101 is exposed on the back surface 11b side of the wafer 11, a through hole 11d is formed in the wafer 11 from the front surface 11a to the back surface 11b.

[0239] In the removal step, the through hole 11d may be directly formed by the irradiation of the laser beam 32D. Specifically, the through hole 11d from the front surface 11a to the back surface 11b of the wafer 11 is formed by ablation processing.

[0240] FIG. 32(A) is a cross-sectional view showing the wafer 11 irradiated with the laser beam 32D. First, a protective member 103 such as a tape is attached to the wafer 11. For example, when irradiating the front surface 11a side of the wafer 11 with the laser beam 32D, the protective member 103 is attached to the back surface 11b side of the wafer 11. Note that examples of the material of the protective member 103 are the same as those of the protective member 21 (see FIG. 2).

[0241] Then, with the condensing point of the laser beam 32D positioned inside the four streets 13 surrounding the defective device 15a, the laser beam 32D is irradiated. Note that there is no restriction on the scanning path of the laser beam 32D. For example, the laser beam 32D is scanned along the path 34D shown in FIG. 30.

[0242] The irradiation conditions of the laser beam 32D are set such that the region from the front surface 11a to the back surface 11b of the wafer 11 is removed by ablation processing. Therefore, when the irradiation of the laser beam 32D on the wafer 11 is completed, a through hole 11d that penetrates the wafer 11 from the front surface 11a to the back surface 11b is formed.

[0243] Thereafter, the wafer 11 is fixed to the support substrate. FIG. 32(B) is a cross-sectional view showing the wafer 11 fixed to the support substrate 23. After the through hole 11d is formed in the wafer 11, the support substrate 23 is fixed to the front surface 11a side of the wafer 11 via the adhesive layer 25. Thereafter, the protective member 103 is peeled off from the front surface 11a side of the wafer 11.

[0244] Note that for the formation of the through hole 11d, a laser beam (aqueous laser) irradiated through a liquid can also be used. In this case, an injection unit for injecting the liquid is provided in the laser irradiation unit 30D. Then, when the liquid is injected from the laser irradiation unit 30D to form a liquid column 50 (see FIG. 13(A)), the laser beam 32D is irradiated from the laser irradiation unit 30D. At this time, the condensing point of the laser beam 32D is positioned inside the liquid column 50. Then, the laser beam 32D is irradiated onto the defective device region 11c through the liquid column 50. Thereby, the defective device region 11c is removed.

[0245] Further, the wafer 11 (see FIGS. 31(B) and 32(A)) in which the through hole 11d is formed by the destruction of the defective device region 11c may be subjected to an etching process. For example, by supplying a gas in a plasma state to the through hole 11d of the wafer 11, plasma etching is performed inside the through hole 11d. Further, by supplying an etching solution to the through hole 11d of the wafer 11, wet etching is performed inside the through hole 11d.

[0246] As described above, in the removal step, the defective device region 11c can also be removed from the wafer 11 by destroying the defective device region 11c by irradiating a laser beam. Note that the processes omitted in this embodiment among the respective processes included in the removal step are the same as those in Embodiment 1. Also, in this embodiment, the processes other than the removal step (wafer preparation step, grinding step, expansion step, fitting step, resin filling step, resin grinding step, wafer stacking step, dicing step, etc.) can be carried out in the same manner as in Embodiment 1. Furthermore, this embodiment can be appropriately combined with other embodiments.

[0247] (Embodiment 4) In Embodiment 3, an example in which the defective device region 11c is destroyed by irradiating a laser beam in the removal step has been described, but there is no limitation on the method of destroying the defective device region 11c. In this embodiment, after the implementation of the wafer preparation step and the grinding step (see FIG. 2), in the removal step, a method of destroying and removing the defective device region 11c by crushing process will be described.

[0248] The crushing process used in this embodiment is not limited as long as the wafer 11 can be processed. Hereinafter, as specific examples of the crushing process, sandblasting using a sandblasting unit 72 (see FIGS. 23(A), etc.), water jet machining using a water jet unit 76 (see FIGS. 23(B), etc.), and drill machining using a drill unit 80 (see FIGS. 23(C), etc.) will be described.

[0249] FIG. 33 is a cross-sectional view showing the wafer 11 held by the holding table 70. When performing the dicing process, first, a protective layer 91 is formed on the wafer 11. For example, when processing from the surface 11a side of the wafer 11, the surface 11a side of the wafer 11 is covered by the protective layer 91, and the semiconductor device 15 is protected. Note that when damage to the semiconductor device 15 due to the dicing process is unlikely to occur, the formation of the protective layer 91 may be omitted.

[0250] Next, the wafer 11 is held by the holding table 70. For example, the wafer 11 is placed on the holding table 70 such that the surface 11a side is exposed upward and the back surface 11b side faces the holding surface 70a. Then, the dicing process is performed on the wafer 11 held by the holding table 70.

[0251] FIG. 34(A) is a cross-sectional view showing the wafer 11 in which the defective device region 11c is removed by sandblast processing. When performing sandblast processing, abrasive 74 is ejected from the sandblast unit 72 inside the four streets 13 surrounding the defective device 15a (see FIG. 33). As a result, the region of the wafer 11 where the abrasive 74 has collided is destroyed, and a rectangular parallelepiped-shaped groove (removal region) 105 is formed on the surface 11a side of the wafer 11.

[0252] FIG. 34(B) is a cross-sectional view showing the wafer 11 in which the defective device region 11c is removed by water jet processing. When performing water jet processing, the pressurized liquid 78 is ejected from the water jet unit 76 inside the four streets 13 surrounding the defective device 15a (see FIG. 33). As a result, the region of the wafer 11 where the liquid 78 has collided is destroyed, and a rectangular parallelepiped-shaped groove 105 is formed on the surface 11a side of the wafer 11.

[0253] Note that the groove 105 is formed across at least the entire area where the defective device 15a is formed. Also, the depth of the groove 105 is adjusted so that the bottom surface of the groove 105 is formed below the lower end of the electrode 19. As a result, the defective device 15a and the electrode 19 are removed.

[0254] FIG. 34(C) is a cross-sectional view showing a wafer 11 in which a defective device region 11c is removed by drilling. When performing drilling, the rotating drill bit 82 is brought into contact with the inside of the four streets 13 surrounding the defective device 15a (see FIG. 33), and a plurality of columnar grooves are formed in the wafer 11. Note that the plurality of grooves are formed so as to be connected to each other across the entire area where the defective device 15a is formed. Also, the depth of the plurality of grooves is adjusted so that the bottom surface of the groove 105 is formed below the lower end of the electrode 19. As a result, the groove 105 constituted by the plurality of connected grooves is formed on the surface 11a side of the wafer 11, and the defective device 15a and the electrode 19 are removed.

[0255] As described above, by performing a crushing process on the inside of the street 13 surrounding the defective device 15a, the defective device 15a is destroyed. Thereby, the defective device 15a is removed from the wafer 11.

[0256] Next, by grinding the back surface 11b side of the wafer 11, the processed region (groove 105) processed by the crushing process is exposed on the back surface 11b side of the wafer 11. When grinding the wafer 11, first, the wafer 11 is fixed to the support substrate 23. FIG. 35(A) is a cross-sectional view showing the wafer 11 fixed to the support substrate 23. When grinding the back surface 11b side of the wafer 11, the surface 11a side of the wafer 11 is fixed to the support substrate 23 via the adhesive layer 25.

[0257] Next, the wafer 11 is ground by a grinding device 2 (see FIG. 2). Specifically, the back surface 11b side of the wafer 11 is ground by bringing the grinding wheel 16 into contact with the back surface 11b side of the wafer 11. Then, the wafer 11 is ground and thinned until the groove 105 is exposed on the back surface 11b side of the wafer 11.

[0258] FIG. 35(B) is a cross-sectional view showing the ground wafer 11. When the groove 105 is exposed on the back surface 11b side of the wafer 11, a rectangular parallelepiped through-hole 11d extending from the front surface 11a to the back surface 11b is formed in the wafer 11.

[0259] In the removal step, the through-hole 11d may be directly formed by crushing. Specifically, a through-hole 11d extending from the front surface 11a to the back surface 11b of the wafer 11 is formed by crushing.

[0260] FIG. 36(A) is a cross-sectional view showing the wafer 11 in which the through-hole 11d is formed by sandblasting. When the through-hole 11d is formed in the wafer 11 by crushing, an opening 70c penetrating the holding table 70 vertically is provided in the holding table 70. Then, the wafer 11 is placed on the holding table 70 such that the inner region of the four streets 13 surrounding the defective device 15a overlaps with the opening 70c.

[0261] Next, abrasive 74 is ejected from the sandblasting unit 72 over the entire inner region of the four streets 13 surrounding the defective device 15a (see FIG. 33). The ejection conditions of the abrasive 74 are set such that the region of the wafer 11 where the abrasive 74 collides is removed from the front surface 11a to the back surface 11b. As a result, the defective device region 11c is removed and a through-hole 11d is formed in the wafer 11.

[0262] FIG. 36(B) is a cross-sectional view showing a wafer 11 in which a through hole 11d is formed by water jet machining. When performing water jet machining, the liquid 78 ejected from the water jet unit 76 is ejected over the entire area inside the four streets 13 surrounding the defective device 15a (see FIG. 33). Note that the ejection conditions of the liquid 78 are set such that the area of the wafer 11 where the liquid 78 collides is removed from the front surface 11a to the back surface 11b. As a result, the defective device area 11c is removed and a through hole 11d is formed in the wafer 11.

[0263] FIG. 36(C) is a cross-sectional view showing a wafer 11 in which a through hole 11d is formed by drill machining. When performing drill machining, the rotating drill bit 82 is brought into contact with the inside of the four streets 13 surrounding the defective device 15a (see FIG. 33), and a plurality of columnar grooves are formed in the wafer 11.

[0264] The drill bit 82 machines the wafer 11 until the lower end of the drill bit 82 reaches the back surface 11b of the wafer 11. As a result, the plurality of grooves are each formed so as to penetrate the wafer 11 from the front surface 11a to the back surface 11b. Further, the plurality of grooves are formed so as to be connected to each other over the entire area where at least the defective device 15a is formed. As a result, a through hole 11d composed of the plurality of connected grooves is formed.

[0265] Note that when performing sandblast machining (see FIG. 36(A)), the abrasive 74 that has passed through the through hole 11d of the wafer 11 is discharged through the opening 70c of the holding table 70. Similarly, when performing water jet machining (see FIG. 36(B)), the liquid 78 that has passed through the through hole 11d of the wafer 11 is discharged through the opening 70c of the holding table 70. Therefore, it is possible to prevent the abrasive 74 and the liquid 78 from colliding with the holding surface 70a of the holding table 70 and damaging the holding table 70.

[0266] Also, during the implementation of sandblasting (see Fig. 36(C)), the tip of the drill bit 82 is inserted into the opening 70c of the holding table 70. Therefore, it is possible to prevent the drill bit 82 from contacting the holding table 70 and damaging the holding table 70.

[0267] In FIGS. 36(A), 36(B), and 36(C), the state where the wafer 11 is processed from the surface 11a side is shown, but the wafer 11 may be processed from the back surface 11b side. That is, the abrasive 74 and the liquid 78 may be made to collide with the back surface 11b side of the wafer 11, or the drill bit 82 may be made to contact the back surface 11b side of the wafer 11.

[0268] Thereafter, the wafer 11 in which the defective device region 11c has been removed and the through hole 11d has been formed is fixed to the support substrate 23. FIG. 37 is a cross-sectional view showing the wafer 11 fixed to the support substrate 23. For example, the surface 11a side of the wafer 11 is fixed to the support substrate 23 via the adhesive layer 25.

[0269] Note that the wafer 11 in which the through hole 11d has been formed by the crushing process may be subjected to an etching process. For example, by supplying a gas in a plasma state to the through hole 11d of the wafer 11, plasma etching is performed inside the through hole 11d (see Fig. 27). Also, by supplying an etching solution to the through hole 11d of the wafer 11, wet etching is performed inside the through hole 11d. By subjecting the wafer 11 to the etching process, the size of the through hole 11d increases, and the fine irregularities formed on the inner wall of the through hole 11d by the crushing process are removed.

[0270] The area where the wafer 11 is crushed is appropriately set so that through holes 11d are formed inside at least four streets 13 surrounding the defective device 15a (see FIG. 33). FIG. 38(A) is a plan view showing an area (processed area) 97C processed by sandblasting or water jet machining. Further, FIG. 38(B) is a plan view showing an area (processed area) 97D processed by drilling. In FIGS. 38(A) and 38(B), patterns are attached to the areas 97C and 97D.

[0271] When the wafer 11 is processed by sandblasting, the abrasive 74 is sprayed onto the area 97C including the entire defective device 15a. Similarly, when the wafer 11 is processed by water jet machining, for example, the liquid 78 is sprayed onto the area 97C including the entire defective device 15a. Thereby, grooves 105 (see FIGS. 34(A) and 34(B)) or through holes 11d (see FIGS. 36(A) and 36(B)) are formed so that the defective device 15a is removed. Note that the abrasive 74 and the liquid 78 may be sprayed so as to collide with a part of the street 13 surrounding the defective device 15a.

[0272] When the wafer 11 is processed by drilling, the drill bit 82 sequentially processes a plurality of areas 97D that overlap the defective device 15a. Note that the plurality of areas 97D are each set so as to overlap a part of another adjacent area 97D. Thereby, grooves 105 (see FIG. 34(C)) or through holes 11d (see FIG. 36(C)) are formed so that the defective device 15a is removed. Note that the drill bit 82 may contact a part of the street 13 surrounding the defective device 15a.

[0273] Further, when the wafer 11 is processed by drilling, while the drill bit 82 enters the wafer 11 (see FIGS. 34(C) and 36(C)), the drill bit 82 may be rotated and moved horizontally to form the groove 105 or the through hole 11d. In this case, the operation of raising and lowering the drill bit 82 a number of times becomes unnecessary.

[0274] Then, an expansion step is performed on the wafer 11 in which the through hole 11d is formed. As a result, the width of the through hole 11d increases, and an expanded through hole 11d as shown in FIGS. 38(A) and 38(B) is formed. Note that in the expansion step, by performing an etching process (such as plasma etching or wet etching) on the wafer 11, fine unevenness remaining in the regions 97C and 97D subjected to the crushing process may be removed.

[0275] As described above, in the removal step, the defective device region 11c can also be removed from the wafer 11 by destroying the defective device region 11c by the crushing process. Note that the processes that are omitted in this embodiment among the respective processes included in the removal step are the same as those in the first embodiment. Also, in this embodiment, the processes other than the removal step (wafer preparation step, grinding step, expansion step, fitting step, resin filling step, resin grinding step, wafer stacking step, dicing step, etc.) can be carried out in the same manner as in the first embodiment. Furthermore, this embodiment can be appropriately combined with other embodiments.

[0276] (Embodiment 5) In this embodiment, the relationship between the step of removing the defective device region 11c from the wafer 11 (removal step) and the step of fixing the wafer 11 to the support substrate 23 (support substrate fixing step) will be described. Specifically, in this embodiment, the process in which the wafer 11 is fixed to the support substrate 23 after the defective device region 11c is removed from the wafer 11 will be described in detail.

[0277] First, grinding (see FIG. 2) is performed on the wafer 11 prepared in the preparation step as necessary (grinding step). Then, by performing processes such as laser processing and crushing on the wafer 11, the defective device region 11c is removed from the wafer 11 (removal step). After that, the wafer 11 from which the defective device region 11c has been removed and in which the through hole 11d has been formed is fixed to the support substrate 23 (support substrate fixing step).

[0278] For removing the defective device area 11c, laser processing can be used. For example, the defective device area 11c is separated from the wafer 11 by laser processing (see FIGS. 12(A), 13(A), etc.), and then the wafer 11 is fixed to the support substrate 23 (see FIGS. 12(B), 13(B), etc.). Also, for example, the defective device area 11c is destroyed by laser processing (see FIG. 32(A), etc.), and then the wafer 11 is fixed to the support substrate 23 (see FIG. 32(B), etc.).

[0279] Also, for removing the defective device area 11c, crushing processing can be used. For example, the defective device area 11c is separated from the wafer 11 by crushing processing (see FIGS. 25(A), 25(B), 25(C), etc.), and then the wafer 11 is fixed to the support substrate 23 (see FIG. 26, etc.). Also, for example, the defective device area 11c is destroyed by crushing processing (see FIGS. 36(A), 36(B), 36(C), etc.), and then the wafer 11 is fixed to the support substrate 23 (see FIG. 37, etc.).

[0280] Then, the through hole 11d of the wafer 11 fixed to the support substrate 23 is expanded (expansion step, see FIG. 16(B)), and the device chip 59 is fitted into the expanded through hole 11d (fitting step, see FIGS. 17 to 19(C), etc.). Thereby, a wafer 11 that does not include the defective device 15a is manufactured.

[0281] As described above, when the support substrate fixing step is performed after the removal step, at the time when the wafer 11 is fixed to the support substrate 23, the defective device area 11c has already been removed from the wafer 11. Therefore, after fixing the wafer 11 to the support substrate 23, it is not necessary to perform processing for removing the defective device area 11c. Thereby, it is possible to avoid the chips (processing chips) generated by processing the wafer 11 from adhering to the support substrate 23, and it is possible to prevent the fitting of the device chip 59 into the through hole 11d from being hindered by the processing chips adhering to the support substrate 23.

[0282] There is no limitation on the method of fixing the wafer 11 to the support substrate 23. For example, the wafer 11 is fixed to the support substrate 23 via an adhesive layer 25. As described above, as the adhesive layer 25, for example, an adhesive made of a thermosetting resin, an adhesive made of a thermoplastic resin, an adhesive made of an ultraviolet curable resin, a sheet (thermocompression bonding sheet) that can be fixed to the wafer 11 and the support substrate 23 by heating and pressing and does not contain an adhesive, a tape provided with a thermally foamed layer, etc. can be used.

[0283] Thereafter, a resin filling step (see FIG. 20(A)), a resin grinding step (see FIG. 20(B)), a wafer stacking step (see FIG. 21), and a dicing step (see FIG. 22(A)) are sequentially performed. Thereby, a stacked device chip 81 including a plurality of stacked semiconductor devices is manufactured (see FIG. 22(B)).

[0284] As described above, by performing the support substrate fixing step after the removal step, adhesion of processing debris to the support substrate 23 can be prevented, and the operation of fitting the device chip 59 into the wafer 11 can be smoothly performed. Note that the steps omitted in this embodiment among the steps included in the removal step and the support substrate fixing step are the same as those in Embodiment 1. Also, in this embodiment, the steps other than the removal step and the support substrate fixing step (wafer preparation step, grinding step, expansion step, fitting step, resin filling step, resin grinding step, wafer stacking step, dicing step, etc.) can be performed in the same manner as in Embodiment 1. Furthermore, this embodiment can be appropriately combined with other embodiments.

[0285] (Embodiment 6) In this embodiment, the relationship between the step of removing the defective device region 11c from the wafer 11 (removal step) and the step of fixing the wafer 11 to the support substrate 23 (support substrate fixing step) will be described. Specifically, in this embodiment, the process in which the defective device region 11c is removed from the wafer 11 after the wafer 11 is fixed to the support substrate 23 will be described in detail.

[0286] First, the wafer 11 prepared in the preparation step is subjected to grinding (see FIG. 2) as necessary (grinding step). Then, the wafer 11 is fixed to the support substrate 23 (support substrate fixing step). Thereafter, the wafer 11 is subjected to processing such as laser processing and crushing processing, whereby the defective device region 11c is removed from the wafer 11 (removal step).

[0287] Laser processing can be used to remove the defective device region 11c. For example, laser processing is performed on the wafer 11 fixed to the support substrate 23 (see FIG. 4(A) etc.), and thereafter, the defective device region 11c is separated from the wafer 11 (see FIG. 8(B) etc.). Also, for example, plasma etching is performed on the wafer 11 fixed to the support substrate 23 (see FIG. 14(B) etc.), and thereafter, the defective device region 11c is removed from the wafer 11 (see FIG. 8(B) etc.).

[0288] Also, for example, a wafer 11 in which grooves are formed by laser processing or crushing processing etc. is fixed to the support substrate 23 (see FIG. 11(A), FIG. 24(A), etc.). Thereafter, the wafer 11 is ground (see FIG. 11(B), FIG. 24(B), etc.), whereby the defective device region 11c is removed from the wafer 11.

[0289] Note that there is no limitation on the method of fixing the wafer 11 to the support substrate 23. For example, the wafer 11 is fixed to the support substrate 23 via an adhesive layer 25. As described above, as the adhesive layer 25, for example, an adhesive made of a thermosetting resin, an adhesive made of a thermoplastic resin, an adhesive made of an ultraviolet curable resin, a sheet (thermocompression bonding sheet) that can be fixed to the wafer 11 and the support substrate 23 by heating and pressing and does not contain an adhesive, a tape provided with a thermally foamed layer, etc. can be used.

[0290] Then, the through hole 11d of the wafer 11 fixed to the support substrate 23 is expanded (expansion step, see Fig. 16(B)), and the device chip 59 is fitted into the expanded through hole 11d (fitting step, see Figs. 17 to 19(C)). Thereby, a wafer 11 that does not include defective devices 15a is manufactured.

[0291] As described above, when the removal step is performed after the support substrate fixing step, when the defective device region 11c is removed from the wafer 11, the wafer 11 is in a state of being supported by the support substrate 23. Therefore, the fitting step can be continuously performed thereafter, and the fitting of the device chip 59 can be performed smoothly.

[0292] Further, when the removal step is performed after the support substrate fixing step, grinding (see Figs. 11(B), 24(B), etc.) for dividing the defective device region 11c from the wafer 11 is performed after the operation of fixing the wafer 11 to the support substrate 23. Therefore, it is not necessary to carry the wafer 11 in a state of being thinned and easily deformed and bond it to the support substrate 23, and it is possible to improve the working efficiency and prevent the wafer from being damaged.

[0293] Thereafter, a resin filling step (see Fig. 20(A)), a resin grinding step (see Fig. 20(B)), a wafer stacking step (see Fig. 21), and a dicing step (see Fig. 22(A)) are sequentially performed. Thereby, a stacked device chip 81 including a plurality of stacked semiconductor devices is manufactured (see Fig. 22(B)).

[0294] As described above, by performing the removal step after the support substrate fixing step, it is possible to smoothly transition to the fitting step to be performed thereafter. Among the steps included in the support substrate fixing step and the removal step, the steps that are omitted in this embodiment are the same as those in Embodiment 1. Further, in this embodiment, steps other than the support substrate fixing step and the removal step (wafer preparation step, grinding step, expansion step, fitting step, resin filling step, resin grinding step, wafer stacking step, dicing step, etc.) can be performed in the same manner as in Embodiment 1. Furthermore, this embodiment can be appropriately combined with other embodiments.

[0295] Note that the structures, methods, etc. according to the above-described embodiments can be appropriately modified and implemented without departing from the scope of the object of the present invention.

Explanation of Reference Numerals

[0296] 11 Wafer 11a Front surface (first surface) 11b Back surface (second surface) 11c Defective device region 11d Through hole (removal region) 13 Street (dicing planned line) 15 Semiconductor device 15a Defective device 17 Electrode 19 Electrode (via electrode, through electrode) 21 Protection member 23 Support substrate 25 Adhesive layer 27 Modified layer (altered layer) 27a Modified region (altered region) 29 Crack 31 Groove 33 Protection member 35 Kerf (cutting edge) 37 Mask layer 39 Mask 51 Wafer 51a Surface (First surface) 51b Back surface (Second surface) 53 Street (Planned division line) 55 Semiconductor device 57 Electrode (Via electrode, Through electrode) 59 Device chip 61 Gap 63 Adhesive layer 65 Resin 71 Wafer 71a Surface (First surface) 71b Back surface (Second surface) 73 Street (Planned division line) 75 Semiconductor device 77 Electrode (Via electrode, Through electrode) 79 Stacked wafer 81 Stacked device chip 91 Protective layer 93 Groove 95 Through hole 97A, 97B, 97C, 97D Regions (Regions to be processed) 101 Groove (Removal region) 103 Protective member 105 Groove (Removal region) 2 Grinding device 4 Chuck table 4a Holding surface 6 Grinding unit 8 Spindle 10 Mount 12 Grinding wheel 14 Base 16 Grinding stone 18 Nozzle 20 Grinding fluid 30A, 30B, 30C, 30D Laser irradiation units 32A, 32B, 32C, 32D Laser beams 34A, 34B, 34C, 34D Paths 36 Gas (Etching gas) 38 Mask 38a Opening 40 Energy application unit 42 Ultrasonic irradiation unit 44 Container 46 Liquid 48 Ultrasonic transmitter 50 Liquid column 52 Holding table 52a Holding surface 52b Opening 54 Laser irradiation unit 56 Laser beam 58 Gas (etching gas) 60 Heating unit 60a Holding surface 62 Plate 64 Heat source (heater) 66 Gas (etching gas) 68 Cutting blade 70 Holding table 70a Holding surface 70b, 70c Opening 72 Sandblasting unit 74 Abrasive 76 Water jet unit 78 Liquid 80 Drill unit 82 Drill bit 84 Gas (etching gas)

Claims

1. A wafer preparation step of preparing a wafer in which semiconductor devices are formed in a plurality of regions partitioned by a plurality of streets intersecting each other; A removal step of removing a defective device region including the semiconductor device determined to be defective among the plurality of semiconductor devices formed on the wafer from the wafer; An expansion step of expanding a removal region formed by removing the defective device region from the wafer after the removal step; A fitting step of fitting a device chip including a non-defective semiconductor device having the same function as the semiconductor device determined to be defective into the expanded removal region, wherein the method for manufacturing a wafer is characterized by comprising the steps.

2. A wafer preparation step of preparing a wafer in which semiconductor devices are formed in a plurality of regions partitioned by a plurality of streets intersecting each other; A removal step of removing a defective device region including the semiconductor device determined to be defective among the plurality of semiconductor devices formed on the wafer from the wafer; An expansion step of expanding a removal region formed by removing the defective device region from the wafer; A fitting step of fitting a device chip including a non-defective semiconductor device having the same function as the semiconductor device determined to be defective into the expanded removal region, wherein in the expansion step, the removal region is expanded by heating the wafer, and the method for manufacturing a wafer is characterized by this.

3. A wafer preparation step of preparing a first wafer and a second wafer in which semiconductor devices are formed in a plurality of regions partitioned by a plurality of streets intersecting each other; A removal step of removing a defective device region including the semiconductor device determined to be defective among the plurality of semiconductor devices formed on the first wafer from the first wafer; An expansion step of expanding a removal region formed by removing the defective device region from the first wafer after the removal step; A fitting step of fitting a device chip including a non-defective semiconductor device having the same function as the semiconductor device determined to be defective into the expanded removal region; A wafer stacking step of forming a stacked wafer by stacking the second wafer on the first wafer; A dividing step of forming a stacked device chip including a plurality of stacked semiconductor devices by dividing the stacked wafer along the street, and a manufacturing method of a stacked device chip characterized by comprising the same.

4. A wafer preparation step of preparing a first wafer and a second wafer in which semiconductor devices are respectively formed in a plurality of regions partitioned by a plurality of streets intersecting each other, A removal step of removing a defective device region including the semiconductor device determined to be defective among the plurality of semiconductor devices formed on the first wafer from the first wafer, An expansion step of expanding the removal region formed by removing the defective device region from the first wafer, A fitting step of fitting a device chip including a non-defective semiconductor device having the same function as the semiconductor device determined to be defective into the expanded removal region, A wafer stacking step of forming a stacked wafer by stacking the second wafer on the first wafer, A dividing step of forming a stacked device chip including a plurality of stacked semiconductor devices by dividing the stacked wafer along the street, and comprising: In the expansion step, a manufacturing method of a stacked device chip characterized in that the removal region is expanded by heating the first wafer.

5. In the wafer stacking step, the manufacturing method of the stacked device chip according to claim 3 or 4, characterized in that the removal step, the expansion step, and the fitting step are performed on the second wafer stacked on the first wafer.

Images