Semiconductor device, power supply device and amplifier using the same, and method of manufacturing semiconductor device

Abstract

To provide a semiconductor device with improved heat dissipation effect.SOLUTION: A semiconductor device includes a cubic SiC layer, a nitride semiconductor layer provided on a first surface of the SiC layer, and a diamond layer provided on a second surface opposite to the first surface of the SiC layer, and the crystal axis of the diamond layer is oriented within 10° from a <111> direction.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device, a power supply device and an amplifier using the same, and a method for manufacturing a semiconductor device.

Background Art

[0002] Nitride semiconductors have characteristics such as high saturated electron velocity and wide bandgap, and are expected to be applied to high-voltage and high-output semiconductor devices. For example, the bandgap of gallium nitride (GaN) is 3.4 eV, which is larger than the bandgap of silicon (Si) (1.1 eV) and gallium arsenide (GaAs) (1.4 eV), and it has a high breakdown electric field strength. GaN is regarded as a promising material for semiconductor devices operating at high voltages and for semiconductor devices for power supplies that obtain high output.

[0003] As for nitride semiconductor devices, many reports have been made on high electron mobility transistors (HEMTs). GaN-based HEMTs (hereinafter referred to as "GaN-HEMTs") can be used at high current densities and high voltages and can perform high-output operations. On the other hand, in high-output operations, the power consumption inside the semiconductor also increases, so the heat generation inside the GaN-HEMT increases. In order to perform high-output operations, it is desirable that the electrical resistance of the GaN-HEMT be low, but the electron mobility that contributes to the reduction of the electrical resistance decreases as the temperature in the GaN-HEMT increases.

[0004] In order to solve the problem of heat generation in GaN-HEMTs, using diamond with high thermal conductivity as a heat dissipation material has been studied. In particular, single-crystal diamond has high thermal conductivity, and single crystals of nitride semiconductors such as GaN and aluminum nitride (AlN) can be heteroepitaxially grown on single-crystal diamond. However, it is difficult to manufacture single-crystal diamond with a large area, and the cost becomes high. Therefore, a method of growing diamond on a Si substrate or silicon carbide (SiC) has been proposed (see, for example, Patent Documents 1 and 2).

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0006] Diamond grown on SiC basically becomes polycrystalline diamond. The thermal conductivity of polycrystalline diamond is lower than that of single-crystal diamond, and it is difficult to obtain a sufficient heat dissipation effect. One aspect of the present invention provides a semiconductor device with improved heat dissipation effect and a method for manufacturing the same.

Means for Solving the Problems

[0007] In one embodiment, the semiconductor device includes a cubic SiC layer, a nitride semiconductor layer provided on a first surface of the SiC layer, and a diamond layer provided on a second surface of the SiC layer opposite to the first surface. The crystal axis of the diamond layer is oriented within a range of 10° or less from the <111> direction.

Effects of the Invention

[0008] A semiconductor device with improved heat dissipation effect and a method for manufacturing the same are realized.

Brief Description of the Drawings

[0009]

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Embodiments for Carrying Out the Invention

[0010] In an embodiment, a configuration for enhancing the heat dissipation effect of a semiconductor device and realizing high output and high breakdown voltage, and a manufacturing method thereof are provided. As an example, a GaN-HEMT structure, a structure and a manufacturing method for suppressing heat generation during transistor operation are provided.

[0011] Before explaining the specific configuration of the semiconductor device according to the embodiment, the problems in GaN-HMET adopting the conventional heat dissipation structure will be described in more detail.

[0012] FIG. 1 is a schematic diagram of a GaN-HEMT adopting a conventional heat dissipation structure. As described above, since it is difficult to manufacture a large-area single-crystal diamond and the cost increases, it has been proposed to grow a diamond layer on SiC. Since it is difficult to directly grow a diamond layer on the GaN layer, diamond is grown via an SiC layer as shown in FIG. 1.

[0013] Specifically, an SiC layer is formed on a silicon substrate. When SiC is formed on a silicon substrate, most of its crystal structure is 3C-SiC, that is, the period of the atomic occupancy position is a cubic crystal with 3 periods. A GaN layer and a gallium aluminum nitride (AlGaN) layer are formed in this order on the 3C-SiC layer.

[0014] Since the silicon substrate has a low thermal conductivity, the silicon substrate is removed after the formation of the GaN layer and the AlGaN layer. When a diamond layer is grown on the exposed SiC layer, it usually becomes polycrystalline diamond. The reason is that the difference in lattice constant and free energy between SiC and diamond is large, and it is difficult to grow single-crystal diamond on SiC itself. Even if a GaN-HEMT structure including a source electrode (S), a drain electrode (D), and a gate electrode (G) is fabricated later, a sufficient heat dissipation effect cannot be obtained. This is because the thermal conductivity of polycrystalline diamond is as low as 15 W / m·K or less compared to single-crystal diamond having a thermal conductivity of 20 W / m·K or more.

[0015] In the embodiment, highly oriented diamond is grown on one surface of SiC to enhance the heat dissipation effect. When referring to "highly oriented" diamond in this specification and the claims, it means that even if there is a slight rotation or inclination in individual diamond particles, the diamond crystals are oriented and grown in substantially the same direction, showing physical properties close to or equivalent to those of single crystal.

[0016] Highly oriented diamond can be grown by roughening the surface of SiC on which diamond is grown. This is because diamond nuclei are likely to form on the rough SiC surface, and epitaxial growth can be performed in substantially the same direction from the diamond nuclei.

[0017] As a result of investigations by the inventors, it has been found that highly oriented diamond can be obtained by making the surface roughness of the SiC surface that becomes the growth surface of diamond larger than the surface roughness of the SiC surface on the side where the GaN-HEMT structure is formed by a certain degree or more. Since highly oriented diamond has fewer crystal grain boundaries that impede heat dissipation compared to polycrystalline diamond, a higher thermal conductivity can be realized than that of polycrystalline diamond.

[0018] FIG. 2 is a schematic diagram of the semiconductor device 10 according to the embodiment. In the following description, the same components may be denoted by the same reference numerals, and redundant descriptions may be omitted. The semiconductor device 10 includes a 3C-SiC layer 13, one or more nitride semiconductor layers provided on one surface 13a side of the 3C-SiC layer 13, and a highly oriented diamond layer 25 provided on the other surface 13b side of the 3C-SiC layer 13. One or more nitride semiconductor layers provided on the side opposite to the highly oriented diamond layer 25 with the 3C-SiC layer 13 interposed therebetween are, for example, a buffer layer 14, a GaN layer 15, an AlGaN layer 17, and the like. The buffer layer 14 is not essential, but by inserting the buffer layer 14, the lattice mismatch between the 3C-SiC layer 13 and the GaN layer 15 is alleviated.

[0019] In the vicinity of the interface between the GaN layer 15 and the AlGaN layer 17, due to the bonding of different nitride semiconductor materials, a region where free electrons with high mobility spread in layers is formed inside the GaN layer 15. This layered spread of free electrons is called a two-dimensional electron gas (2DEG) 16. This is because GaN is a material having spontaneous polarization in the c-axis direction, and a positive charge is induced at the interface due to the piezoelectric polarization effect accompanying lattice distortion, and a high-concentration 2DEG is generated in the GaN layer 15.

[0020] By providing a gate electrode 21, a source electrode 22, and a drain electrode 23 on a laminate of a buffer layer 14, a GaN layer 15, and an AlGaN layer 17, a GaN-HEMT having a transistor structure with high electron mobility can be obtained. The 2DEG 16 is used as the channel charge of the GaN-HEMT. The AlGaN layer 17 functions as an electron supply layer, and the GaN layer 15 functions as an electron traveling layer.

[0021] On the other surface 13b of the 3C-SiC layer 13, a highly oriented diamond layer 25 is provided. Both 3C-SiC and diamond have a zinc blende structure. Compared with other SiC polytypes (4H-SiC, 6H-SiC, etc.), the diamond layer is more likely to grow epitaxially on 3C-SiC. In the embodiment, by providing the highly oriented diamond layer 25 on the surface-roughened surface 13b, the heat dissipation efficiency is improved compared with the heat dissipation structure using conventional polycrystalline diamond. Although details will be described later, by making the surface roughness of the other surface 13b that becomes the diamond growth surface larger than the surface roughness of one surface 13a of the 3C-SiC layer 13, the growth of diamond is promoted, and a large-area highly oriented diamond layer 25 can be obtained.

[0022] FIG. 3 shows a comparison of the heat distribution of the semiconductor device 10 formed in the embodiment with the heat distribution of the conventional structure. The structure of the embodiment and the conventional structure are the same except for whether highly oriented diamond or polycrystalline diamond is used.

[0023] For the calculation, the thickness of the AlGaN layer 17 is set to 16 nm, the thickness of the GaN layer 15 is set to 300 nm, the buffer layer 14 is an AlGaN layer with a thickness of 65 nm, and the thickness of the 3C-SiC layer 13 is set to 2 μm. The film thicknesses of both the highly oriented diamond layer 25 and the polycrystalline diamond layer are set to 100 μm. The thermal conductivity of each layer is as follows: the GaN layer 15 has a thermal conductivity of 2 W / m·K, and the 3C-SiC layer 13 has a thermal conductivity of 4.9 W / m·K. The AlGaN layer 17 has a thermal conductivity according to Vegard's law. The thermal conductivity of the highly oriented diamond layer 25 is set to 20 W / m·K, and the thermal conductivity of the polycrystalline diamond is set to 15 W / m·K. A SiN passivation film with a thickness of 140 nm is assumed on the device surface on the HEMT side, and 300 K is assumed as the heat contact for heat dissipation on the bottom surface of the diamond layer.

[0024] In the thermal distribution (A) of the structure of the embodiment applying highly oriented diamond, it can be seen that the temperature gradually increases from the HEMT toward the SiC and the highly oriented diamond, and the heat generated by the operation of the HEMT is efficiently dissipated. On the other hand, in the thermal distribution (B) of the conventional structure applying polycrystalline diamond, it can be seen that the temperature in the HEMT is high and the heat dissipation efficiency is reduced.

[0025] FIG. 4 shows the voltage-current characteristics (line A) of the semiconductor device 10 of the embodiment. The horizontal axis is the gate-source voltage (Vgs), and the vertical axis is the drain current density. For comparison, the voltage-current characteristics (line B) of a semiconductor device with a conventional heat dissipation structure and the voltage-current characteristics (line C) of a semiconductor device without a heat dissipation structure are shown. Compared with the semiconductor device without a heat dissipation structure (line C), by using the heat dissipation structure of polycrystalline diamond (line B), the drain current density increases. By using the highly oriented diamond of the embodiment (line A), the drain current density further increases, indicating that the heat dissipation effect is enhanced. As a result of suppressing the temperature rise in the HEMT due to the heat dissipation effect, the electron mobility is maintained at a high level.

[0026] FIG. 5 is an AFM image of the interface between the 3C-SiC layer 13 and the nitride semiconductor layer of the semiconductor device 10 of the embodiment, and FIG. 6 is an AFM image of the interface between the 3C-SiC layer 13 and the highly oriented diamond layer 25 of the semiconductor device 10 of the embodiment. In the sample for AFM observation, the buffer layer 14 in FIG. 2 is omitted.

[0027] FIG. 5 shows the surface state of the 3C-SiC(111) plane formed on the Si(111) substrate. This 3C-SiC(111) plane becomes one surface 13a of the 3C-SiC layer 13 in FIG. 2. The amplitude average (root mean square roughness) in the height direction obtained from the change in the AFM probe position is 4.2 nm.

[0028] FIG. 6 shows the surface state of the interface between the other surface 13b (see FIG. 2) of the 3C-SiC layer 13 and the highly oriented diamond layer 25. After removing the Si(111) substrate, diamond is grown on the exposed surface 13b of the 3C-SiC layer. The root mean square roughness of the 3C-SiC layer 13 at this interface is 8.5 nm. Compared with FIG. 5, the surface roughness in FIG. 6 is more than twice. Diamond nuclei 27 exist on the surface of the 3C-SiC layer with a large surface roughness. These diamond nuclei 27 have an orientation distribution of 10° or less, preferably 7.5° or less, more preferably 2° or less from the <111> direction. The crystal axes of the diamond grown from the diamond nuclei 27 are oriented within a range of 10° or less, preferably 7.5° or less, more preferably 2° or less from the <111> direction. Thereby, a highly oriented diamond layer 25 is obtained.

[0029] FIG. 7 is an X-ray diffraction pattern of the diamond layer used in the semiconductor device 10 in the embodiment. X-rays are irradiated onto the surface of the fabricated diamond layer sample, and the intensity of the reflected light in the <111> direction from the diamond layer is measured by the rocking curve method. The full width at half maximum of this X-ray diffraction pattern is 7.3°. The diffraction pattern obtained by the rocking curve method is also called an X-ray rocking curve, and its full width at half maximum indicates the degree of crystal orientation.

[0030] In the 3C-SiC layer 13, diamond is epitaxially grown on the other surface 13b having a larger surface roughness than the one surface 13a on which the GAN-HEMT is formed. By increasing the surface roughness of the other surface 13b of the 3C-SiC layer 13, the free energy of the surface 13b increases and becomes close to the free energy of diamond. As a result, diamond nuclei 27 are likely to be formed on the roughened surface of 3C-SiC.

[0031] From FIGS. 5 to 7, it can be seen that by increasing the roughness of the opposite surface 13b of the 3C-SiC layer 13 compared to the surface 13a on the HEMT side, the orientation of the diamond layer epitaxially grown on the surface 13b is improved. Preferably, by making the roughness of the surface 13b on the diamond growth side twice or more the roughness of the surface 13a on the HEMT side, the full width at half maximum of the X-ray rocking curve can be made 10° or less, preferably 7.5° or less, and more preferably 2° or less. Since highly oriented diamond has fewer grain boundaries that impede heat dissipation, its thermal conductivity is higher than that of polycrystalline diamond.

[0032] FIGS. 8A to 8F are manufacturing process diagrams of the semiconductor device 10 according to the embodiment. In FIG. 8A, a 3C-SiC layer 13 is formed on a substrate 11. The substrate 11 is a Si(111) substrate. After performing a carbonization process on the substrate 11 using a low-pressure chemical vapor deposition apparatus, SiC is grown. Thereby, a 3C-SiC layer 13 having a (111) plane is formed on the Si(111) substrate.

[0033] In FIG. 8B, using the metalorganic vapor phase epitaxy (MOVPE) method, a buffer layer 14, a GaN layer 15, and an AlGaN layer 17 are formed in this order. The buffer layer 14 may be, for example, a stack of an AlN layer 141 with a thickness of 100 nm and an AlGaN layer 142 with a thickness of 60 nm. The AlGaN layer 142 is Al x Ga 1-x N (0.80 ≦ x ≦ 0.95) with a thickness of 50 nm of Al y Ga 1-yIt may also be one in which N(0.20 ≦ y ≦ 0.40) is sequentially formed. Alternatively, as the buffer layer 14, In a Al b GaN 1-a-b may be used.

[0034] The thickness of the GaN layer 15 is about 200 to 300 nm. When the GaN-HEMT operates, a 2DEG channel with a thickness of about 20 nm is formed in the vicinity of the interface with the AlGaN layer 17. The composition of the AlGaN layer 17 is, for example, Al z Ga 1-z N(0.10 ≦ z ≦ 1.00).

[0035] In the formation of the buffer layer 14, GaN layer 15, and AlGaN layer 17 by the MOVPE method, as the source gas, for example, a mixed gas of triethylboron (TEB) gas, trimethylaluminum (TMAl) gas, trimethylgallium (TMGa) gas, and ammonia (NH3) gas is used, and hydrogen (H2) gas is used as the carrier gas. Depending on the nitride semiconductor layer to be formed, the presence or absence or the flow rate of the TEB gas, TMAl gas, and TMGa gas is appropriately set. The growth pressure is about 1 kPa to 100 kPa, and the growth temperature is about 700 °C to 1500 °C.

[0036] In FIG. 8C, the substrate 11 is removed. By immersing the laminate fabricated in FIG. 8B in 30% diluted hydrofluoric acid, the Si substrate 11 is selectively dissolved.

[0037] In FIG. 8D, the exposed surface of the 3C-SiC layer 13 is roughened. The exposed surface of the 3C-SiC layer 13 corresponds to the other surface 13b of the 3C-SiC layer 13 in FIG. 2. The surface roughening of the 3C-SiC layer 13 is performed, for example, by plasma CVD treatment in a gas of hydrogen and methane at 750 to 850° C. for 1 to 60 minutes. The ratio of hydrogen gas to methane gas is from 90%:10% to 99%:1%. At this time, a negative bias voltage is applied to the wafer side. The hydrocarbons in the plasma are accelerated by the negative bias voltage and collide with the exposed surface of the 3C-SiC layer. As a result, the unevenness of the exposed surface of the 3C-SiC layer 13 increases, and protrusions 131 are formed.

[0038] In FIG. 8E, during the above-described plasma CVD process, diamond nuclei 27 are formed on the protrusions 131 of the 3C-SiC layer 13. The orientation distribution of the diamond nuclei 27 from the <111> direction of the 3C-SiC layer 13 is 10° or less, preferably 7.5° or less, more preferably 2° or less.

[0039] In FIG. 8F, the bias voltage to the wafer is turned off, and the diamond layer 25 is grown to about 100 μm from the diamond nuclei 27. The crystal axes of the diamond layer 25 are aligned within 10° from the <111> direction, preferably within 7.5°, more preferably 2° or less, and the grain boundaries are reduced.

[0040] Thereafter, electrodes are formed on the nitride semiconductor laminated side. Element isolation is formed in the element isolation region on the surface of the AlGaN layer 17 side by photolithography and dry etching, or by photolithography and ion implantation. Subsequently, a mask pattern having an opening is formed in the region where the source electrode and the drain electrode are to be formed by photolithography, and a part of the AlGaN layer 17 is removed by dry etching using a chlorine-based gas. Subsequently, a source electrode 22 and a drain electrode 23 (see FIG. 2) in which Ta with a thickness of 20 nm and Al with a thickness of 200 nm are laminated in this order are formed using photolithography and techniques of evaporation and lift-off. Further, heat treatment is performed in a nitrogen atmosphere in a temperature range of 400° C. to 1000° C., for example, at 550° C. to establish ohmic characteristics.

[0041] Subsequently, a passivation film may be formed over the entire wafer surface. The passivation film is formed to an appropriate thickness using, for example, plasma CVD method, atomic layer deposition (ALD) method, sputtering method, etc. The material of the passivation film is an oxide, nitride, or oxynitride such as Si, Al, Hf, Ar, Ti, Ta, W, etc. As an example, a SiN film with a thickness of 100 to 150 nm may be formed.

[0042] Finally, a mask pattern having an opening in the region where the gate electrode is to be formed is formed by photolithography, and a part of the passivation film is removed by dry etching or wet etching. Subsequently, the gate electrode 21 (see FIG. 2) is formed using photolithography and the techniques of evaporation and lift-off. The gate electrode 21 is formed, for example, by depositing Ni with a thickness of 30 nm and Au with a thickness of 400 nm in this order. Thereby, the semiconductor device 10 of FIG. 2 is fabricated.

[0043] Since the semiconductor device 10 has a highly oriented diamond layer 25 on the side opposite to the GaN-HEMT structure, the thermal conductivity is improved and the heat dissipation effect is improved. During the operation of the semiconductor device 10, the electron mobility is maintained high, enabling high-power operation. The semiconductor device 10 is applied to high-power amplifiers, power supply devices, etc. Hereinafter, application examples of the semiconductor device 10 are shown.

[0044] <Application Example 1> FIG. 9 is a schematic plan view showing the application of the semiconductor device 10 to a semiconductor package 200. The semiconductor package 200 is an example of a discrete package. The semiconductor package 200 includes the semiconductor device 10 having the above-described structure, a lead frame 210 on which the semiconductor device 10 is mounted, and a resin 220 that seals the semiconductor device 10 and the lead frame 210. The semiconductor device 10 is mounted on the die pad 210a of the lead frame 210 using a die attach material or the like.

[0045] The semiconductor device 10 is provided with a pad 50a connected to the gate electrode 21 (see FIG. 2), a pad 60a connected to the source electrode 22 (see FIG. 2), and a pad 70a connected to the drain electrode 23 (see FIG. 2). The pad 50a, the pad 60a, and the pad 70a are respectively connected to the gate lead 211, the source lead 212, and the drain lead 213 of the lead frame 210 using wires 230G, 230S, and 230D such as Al. The lead frame 210, the semiconductor device 10, and the wires 230G, 230S, and 230D are encapsulated with a resin 220 such that a part of each of the gate lead 211, the source lead 212, and the drain lead 213 is exposed.

[0046] On the bottom surface side of the semiconductor device 10, a highly oriented diamond layer 25 is provided. Heat released during the operation of the semiconductor device 10 is transmitted from the highly oriented diamond layer 25 to the lead frame 210, and is radiated to the outside from the lead frame 210. Thereby, the high-power operation of the semiconductor device 10 is maintained, and a high-performance semiconductor package 200 is realized.

[0047] <Application Example 2> FIG. 10 shows an application example of the semiconductor device 10 to a power factor correction (PFC) circuit 300 in an equivalent circuit. The PFC circuit 300 includes a switch element 310, a diode 320, a choke coil 330, a capacitor 340, a capacitor 350, a diode bridge 360, and an alternating current (AC) power supply 370. The semiconductor device 10 functioning as a HEMT is used as the switch element 310.

[0048] The drain electrode of the switch element 310 (corresponding to the drain electrode 23 in FIG. 2) is connected to the anode terminal of the diode 320 and one terminal of the choke coil 330. The source electrode of the switch element 310 (corresponding to the source electrode 22 in FIG. 2) is connected to one terminal of the capacitor 340 and one terminal of the capacitor 350. The other terminal of the capacitor 340 and the other terminal of the choke coil 330 are connected, and the other terminal of the capacitor 350 and the cathode terminal of the diode 320 are connected.

[0049] A gate driver is connected to the gate electrode of the switch element 310 (corresponding to the gate electrode 21 in FIG. 2). An AC power supply 370 is connected between both terminals of the capacitor 340 via a diode bridge 360, and a DC power supply (DC) is taken out between both terminals of the capacitor 350.

[0050] A highly oriented diamond layer 25 (see FIG. 2) is provided on the back surface of the switch element 310 opposite to the HEMT structure. Heat generated during the operation of the switch element 310 is efficiently dissipated from the highly oriented diamond layer 25. As a result, the PFC circuit 30 can stably function as a high-voltage DC power supply and can bring the power factor of the DC power supply close to 1.

[0051] <Application Example 3> FIG. 11 shows an application example of the semiconductor device 10 to a power supply device 400 by an equalization circuit. The power supply device 400 includes a primary-side circuit 410, a secondary-side circuit 420, and a transformer 430 provided between the primary-side circuit 410 and the secondary-side circuit 420. The primary-side circuit 410 includes the PFC circuit 300 described in Application Example 2 and an inverter circuit, for example, a full-bridge inverter circuit 440 connected between both terminals of the capacitor 350 of the PFC circuit 300.

[0052] The PFC circuit 300 has a switch element 310. Other components of the PFC circuit 300 are as described with reference to FIG. 10, and redundant descriptions are omitted. The full-bridge inverter circuit 440 has a plurality of, for example, four switch elements 441, 442, 443, and 444. The secondary-side circuit 420 has a plurality of, for example, three switch elements 421, 422, and 423. The semiconductor device 10 described above is used for the switch element 310 of the PFC circuit 300 and the switch elements 441 to 444 of the full-bridge inverter circuit 440 in the primary-side circuit 410. Ordinary MIS-type field-effect transistors using silicon are used for the switch elements 421 to 423 of the secondary-side circuit 420.

[0053] The switch element 310 and the switch elements 441 to 444 have a highly oriented diamond layer 25 (see FIG. 2) on the back surface opposite to the HEMT structure. The heat generated during the operation of the switch element 310 and the switch elements 441 to 444 is efficiently radiated from the highly oriented diamond layer 25. The power supply device 400 operates stably as a high-performance high-voltage power supply device.

[0054] <Application Example 4> FIG. 12 shows an application example of the semiconductor device 10 to the amplifier 500 by an equalization circuit. The amplifier 500 includes a digital predistortion circuit 510, a mixer 520, a mixer 530, and a power amplifier 540. The semiconductor device 10 described above is used for the power amplifier 540.

[0055] The digital predistortion circuit 510 compensates for the non-linear distortion of the input signal. The mixer 520 mixes the input signal SI with the non-linear distortion compensated and an alternating current signal. The power amplifier 540 amplifies the signal obtained by mixing the input signal SI with the alternating current signal. In the amplifier 500, for example, by switching the switch, the output signal SO can be mixed with the alternating current signal by the mixer 530 and sent to the digital predistortion circuit 510. The amplifier 500 is used as a high-frequency amplifier and a high-output amplifier.

[0056] The power amplifier 540 has a highly oriented diamond layer 25 (see FIG. 2) on the back surface opposite to the HEMT structure. The heat generated during the amplification operation of the amplifier 500 is efficiently radiated from the highly oriented diamond layer 25. The amplifier 500 operates stably as a high-performance high-output amplifier.

[0057] The semiconductor device of the embodiment has been described above based on specific configuration examples, but the present invention is not limited to the above configuration examples. An AlN spacer layer with a thickness of about 2 nm may be inserted in a region excluding directly under the gate electrode 21 at the interface between the GaN layer 15 and the AlGaN layer 17 to reduce the access resistance existing in series between the source electrode 22 and the drain electrode 23. The semiconductor package 200, the PFC circuit 300, the power supply device 400, and the amplifier 500 to which the semiconductor device 10 is applied can be mounted on various electronic devices or electronic apparatuses such as a computer, a smartphone, a tablet terminal, a sensor, a camera, and a radar device.

Explanation of Reference Numerals

[0058] 10 Semiconductor device 11 Substrate 13 3C-SiC layer (cubic SiC layer) 13a First surface 13b Second surface 14 Buffer layer (nitride semiconductor layer) 15 GaN layer (nitride semiconductor layer) 17 AlGaN layer (nitride semiconductor layer) 25 Diamond layer 27 Diamond nucleus 200 Semiconductor package 300 PFC circuit 400 Power supply device 500 Amplifier

Claims

1. a cubic SiC layer, a nitride semiconductor layer provided on a first surface of the SiC layer, and a diamond layer provided on a second surface of the SiC layer opposite to the first surface, and a crystal axis of the diamond layer is oriented within a range of 10° or less from a <111> direction, a surface roughness of an interface between the SiC layer and the diamond layer is larger than a surface roughness of an interface between the SiC layer and the nitride semiconductor layer, a semiconductor device.

2. The surface roughness of the interface between the SiC layer and the diamond layer is two times or more the surface roughness of the interface between the SiC layer and the nitride semiconductor layer, The semiconductor device according to claim 1.

3. A full width at half maximum of an X-ray rocking curve of the diamond layer is 7.5° or less, The semiconductor device according to claim 1 or 2.

4. The nitride semiconductor layer includes a GaN layer and an AlGaN layer, The semiconductor device according to any one of claims 1 to 3.

5. A power supply device using the semiconductor device according to any one of claims 1 to 4.

6. An amplifier using the semiconductor device according to any one of claims 1 to 4.

7. forming a cubic SiC layer on a substrate, forming a laminate including one or more nitride semiconductor layers on a first surface of the SiC layer, removing the substrate to expose a second surface of the SiC layer opposite to the first surface, roughening the second surface and forming diamond nuclei on the roughened second surface, epitaxially growing a diamond layer from the diamond nuclei, A method of manufacturing a semiconductor device.

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