Semiconductor device manufacturing method

Abstract

To provide a technique for forming ion implantation regions whose width does not vary significantly in the depth direction.SOLUTION: A method for manufacturing a semiconductor device comprises a first process S2 in which first ions are implanted in a predetermined region of a semiconductor layer 2 in multiple stages, and a second process S3 in which second ions are implanted in a predetermined region of the semiconductor layer in multiple stages, wherein the second ions overlap the positions in which the first ions are implanted in at least a portion of the predetermined region. In the first process, the first ions are implanted such that the concentration of the first ions increases as the depth of the semiconductor layer increases.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The technology disclosed in this specification relates to a method for manufacturing a semiconductor device. [Background technology]

[0002] Ion implantation processes are performed to manufacture semiconductor devices, and an example of such an ion implantation process is disclosed in Patent Document 1. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2002-359378 Summary of the Invention [Problem to be solved by the invention]

[0004] In a method for manufacturing a semiconductor device, a multi-stage ion implantation process is performed to form a structure in which n-type and p-type regions with a high aspect ratio are repeated, such as a superjunction structure. The inventors' studies have revealed that forming an n-type or p-type region by performing a multi-stage ion implantation process using a single ion results in the following problems.

[0005] In such a multi-stage ion implantation process, ions are implanted from the deepest stage to the shallowest stage. When implanting ions into the deepest stage, they pass through the shallower region, increasing the defect density in the shallower region. Therefore, when implanting ions into the shallower stage, the implanted ions are scattered and spread out significantly. As a result, the ion-implanted region formed has a tapered shape, with the shallower region being wider than the deeper region. For example, it is desirable for the n-type and p-type regions that make up a superjunction structure to have uniform lateral widths along the depth direction. A technology is needed to form ion-implanted regions whose lateral width does not change significantly along the depth direction. [Means for solving the problem]

[0006] The method for manufacturing a semiconductor device disclosed herein may include a first step (S2) of implanting first ions in multiple stages into a predetermined region of a semiconductor layer (2), and a second step (S3) of implanting second ions in multiple stages into the predetermined region of the semiconductor layer, wherein the second ions are implanted in positions that overlap the positions of the first ions in at least a portion of the predetermined region. In the first step, the first ions are implanted so that the concentration of the first ions increases as the depth of the semiconductor layer increases. The concentration of the first ions may increase continuously or stepwise as the depth of the semiconductor layer increases, or a combination thereof.

[0007] According to this manufacturing method, the density of defects formed by the implantation of the first ions is high in deep regions and low in shallow regions. Therefore, even if the density of defects formed by the implantation of the second ions is low in deep regions and high in shallow regions when the second ions are implanted, the total defect density is uniform along the depth direction. Therefore, the influence of ion scattering due to differences in defect density is suppressed. According to this manufacturing method, it is possible to form an ion-implanted region whose lateral width does not change significantly along the depth direction. [Brief explanation of the drawings]

[0008] [Figure 1] 2 shows a flow of an ion implantation process included in the method for manufacturing a semiconductor device. [Figure 2] 2A and 2B are schematic cross-sectional views of a main part of a semiconductor layer in one step of an ion implantation process. [Figure 3] 2A and 2B are schematic cross-sectional views of a main part of a semiconductor layer in one step of an ion implantation process. [Figure 4] 2A and 2B are schematic cross-sectional views of a main part of a semiconductor layer in one step of an ion implantation process. [Figure 5] 2A and 2B are schematic cross-sectional views of a main part of a semiconductor layer in one step of an ion implantation process. [Figure 6]2A and 2B are schematic cross-sectional views of a main part of a semiconductor layer in one step of an ion implantation process. [Figure 7] 2A and 2B are schematic cross-sectional views of a main part of a semiconductor layer in one step of an ion implantation process. [Figure 8] 2A and 2B are schematic cross-sectional views of a main part of a semiconductor layer in one step of an ion implantation process. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, an ion implantation process for forming a p-type ion implanted region in an n-type semiconductor layer will be described with reference to the drawings. The p-type ion implanted region has a small change in width in the depth direction and a generally uniform concentration of p-type dopant in the depth direction. Such a p-type ion implanted region is not particularly limited, but may be, for example, a p-type region that constitutes a superjunction structure. Note that the technology described below can also be applied to forming an n-type ion implanted region in a p-type semiconductor layer.

[0010] FIG. 1 shows the flow of the ion implantation process, and FIGS. 2 to 8 are schematic cross-sectional views of the main part of the semiconductor layer in each step of the ion implantation process.

[0011] First, as shown in FIG. 2, a mask 4 is formed on the upper surface of the n-type semiconductor layer 2 (step S1 in FIG. 1). The mask 4 has openings formed therein corresponding to predetermined regions of the semiconductor layer 2. The semiconductor layer 2 is not particularly limited, but may be made of silicon carbide (SiC), for example. The mask 4 is not particularly limited, but may be made of silicon oxide (SiO2), for example.

[0012] Next, as shown in FIGS. 3 and 4, first ions are implanted in multiple stages into predetermined regions of the semiconductor layer 2 (step S2 in FIG. 1). In the multiple stage ion implantation process of the first ions, the first ions are implanted from the deepest stage to the shallowest stage in order to suppress the effects of knocking. FIG. 3 shows how the first ions are implanted into the deepest stage in the predetermined region of the semiconductor layer 2. FIG. 4 shows how the first ions are implanted into a stage shallower than the deepest stage in the predetermined region of the semiconductor layer 2. Although FIGS. 3 and 4 illustrate the case where ions are implanted in two stages, three or more stages may be used. The first ions are inert ions, and may be, for example, Ar, He, Xe, or Rn.

[0013] 3 and 4 show defects 6 formed by the implantation of first ions. In the multistage ion implantation process of the first ions, the first ions are implanted at the highest dose into the deepest step within a predetermined region of the semiconductor layer 2, and the dose is decreased toward shallower steps. Therefore, in the multistage ion implantation process of the first ions, the first ions are implanted with a profile such that the concentration of the first ions increases as the depth of the semiconductor layer 2 increases. Note that the first ions do not necessarily have to be implanted into the surface portion of the semiconductor layer 2. The defects 6 formed by the implantation of the first ions are mainly formed in the region of the implantation depth, but are also formed in the region through which the first ions pass. Because the first ions are implanted according to the above-described profile, the density of the defects 6 formed by the implantation of the first ions increases with depth, as shown in FIGS. 3 and 4.

[0014] Next, as shown in FIGS. 5 to 7, second ions are implanted in multiple stages into predetermined regions of the semiconductor layer 2 (step S3 in FIG. 1). In the multiple ion implantation process of the second ions, the second ions are implanted in order from the deepest stage to the shallowest stage in order to suppress the effects of knocking. FIG. 5 shows how the second ions are implanted into the deepest stage in the predetermined region of the semiconductor layer 2. FIGS. 6 and 7 show how the second ions are implanted into a stage shallower than the deepest stage in the predetermined region of the semiconductor layer 2. Although FIGS. 5 to 7 illustrate the case where ions are implanted in four stages, the number of stages may be any number other than four. The second ions are ions that serve as p-type dopants and may be, for example, aluminum (Al).

[0015] In the multi-stage ion implantation process of the second ions, the second ions are implanted so as to overlap the positions where the first ions have been implanted. The ion implantation region where the second ions are implanted is indicated by the reference numeral "8." Here, "implanted so as to overlap" means that at least a portion of the ion implantation region of the first ions and at least a portion of the ion implantation region of the second ions overlap. Specifically, some of the depths where the first ions are implanted and some of the depths where the second ions are implanted are approximately the same.

[0016] In the multistage ion implantation process of the second ions, the second ions are implanted under conditions in which the doses of the second ions are substantially the same in each of the multiple stages. Therefore, in the multistage ion implantation process of the second ions, the second ions are implanted with a profile in which the concentration of the second ions is substantially constant along the depth direction of the semiconductor layer 2. Defects 6 formed by the implantation of the second ions are mainly formed in the region of the implantation depth, but are also formed in the region through which the second ions pass. Since the second ions are implanted under conditions in which the doses of the second ions are the same in each of the multiple stages, the density of defects 6 formed by the implantation of the second ions increases as the depth decreases.

[0017] As described above, the defects 6 formed by the ion implantation of the first ions and the defects 6 formed by the ion implantation of the second ions have opposite density relationships in the depth direction. Therefore, as shown in FIGS. 5 to 7, the total density of defects 6 formed by the ion implantation of both the first ions and the second ions is uniformed along the depth direction. Therefore, the influence of ion scattering, which depends on the density of defects 6, is uniformed along the depth direction. Therefore, since the influence of ion scattering is suppressed, the width of the second ions in the depth direction is uniformed.

[0018] Next, as shown in FIG. 8, after removing the mask 4 (step S4 in FIG. 1), an activation annealing process (step S5 in FIG. 1) is performed to form a p-type ion implanted region 8 in the semiconductor layer 2.

[0019] It is known that dopants ion-implanted into silicon carbide hardly diffuse even after activation annealing. Therefore, in order to obtain desired electrical characteristics in silicon carbide semiconductor devices, it is necessary to control the shape of the ion-implanted region during ion implantation with high precision. The ion implantation process disclosed in this specification can meet such requirements. Therefore, the ion implantation process disclosed in this specification is particularly useful when manufacturing silicon carbide semiconductor devices.

[0020] In the example described above, inactive ions are used as the first ions. In this case, the dopant concentration of the p-type ion implantation region 8 can be controlled by the amount of implantation of the second ions. Alternatively, ions that become p-type dopants may also be used as the first ions. In this case, the total amount of the first ions and the second ions may be adjusted to achieve the desired dopant concentration.

[0021] The features of the technology disclosed in this specification are summarized below. , each of which is an independent technical element that is technically useful alone or in various combinations. The present invention is not limited to the combinations described in the claims at the time of filing.

[0022] A method for manufacturing a semiconductor device disclosed in this specification can include a first step of implanting first ions in multiple stages into a predetermined region of a semiconductor layer, and a second step of implanting second ions in multiple stages into the predetermined region of the semiconductor layer, wherein the second ions are implanted in positions that overlap with the positions where the first ions are implanted in at least a part of the predetermined region. In the first step, the first ions are implanted so that the concentration of the first ions increases as the depth of the semiconductor layer increases.

[0023] The semiconductor layer may be silicon carbide. When the semiconductor layer is silicon carbide, the manufacturing method disclosed in this specification is particularly useful.

[0024] The first ions may be inert ions. The second ions may be dopants. According to this manufacturing method, the dopant concentration in the ion implantation region can be controlled by the amount of implantation of the second ions.

[0025] In the first step, the first ions may be implanted from a deep stage to a shallower stage, and in the second step, the second ions may be implanted from a deep stage to a shallower stage.

[0026] Although specific examples of the present invention have been described in detail above, these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and variations of the specific examples exemplified above. Furthermore, the technical elements described in this specification or drawings exhibit technical utility alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. Furthermore, the technology exemplified in this specification or drawings can achieve multiple objectives simultaneously, and achieving one of these objectives itself has technical utility. [Explanation of symbols]

[0027] 2: Semiconductor layer 4: Mask 6: Defect 8: Ion implantation region

Claims

1. A method for manufacturing a semiconductor device having a semiconductor layer of a first conductivity type including an ion-implanted region of a second conductivity type, comprising: a first step (S2) of implanting first ions into predetermined regions of the semiconductor layer (2) in multiple stages; a second step (S3) of implanting second ions into the predetermined region of the semiconductor layer in multiple stages after the first step, in which the second ions are implanted into at least a portion of the predetermined region so as to overlap positions where the first ions have been implanted, In the first step, the first ions are implanted such that the concentration of the first ions increases as the depth of the semiconductor layer increases, and thus the density of defects formed by the implantation of the first ions increases as the depth of the semiconductor layer increases; In the second step, the density of defects formed by the implantation of the second ions increases as the depth of the semiconductor layer decreases, and the first ion is an inert ion; The method for manufacturing a semiconductor device, wherein the second ions are ions that become dopants of the second conductivity type.

2. The method for manufacturing a semiconductor device according to claim 1 , wherein the semiconductor layer is made of silicon carbide.

3. In the first step, the first ions are implanted in order from a deep step to a shallow step, 3. The method for manufacturing a semiconductor device according to claim 1, wherein in said second step, said second ions are also implanted in order from a deep step to a shallow step.

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