Light-emitting device

Abstract

This light-emitting device includes a plurality of pixels arrayed in a matrix configuration in a first direction and a second direction intersecting the first direction. Each of the plurality of pixels arrayed in the matrix configuration includes a substrate, a conductive alignment layer on the substrate, a gallium-nitride-containing semiconductor layer on the conductive alignment layer, a light-emitting layer provided in an island configuration on the semiconductor layer, and an electrode layer on the light-emitting layer. The side surface of the light-emitting layer is covered by an insulating layer, and a reflective layer is provided on the insulating layer as facing the side surface of the light-emitting layer.

Description

[Technical Field]

[0001] An embodiment of the present invention relates to a light emitting device including gallium nitride, and also to a light emitting device forming substrate on which a plurality of light emitting devices including gallium nitride are formed. [Background technology]

[0002] Gallium nitride (GaN) is characterized as a direct transition semiconductor with a wide band gap. Utilizing the characteristics of gallium nitride, light-emitting diodes (LEDs) using gallium nitride films have already been put to practical use. Gallium nitride films for LEDs are generally grown on sapphire substrates at high temperatures of 800°C to 1000°C using MOCVD (Metal Organic Chemical Vapor Deposition) or HVPE (Hydride Vapor Phase Epitaxy).

[0003] Recently, development of so-called micro LED display devices or mini LED display devices, which incorporate tiny LED chips into the pixels of a circuit board, has been progressing as next-generation display devices. Micro LED display devices or mini LED display devices have high efficiency, high brightness, and high reliability. Such micro LED display devices or mini LED display devices are manufactured by transferring LED chips to a backplane on which transistors made of oxide semiconductors or low-temperature polysilicon are formed (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] U.S. Patent No. 8,791,474 Summary of the Invention [Problem to be solved by the invention]

[0005] The manufacturing method of micro LED displays by transferring LED chips is expensive, making it difficult to manufacture micro LED displays inexpensively. On the other hand, if LEDs could be formed on a large-area substrate such as an amorphous glass substrate, manufacturing costs could be reduced. However, as mentioned above, gallium nitride films are formed on sapphire substrates at high temperatures, making it difficult to form gallium nitride films directly on amorphous glass substrates.

[0006] Furthermore, LEDs using gallium nitride emit light not only from the bottom surface of the LED but also from the side surfaces of the LED. Therefore, if the light emitted from the side surfaces of the LED can be utilized in a light-emitting device, the light-emitting efficiency of the light-emitting device in the bottom direction can be improved. Furthermore, the power consumption of the light-emitting device can be reduced.

[0007] In view of the above problems, one embodiment of the present invention has an object to provide a light emitting device that includes a semiconductor layer containing gallium nitride formed on a large-area substrate such as an amorphous glass substrate and has high light extraction efficiency in the downward direction. Another embodiment of the present invention has an object to provide a light emitting device formation substrate on which a plurality of light emitting devices that include a semiconductor layer containing gallium nitride and have high light extraction efficiency in the downward direction are formed. [Means for solving the problem]

[0008] A light-emitting device according to one embodiment of the present invention includes a plurality of pixels arranged in a matrix on a substrate in a first direction and a second direction intersecting the first direction, and each of the plurality of pixels arranged in the matrix includes a conductive alignment layer on the substrate, a semiconductor layer containing gallium nitride on the conductive alignment layer, a light-emitting layer arranged in an island shape on the semiconductor layer, and an electrode layer on the light-emitting layer, and the side of the light-emitting layer is covered by an insulating layer, and a reflective layer facing the side of the light-emitting layer is provided on the insulating layer.

[0009] A light-emitting device according to one embodiment of the present invention includes a plurality of pixels arranged in a matrix on a substrate in a first direction and a second direction intersecting the first direction, and each of the plurality of pixels arranged in the matrix includes an insulating alignment layer on the substrate, a semiconductor layer containing gallium nitride on a conductive alignment layer, an island-shaped light-emitting layer on the semiconductor layer, an electrode layer on the light-emitting layer, an insulating layer covering the side surfaces of the light-emitting layer, and a reflective layer on the insulating layer facing the side surfaces of the light-emitting layer, the reflective layer being in contact with the semiconductor layer. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a schematic diagram illustrating a configuration of a light-emitting device according to one embodiment of the present invention. [Figure 2A] 1 is a schematic cross-sectional view showing the configuration of a light-emitting device according to one embodiment of the present invention. [Figure 2B] 1 is a schematic cross-sectional view showing the configuration of a light-emitting device according to one embodiment of the present invention. [Figure 3A] 1 is a schematic cross-sectional view showing the configuration of a light-emitting device according to one embodiment of the present invention. [Figure 3B] 1 is a schematic cross-sectional view showing the configuration of a light-emitting device according to one embodiment of the present invention. [Figure 4A] 1 is a schematic cross-sectional view showing the configuration of a light-emitting device according to one embodiment of the present invention. [Figure 4B] 1 is a schematic cross-sectional view showing the configuration of a light-emitting device according to one embodiment of the present invention. [Figure 5A] 1 is a schematic cross-sectional view showing the configuration of a light-emitting device according to one embodiment of the present invention. [Figure 5B] 1 is a schematic cross-sectional view showing the configuration of a light-emitting device according to one embodiment of the present invention. [Figure 6A] 1 is a schematic cross-sectional view showing the configuration of a light-emitting device according to one embodiment of the present invention. [Figure 6B] 1 is a schematic cross-sectional view showing the configuration of a light-emitting device according to one embodiment of the present invention. [Figure 7A] 5A to 5C are schematic cross-sectional views showing a method for manufacturing a light emitting device according to one embodiment of the present invention. [Figure 7B] 5A to 5C are schematic cross-sectional views showing a method for manufacturing a light emitting device according to one embodiment of the present invention. [Figure 7C] 5A to 5C are schematic cross-sectional views showing a method for manufacturing a light emitting device according to one embodiment of the present invention. [Figure 7D] 5A to 5C are schematic cross-sectional views showing a method for manufacturing a light emitting device according to one embodiment of the present invention. [Figure 7E] 5A to 5C are schematic cross-sectional views showing a method for manufacturing a light emitting device according to one embodiment of the present invention. [Figure 8A] 1 is a schematic cross-sectional view showing the configuration of a light-emitting device according to one embodiment of the present invention. [Figure 8B] 1 is a schematic cross-sectional view showing the configuration of a light-emitting device according to one embodiment of the present invention. [Figure 9A] 1 is a schematic cross-sectional view showing the configuration of a light-emitting device according to one embodiment of the present invention. [Figure 9B] 1 is a schematic cross-sectional view showing the configuration of a light-emitting device according to one embodiment of the present invention. [Figure 10A] 1 is a schematic cross-sectional view showing the configuration of a light-emitting device according to one embodiment of the present invention. [Figure 10B] 1 is a schematic cross-sectional view showing the configuration of a light-emitting device according to one embodiment of the present invention. [Figure 11A] 5A to 5C are schematic cross-sectional views showing a method for manufacturing a light emitting device according to one embodiment of the present invention. [Figure 11B] 5A to 5C are schematic cross-sectional views showing a method for manufacturing a light emitting device according to one embodiment of the present invention. [Figure 11C] 5A to 5C are schematic cross-sectional views showing a method for manufacturing a light emitting device according to one embodiment of the present invention. [Figure 11D] 5A to 5C are schematic cross-sectional views showing a method for manufacturing a light emitting device according to one embodiment of the present invention. [Figure 11E] 5A to 5C are schematic cross-sectional views showing a method for manufacturing a light emitting device according to one embodiment of the present invention. [Figure 12] 1 is a schematic cross-sectional view showing the configuration of a light-emitting device according to one embodiment of the present invention. [Figure 13]1 is a schematic diagram illustrating a configuration of a light emitting device formation substrate according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. Note that each embodiment is merely an example, and any embodiment that a person skilled in the art could easily come up with by making appropriate modifications while maintaining the gist of the invention is naturally included in the scope of the present invention. Furthermore, in order to clarify the explanation, the drawings may show the width, thickness, shape, etc. of each part schematically compared to the actual embodiment. However, the illustrated shapes are merely examples and do not limit the interpretation of the present invention.

[0012] In this specification, unless otherwise specified, expressions such as "α includes A, B, or C," "α includes any one of A, B, and C," and "α includes one selected from the group consisting of A, B, and C" do not exclude cases where α includes multiple combinations of A to C. Furthermore, these expressions do not exclude cases where α includes other elements.

[0013] In this specification, for the sake of convenience, the terms "above" or "upper" or "below" or "belower" are used. In principle, the substrate on which the structure is formed is used as the reference, and the direction from the substrate toward the structure is referred to as "above" or "upper." Conversely, the direction from the structure toward the substrate is referred to as "below" or "belower." Therefore, in the expression "structure on a substrate," the surface of the structure facing the substrate is the lower surface of the structure, and the surface opposite to that is the upper surface of the structure. Furthermore, the expression "structure on a substrate" merely describes the vertical relationship between the substrate and the structure, and other components may be disposed between the substrate and the structure. Furthermore, the terms "above" or "upper" or "below" or "belower" refer to the stacking order in a structure in which multiple layers are stacked, and do not necessarily have to be in an overlapping positional relationship in a planar view.

[0014] In this specification, the letters "first," "second," or "third" attached to each component are convenient labels used to distinguish each component, and have no other meaning unless otherwise specified.

[0015] In this specification and drawings, the same reference numerals are used to collectively represent multiple identical or similar components, and capital letters may be used to distinguish between these multiple components. Furthermore, a hyphen and lowercase letters may be used to distinguish between parts of a single component.

[0016] In this specification, gallium nitride will be described as an example to facilitate understanding of the invention, but each embodiment is not limited to gallium nitride. In each embodiment, nitride semiconductors such as gallium nitride or gallium aluminum nitride can be applied.

[0017] The following embodiments can be combined with each other unless a technical contradiction occurs.

[0018] First Embodiment The configuration of a light emitting device 100 according to one embodiment of the present invention will be described with reference to FIGS. 1 to 2B.

[0019] FIG. 1 is a schematic diagram illustrating the configuration of a light-emitting device 100 according to one embodiment of the present invention. The light-emitting device 100 includes a pixel unit 100P and a terminal unit 100T formed on a substrate 110. The pixel unit 100P is formed in the center of the substrate 110, and the terminal unit 100T is formed at an edge of the substrate 110. The pixel unit 100P includes a plurality of pixels 100-px arranged in a matrix in a first direction and a second direction perpendicular to (intersecting) the first direction. As will be described in detail below, each of the plurality of pixels 100-px includes a light-emitting diode (LED). The terminal unit 100T includes a plurality of terminals 100-t. A power supply line is connected to each of the plurality of terminals 100-t, allowing a voltage to be applied (current to be supplied) to the LED in the pixel 100-px. Although not shown in detail, a transistor may be provided in the pixel 100-px to control the light emission of the LED.

[0020] 2A and 2B are schematic cross-sectional views showing the configuration of a light-emitting device 100 according to one embodiment of the present invention. Specifically, Fig. 2A is a cross-sectional view of a pixel 100-px taken along a first direction (line A-A') shown in Fig. 1, and Fig. 2B is a cross-sectional view of a pixel 100-px taken along a second direction (line B-B') shown in Fig. 1. As shown in Fig. 2A and 2B, the light-emitting device 100 includes a substrate 110, a conductive alignment layer 120, an n-type semiconductor layer 130-n, a light-emitting layer 130-e, a p-type semiconductor layer 130-p, an electrode layer 140, an insulating layer 150, and a reflective layer 160.

[0021] The conductive alignment layer 120 is provided on the substrate 110. The conductive alignment layer 120 is provided in common to a plurality of pixels 100-px arranged in a matrix.

[0022] The n-type semiconductor layer 130-n, the light-emitting layer 130-e, and the p-type semiconductor layer 130-p are provided in this order on the conductive alignment layer 120. The n-type semiconductor layer 130-n is provided commonly to a plurality of pixels 100-px arranged in a matrix. The light-emitting layer 130-e and the p-type semiconductor layer 130-p are each provided in an island shape in the pixel 100-px. Two adjacent pixels 100-px are separated by a groove portion through which the n-type semiconductor layer 130-n is exposed. Therefore, the groove portion exposes the top surface of the n-type semiconductor layer 130-n and the side surfaces of the light-emitting layer 130-e and the p-type semiconductor layer 130-p. The side surfaces of the groove portion are inclined with respect to the substrate 110. The inclination angle of the groove portion with respect to the substrate 110 is, for example, from 1 degree to 89 degrees, preferably from 30 degrees to 60 degrees.

[0023] The electrode layer 140 is provided on the p-type semiconductor layer 130-p. The electrode layer 140 extends in the second direction and is provided in common to a plurality of pixels 100-px arranged in the second direction. In the second direction, the electrode layer 140 provided in the groove portion faces the side surface of the light-emitting layer 130-e.

[0024] The insulating layer 150 is provided in the groove portion. That is, the insulating layer 150 is provided so as to cover the upper surface of the n-type semiconductor layer 130-n and the side surfaces of the light emitting layer 130-e and the p-type semiconductor layer 130-p.

[0025] The reflective layer 160 is provided on the insulating layer 150. The reflective layer 160 extends in the second direction and is provided between two pixels 100-px adjacent in the first direction. In the first direction, the reflective layer 160 provided in the groove portion faces the side surface of the light-emitting layer 130-e. Therefore, the inclination angle of the reflective layer 160 is the same as the inclination angle of the groove portion, and is, for example, from 1 degree to 89 degrees, and preferably from 30 degrees to 60 degrees.

[0026] Each of the plurality of pixels 100-px includes, as an LED, a conductive alignment layer 120, an n-type semiconductor layer 130-n, a light-emitting layer 130-e, a p-type semiconductor layer 130-p, and an electrode layer 140. One of the electrodes of the LED is the conductive alignment layer 120, and the other of the electrodes of the LED is the electrode layer 140. The conductive alignment layer 120 is provided in common to the plurality of pixels 100-px arranged in a matrix, while the electrode layer 140 is provided in common to the plurality of pixels 100-px arranged in the second direction. Therefore, in the light-emitting device 100, light emission can be controlled for each of the plurality of pixels 100-px arranged in the second direction.

[0027] Next, the materials of each component will be described.

[0028] The substrate 110 is a base material (support substrate) of the light emitting device 100. As will be described in detail later, in the light emitting device 100, the n-type semiconductor layer 130-n, the light emitting layer 130-e, and the p-type semiconductor layer 130-p are each formed by sputtering. Therefore, the substrate 110 only needs to be heat resistant to a relatively low temperature of, for example, about 600°C. For example, an amorphous glass substrate can be used as the substrate 110. Alternatively, a resin substrate such as a polyimide substrate, an acrylic substrate, a siloxane substrate, or a fluororesin substrate can also be used as the substrate 110. Such amorphous glass substrates or resin substrates can be made large in area.

[0029] Although not shown, an underlayer may be provided on the substrate 110. The underlayer can prevent the diffusion of impurities from the substrate 110 or external impurities (e.g., moisture or sodium (Na)). The underlayer can be made of, for example, silicon nitride (SiN x ) film or the like can be used as the underlayer. x ) film and silicon nitride (SiN x ) film may also be used.

[0030] The conductive orientation layer 120 can improve the crystallinity of a gallium nitride (GaN) film deposited on the conductive orientation layer 120 by sputtering. Specifically, the conductive orientation layer 120 can control the c-axis of the gallium nitride film deposited on the conductive orientation layer 120 to grow in the film thickness direction. In other words, the conductive orientation layer 120 can control the n-type semiconductor layer 130-n to have a c-axis orientation. GaN, which has a hexagonal close-packed structure, grows in the c-axis direction to minimize surface energy. However, depositing a gallium nitride film on the conductive orientation layer 120 promotes crystal growth of the gallium nitride film in the c-axis direction. The conductive orientation layer 120 can be made of a conductive material having a hexagonal close-packed structure, a face-centered cubic structure, or a structure similar thereto (e.g., a wurtzite structure, a corundum structure, or a diamond structure). Here, a structure similar to a hexagonal close-packed structure or a face-centered cubic structure includes a crystal structure in which the c-axis is not 90° with respect to the a-axis and b-axis. A conductive orientation layer 120 made of a conductive material having a hexagonal close-packed structure or a structure similar thereto is oriented in the (0001) direction, i.e., the c-axis direction, relative to the substrate 110 (hereinafter referred to as the (0001) orientation of the hexagonal close-packed structure). Furthermore, a conductive orientation layer 120 made of a material having a face-centered cubic structure or a structure similar thereto is oriented in the (111) direction relative to the substrate 110 (hereinafter referred to as the (111) orientation of the face-centered cubic structure). The conductive orientation layer 120 having the (0001) orientation of the hexagonal close-packed structure or the (111) orientation of the face-centered cubic structure promotes crystal growth in the c-axis direction of the gallium nitride film formed on the conductive orientation layer 120, and the n-type semiconductor layer 130-n has a highly crystalline c-axis orientation.

[0031] The crystallinity of the gallium nitride film on the conductive alignment layer 120 is affected by the surface condition of the conductive alignment layer 120. Therefore, it is preferable that the conductive alignment layer 120 has a smooth surface with few irregularities. For example, the arithmetic mean roughness (Ra) of the surface of the conductive alignment layer 120 is preferably smaller than 2.3 nm. Furthermore, the root mean square roughness (Rq) of the surface of the conductive alignment layer 120 is preferably smaller than 2.9 nm. When the surface roughness of the conductive alignment layer 120 satisfies the above conditions, the n-type semiconductor layer 130-n has a c-axis orientation with higher crystallinity. The thickness of the conductive alignment layer 120 is 5 nm to 50 nm, and preferably 15 nm to 30 nm.

[0032] The conductive alignment layer 120 functions as an n-type electrode of the LED and also functions to reflect light emitted from the light-emitting layer 130-e. Therefore, the conductive alignment layer 120 has both conductivity and reflectivity. Examples of the conductive alignment layer 120 include titanium (Ti), titanium nitride (TiN), and the like. x ), titanium oxide (TiO x ), graphene, zinc oxide (ZnO), magnesium diboride (MgB2), aluminum (Al), silver (Ag), calcium (Ca), nickel (Ni), copper (Cu), strontium (Sr), rhodium (Rh), palladium (Pd), cerium (Ce), ytterbium (Yb), iridium (Ir), platinum (Pt), gold (Au), lead (Pb), actinium (Ac), thorium (Th), BiLaTiO, SrFeO, BiFeO, BaFeO, ZnFeO, or PMnN-PZT can be used. In particular, it is preferable to use titanium as the conductive alignment layer 120.

[0033] The n-type semiconductor layer 130-n transports electrons and injects the electrons into the light emitting layer 130-e. As the n-type semiconductor layer, for example, a gallium nitride film doped with silicon (Si) can be used.

[0034] The light-emitting layer 130-e recombines the injected electrons and holes to emit light. The light-emitting layer 130-e may have a multiple quantum well structure. For example, the light-emitting layer 130-e may be a laminated film in which indium gallium nitride (InGaN) films and gallium nitride films are alternately stacked.

[0035] The p-type semiconductor layer 130-p transports holes and injects the holes into the light emitting layer 130-e. As the p-type semiconductor layer, for example, a gallium nitride film doped with magnesium (Mg) can be used.

[0036] The electrode layer 140 functions as a p-type electrode of the LED. The electrode layer 140 may be made of a metal material such as palladium (Pd) or gold (Au).

[0037] In the light emitting device 100, the electrode layer 140 may function as an n-type electrode of the LED. In this case, the light emitting device 100 has a structure in which the n-type semiconductor layer 130-n is in contact with the electrode layer 140. That is, the p-type semiconductor layer 130-p, the light emitting layer 130-e, and the n-type semiconductor layer 130-n are provided in this order on the conductive alignment layer 120. In this case, the electrode layer 140 can be made of, for example, a metal material such as silver (Ag) or indium (In), or a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), or zinc oxide (ZnO).

[0038] In the light-emitting device 100, light emitted from the light-emitting layer 130-e is extracted by passing through the conductive alignment layer 120. Therefore, the conductive alignment layer 120 has light-transmitting or semi-light-transmitting properties. When a metal material is used for the conductive alignment layer 120, the conductive alignment layer 120 having semi-light-transmitting properties is formed by reducing the film thickness of the metal material. The conductive alignment layer 120 may be a laminate of a metal material and a transparent conductive oxide.

[0039] The insulating layer 150 separates (electrically insulates) the n-type semiconductor layer 130-n from the reflective layer 160. The insulating layer 150 may be made of an inorganic material such as silicon oxide or silicon nitride, or a stack of these inorganic materials.

[0040] The reflective layer 160 can reflect light emitted from the side surface of the light-emitting layer 130-e toward the lower surface of the light-emitting device 100. The reflective layer 160 can be made of, for example, silver (Ag), titanium (Ti), molybdenum (Mo), tungsten (W), aluminum (Al), or an alloy thereof.

[0041] Although not shown, a protective film can be provided to cover the LED as needed. A silicon nitride film can be used as the protective film. Alternatively, a laminated film of a silicon oxide film and a silicon nitride film can be used as the protective film.

[0042] In the light emitting device 100, the n-type semiconductor layer 130-n is in contact with the conductive alignment layer 120. This improves the crystallinity of the n-type semiconductor layer 130-n. Furthermore, the crystallinity of not only the n-type semiconductor layer 130-n but also the light emitting layer 130-e and the p-type semiconductor layer 130-p is improved. Therefore, in the light emitting device 100, the light emission intensity from the light emitting layer 130-e is increased.

[0043] Furthermore, in the light emitting device 100, light emitted from the side surface of the light emitting layer 130-e is reflected in the first direction by the reflective layer 160 and in the second direction by the electrode layer 140 toward the bottom surface of the light emitting device 100. Therefore, in the light emitting device 100, the light extraction efficiency in the bottom surface direction is increased, and the light emitting efficiency in the bottom surface direction can be improved.

[0044] <Modification 1 of the First Embodiment> 3A and 3B, a description will be given of a light emitting device 100A, which is one of variations of the light emitting device 100. Note that when the configuration of the light emitting device 100A is the same as the configuration of the light emitting device 100, the description thereof may be omitted.

[0045] 3A and 3B are cross-sectional views showing the configuration of a light-emitting device 100A according to one embodiment of the present invention. Specifically, FIG. 3A is a cross-sectional view of a pixel 100A-px taken along a first direction, and FIG. 3B is a cross-sectional view of the pixel 100A-px taken along a second direction. As shown in FIGS. 3A and 3B, the light-emitting device 100A includes a substrate 110, a conductive alignment layer 120, an n-type semiconductor layer 130A-n, a light-emitting layer 130-e, a p-type semiconductor layer 130-p, an electrode layer 140, an insulating layer 150A, and a reflective layer 160.

[0046] The n-type semiconductor layer 130A-n is provided on the conductive alignment layer 120. The n-type semiconductor layer 130A-n is provided in an island shape in the pixel 100A-px. Two adjacent pixels 100A-px are separated by a groove portion where the conductive alignment layer 120 is exposed. Therefore, the side surfaces of the n-type semiconductor layer 130A-n, the light-emitting layer 130-e, and the p-type semiconductor layer 130-p are exposed in the groove portion.

[0047] The insulating layer 150A is provided in the groove portion so as to cover the upper surface of the conductive alignment layer 120 and the side surfaces of the n-type semiconductor layer 130A-n, the light-emitting layer 130-e, and the p-type semiconductor layer 130-p.

[0048] Each of the plurality of pixels 100A-px includes, as an LED, a conductive alignment layer 120, an n-type semiconductor layer 130A-n, a light-emitting layer 130-e, a p-type semiconductor layer 130-p, and an electrode layer 140. One of the electrodes of the LED is the conductive alignment layer 120, and the other of the electrodes of the LED is the electrode layer 140. The conductive alignment layer 120 is provided in common to the plurality of pixels 100A-px arranged in a matrix, while the electrode layer 140 is provided in common to the plurality of pixels 100A-px arranged in a second direction. Therefore, in the light-emitting device 100A, light emission can be controlled by treating the plurality of pixels 100A-px arranged in the second direction as a single unit.

[0049] In the light emitting device 100A, the n-type semiconductor layer 130A-n is in contact with the conductive alignment layer 120. This improves the crystallinity of the n-type semiconductor layer 130A-n. Furthermore, the crystallinity of not only the n-type semiconductor layer 130A-n but also the light emitting layer 130-e and the p-type semiconductor layer 130-p is improved. Therefore, in the light emitting device 100A, the light emission intensity from the light emitting layer 130-e is increased.

[0050] Furthermore, in the light emitting device 100A, light emitted from the side surface of the light emitting layer 130-e is reflected toward the bottom surface of the light emitting device 100A by the reflective layer 160 in the first direction and by the electrode layer 140 in the second direction. Therefore, in the light emitting device 100A, the light extraction efficiency toward the bottom surface is increased, and the light emitting efficiency in the bottom surface direction can be improved.

[0051] <Modification 2 of the First Embodiment> 4 and 4B, a description will be given of light emitting device 100B, which is one of variations of light emitting device 100. Note that when the configuration of light emitting device 100B is the same as the configuration of light emitting device 100 or light emitting device 100A, the description thereof may be omitted.

[0052] 4A and 4B are cross-sectional views showing the configuration of a light-emitting device 100B according to one embodiment of the present invention. Specifically, FIG. 4A is a cross-sectional view of a pixel 100B-px taken along a first direction, and FIG. 4B is a cross-sectional view of the pixel 100B-px taken along a second direction. As shown in FIGS. 4A and 4B, the light-emitting device 100B includes a substrate 110, a conductive alignment layer 120B, an n-type semiconductor layer 130B-n, a light-emitting layer 130-e, a p-type semiconductor layer 130-p, an electrode layer 140, an insulating layer 150B, and a reflective layer 160.

[0053] The conductive alignment layer 120B is provided on the substrate 110. The conductive alignment layer 120B is provided in an island shape in the pixel 100B-px.

[0054] The n-type semiconductor layer 130B-n is provided on the conductive alignment layer 120B. The n-type semiconductor layer 130B-n is provided in an island shape in the pixel 100B-px. Two adjacent pixels 100B-px are separated by a groove portion where the substrate 110 is exposed. Therefore, the side surfaces of the conductive alignment layer 120B, the n-type semiconductor layer 130B-n, the light-emitting layer 130-e, and the p-type semiconductor layer 130-p are exposed in the groove portion.

[0055] The insulating layer 150B is provided in the groove portion so as to cover the upper surface of the substrate 110 and the side surfaces of the conductive alignment layer 120B, the n-type semiconductor layer 130B-n, the light-emitting layer 130-e, and the p-type semiconductor layer 130-p.

[0056] Each of the pixels 100B-px includes an LED, a conductive alignment layer 120B, an n-type semiconductor layer 130B-n, a light-emitting layer 130-e, a p-type semiconductor layer 130-p, and an electrode layer 140. One of the LED electrodes is the conductive alignment layer 120B, and the other is the electrode layer 140. The conductive alignment layer 120B is provided for each of the pixels 100B-px, while the electrode layer 140 is provided in common to the pixels 100B-px arranged in the second direction. In the light-emitting device 100B, a transistor, for example, for controlling the LED is provided on the substrate 110, and the conductive alignment layer 120B and the transistor are electrically connected. Therefore, the light emission of each pixel 100B-px can be controlled in the light-emitting device 100B. In other words, the light-emitting device 100B can control the light emission of the pixel 100B-px through active driving.

[0057] In the light emitting device 100B, the n-type semiconductor layer 130B-n is in contact with the conductive alignment layer 120B. This improves the crystallinity of the n-type semiconductor layer 130B-n. Furthermore, the crystallinity of not only the n-type semiconductor layer 130-n but also the light emitting layer 130-e and the p-type semiconductor layer 130-p is improved. Therefore, in the light emitting device 100B, the light emission intensity from the light emitting layer 130-e is increased.

[0058] Furthermore, in the light emitting device 100B, light emitted from the side surface of the light emitting layer 130-e is reflected toward the bottom surface of the light emitting device 100B by the reflective layer 160 in the first direction and by the electrode layer 140 in the second direction. Therefore, in the light emitting device 100B, the light extraction efficiency toward the bottom surface is increased, and the light emitting efficiency in the bottom surface direction can be improved.

[0059] <Modification 3 of the First Embodiment> 5A and 5B, a description will be given of a light emitting device 100C, which is one of variations of the light emitting device 100. Note that when the configuration of the light emitting device 100C is the same as the configuration of the light emitting device 100, the description thereof may be omitted.

[0060] 5A and 5B are cross-sectional views showing the configuration of a light-emitting device 100C according to one embodiment of the present invention. Specifically, FIG. 5A is a cross-sectional view of a pixel 100C-px taken along a first direction, and FIG. 5B is a cross-sectional view of the pixel 100C-px taken along a second direction. As shown in FIGS. 5A and 5B, the light-emitting device 100C includes a substrate 110, a conductive alignment layer 120, an n-type semiconductor layer 130-n, a light-emitting layer 130-e, a p-type semiconductor layer 130-p, an electrode layer 140C, and an insulating layer 150.

[0061] The electrode layer 140C is provided on the p-type semiconductor layer 130-p and the insulating layer 150. The electrode layer 140C is provided in common to the plurality of pixels 100C-px arranged in a matrix. In the first and second directions, the electrode layer 140C provided in the groove portion faces the side surface of the light-emitting layer 130-e.

[0062] In the electrode layer 140C of the light emitting device 100C, the reflective layer is the same layer as the electrode layer and is made of the same material.

[0063] Each of the pixels 100C-px includes an LED, a conductive alignment layer 120, an n-type semiconductor layer 130-n, a light-emitting layer 130-e, a p-type semiconductor layer 130-p, and an electrode layer 140C. One of the LED electrodes is the conductive alignment layer 120, and the other is the electrode layer 140C. The conductive alignment layer 120 and the electrode layer 140C are each provided in common to the pixels 100A-px arranged in a matrix. Therefore, in the light-emitting device 100C, light emission can be controlled for each of the pixels 100C-px arranged in a matrix.

[0064] In the light emitting device 100C, the n-type semiconductor layer 130-n is in contact with the conductive alignment layer 120. This improves the crystallinity of the n-type semiconductor layer 130-n. Furthermore, the crystallinity of not only the n-type semiconductor layer 130-n but also the light emitting layer 130-e and the p-type semiconductor layer 130-p is improved. Therefore, in the light emitting device 100C, the light emitting intensity from the light emitting layer 130-e is increased.

[0065] Furthermore, in the light emitting device 100C, light emitted from the side surface of the light emitting layer 130-e is reflected by the electrode layer 140C in the first and second directions toward the bottom surface of the light emitting device 100C. Therefore, in the light emitting device 100C, the light extraction efficiency toward the bottom surface is increased, and the light emitting efficiency in the bottom surface direction can be improved.

[0066] <Fourth Modification of the First Embodiment> 6A and 6B, a description will be given of light emitting device 100D, which is one of modifications of light emitting device 100. Note that when the configuration of light emitting device 100D is the same as the configuration of light emitting device 100, the description thereof may be omitted.

[0067] 6A and 6B are cross-sectional views showing the configuration of a light-emitting device 100D according to one embodiment of the present invention. Specifically, FIG. 6A is a cross-sectional view of a pixel 100D-px cut along a first direction, and FIG. 6B is a cross-sectional view of the pixel 100D-px cut along a second direction. As shown in FIGS. 6A and 6B, the light-emitting device 100D includes a substrate 110, a conductive alignment layer 120D, an n-type semiconductor layer 130-n, a light-emitting layer 130-e, a p-type semiconductor layer 130-p, an electrode layer 140, an insulating layer 150, and a reflective layer 160.

[0068] The conductive alignment layer 120D is provided on the substrate 110. The conductive alignment layer 120D extends in a first direction and is provided in common to a plurality of pixels 100D-px arranged in the first direction.

[0069] Each of the pixels 100D-px includes an LED, a conductive alignment layer 120D, an n-type semiconductor layer 130-n, a light-emitting layer 130-e, a p-type semiconductor layer 130-p, and an electrode layer 140. One of the LED electrodes is the conductive alignment layer 120D, and the other is the electrode layer 140. The conductive alignment layer 120D is common to the pixels 100D-px arranged in a first direction, while the electrode layer 140 is common to the pixels 100D-px arranged in a second direction. Therefore, the light-emitting device 100D can control the light emission of the pixel 100D-px at the intersection of the conductive alignment layer 120D and the electrode layer 140. That is, the light-emitting device 100D can control the light emission of the pixel 100D-px by passive driving.

[0070] In the light emitting device 100D, the n-type semiconductor layer 130-n is in contact with the conductive alignment layer 120D. This improves the crystallinity of the n-type semiconductor layer 130-n. Furthermore, the crystallinity of not only the n-type semiconductor layer 130-n but also the light emitting layer 130-e and the p-type semiconductor layer 130-p is improved. Therefore, in the light emitting device 100D, the light emission intensity from the light emitting layer 130-e is increased.

[0071] Furthermore, in light emitting device 100D, light emitted from the side surface of light emitting layer 130-e is reflected toward the bottom surface of light emitting device 100D by reflective layer 160 in the first direction and by electrode layer 140 in the second direction. Therefore, in light emitting device 100D, the light extraction efficiency toward the bottom surface is increased, and the light emitting efficiency in the bottom surface direction can be improved.

[0072] Second Embodiment A method for manufacturing the light emitting device 100 according to one embodiment of the present invention will be described with reference to Figures 7A to 7E. Figures 7A to 7E are schematic cross-sectional views showing a method for manufacturing the light emitting device 100 according to one embodiment of the present invention.

[0073] First, as shown in Fig. 7A, a conductive alignment layer 120 is formed on a substrate 110. The conductive alignment layer 120 can be formed by deposition using any method (apparatus) such as sputtering or CVD.

[0074] 7B, an n-type semiconductor film 130a containing silicon-doped gallium nitride, a stacked film 130b in which indium gallium nitride films and gallium nitride films are alternately stacked, and a p-type semiconductor film 130c containing magnesium-doped gallium nitride are formed. The n-type semiconductor film 130a, the stacked film 130b, and the p-type semiconductor film 130c are all formed by sputtering.

[0075] Here, as an example, deposition of a gallium nitride film using sputtering will be described.

[0076] A substrate 110 on which a conductive alignment layer 120 is formed is placed in a vacuum chamber facing a gallium nitride target. The gallium nitride composition ratio in the gallium nitride target is preferably 0.7 to 2 (gallium to nitrogen). Nitrogen can be supplied to the vacuum chamber separately from the sputtering gas (argon, krypton, etc.). In this case, the gallium nitride composition ratio in the gallium nitride target is preferably higher in gallium than in nitrogen. For example, nitrogen can be supplied using a nitrogen radical supply source. The sputtering power supply may be a DC power supply, an RF power supply, or a pulsed DC power supply.

[0077] The substrate 110 in the vacuum chamber may be heated. For example, the substrate 110 can be heated to a temperature of 100°C or higher but lower than 600°C, and preferably to a temperature of 100°C or higher but lower than 400°C. This temperature is also applicable to amorphous glass substrates, which have low heat resistance. This temperature is also lower than the film formation temperature in MOCVD or HVPE.

[0078] After the vacuum chamber is fully evacuated, a sputtering gas is supplied, and a voltage is applied between the substrate 110 and the gallium nitride target at a predetermined pressure to generate plasma, which deposits a gallium nitride film.

[0079] Although the method for forming a gallium nitride film using sputtering has been described above, the configuration or conditions of the sputtering can be changed as appropriate. Furthermore, by using a silicon-doped gallium nitride target and a magnesium-doped gallium nitride target instead of a gallium nitride target, n-type semiconductor films and p-type semiconductor films can be formed, respectively.

[0080] Next, as shown in FIG. 7C, an n-type semiconductor layer 130-n, a light-emitting layer 130-e, and a p-type semiconductor layer 130-p are formed. The island-shaped light-emitting layer 130-e and p-type semiconductor layer 130-p are formed using photolithography. At this time, a portion of the top surface of the n-type semiconductor layer 130-n may be etched to form a recess. Furthermore, to form a groove with an inclined side surface, the stacked film 130b and the p-type semiconductor film 130c may be patterned using a half-tone mask or a gray-tone mask.

[0081] Next, as shown in Fig. 7D, an insulating layer 150 is formed in the grooves. The insulating layer 150 is formed by depositing an inorganic material and patterning the inorganic material using photolithography.

[0082] 7E, the reflective layer 160 is formed on the insulating layer 150. The reflective layer 160 is formed by depositing a metal material and patterning the metal material using photolithography.

[0083] Finally, the electrode layer 140 is formed on the p-type semiconductor layer 130-p, thereby manufacturing the light emitting device 100 shown in Figures 2A and 2B. The electrode layer 140 can be formed by deposition using any method (apparatus) such as sputtering or CVD.

[0084] The method for manufacturing the light emitting device 100 according to this embodiment allows manufacturing at a lower temperature than conventional methods, and therefore it is possible to use a large-area amorphous glass substrate as the substrate 110 and manufacture a plurality of light emitting devices 100 on the substrate 110. This allows the manufacturing cost of the light emitting device 100 to be reduced.

[0085] Third Embodiment 8A and 8B, the configuration of a light emitting device 200 according to one embodiment of the present invention will be described. Note that when the configuration of the light emitting device 200 is the same as the configuration of the light emitting device 100, the description thereof may be omitted.

[0086] 8A and 8B are schematic cross-sectional views showing the configuration of a light-emitting device 200 according to one embodiment of the present invention. Specifically, FIG. 8A is a cross-sectional view of pixel 200-px taken along a first direction, and FIG. 8B is a cross-sectional view of pixel 200-px taken along a second direction. As shown in FIGS. 8A and 8B, light-emitting device 200 includes a substrate 210, an insulating alignment layer 220, an n-type semiconductor layer 230-n, an emitting layer 230-e, a p-type semiconductor layer 230-p, an electrode layer 240, an insulating layer 250, and a reflective layer 260.

[0087] The insulating alignment layer 220 is provided on the substrate 210. The insulating alignment layer 220 is provided in common to a plurality of pixels 200-px arranged in a matrix.

[0088] The n-type semiconductor layer 230-n, the light-emitting layer 230-e, and the p-type semiconductor layer 230-p are provided in this order on the insulating alignment layer 220. The n-type semiconductor layer 230-n is provided commonly to a plurality of pixels 200-px arranged in a matrix. The light-emitting layer 230-e and the p-type semiconductor layer 230-p are each provided in an island shape in the pixel 200-px. Two adjacent stacks of the light-emitting layer 230-e and the p-type semiconductor layer 230-p are separated by a groove portion through which the n-type semiconductor layer 230-n is exposed. Therefore, the top surface of the n-type semiconductor layer 230-n and the side surfaces of the light-emitting layer 230-e and the p-type semiconductor layer 230-p are exposed in the groove portion. The side surfaces of the groove portion are inclined with respect to the substrate 210. The inclination angle of the groove portion with respect to the substrate 210 is, for example, 1 degree or more and 89 degrees or less, preferably 30 degrees or more and 60 degrees or less.

[0089] The electrode layer 240 is provided on the p-type semiconductor layer 230-p. The electrode layer 240 extends in the second direction and is provided in common to the plurality of pixels 200-px arranged in the second direction. In the second direction, the electrode layer 240 provided in the groove portion faces the side surface of the light-emitting layer 230-e.

[0090] Although the electrode layer 240 is a p-type electrode, it may be an n-type electrode. In this case, a p-type semiconductor layer 230-p, a light-emitting layer 230-e, and an n-type semiconductor layer 230-n are provided in this order on the insulating alignment layer 220.

[0091] The insulating layer 250 is provided on at least the side surfaces of the groove. That is, the insulating layer 250 is provided so as to cover the side surfaces of the light emitting layer 230-e and the p-type semiconductor layer 230-p. In the groove, the insulating layer 250 includes an opening through which the n-type semiconductor layer 230-n is exposed.

[0092] The reflective layer 260 is provided on the n-type semiconductor layer 230-n and the insulating layer 250. That is, the reflective layer 260 is in contact with the n-type semiconductor layer 230-n through the opening of the insulating layer 250. The reflective layer 260 extends in the second direction and is provided commonly to a plurality of pixels 200-px arranged in the second direction. In addition, in the first direction, the reflective layer 260 provided in the groove portion faces the side surface of the light-emitting layer 230-e. Therefore, the inclination angle of the reflective layer 260 is the same as the inclination angle of the groove portion, and is, for example, not less than 1 degree and not more than 89 degrees, and preferably not less than 30 degrees and not more than 60 degrees.

[0093] Each of the plurality of pixels 200-px includes, as an LED, a reflective layer 260, an n-type semiconductor layer 230-n, a light-emitting layer 230-e, a p-type semiconductor layer 230-p, and an electrode layer 240. Here, one of the electrodes of the LED is the reflective layer 260, and the other of the electrodes of the LED is the electrode layer 240. The reflective layer 260 and the electrode layer 240 are provided in common to the plurality of pixels 200-px arranged in a matrix in the second direction. Therefore, in the light-emitting device 200, light emission can be controlled for each of the plurality of pixels 200-px arranged in the second direction as a single unit.

[0094] Next, the materials of each component will be described.

[0095] The substrate 210, the n-type semiconductor layer 230-n, the light-emitting layer 230-e, the p-type semiconductor layer 230-p, the electrode layer 240, the insulating layer 250, and the reflective layer 260 are similar to the substrate 110, the n-type semiconductor layer 130-n, the light-emitting layer 130-e, the p-type semiconductor layer 130-p, the electrode layer 140, the insulating layer 150, and the reflective layer 160, respectively.

[0096] The insulating orientation layer 220 has insulating properties and can improve the crystallinity of the n-type semiconductor layer 230-n on the insulating orientation layer 220. For example, aluminum nitride (AlN), aluminum oxide (Al2O3), lithium niobate (LiNbO), BiLaTiO, SrFeO, SrFeO, BiFeO, BaFeO, ZnFeO, PMnN-PZT, or biological apatite (BAp) can be used as the insulating orientation layer 220. In particular, it is preferable to use aluminum nitride (AlN) as the insulating orientation layer 220.

[0097] In the light emitting device 200, the n-type semiconductor layer 230-n is in contact with the insulating orientation layer 220. This improves the crystallinity of the n-type semiconductor layer 230-n. Furthermore, the crystallinity of not only the n-type semiconductor layer 230-n but also the light emitting layer 230-e and the p-type semiconductor layer 230-p is improved. Therefore, in the light emitting device 200, the light emission intensity from the light emitting layer 230-e is increased.

[0098] Furthermore, in light emitting device 200, light emitted from the side surface of light emitting layer 230-e is reflected in the first direction by reflective layer 260 and in the second direction by electrode layer 240 toward the bottom surface of light emitting device 200. Therefore, in light emitting device 200, the light extraction efficiency in the bottom surface direction is increased, and the light emitting efficiency in the bottom surface direction can be improved.

[0099] <Modification 1 of the Third Embodiment> 9A and 9B, a description will be given of a light emitting device 200A, which is one of the modified examples of the light emitting device 200. Note that when the configuration of the light emitting device 200A is the same as the configuration of the light emitting device 200, the description thereof may be omitted.

[0100] 9A and 9B are cross-sectional views showing the configuration of a light-emitting device 200A according to one embodiment of the present invention. Specifically, FIG. 9A is a cross-sectional view of pixel 200A-px taken along a first direction, and FIG. 9B is a cross-sectional view of pixel 200A-px taken along a second direction. As shown in FIGS. 9A and 9B, light-emitting device 200A includes a substrate 210, an insulating alignment layer 220, an n-type semiconductor layer 230A-n, a light-emitting layer 230-e, a p-type semiconductor layer 230-p, an electrode layer 240, an insulating layer 250A, and a reflective layer 260.

[0101] The n-type semiconductor layer 230A-n is provided on the insulating alignment layer 220. The n-type semiconductor layer 230A-n is provided in an island shape in the pixel 200A-px.

[0102] The insulating layer 250A is provided on at least the side surfaces of the groove. That is, the insulating layer 250A is provided so as to cover the side surfaces of the light emitting layer 230-e and the p-type semiconductor layer 230-p. In addition, in the groove, the insulating layer 250 includes an opening through which the n-type semiconductor layer 230 is exposed. Note that the insulating layer 250A is also provided between two adjacent n-type semiconductor layers 230A-n. That is, the two adjacent n-type semiconductor layers 230A-n are separated by the insulating layer 250.

[0103] Each of the plurality of pixels 200A-px includes, as an LED, a reflective layer 260, an n-type semiconductor layer 230A-n, a light-emitting layer 230-e, a p-type semiconductor layer 230-p, and an electrode layer 240. Here, one of the electrodes of the LED is the reflective layer 260, and the other of the electrodes of the LED is the electrode layer 240. The reflective layer 260 and the electrode layer 240 are provided in common to the plurality of pixels 200A-px arranged in a matrix in the second direction. Therefore, in the light-emitting device 200A, light emission can be controlled by treating the plurality of pixels 200A-px arranged in the second direction as a single unit.

[0104] In the light emitting device 200A, the n-type semiconductor layer 230A-n is in contact with the insulating orientation layer 220. This improves the crystallinity of the n-type semiconductor layer 230A-n. Furthermore, the crystallinity of not only the n-type semiconductor layer 230A-n but also the light emitting layer 230-e and the p-type semiconductor layer 230-p is improved. Therefore, in the light emitting device 200A, the light emission intensity from the light emitting layer 230-e is increased.

[0105] Furthermore, in light emitting device 200A, light emitted from the side surface of light emitting layer 230-e is reflected toward the bottom surface of light emitting device 200A by reflective layer 260 in the first direction and by electrode layer 240 in the second direction. Therefore, in light emitting device 200A, the light extraction efficiency toward the bottom surface is increased, and the light emitting efficiency in the bottom surface direction can be improved.

[0106] <Modification 2 of the Third Embodiment> 10A and 10B, a description will be given of light emitting device 200B, which is one of variations of light emitting device 200. Note that when the configuration of light emitting device 200B is the same as the configuration of light emitting device 200, the description thereof may be omitted.

[0107] 10A and 10B are cross-sectional views showing the configuration of a light-emitting device 200B according to one embodiment of the present invention. Specifically, FIG. 10A is a cross-sectional view of pixel 200B-px taken along a first direction, and FIG. 10B is a cross-sectional view of pixel 200B-px taken along a second direction. As shown in FIGS. 10A and 10B, light-emitting device 200B includes a substrate 210, an insulating alignment layer 220B, an n-type semiconductor layer 230B-n, a light-emitting layer 230-e, a p-type semiconductor layer 230-p, an electrode layer 240, an insulating layer 250B, and a reflective layer 260.

[0108] The insulating alignment layer 220B is provided on the substrate 210. The insulating alignment layer 220B is provided in an island shape in the pixel 200B-px.

[0109] The n-type semiconductor layer 230B-n is provided on the insulating alignment layer 220. The n-type semiconductor layer 230B-n is provided in an island shape in the pixel 200B-px.

[0110] The insulating layer 250B is provided at least on the side surfaces of the groove. That is, the insulating layer 250B is provided so as to cover the side surfaces of the light-emitting layer 230-e and the p-type semiconductor layer 230-p. In addition, in the groove, the insulating layer 250 includes an opening through which the n-type semiconductor layer 230 is exposed. Note that the insulating layer 250B is also provided between two adjacent stacks of the insulating orientation layer 220B and the n-type semiconductor layer 230B-n. That is, the two adjacent stacks of the insulating orientation layer 220B and the n-type semiconductor layer 230B-n are separated by the insulating layer 250B.

[0111] Each of the plurality of pixels 200B-px includes, as an LED, a reflective layer 260, an n-type semiconductor layer 230B-n, a light-emitting layer 230-e, a p-type semiconductor layer 230-p, and an electrode layer 240. Here, one of the electrodes of the LED is the reflective layer 260, and the other of the electrodes of the LED is the electrode layer 240. The reflective layer 260 and the electrode layer 240 are provided in common to the plurality of pixels 200B-px arranged in a matrix in the second direction. Therefore, in the light-emitting device 200B, light emission can be controlled by treating the plurality of pixels 200B-px arranged in the second direction as a single unit.

[0112] In the light emitting device 200B, the n-type semiconductor layer 230B-n is in contact with the insulating orientation layer 220B. This improves the crystallinity of the n-type semiconductor layer 230B-n. Furthermore, the crystallinity of not only the n-type semiconductor layer 230B-n but also the light emitting layer 230-e and the p-type semiconductor layer 230-p is improved. Therefore, in the light emitting device 200B, the light emission intensity from the light emitting layer 230-e is increased.

[0113] Furthermore, in light emitting device 200B, light emitted from the side surface of light emitting layer 230-e is reflected toward the bottom surface of light emitting device 200B by reflective layer 260 in the first direction and by electrode layer 240 in the second direction. Therefore, in light emitting device 200B, the light extraction efficiency toward the bottom surface is increased, and the light emitting efficiency in the bottom surface direction can be improved.

[0114] <Fourth embodiment> 11A to 11F, a method for manufacturing a light emitting device 200 according to one embodiment of the present invention will be described. Figures 11A to 11F are schematic cross-sectional views showing a method for manufacturing a light emitting device 200 according to one embodiment of the present invention.

[0115] 11A, an insulating alignment layer 220 is formed on a substrate 210. The insulating alignment layer 220 can be formed by depositing using any method (apparatus) such as sputtering or CVD.

[0116] 11B, an n-type semiconductor film 230a containing silicon-doped gallium nitride, a stacked film 230b in which indium gallium nitride films and gallium nitride films are alternately stacked, and a p-type semiconductor film 230c containing magnesium-doped gallium nitride are formed. The n-type semiconductor film 230a, the stacked film 230b, and the p-type semiconductor film 230c are all formed by sputtering.

[0117] Next, as shown in FIG. 11C, an n-type semiconductor layer 230-n, a light-emitting layer 230-e, and a p-type semiconductor layer 230-p are formed. The island-shaped light-emitting layer 230-e and p-type semiconductor layer 230-p are formed using photolithography. At this time, a portion of the top surface of the n-type semiconductor layer 130-n may be etched to form a recess. Furthermore, to form a groove with an inclined side surface, the stacked film 130b and the p-type semiconductor film 130c may be patterned using a half-tone mask or a gray-tone mask.

[0118] 11D, an insulating layer 250 including an opening that exposes the n-type semiconductor layer 230-n is formed in the groove. The insulating layer 250 is formed by depositing an inorganic material and patterning the inorganic material using photolithography.

[0119] 11E, a reflective layer 260 is formed on the n-type semiconductor layer 230-n and the insulating layer 250. The reflective layer 260 is formed by depositing a metal material and patterning the metal material using photolithography.

[0120] Finally, the light emitting device 200 shown in Figures 8A and 8B is manufactured by forming the electrode layer 240 on the p-type semiconductor layer 230-p. The electrode layer 240 can be formed by deposition using any method (apparatus) such as sputtering or CVD.

[0121] The method for manufacturing the light emitting device 200 according to this embodiment allows manufacturing at a lower temperature than conventional methods, and therefore it is possible to use a large-area amorphous glass substrate as the substrate 210 and manufacture a plurality of light emitting devices 200 on the substrate 210. This allows the manufacturing cost of the light emitting device 200 to be reduced.

[0122] Fifth Embodiment Referring to FIG. 12, a light emitting device 300 according to one embodiment of the present invention will be described.

[0123] Fig. 12 is a schematic cross-sectional view showing the configuration of a light-emitting device according to one embodiment of the present invention. In the light-emitting device 300 shown in Fig. 12, the configuration of the electrode layer 140 shown in Fig. 2B or the electrode layer 240 shown in Fig. 8B is different, but the configuration shown in Fig. 2A or Fig. 8A is common. Note that, hereinafter, a description of the common configuration shown in Fig. 2B or Fig. 8B will be omitted.

[0124] Unlike in FIG. 2B or 8B, the electrode layer 140 (240) of the light-emitting device 300 does not extend across adjacent pixels in the second direction, but is formed in an island shape for each pixel 100-PX (200-PX). Grooves are formed between adjacent pixels in the same manner as in the configuration shown in FIG. 2B or 8B, and a reflective layer spaced apart from the electrode layer 140 (240) is formed in the grooves. The reflective layer of the light-emitting device 300 is formed as the same layer as the electrode layer 140 (240) but spaced apart from the electrode layer 140 (240), for example, by patterning the electrode layer 140 (240) shown in FIG. 2B or 8B.

[0125] In the light-emitting device 300, an electrode layer 140 (240) is formed for each pixel 100-PX (200-PX). The electrode layer 140 (240) for each pixel 100-PX (200-PX) is electrically connected to, for example, an electrode provided on a substrate having a transistor, thereby enabling active matrix control of each pixel 100-PX (200-PX).

[0126] Sixth Embodiment A light emitting device forming substrate 10 according to one embodiment of the present invention will be described with reference to FIG.

[0127] 13 is a schematic diagram showing the configuration of a light emitting device formation substrate 10 according to one embodiment of the present invention. The light emitting device formation substrate 10 includes a plurality of light emitting devices 100. That is, in the light emitting device formation substrate 10, a plurality of light emitting devices 100 are manufactured using a single substrate 110. The substrate 110 is a so-called large-area substrate. In the light emitting device formation substrate 10, a plurality of light emitting devices 100 can be manufactured at once using a large-area substrate, thereby reducing the manufacturing cost of the light emitting devices 100.

[0128] The above-described embodiments of the present invention may be combined as appropriate as long as they are not mutually inconsistent. Furthermore, even if a person skilled in the art appropriately adds or deletes components or modifies the design based on each embodiment, or adds or omits steps or modifies conditions, such combinations are included within the scope of the present invention as long as they include the gist of the present invention.

[0129] Even if there are other effects and advantages different from those brought about by the above-mentioned embodiments, if they are clear from the description in this specification or can be easily predicted by a person skilled in the art, they are naturally understood to be brought about by the present invention. [Explanation of symbols]

[0130] 10: Light emitting device forming substrate, 100, 100A, 100B, 100C, 100D: light-emitting device, 100A-px, 100B-px, 100C-px, 100D-px: pixel, 100P: pixel portion, 100-px: pixel, 100T: terminal portion, 100-t: terminal, 110: substrate, 120, 120B, 120D: conductive alignment layer, 130-n, 130A-n, 130B-n: n-type semiconductor layer, 130-e: light-emitting layer, 130-p: p-type semiconductor layer, 140, 140C: electrode layer, 150, 150A, 150B: insulating layer, 160: reflective layer, 130a: n-type semiconductor film, 130b: laminated film, 130c: p-type semiconductor film, 200, 200A, 200B: light-emitting device, 200-px, 200A-px, 200B-px: pixel, 210: substrate, 220, 220B: insulating alignment layer, 230, 230A-n, 230B-n: n-type semiconductor layer, 230-e: light-emitting layer, 230-n: n-type semiconductor layer, 230-p: p-type semiconductor layer, 240: electrode layer, 250, 250A, 250B: insulating layer, 260: reflective layer, 230a: n-type semiconductor film, 230b: laminated film, 230c: p-type semiconductor film, 300: Light-emitting device

Claims

1. a plurality of pixels arranged in a matrix on a substrate in a first direction and a second direction intersecting the first direction; Each of the plurality of pixels arranged in a matrix form is a conductive alignment layer on said substrate; a semiconductor layer comprising gallium nitride on the conductive alignment layer; a light-emitting layer provided in an island shape on the semiconductor layer; an electrode layer on the light-emitting layer, a side surface of the light-emitting layer is covered with an insulating layer; a reflective layer is provided on the insulating layer so as to face a side surface of the light-emitting layer; the conductive alignment layer extends in the first direction and is provided in common to a plurality of pixels arranged in the first direction; The electrode layer extends in the second direction and is provided in common to a plurality of pixels arranged in the second direction.

2. The light emitting device according to claim 1 , wherein the reflective layer is inclined with respect to the substrate at an inclination angle of 30 degrees or more and 60 degrees or less.

3. The light-emitting device according to claim 1 , wherein the semiconductor layer is provided in common to the plurality of pixels arranged in a matrix.

4. the semiconductor layer is provided in an island shape, The light-emitting device according to claim 1 , wherein a side surface of the semiconductor layer is covered with the insulating layer.

5. 10. The light emitting device of claim 1, wherein the conductive alignment layer comprises at least one of titanium and silver.

6. The light emitting device of claim 1 , wherein the substrate is amorphous.

7. 10. The light emitting device of claim 1, wherein the substrate is polycrystalline.

8. a plurality of pixels arranged in a matrix on a substrate in a first direction and a second direction intersecting the first direction; Each of the plurality of pixels arranged in a matrix form is an insulating alignment layer on said substrate; a semiconductor layer comprising gallium nitride on the insulating orientation layer; a light-emitting layer provided in an island shape on the semiconductor layer; an electrode layer on the light-emitting layer; an insulating layer covering a side surface of the light-emitting layer; a reflective layer on the insulating layer facing a side surface of the light-emitting layer, The reflective layer is in contact with the semiconductor layer, The light-emitting device, wherein each of the electrode layer and the reflective layer extends in the second direction and is provided in common to a plurality of pixels arranged in the second direction.

9. The light emitting device according to claim 8 , wherein the reflective layer is inclined with respect to the substrate at an inclination angle of 30 degrees or more and 60 degrees or less.

10. The light-emitting device according to claim 8 , wherein the semiconductor layer is provided in common to the plurality of pixels arranged in a matrix.

11. the semiconductor layer is provided in an island shape, The light-emitting device according to claim 8 , wherein a side surface of the semiconductor layer is covered with the insulating layer.

12. The insulating alignment layer is provided in an island shape, The light-emitting device according to claim 8 , wherein the insulating alignment layer has a side surface covered with the insulating layer.

13. 9. The light emitting device of claim 8, wherein the insulating alignment layer comprises at least one of aluminum nitride and aluminum oxide.

14. 14. The light emitting device according to claim 8, wherein the substrate is amorphous.

15. 14. The light emitting device according to claim 8, wherein the substrate is polycrystalline.

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