Silicon carbide semiconductor device, semiconductor package, and method for inspecting silicon carbide semiconductor device

Abstract

To provide a silicon carbide semiconductor device, a semiconductor package, and a method for inspecting a silicon carbide semiconductor device, capable of suppressing adverse effects on device characteristics due to probe marks.SOLUTION: In a silicon carbide semiconductor device 3, there are provided a wiring area 21a where a wiring member for a package is bonded and a probe area 21b that is a portion excluding the wiring area 21a, at a portion exposed to an opening 21 of a passivation film of a source pad 11. A probe is pressed only against the probe area 21b of the source pad 11 and a probe mark 31 is generated. The number of probes is set such that the number of probe marks 31 generated in the probe area 21b of the source pad 11 is more than, for example, 2 / A per unit current based on the rated current of the silicon carbide semiconductor device.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a silicon carbide semiconductor device, a semiconductor package, and a method of inspecting a silicon carbide semiconductor device. [Background technology]

[0002] Silicon carbide (SiC) semiconductor devices with a MOS gate (metal-oxide-semiconductor insulated gate) structure have a problem in that current flow through a parasitic diode (body diode) formed at a pn junction inside the semiconductor substrate (semiconductor chip) causes stacking faults to grow inside the semiconductor substrate, resulting in an increase in on-voltage Von. The on-voltage Von is the minimum threshold voltage (gate threshold voltage) Vth required to turn on a silicon carbide semiconductor device.

[0003] It is expected that the on-state voltage Von will increase further if the silicon carbide semiconductor device in which stacking faults have grown continues to be used. For this reason, a method has been tried in which the silicon carbide semiconductor device is energized before shipping, and either the on-state voltage Von of the silicon carbide semiconductor device or the forward voltage Vf of the body diode of the silicon carbide semiconductor device is compared before and after energization, and silicon carbide semiconductor devices with large fluctuations in these voltages Von and Vf are screened (sorted out), thereby removing silicon carbide semiconductor devices in which stacking faults have grown as defective products.

[0004] A conventional method for inspecting silicon carbide semiconductor devices has been proposed in which a pulse current is passed from a current-carrying part of an inspection device to a body diode of a MOSFET to intentionally grow stacking faults (see, for example, Patent Document 1 below). In Patent Document 1 below, by passing a pulse current through the body diode of the MOSFET, the temperature when the body diode is energized is kept lower than when a direct current is passed through the body diode of the MOSFET, thereby increasing the growth rate of stacking faults and growing the stacking faults in as short a time as possible.

[0005] Furthermore, a conventional silicon carbide semiconductor device has been proposed in which an inspection electrode, against which a probe for applying a voltage or passing a current to a semiconductor substrate during inspection is pressed, is arranged in a region on the front surface of the semiconductor substrate separate from the active region and separate from the surface electrode of the active region (see, for example, Patent Document 2 below). In Patent Document 2 below, the inspection electrode arranged in a region separate from the active region is short-circuited with the surface electrode of the active region by a metal plating film formed after inspection, thereby forming the inspection electrode and the surface electrode of the active region into a single electrode. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-065250 [Patent Document 2] Japanese Patent Application Publication No. 2018-120879 Summary of the Invention [Problem to be solved by the invention]

[0007] During screening tests of silicon carbide semiconductor devices, a needle-shaped metal contact probe is pressed against a surface electrode, and a voltage or current is applied to or passed through the surface electrode via the probe. If the surface electrode against which the probe is pressed is a metal electrode made of a material with a lower hardness than the probe, such as aluminum (Al), a deep depression (probe mark) is left in the surface electrode by the probe. The depth of the probe mark tends to increase depending on the magnitude of the current passed through the semiconductor substrate via the probe and the temperature of the semiconductor substrate.

[0008] In conventional methods for inspecting silicon carbide semiconductor devices, when a current of several tens of amperes is passed from the surface electrode to the semiconductor substrate via a probe, as when a body diode is energized, the depth of the probe damage may reach the thickness of the surface electrode. If the probe damage becomes too deep, the probe may penetrate the surface electrode and damage the underlying structure, such as the interlayer insulating film, resulting in problems such as a short circuit between the surface electrode and the gate electrode below the interlayer insulating film, or cracks occurring in the barrier metal between the surface electrode and the interlayer insulating film, resulting in large fluctuations in the gate potential.

[0009] In order to solve the above-mentioned problems associated with the conventional techniques, an object of the present invention is to provide a silicon carbide semiconductor device, a semiconductor package, and a method for inspecting a silicon carbide semiconductor device that can suppress the adverse effects of probe marks on element characteristics. [Means for solving the problem]

[0010] In order to solve the above-mentioned problems and achieve the object of the present invention, a silicon carbide semiconductor device according to the present invention has the following features: A pn ​​junction is provided inside a semiconductor substrate made of silicon carbide. An electrode pad is provided on a first main surface of the semiconductor substrate. The electrode pad is ,before pn junction Electric Applying pressure or Electric A current flows through the electrode pad. A protective film covers the first main surface of the semiconductor substrate. A wiring region is a portion of the electrode pad exposed at the opening of the protective film, and a wiring member is bonded to the wiring region. A probe region is a portion of the electrode pad exposed at the opening of the protective film excluding the wiring region, and is against which a probe is pressed during an electrical test. A probe mark caused by the probe pressed against the electrode pad during an electrical test is left in the probe region, and the overlap of the probe mark with the wiring region is 30% or less of the area of ​​the wiring region.

[0011] In addition, in the silicon carbide semiconductor device according to the present invention, the probe mark is formed only in the probe region.

[0012] Moreover, in the silicon carbide semiconductor device according to the present invention, in the above-mentioned invention, the probe mark has a circular planar shape with a diameter greater than 10 μm and equal to or less than 100 μm.

[0013] Furthermore, the silicon carbide semiconductor device according to the present invention is characterized in that, in the above-described invention, the probes are pressed against the electrode pads at a number of more than 2 / A per unit current during electrical testing, and the number of probe marks is a value obtained by multiplying the number of probes pressed against the electrode pads per unit current during electrical testing by the maximum current value that can be passed through the pn junction. Further, in the silicon carbide semiconductor device according to the present invention, in the above-mentioned invention, the density of the probe marks is 16 marks / cm 2 is characterized by being larger than

[0014] Also, In order to solve the above problems and achieve the object of the present invention, The silicon carbide semiconductor device according to the present invention comprises: The semiconductor device has the following features: A pn ​​junction is provided inside a semiconductor substrate made of silicon carbide. An electrode pad is provided on a first main surface of the semiconductor substrate. When a voltage is applied, the electrode pad applies a forward voltage to the pn junction or passes a forward current through the pn junction. A protective film covers the first main surface of the semiconductor substrate. A wiring region is a part of a portion of the electrode pad exposed at an opening in the protective film, and a wiring member is bonded to the wiring region. A probe region is a part of the portion of the electrode pad exposed at the opening in the protective film excluding the wiring region, and is against which a probe is pressed during an electrical test. A probe mark caused by the probe pressed against the electrode pad during an electrical test is left in the probe region, and the overlap of the probe mark with the wiring region is 30% or less of the area of ​​the wiring region. The density of the probe marks is 16 / cm 2 greater than Furthermore, the value obtained by dividing the maximum current value that can be passed through the pn junction by the number of the probe marks is less than 0.75 A / mark.

[0015] In addition, in the silicon carbide semiconductor device according to the present invention, the electrode pad is an aluminum film or an aluminum alloy film.

[0016] Moreover, in the silicon carbide semiconductor device according to the present invention, in the above-described invention, a first semiconductor region of a first conductivity type is provided within the semiconductor substrate. A second semiconductor region of a second conductivity type is provided between a first main surface of the semiconductor substrate and the first semiconductor region, the second semiconductor region forming the pn junction with the first semiconductor region. A third semiconductor region of a first conductivity type is selectively provided between the first main surface of the semiconductor substrate and the second semiconductor region. A gate insulating film is provided in contact with a region of the second semiconductor region between the third semiconductor region and the first semiconductor region. A gate electrode is provided on the opposite side of the gate insulating film to the second semiconductor region. A first electrode is electrically connected to the second semiconductor region and the third semiconductor region, and is electrically connected to the electrode pad. A second electrode is provided on the second main surface of the semiconductor substrate.

[0017] In order to solve the above-mentioned problems and achieve the object of the present invention, a semiconductor package according to the present invention is a semiconductor package mounting the above-mentioned silicon carbide semiconductor device. The semiconductor substrate is mounted on a mounting substrate. The wiring member made of aluminum for extracting the potential of the electrode pad to the outside is joined to the wiring region of the electrode pad. The semiconductor package is characterized in that the probe mark occurs in the probe region of the electrode pad.

[0018] Furthermore, in order to solve the above-mentioned problems and achieve the object of the present invention, a method for inspecting a silicon carbide semiconductor device according to the present invention is a method for inspecting a silicon carbide semiconductor device comprising a semiconductor substrate made of silicon carbide, a pn junction provided inside the semiconductor substrate, an electrode pad provided on a first main surface of the semiconductor substrate, and a protective film covering the first main surface of the semiconductor substrate, wherein a wiring member is bonded to a portion of the electrode pad exposed in an opening of the protective film, and has the following features: A probe is pressed against only a probe region of the portion of the electrode pad exposed in the opening of the protective film, excluding a wiring region to which the wiring member is bonded, and a voltage is applied to the electrode pad via the probe, thereby testing the pn junction Electric Applying pressure or Electric An inspection process is carried out in which a current is passed through the wire to perform an electrical test.

[0019] Further, in the above-described method for inspecting a silicon carbide semiconductor device according to the present invention, the inspecting step comprises: per unit current The number of probes 2 More than this / A The total number of the probes pressed against the electrode pad is calculated by multiplying the number of the probes per unit current by the maximum current value that can be passed through the pn junction. It is characterized by:

[0020] Further, in the method for inspecting a silicon carbide semiconductor device according to the present invention, in the above-mentioned invention, the inspection step further comprises: to 0 It is characterized by being less than 0.2A / piece.

[0021] Further, in the method for inspecting a silicon carbide semiconductor device according to the present invention, in the above-mentioned invention, the inspection step further comprises: to 0 It is characterized by being less than 0.75A / piece. [Effects of the Invention]

[0022] According to the silicon carbide semiconductor device, semiconductor package, and method for inspecting a silicon carbide semiconductor device of the present invention, the wiring region of the electrode pad to which the wiring member for the package is bonded and the probe region against which the probe is pressed are provided so as not to overlap, so that probe marks are not left on the portion of the electrode pad that forms the bonding interface with the wiring member. This makes it possible to suppress the adverse effects of probe marks on element characteristics, and therefore has the effect of suppressing the adverse effects on the reliability of the silicon carbide semiconductor device caused by electrical testing using a probe (testing by applying a voltage or passing a current via a probe). [Brief explanation of the drawings]

[0023] [Figure 1] 1 is a plan view showing a layout of a silicon carbide semiconductor device according to an embodiment as viewed from the front surface side of a semiconductor substrate. [Figure 2]10 is a table showing the results of verifying the number of probes per unit current based on the rated current in Experimental Example 1. [Figure 3] FIG. 10 is a characteristic diagram showing the results of verifying the current density per probe based on the applied current in Experimental Example 2-1. [Figure 4] 10 is a table showing the results of verifying the current density per probe based on the rated current of Experimental Example 2-2. [Figure 5] FIG. 10 is a plan view schematically showing the state of the tip of the probe in Experimental Example 3. [Figure 6] FIG. 6 is a plan view schematically showing the state of a probe mark caused by the probe of FIG. 5. [Figure 7] 6 is a cross-sectional view schematically showing the cross-sectional shape of the tip of the probe in FIG. 5. [Figure 8] FIG. 7 is a cross-sectional view schematically showing the cross-sectional shape of the probe mark in FIG. 6. DETAILED DESCRIPTION OF THE INVENTION

[0024] Preferred embodiments of a silicon carbide semiconductor device, a semiconductor package, and a method for inspecting a silicon carbide semiconductor device according to the present invention will be described in detail below with reference to the accompanying drawings. In this specification and the accompanying drawings, layers and regions prefixed with n or p indicate that electrons or holes are the majority carriers, respectively. Furthermore, + and - appended to n or p indicate that the impurity concentration is higher or lower than that of layers or regions not prefixed with that prefix, respectively. In the following description of the embodiments and the accompanying drawings, similar components are designated by the same reference numerals, and duplicate explanations will be omitted.

[0025] (Embodiment) The structure of a silicon carbide semiconductor device according to an embodiment will be described using a MOSFET (Metal Oxide Semiconductor Field Effect Transistor: a MOS field effect transistor having an insulated gate with a three-layer structure of metal (gate electrode)-oxide film (gate insulating film)-semiconductor (first to third semiconductor regions)) as an example. FIG. 1 is a plan view showing the layout of a silicon carbide semiconductor device according to an embodiment as viewed from the front surface side of a semiconductor substrate. In FIG. 1, openings 21 and 22 in a passivation film (protective film) made of polyimide or the like that protects the front surface of a semiconductor substrate 10 are indicated by bold lines.

[0026] 1 is a vertical MOSFET having, in an active region 1 of a silicon carbide semiconductor substrate (semiconductor chip) 10, a plurality of unit cells (functional units of an element: not shown) with a MOS gate structure, a source pad (electrode pad) 11 connecting the source electrodes (first electrodes) of the plurality of unit cells in parallel, and a gate pad (electrode pad) 12 common to the plurality of unit cells. Each unit cell of the MOSFET has the same general MOS gate structure on the front surface side of the semiconductor substrate 10.

[0027] The active region 1 is provided approximately in the center of the semiconductor substrate 10 (chip center). The active region 1 is a region through which the main current (drift current: drain-source current) of the silicon carbide semiconductor device 3 flows in a direction from the back surface toward the front surface of the semiconductor substrate 10 (the opposite direction to the depth direction Z) when the silicon carbide semiconductor device 3 is turned on. The active region 1 has, for example, a substantially rectangular planar shape (indicated by fine dashed lines in FIG. 1 ) and occupies most of the surface area of ​​the semiconductor substrate 10. An edge termination region 2 is located between the active region 1 and the edge (chip edge) of the semiconductor substrate 10.

[0028] The edge termination region 2 is adjacent to the active region 1 and surrounds the periphery of the active region 1, and has the function of alleviating the electric field on the front surface side of the semiconductor substrate 10 to maintain a breakdown voltage. A typical breakdown voltage structure (not shown), such as a field limiting ring (FLR) or junction termination extension (JTE) structure, is disposed in the edge termination region 2. The breakdown voltage is the maximum voltage at which a semiconductor device does not malfunction or break down.

[0029] In edge termination region 2, a gate runner (not shown) made of a polysilicon (poly-Si) layer is provided on the front surface of semiconductor substrate 10 via a field insulating film (not shown). A gate wiring layer (not shown) made of a metal layer is provided on and in contact with the gate runner. The gate runner and gate wiring layer surround active region 1 in a substantially rectangular shape along the boundary between active region 1 and edge termination region 2. The gate runner and gate wiring layer are electrically connected to gate pad 12.

[0030] The source pad 11 and the gate pad 12 are disposed on the front surface of the semiconductor substrate 10 in the active region 1. The source pad 11 covers almost the entire surface of the active region 1. The planar shapes of the source pad 11 and the gate pad 12 can be changed in various ways. For example, the source pad 11 may have a substantially rectangular planar shape with a portion recessed inward. The gate pad 12 may be disposed in a recess of the source pad 11, separated from the source pad 11, and have a substantially rectangular planar shape surrounded on three sides by the source pad 11.

[0031] Source pad 11 and gate pad 12 are metal films formed of metals such as aluminum (Al) or copper (Cu), or metal alloy films containing aluminum or copper as a main component, that are lower in hardness than the probe of an inspection device (not shown) used during screening inspection of silicon carbide semiconductor device 3. Source pad 11 and gate pad 12 may have the same layered structure or different layered structures. The probe is a needle-shaped metal contactor for applying a predetermined voltage or passing a predetermined current to semiconductor substrate 10 during screening inspection of silicon carbide semiconductor device 3.

[0032] "Hardness" refers to the "indentation hardness" expressed by the load when the probe is pressed against the object to be measured (or the object to be measured is pressed against the probe) until probe marks 31 and 32 described below reach a predetermined depth; the lower the hardness, the more easily the object is indented, causing greater physical damage to source pad 11 and its underlying structure (interlayer insulating film, barrier metal, etc.). Specifically, for example, "hardness" refers to the "Vickers hardness" expressed as the quotient obtained by pressing a quadrangular pyramidal diamond against the object to be measured with a predetermined load and dividing the load by the surface area based on the length of the diagonal of the indentation created.

[0033] A portion of source pad 11 is exposed in an opening 21 in a passivation film covering the front surface of semiconductor substrate 10. The passivation film may have multiple openings 21 (two in FIG. 1 ) that expose different portions of source pad 11. The portion of source pad 11 exposed in opening 21 in the passivation film has a wiring region 21a and a probe region 21b. A wiring member for packaging, such as a wire or a lead frame, that extracts the potential of source pad 11 to the outside is bonded to wiring region 21a of source pad 11.

[0034] The wiring region 21a and the probe region 21b of the source pad 11 should be arranged so as to avoid overlapping as much as possible, and are preferably separated. For example, the probe region 21b of the source pad 11 may be all or part of the portion of the source pad 11 exposed through the opening 21 in the passivation film, excluding the wiring region 21a. In this case, for example, after determining the arrangement and surface area of ​​the wiring region 21a within the opening 21 in the passivation film, the remaining portion may be designated as the probe region 21b.

[0035] If the surface area of ​​the portion of the source pad 11 exposed to the opening 21 in the passivation film is small and the wiring region 21a and the probe region 21b cannot be completely separated, the wiring region 21a to which the wiring of the source pad 11 is connected and the probe region 21b to which the probe is pressed may overlap, for example, by approximately 30% or less of the area of ​​the wiring region.

[0036] Probes are pressed against probe region 21b of source pad 11 during a screening test of silicon carbide semiconductor device 3. Specifically, a plurality of probes arranged at predetermined intervals are pressed against probe region 21b of source pad 11 a predetermined number of times (once or twice consecutively at the same location: the number of probings). Indentations (probe marks) 31 caused by the probes are formed in probe region 21b of source pad 11, the number of which corresponds to the number of pressed probes, and the depth of which depends on the hardness of source pad 11.

[0037] The probe mark 31 has a substantially circular planar shape with a diameter of, for example, greater than 10 μm and equal to or less than 100 μm. Generally, a relatively large number of probes with a relatively small diameter are used to energize a parasitic diode (body diode) formed at the pn junction between the base region (second semiconductor region) and drift region (first semiconductor region) of a MOSFET, but in the embodiment, the probe region 21b and the wiring region 21a of the source pad 11 are arranged so as not to overlap as much as possible, so that no (or only a small) probe mark 31 is generated in the portion of the source pad 11 that forms the junction interface with the wiring member, thereby suppressing adverse effects of the probe mark 31 on the element characteristics.

[0038] As described above, the depth of the probe mark 31 tends to increase depending on the magnitude of the current passed through the semiconductor substrate 10 via the probe and the temperature of the semiconductor substrate 10 at that time. Generally, a needle-shaped tungsten (W) wire having a circular planar shape and coated with gold (Au) plating is used as the probe 41 (see FIGS. 5 and 7 described later). During a screening test, when the probe 41 is pressed against the electrode pad 40, a part of the electrode pad 40 (electrode material) may adhere to the tip 41a of the probe 41.

[0039] When a current is applied to the silicon carbide semiconductor device via probe 41 in this state, the electrode material of electrode pad 40 is welded to the gold plating film covering the surface of probe 41, forming a sharply pointed metal protrusion 42 (see FIGS. 5 and 7, described later) at part of tip 41a of probe 41. When probe 41 with sharply pointed tip 41a is pressed against electrode pad 40 due to the welded metal protrusion 42, it is expected that the depth of probe mark 43 (corresponding to probe marks 31 and 32 in FIG. 1) formed on electrode pad 40 will be deeper (see FIG. 6, described later).

[0040] Therefore, it is desirable to minimize the number of probe marks 31. The portion where probe marks 31 occur may be anywhere in probe region 21b of source pad 11, or may be closer to the center of semiconductor substrate 10 than wiring region 21a. Furthermore, it is desirable to set the number of probes so that the number of probe marks 31 occurring in probe region 21b of source pad 11 is greater than, for example, 2 marks / A (amperes) per unit current based on the rated current (maximum current value that may be passed) of silicon carbide semiconductor device 3.

[0041] That is, the number of probes per unit current based on the rated current of silicon carbide semiconductor device 3 should preferably be greater than about 2 / A. Under these conditions, the more probes pressed against source pad 11, the smaller the current value shared by each probe (current density per probe), and the shallower the depth of probe mark 31 left on source pad 11. Specifically, the current density per probe should preferably be, for example, about 0.2 A / probe or less based on the current flowing through silicon carbide semiconductor device 3 (MOSFET drift current or body diode forward current: hereinafter referred to as applied current).

[0042] Furthermore, the current density per probe is set to less than about 0.75 A / probe, and preferably less than about 0.5 A / probe, based on the rated current of silicon carbide semiconductor device 3. By setting the current density per probe to about 0.2 A / probe or less based on the applied current of silicon carbide semiconductor device 3, the depth of probe marks 31 made in source pad 11 becomes shallower than when this condition is not met, and physical damage to source pad 11 and the underlying structure by the probe is suppressed.

[0043] More specifically, for example, if the rated current of silicon carbide semiconductor device 3 is 47 A, the number of probes used in the screening test will be more than 130 (130 / 47 A≈2.77 / A). Fig. 1 shows a state in which 66 probes (132 in total) are arranged at equal intervals in each of two probe regions 21b of source pad 11 for semiconductor substrate 10 having widths wx and wy of 7.5 mm and 6.7 mm in directions X and Y that are parallel to the front surface of semiconductor substrate 10 and perpendicular to each other.

[0044] The pitch between adjacent probes is, for example, 16 / cm when the density of probe marks 31 generated in the probe region 21b of the source pad 11 is 16 / cm. 2 The distance is set to be larger than the predetermined distance, specifically, narrower than about 0.25 cm, for example, about 150 μm. By pressing the probe under the above conditions, the depth of the probe mark 31 can be made less than 2.5 μm. Since the thickness of the source pad 11 is generally about 5 μm, for example, if the depth of the probe mark 31 is less than 2.5 μm, it is possible to sufficiently prevent the probe from penetrating through.

[0045] The number of times the probe is used in the screening test should be, for example, two or less times. It takes several minutes to several tens of minutes to pass a forward current through the body diode. Therefore, the more times the probe is pressed against the substrate, the lower the productivity becomes, which is not practical. Furthermore, the probe marks become larger and deeper, which is undesirable. Therefore, the number of times the probe is pressed against the substrate in the screening test is set to the upper limit mentioned above.

[0046] Some (for example, one or two) of the multiple probes pressed against each probe region 21b of the source pad 11 may be used as probes for sensing current or temperature of the silicon carbide semiconductor device 3 (MOSFET). Fig. 1 shows a state in which one of the multiple probe marks 31 formed in each probe region 21b of the source pad 11 is a probe mark 31b (white circle) formed by a sensing probe, and the remaining probe marks 31a (black circles) are formed by screening inspection probes.

[0047] The on-resistance of each unit cell of the silicon carbide semiconductor device 3 is approximately the same as the overall on-resistance of the silicon carbide semiconductor device 3. By using a sense probe to apply a positive voltage (forward voltage) to the drain electrode (back surface electrode (second electrode) of the semiconductor substrate 10: not shown) with respect to the source electrode of several (e.g., about 10) unit cells out of the plurality (e.g., about 1,000 or more) of unit cells of the silicon carbide semiconductor device 3, it is possible to detect an overcurrent (OC) flowing through the silicon carbide semiconductor device 3.

[0048] Alternatively, a sense probe is used to pass a forward current through the body diodes of several (e.g., about 10) unit cells out of a plurality (e.g., about 1,000 or more) of unit cells of the silicon carbide semiconductor device 3. This makes it possible to use the temperature characteristics of the diodes to detect the temperature of the silicon carbide semiconductor device 3. The process of applying a predetermined voltage or passing a predetermined current using the screening inspection probe and the process of applying a predetermined voltage or passing a predetermined current using the sense probe are, for example, repeated alternately.

[0049] When silicon carbide semiconductor device 3 has a configuration in which a MOSFET serving as a main semiconductor element and a current sensing unit or a temperature sensing unit, or both, are mounted on the same semiconductor substrate 10, a screening inspection probe and a sensing probe may be used simultaneously to perform overcurrent detection, temperature detection, or both, of silicon carbide semiconductor device 3 at the same time as the screening inspection. The current sensing unit is a vertical MOSFET having unit cells with the same configuration as the main semiconductor element, but in a smaller number than the number of unit cells of the main semiconductor element.

[0050] The current sensing unit has its gate and drain connected in parallel to the main semiconductor element, operates under the same conditions as the main semiconductor element, and has the function of detecting overcurrent by passing a minute current proportional to the current flowing through the main semiconductor element. The temperature sensing unit has the function of detecting the temperature of the main semiconductor element by utilizing the temperature characteristics of a diode. The temperature sensing unit may be, for example, a polysilicon diode made of a polysilicon (poly-Si) layer provided on a field oxide film (not shown) on the front surface of the semiconductor substrate 10, or may be a diffusion diode made of a diffusion region inside the semiconductor substrate 10.

[0051] A portion of the gate pad 12 is exposed through an opening 22 in the passivation film. The portion of the gate pad 12 exposed through the opening 22 in the passivation film has a wiring region 22a and a probe region 22b. A wiring member for packaging, such as a wire or a lead frame, is bonded to the wiring region 22a of the gate pad 12 to apply a gate voltage to the gate pad 12. The reason for providing the wiring region 22a and the probe region 22b in the gate pad 12 is the same as the reason for providing the wiring region 21a and the probe region 21b in the source pad 11.

[0052] As with the source pad 11, it is preferable that the wiring region 22a and the probe region 22b of the gate pad 12 are arranged so as to not overlap as much as possible. For example, the probe region 22b of the gate pad 12 is preferably a portion of the gate pad 12 that is exposed in the opening 22 of the passivation film, excluding the wiring region 22a. In this case, for example, after determining the arrangement and surface area of ​​the wiring region 22a within the opening 22 of the passivation film of the gate pad 12, the remaining portion can be used as the probe region 22b.

[0053] Probes are pressed against probe region 22b of gate pad 12 during a screening test of silicon carbide semiconductor device 3. Probe marks 32 are left in probe region 22b of gate pad 12 in the number of pressed probes, with depths depending on the hardness of gate pad 12. The conditions for the number of probe marks 32 left in gate pad 12 (i.e., the conditions for the number of probes pressed against probe region 22b of gate pad 12) are the same as the conditions for the number of probe marks 31 left in source pad 11.

[0054] Some (e.g., half) of the multiple probes pressed against probe region 22b of gate pad 12 may be probes for sensing current or temperature of silicon carbide semiconductor device 3. Fig. 1 shows a state in which two of the four probe marks 32 formed in probe region 22b of gate pad 12 are two probe marks 32a (black circles) formed by screening inspection probes, and the remaining two are two probe marks 32b (white circles) formed by sensing probes.

[0055] Gate electrodes (not shown) of all unit cells of the silicon carbide semiconductor device 3 (MOSFET) are electrically connected to the gate pad 12 via gate runners and gate wiring layers. During screening testing and temperature detection, no gate voltage is applied to the gate pad 12, or a gate voltage that is negative with respect to the source electrode (source pad 11) of the MOSFET is applied. During overcurrent detection, a gate voltage equal to or greater than the gate threshold voltage of the silicon carbide semiconductor device 3 is applied to the gate pad 12.

[0056] A method for inspecting a silicon carbide semiconductor device 3 according to an embodiment will be described using a screening inspection as an example. The screening inspection is performed on semiconductor substrates 10 (semiconductor chips on which silicon carbide semiconductor devices 3 are fabricated: MOSFET chips) that have been singulated into chips after the silicon carbide semiconductor device 3 is completed and before the silicon carbide semiconductor device 3 is shipped. First, the semiconductor substrate 10 is placed on a conductive stage (not shown) of an inspection device by a transport means with its back surface facing the stage, and a drain electrode (not shown) of the semiconductor substrate 10 is connected to a measurement device (tester).

[0057] Different probes are pressed against source pad 11 and gate pad 12 of semiconductor substrate 10 placed on the stage of an inspection device, and source pad 11 and gate pad 12 are electrically connected to a measurement device via the probes. Then, with no gate voltage applied to gate pad 12 or with a negative gate voltage applied to gate pad 12 via the probe, a predetermined voltage is applied between source pad 11 and the drain electrode via the probe to energize the body diode of the MOSFET and measure the forward voltage Vf.

[0058] Alternatively, a gate voltage equal to or greater than the gate threshold voltage of the MOSFET is applied to gate pad 12 while a positive voltage (forward voltage) is applied to the drain electrode with respect to source pad 11, and the on-voltage Von is measured. Either the on-voltage Von of the MOSFET or the forward voltage Vf of the body diode of the MOSFET is compared before and after the voltage application. By screening semiconductor substrates 10 with large fluctuations in these voltages Von and Vth, silicon carbide semiconductor devices 3 in which stacking faults have grown can be removed as defective products.

[0059] During the screening inspection, the conditions for pressing the probe (the location where the probe is pressed (probe areas 21b, 22b), the number of probes, the current density per probe, the pitch between adjacent probes (probe density is 16 / cm 2 (greater than ) and the number of probings) are set to the above conditions. This reduces the depth of probe marks 31 and 32 that occur on source pad 11 and gate pad 12, respectively, and suppresses physical damage to source pad 11 and gate pad 12 by the probes.

[0060] In overvoltage detection and temperature detection, by pressing the probe against the electrode pads (source pad 11 and gate pad 12) under the same conditions as in the screening test described above, it is possible to prevent probe marks 31 from becoming deep, as in the screening test described above. Furthermore, when the surfaces of the electrode pads are covered with a nickel (Ni) plating film, the depth of the probe marks is extremely shallow, but even in this case, application of the inspection method for silicon carbide semiconductor device 3 according to the embodiment makes it even more difficult for probe marks to occur.

[0061] After the screening inspection, semiconductor substrate 10 (silicon carbide semiconductor device 3) is mounted on a circuit pattern of a mounting substrate (not shown) through a typical assembly process. Then, wiring members such as aluminum bonding wires and lead frames are wire-bonded (ultrasonic bonded) to each wiring region 21a of source pad 11 and wiring region 22a of gate pad 12 of semiconductor substrate 10. Thereafter, semiconductor substrate 10 is sealed to complete a semiconductor package.

[0062] The stage, probe, transport means, etc. of the inspection apparatus are controlled by control means (not shown). Furthermore, the method for inspecting a silicon carbide semiconductor device (semiconductor substrate 10) according to this embodiment can be realized by executing a pre-prepared program on a computer such as a personal computer or a workstation, or on a database server or web server. The inspection results and detection results obtained by executing this program, and the information previously acquired to obtain these inspection results and detection results, are stored in a computer-readable storage medium (not shown).

[0063] This program is recorded on a computer-readable recording medium and executed by being read from the recording medium by a computer or a server. The recording medium may be a solid state drive (SSD), a hard disk drive (HDD), a Blu-ray (registered trademark) disc (BD), a flexible disk, a USB flash memory, a CD-ROM, an MO, a DVD, etc. This program may also be a transmission medium that can be distributed via a network such as the Internet.

[0064] As described above, according to the embodiment, the wiring region to which the packaging wiring member is bonded and the probe region to which the probe is pressed are provided on the electrode pad of the silicon carbide semiconductor device so as to avoid overlapping as much as possible. If the wiring region and the probe region overlap, the overlap is set to be 30% or less of the area of ​​the wiring region. This prevents (or reduces) probe marks on the portion of the electrode pad that forms the bonding interface with the wiring member, thereby suppressing the adverse effects of probe marks on element characteristics and preventing adverse effects on the reliability of the silicon carbide semiconductor device caused by electrical testing using a probe.

[0065] Furthermore, according to the embodiment, the number of probes pressed against the electrode pads during electrical testing of a silicon carbide semiconductor device using probes is set to, for example, more than 2 probes / A per unit current, based on the rated current of the silicon carbide semiconductor device. Under these conditions, the more probes pressed against the electrode pads, the smaller the current value shared by each probe (current density per probe), and the shallower the depth of probe marks left on the electrode pads. This makes it possible to suppress damage to the electrode pads and their underlying structures caused by the probes.

[0066] (Experimental Example 1) For silicon carbide semiconductor device 3 according to the embodiment described above (see FIG. 1), the number of probes per unit current [probes / A] was examined based on the rated current. Fig. 2 is a chart showing the results of examining the number of probes per unit current based on the rated current of Experimental Example 1. For a vertical MOSFET (hereinafter referred to as Experimental Example 1) having the same structure as silicon carbide semiconductor device 3, a screening test was performed by changing the rated current and the number of probes pressed against probe region 21b of source pad 11 in various ways.

[0067] The results of measuring the depth of probe marks 31 formed in probe region 21b of each sample in Experimental Example 1 are shown in Figure 2. For all samples in Experimental Example 1, the thickness of source pad 11 was 5 μm, the distance between adjacent probes was 150 μm, and the number of probing operations was one. In Figure 2, the total number of probes [number] is the total number of probes pressed against source pad 11, and the number of probes pressed against each probe region 21b is the number obtained by dividing the "total number of probes" by the number of probe regions 21b formed in source pad 11 (two in this case) (the same applies to Figure 4).

[0068] 2, the number of probes [probes / A] is the number of probes per unit current based on the rated current, and is obtained by dividing the total number of probes by the rated current. The number of probes [probes / A] is the same for each probe region 21b of the source pad 11. As shown in the "depth of probe mark" in FIG. 2, samples in which the depth of the probe mark 31 was equal to or less than half the thickness of the source pad 11 (≦2.5 μm) were classified as good (marked with a circle), and samples in which the depth of the probe mark 31 exceeded half the thickness of the source pad 11 (>2.5 μm) were classified as defective (marked with an x).

[0069] 2, it was confirmed that when the number of probes per unit current based on the rated current exceeds 2 / A, the physical damage to source pad 11 caused by the probes is reduced, and the depth of probe mark 31 is less than half the thickness of source pad 11. On the other hand, when the number of probes per unit current based on the rated current is less than 2 / A, the physical damage to source pad 11 caused by the probes is increased, and the depth of probe mark 31 exceeds half the thickness of source pad 11.

[0070] (Experimental Example 2) The current density [A / line] per probe was examined for silicon carbide semiconductor device 3 (see FIG. 1) according to the embodiment described above. FIG. 3 is a characteristics diagram showing the results of examining the current density per probe based on the applied current of Experimental Example 2-1. FIG. 4 is a chart showing the results of examining the current density per probe based on the rated current of Experimental Example 2-2. For vertical MOSFETs (hereinafter referred to as Experimental Examples 2-1 and 2-2) having the same structure as silicon carbide semiconductor device 3, the current density per probe was varied in various ways, and the results are shown in FIGS. 3 and 4.

[0071] The current density per probe was varied based on the applied current of Experimental Example 2-1, and the depth of the probe mark when the probe was pressed against the same location in probe region 21b of source pad 11 was examined for different elements, with each test result shown in Figure 3. In Experimental Example 2-1, the forward current (applied current) of the body diode of the vertical MOSFET was set to 20 A, and the number of probes pressed against probe region 21b of source pad 11 was varied to change the current density per probe based on the applied current of each sample.

[0072] The current density per probe was varied based on the rated current of Experimental Example 2-2, and the depth of the probe mark when the probe was pressed once against the probe region 21b of the source pad 11 was examined. The results are shown in Figure 4. In Experimental Example 2-2, the rated current of the vertical MOSFET and the number of probes pressed against the probe region 21b of the source pad 11 were varied to change the current density per probe based on the rated current of each sample and the current density per probe based on the applied current.

[0073] For each sample of Experimental Examples 2-1 and 2-2, the thickness of the source pad 11 was 5 μm, the distance between adjacent probes was 150 μm, and a screening test was performed with the semiconductor substrate 10 heated to 175° C. In Experimental Example 2-2, as shown in “Depth of Probe Mark” in Fig. 4, samples in which the depth of the probe mark 31 was 1 / 2 or less (≦2.5 μm) of the thickness of the source pad 11 were classified as good (marked with a circle), and samples in which the depth of the probe mark 31 exceeded 1 / 2 (>2.5 μm) of the thickness of the source pad 11 were classified as defective (marked with an x).

[0074] The results shown in Fig. 3 confirm that the depth of probe mark 31 increases as the current density per probe based on the applied current increases. The inventors have confirmed that the depth of probe mark 31 tends to be shallower when the current density per probe based on the applied current is 0.2 A / probe or less. Furthermore, the results shown in Fig. 4 confirm that the depth of probe mark 31 can be made shallower when the current density per probe based on the rated current is less than 0.75 A / probe.

[0075] 4, it was confirmed that when the current density per probe based on the rated current is less than 0.75 A / probe, physical damage to source pad 11 by the probe is reduced, and the depth of probe mark 31 is less than half the thickness of source pad 11. On the other hand, when the current density per probe based on the rated current is 0.75 A / probe or more, physical damage to source pad 11 by the probe is increased, and the depth of probe mark 31 exceeds half the thickness of source pad 11.

[0076] (Experimental Example 3) The relationship between the shape of the probe tip and the shape of the probe mark (depression) was examined. Fig. 5 is a plan view schematically showing the state of the probe tip of Experimental Example 3. Fig. 6 is a plan view schematically showing the state of the probe mark caused by the probe of Fig. 5. Fig. 7 is a cross-sectional view schematically showing the cross-sectional shape of the probe tip of Fig. 5. Fig. 8 is a cross-sectional view schematically showing the cross-sectional shape of the probe mark of Fig. 6. Figs. 6 and 8 show probe mark 43 on electrode pad 40 (aluminum film) after the probe 41 of Figs. 5 and 7 was pressed against it 35 times (probing count).

[0077] 5 and 7, it was confirmed that when the probe 41 was pressed against the electrode pad 40, a part of the electrode pad 40 was welded, and a sharply pointed metal protrusion (aluminum piece) 42 was formed at a part of the tip 41a of the probe 41. When the probe 41 with the metal protrusion 42 formed thereon was pressed against the same electrode pad 40 again, or pressed against the electrode pad 40 of the next test object (semiconductor substrate 10), it was confirmed that the probe mark 43 formed on the electrode pad 40 became relatively deep at a part (hereinafter referred to as the deep part) 43a (see FIGS. 6 and 8).

[0078] It was confirmed that the deep portion 43a of the probe mark 43 on the electrode pad 40 has a depth t2 and a cross-sectional shape that are approximately the same as the thickness t1 of the metal protrusion 42 on the tip 41a of the probe 41 (see FIGS. 7 and 8). Therefore, it is presumed that the formation of the metal protrusion 42 on the tip 41a of the probe 41 causes the probe mark 43 on the electrode pad 40 to become deeper. In FIG. 5, the metal protrusion 42 is shown with dotted hatching. In FIG. 6, the outline of the probe mark 43 is shown with a dashed line. In FIGS. 7 and 8, the probe 41 and the electrode pad 40 are shown with diagonal hatching, respectively.

[0079] The present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention. For example, the above-described embodiments have been described using a vertical MOSFET as an example, but the present invention is not limited to this and can be applied to silicon carbide semiconductor devices of various structures having electrode pads. The above-described embodiments have been described using a screening test of a vertical MOSFET as an example, but the present invention is not limited to this and can be applied to various electrical tests performed by pressing a probe against the electrode pads of a silicon carbide semiconductor device. [Industrial Applicability]

[0080] As described above, the silicon carbide semiconductor device, semiconductor package, and method for inspecting a silicon carbide semiconductor device according to the present invention are useful for vertical MOSFETs used in power conversion devices and power supply devices for various industrial machines, and are particularly suited to vertical MOSFETs having electrode pads formed of a metal with lower hardness than the probe (e.g., aluminum, copper, or an alloy containing one or more of these metals). [Explanation of symbols]

[0081] 1 active area 2 Edge Termination Area 3. Silicon carbide semiconductor devices 10. Semiconductor substrate 11 Saucepad 12 Gate Pad 21,22 Opening in passivation film 21a Source pad routing area 21b Source pad probe area 22a Gate pad routing area 22b Gate pad probe area 31, 31a, 31b, 32, 32a, 32b, 43 Probe marks 40 electrode pads 41 Probe 41a Probe tip 42 Metal protrusion at the tip of the probe 43a Deep probe mark X: Direction parallel to the front surface of the semiconductor substrate (first direction) Y: A direction parallel to the front surface of the semiconductor substrate and perpendicular to the first direction (second direction) Z depth direction t1 Thickness of the metal protrusion at the tip of the probe t2 Depth of the deepest part of the probe mark

Claims

1. a semiconductor substrate made of silicon carbide; a pn junction provided inside the semiconductor substrate; an electrode pad provided on a first main surface of the semiconductor substrate for applying a voltage to the pn junction or for causing a current to flow through the pn junction; a protective film covering a first main surface of the semiconductor substrate; a wiring region, which is a part of the electrode pad exposed through the opening of the protective film and to which a wiring member is bonded; a probe region, which is a portion of the electrode pad exposed through the opening of the protective film excluding the wiring region, to which a probe is pressed during an electrical conductivity test; Equipped with a probe mark caused by the probe pressed against the electrode pad during an electrical inspection is generated in the probe region, and an overlap of the probe mark with the wiring region is 30% or less of an area of ​​the wiring region; During the electrical test, the probes are pressed against the electrode pads at a number of more than 2 / A per unit current, A silicon carbide semiconductor device characterized in that the number of probe marks is a value obtained by multiplying the number of probes per unit current pressed against the electrode pad during electrical testing by the maximum current value that can be passed through the pn junction.

2. a semiconductor substrate made of silicon carbide; a pn junction provided inside the semiconductor substrate; an electrode pad provided on a first main surface of the semiconductor substrate, for applying a voltage to the pn junction in a forward direction or for causing a current to flow through the pn junction in a forward direction when a voltage is applied; a protective film covering a first main surface of the semiconductor substrate; a wiring region, which is a part of the electrode pad exposed through the opening of the protective film and to which a wiring member is bonded; a probe region, which is a portion of the electrode pad exposed through the opening of the protective film excluding the wiring region, to which a probe is pressed during an electrical conductivity test; Equipped with a probe mark caused by the probe pressed against the electrode pad during an electrical inspection is generated in the probe region, and an overlap of the probe mark with the wiring region is 30% or less of an area of ​​the wiring region; The density of the probe marks is 16 marks / cm 2 is larger than A silicon carbide semiconductor device, wherein a value obtained by dividing a maximum current value that can be passed through the pn junction by the number of the probe marks is less than 0.75 A / mark.

3. The silicon carbide semiconductor device according to claim 1, wherein the density of the probe marks is greater than 16 marks / cm 2 .

4. A silicon carbide semiconductor device described in any one of claims 1 to 3, characterized in that the probe mark occurs only in the probe region.

5. A silicon carbide semiconductor device described in any one of claims 1 to 4, characterized in that the probe mark has a circular planar shape with a diameter greater than 10 μm and less than 100 μm.

6. A silicon carbide semiconductor device according to claim 1, wherein the electrode pad is an aluminum film or an aluminum alloy film.

7. A first semiconductor region of a first conductivity type provided inside the semiconductor substrate; a second semiconductor region of a second conductivity type provided between the first main surface of the semiconductor substrate and the first semiconductor region, the second semiconductor region forming the pn junction with the first semiconductor region; a third semiconductor region of a first conductivity type selectively provided between the first main surface of the semiconductor substrate and the second semiconductor region; a gate insulating film provided in contact with a region of the second semiconductor region between the third semiconductor region and the first semiconductor region; a gate electrode provided on the opposite side of the second semiconductor region with the gate insulating film interposed therebetween; a first electrode electrically connected to the second semiconductor region and the third semiconductor region and electrically connected to the electrode pad; a second electrode provided on a second main surface of the semiconductor substrate; 7. The silicon carbide semiconductor device according to claim 1, comprising:

8. A semiconductor package mounting the silicon carbide semiconductor device according to claim 1, a mounting substrate on which the semiconductor substrate is mounted; the wiring member made of aluminum and bonded to the wiring region of the electrode pad for extracting the potential of the electrode pad to the outside; and a probe mark formed in the probe region of the electrode pad.

9. A method for inspecting a silicon carbide semiconductor device comprising: a semiconductor substrate made of silicon carbide; a pn junction provided inside the semiconductor substrate; an electrode pad provided on a first main surface of the semiconductor substrate; and a protective film covering the first main surface of the semiconductor substrate, wherein a wiring member is joined to a portion of the electrode pad exposed at an opening in the protective film, a test step of pressing a probe against only a probe region of the electrode pad exposed through the opening of the protective film, excluding a wiring region to which the wiring member is bonded, and applying a voltage to the electrode pad via the probe to apply a voltage to the pn junction or to pass a current through the pn junction, a method for inspecting a silicon carbide semiconductor device, wherein in the inspection step, the number of the probes per unit current is set to be more than 2 / A, and the total number of the probes pressed against the electrode pad is set to a value obtained by multiplying the number of the probes per unit current by a maximum current value that can be passed through the pn junction.

10. A method for inspecting a silicon carbide semiconductor device comprising: a semiconductor substrate made of silicon carbide; a pn junction provided inside the semiconductor substrate; an electrode pad provided on a first main surface of the semiconductor substrate; and a protective film covering the first main surface of the semiconductor substrate, wherein a wiring member is joined to a portion of the electrode pad exposed at an opening in the protective film, a test step of pressing a probe against only a probe region of the electrode pad exposed through the opening of the protective film, excluding a wiring region to which the wiring member is bonded, and applying a voltage to the electrode pad via the probe to apply a voltage to the pn junction in a forward direction or to pass a current through the pn junction in a forward direction, The method for inspecting a silicon carbide semiconductor device, wherein in the inspection step, a current density per probe is set to 0.2 A / probe or less.

11. A method for inspecting a silicon carbide semiconductor device comprising: a semiconductor substrate made of silicon carbide; a pn junction provided inside the semiconductor substrate; an electrode pad provided on a first main surface of the semiconductor substrate; and a protective film covering the first main surface of the semiconductor substrate, wherein a wiring member is joined to a portion of the electrode pad exposed at an opening in the protective film, a test step of pressing a probe against only a probe region of the electrode pad exposed through the opening of the protective film, excluding a wiring region to which the wiring member is bonded, and applying a voltage to the electrode pad via the probe to apply a voltage to the pn junction in a forward direction or to pass a current through the pn junction in a forward direction, a current density per probe of less than 0.75 A per probe in the inspection step;

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