Display panel and display device

Abstract

To provide a display panel which includes a first area with a fixed viewing angle and a second area allowing the viewing angle to be controlled, and can improve a light emission area of the first area and the lifespan.SOLUTION: A display panel 100 includes a display area divided into a first area DA1 including a first type subpixel SP11 and a second area DA2 including a second type subpixel SP21, where each of the first type subpixel SP11 and the second type subpixel SP21 includes a first light-emitting element EL11 driven via a first emission control transistor and a second light-emitting element EL12 driven via a second emission control transistor. The first and second light-emitting elements EL11, EL12 of the first type subpixel SP11 can share an anode electrode AE1.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present specification relates to a display panel and a display device capable of controlling a viewing angle. [Background technology]

[0002] 2. Description of the Related Art Electronic devices in various fields include display devices for displaying images. For example, a car may have multiple display devices to provide desired information and content to the driver and passengers.

[0003] Among the display devices installed in automobiles, the display device located in the center of the dashboard is becoming larger. This display device needs to selectively provide information and content to the driver and / or passengers depending on the driving situation of the automobile. To do this, the display device needs to control the viewing angle.

[0004] The content of the background art described above is technical information that the inventors of this specification held in order to derive the examples of this specification or that they acquired in the process of deriving the examples of this specification, and is not necessarily publicly known art that was made public to the general public prior to the filing of this specification. Summary of the Invention [Problem to be solved by the invention]

[0005] The present specification provides a display panel and a display device that include a first region with a fixed viewing angle and a second region with a controllable viewing angle, and that can improve the light-emitting area and lifespan of the first region.

[0006] The problems to be solved in the various embodiments of this specification are not limited to those mentioned above, and other problems not mentioned will be clearly understood by a person having ordinary skill in the art to which the technical idea of ​​this specification belongs from the following description. [Means for solving the problem]

[0007] A display panel according to some embodiments has a display area divided into a first area in which a first type of subpixel is arranged and a second area in which a second type of subpixel is arranged, and each of the first type subpixel and the second type subpixel includes a first light-emitting element driven via a first light-emitting control transistor and a second light-emitting element driven via a second light-emitting control transistor, and the first and second light-emitting elements of the first type subpixel can share an anode electrode.

[0008] A display device according to some embodiments includes a display panel including a display area divided into a first area in which first-type subpixels are arranged and a second area in which second-type subpixels are arranged, and a gate driver arranged in a bezel area outside the display area of ​​the display panel, the gate driver driving gate lines connected to the first-type subpixels and the second-type subpixels, each of the first-type subpixels and the second-type subpixels including a first light-emitting element driven via a first light-emitting control transistor and a second light-emitting element driven via a second light-emitting control transistor, the first and second light-emitting elements of the first-type subpixels sharing an anode electrode, and the gate driver including a light-emitting control driver controlling the first and second light-emitting control transistors.

[0009] Specific details of various embodiments other than the above-mentioned means for solving the problems are included in the following description and drawings. [Effects of the Invention]

[0010] In some embodiments, in a first region of a wide viewing angle mode, the first and second light-emitting elements of a first-type subpixel can simultaneously emit light by sharing an anode electrode, thereby increasing the light-emitting area of ​​the first-type subpixel, and reducing the current density due to the increased light-emitting area, thereby reducing the current density of the light-emitting elements of the first-type subpixel and increasing their lifetime.

[0011] In some embodiments, the display panel and display device reduce degradation of the light-emitting element by reducing the current density in the first region, thereby improving the brightness and color defects caused by degradation and reducing power consumption for compensating for degradation.

[0012] The above-mentioned problems to be solved, means for solving the problems, and effects do not specify the essential features of the claims, and therefore the scope of the claims is not limited by the matters described in the contents of the invention. [Brief explanation of the drawings]

[0013] The drawings attached below are intended to aid in understanding the embodiments of the present specification, and together with the detailed description, provide examples. However, the technical features of the embodiments are not limited to the specific drawings, and the features disclosed in each drawing can be combined with each other to form new embodiments. [Figure 1] 1 is a diagram illustrating a schematic configuration of a display device according to an embodiment; [Figure 2] 2 is a diagram illustrating a sub-pixel configuration of first and second regions in a display panel according to an embodiment; [Figure 3] 1 is a diagram illustrating a configuration in which a display device according to an embodiment is applied to a vehicle; [Figure 4] 3A and 3B are diagrams illustrating images of first and second regions on a display panel according to an embodiment. [Figure 5] 2 is a plan view illustrating pixel structures of first and second regions in a display panel according to an embodiment; [Figure 6A] 1 is a perspective view illustrating first and second lens structures of a display panel according to an embodiment; [Figure 6B] 1 is a perspective view illustrating first and second lens structures of a display panel according to an embodiment; [Figure 7] FIG. 6 is a cross-sectional view of the 1-1 subpixel taken along line II' shown in FIG. 5. [Figure 8] 6 is a cross-sectional view of the 2-1 subpixel taken along line II-II' shown in FIG. 5. FIG. [Figure 9] 6 is a schematic cross-sectional view of the 1-1 light-emitting element and the first lens region taken along the line III-III' shown in FIG. 5. FIG. [Figure 10] 6 is a schematic cross-sectional view of the first-2 light-emitting element and the first lens region taken along line IV-IV′ shown in FIG. 5. FIG. [Figure 11] 6 is a schematic cross-sectional view of a 2-2 light-emitting element and a second lens region taken along line VV' shown in FIG. 5. FIG. [Figure 12] 1 is a diagram illustrating a method for controlling a viewing angle of a display panel according to an embodiment; [Figure 13] 1 is a diagram illustrating a method for controlling a viewing angle of a display panel according to an embodiment; [Figure 14] 3 is an equivalent circuit diagram illustrating the configuration of first and second sub-pixels in a display panel according to an embodiment. FIG. [Figure 15] 4 is a diagram illustrating driving waveforms of first and second sub-pixels in a display panel according to an embodiment. [Figure 16] 10 is a graph showing the effect of improving the lifespan of a display device according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0014] The advantages and features of the present invention, as well as methods for achieving them, will become more apparent from the following detailed description of the embodiments in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, and may be embodied in various different forms. These embodiments are provided solely to ensure that the disclosure of the present invention is complete and to fully convey the scope of the invention to those skilled in the art. The present invention is defined solely by the claims.

[0015] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for illustrating the embodiments of this specification are illustrative only and do not limit the present specification to the details shown in the drawings. The same reference numerals may refer to the same elements throughout the specification. In addition, if a detailed description of related prior art is deemed to unnecessarily obscure the gist of this specification, the detailed description will be omitted. When terms such as "comprise," "have," and "consist of" are used in this specification, other parts may be added unless "only" is used. When a component is expressed in the singular, the plural is also included unless otherwise explicitly stated.

[0016] When interpreting elements, the error range is interpreted as being included even if there is no separate explicit description of the error range.

[0017] When describing a positional relationship, for example, when describing the positional relationship of two parts using "above," "on top," "below," or "beside," one or more other parts may be located between the two parts, unless the words "immediately" or "directly" are used.

[0018] When describing a temporal relationship, for example, when the temporal precedence relationship is described using "after," "following," "next to," or "before," it can also include cases where the relationship is not consecutive, unless the words "immediately" or "directly" are used.

[0019] Although terms such as "first," "second," and the like are used to describe various components, these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, a first component referred to below may also be a second component within the technical concept of this specification.

[0020] When describing components in this specification, terms such as first, second, A, B, (a), (b), etc. may be used. Such terms are used to distinguish the component from other components, and do not limit the nature, order, sequence, or number of the components. When a component is described as being "coupled," "coupled," or "connected" to another component, it should be understood that the component can be directly coupled or connected to the other component, but that other components may be "intervening" between each component that can be indirectly coupled or connected without any specific explicit description.

[0021] "At least one" should be understood to include all combinations of one or more of the associated components. For example, the meaning of "at least one of a first, second, and third component" can include not only the first, second, or third component, but also all combinations of two or more of the first, second, and third components.

[0022] The features of each of the embodiments of this specification can be partially or wholly combined or combined with each other, and various technical interlocking and driving mechanisms are possible, and each embodiment can be implemented independently of each other or can be implemented together in a linked relationship.

[0023] The present specification will be described with reference to the accompanying drawings and examples as follows: The scales of the components shown in the drawings are different from the actual scales for the convenience of explanation, and are not limited to the scales shown in the drawings.

[0024] FIG. 1 is a block diagram illustrating a configuration of a display device according to an embodiment, and FIG. 2 is a diagram illustrating an example of a sub-pixel configuration of first and second regions in a display panel according to an embodiment.

[0025] The display device according to one embodiment may be an electroluminescent display device, including an organic light emitting diode (OLED) display device, a quantum-dot light emitting diode (QLD) display device, or an inorganic light emitting diode (ILD) display device.

[0026] 1, a display device according to an embodiment may include a display panel 100, a gate driver 200 built in the display panel 100, a data driver 300 connected to the display panel 100, a timing controller 400 that controls the gate driver 200 and the data driver 300, a gamma voltage generator 600, and a power management circuit 700. In an embodiment, the display device may further include a level shifter 500 connected between the timing controller 400 and the gate driver 200. In an embodiment, the data driver 300, the timing controller 400, the gamma voltage generator 600, and the level shifter 500 may be integrated into the display driver.

[0027] The display panel 100 may be a rigid display panel or a flexible display panel whose shape can be changed, such as a foldable, bendable, rollable, or stretchable display panel.

[0028] The display panel 100 may include a display area DA for displaying an image, and bezel areas BZ1 to BZ4 that surround the display area DA and are located on the outer periphery of the display area DA.

[0029] The display panel 100 can display an image using a display area (DA) in which a plurality of sub-pixels (SP) are arranged in a matrix form. The pixel matrix arranged in the display area (DA) includes a plurality of row lines each consisting of a plurality of sub-pixels (SP) arranged in a first direction (X) and a plurality of column lines each consisting of a plurality of sub-pixels (SP) arranged in a second direction (Y).

[0030] Each subpixel (SP) may be any one of a red subpixel that emits red light, a green subpixel that emits green light, a blue subpixel that emits blue light, and a white subpixel that emits white light. A unit pixel may include at least two subpixels (SP).

[0031] The display panel 100 may have a number of signal lines, including a data line 22, gate lines 12, 16, and power supply lines 24, 32, 34, connected to each subpixel (SP).

[0032] The data line 22 can supply a data voltage (Vdata) supplied from the data driver 300 to each sub-pixel (SP).

[0033] At least one of the gate lines 12, 16 can supply a scan signal (SCAN) supplied from the gate driver 200 to each subpixel (SP), and at least one of the gate lines 200 can supply an emission control signal (EM) supplied from the gate driver 12 to each subpixel (SP).

[0034] Among the power supply lines 24, 32, and 34, the initialization voltage line 24 can supply the initialization voltage (Vref) supplied from the power supply management circuit 700 to each subpixel (SP), the first power supply line 32 can supply the first power supply voltage (high potential power supply voltage) (EVDD), and the second power supply line 34 can supply the second power supply voltage (low potential power supply voltage) (EVSS) to each subpixel (SP) via the common electrode (cathode electrode).

[0035] 2, the display area (DA) of the display panel 100 according to an embodiment may be divided into a first area (DA1) that displays an image in a wide viewing angle mode and a second area (DA2) that can switch between the wide viewing angle mode and the narrow viewing angle mode. The wide viewing angle mode may be referred to as a share mode. The narrow viewing angle mode, which has a narrower viewing angle than the wide viewing angle mode, may be referred to as a privacy mode. The second area (DA2) may be referred to as a switchable privacy mode that can switch between the share mode and the private mode.

[0036] The first type sub-pixel (SP11) arranged in the first region (DA1) may include a first light-emitting element (EL11) and a second light-emitting element (EL12) that share an anode electrode (AE1), a pixel circuit consisting of a plurality of transistors that drive the first and second light-emitting elements (EL11, EL12), respectively, and a first lens region (LZ1) arranged on the first and second light-emitting elements (EL11, EL12), respectively.

[0037] The second type sub-pixel (SP21) arranged in the second area (DA2) may include a first light-emitting element (EL21) including a first anode electrode (AE21), a second light-emitting element (EL22) including a second anode electrode (AE22), a pixel circuit consisting of a plurality of transistors that drive the first and second light-emitting elements (EL21, EL22), respectively, a first lens area (LZ1) arranged on the first light-emitting element (EL21), and a second lens area (LZ2) arranged on the second light-emitting element (EL22).

[0038] In the first type sub-pixel SP11 of the first region DA1, the first and second light emitting elements EL11 and EL12 share the anode electrode AE1 to emit light simultaneously, and can implement a wide viewing angle mode or a share mode through the first lens region LZ1, which will be described in detail later.

[0039] The second-type sub-pixel (SP21) of the second region (DA2) may implement a wide viewing angle mode or a shared mode through the first lens region (LZ1) when driving the first light-emitting element (EL21). The second-type sub-pixel (SP21) of the second region (DA2) may implement a narrow viewing angle mode or a privacy mode that limits the viewing angle through the second lens region (LZ2) when driving the second light-emitting element (EL22). This will be described in detail later.

[0040] The display panel 100 according to an embodiment may further include a touch sensor screen disposed in the display area (DA) to sense a user's touch.

[0041] The display panel 100 according to an embodiment may be a touch display panel incorporating a touch sensor array. For example, the display panel 100 according to an embodiment may include a pixel array including a circuit element layer including a plurality of transistors disposed on a substrate, a light emitting element layer including a plurality of light emitting elements disposed on the circuit element layer, an encapsulation layer disposed on the pixel array to encapsulate the light emitting element layer, a touch sensor array including a plurality of touch electrodes disposed on the encapsulation layer, and a lens array including first and second lenses disposed on the touch sensor array. The display panel 100 according to an embodiment may further include an optical film, an optical clear adhesive (OCA), a cover substrate, a protective film, etc., sequentially disposed on the lens array. The display panel 100 according to an embodiment may further include a color filter array including a color filter and a black matrix disposed between the touch sensor array and the lens array.

[0042] The gate driver 200 may be disposed in at least one of a plurality of bezel regions (BZ1 to BZ2) located on the periphery of the display region (DA). For example, the gate driver 200 may be disposed in one of the first and second bezel regions (BZ1, BZ2) facing each other across the display region (DA), or on both sides of the first and second bezel regions (BZ1, BZ2). The gate driver 200 may be disposed as a GIP (Gate In Panel) type, in which transistors are formed in the same process as transistors disposed in the display region (DA).

[0043] The gate driver 200 may include a scan driver 210 that drives at least one gate line 12 among a plurality of gate lines 12, 16 connected to the subpixels (SP) of each pixel row line, and a light emitting control driver 220 that drives at least one gate line 16.

[0044] The number of gate lines 12, 16 connected to the subpixels (SP) of each pixel row (Row) line, the number of scan drivers 210, and the number of light emission control drivers 220 are not limited to the numbers shown in FIG. 1, and can be changed in various ways depending on the detailed configuration of the pixel circuit that constitutes each subpixel (SP).

[0045] Each of the scan driver 210 and the light emission control driver 220 can operate by receiving a plurality of gate control signals supplied from the timing controller 400 via the level shifter 500. In one embodiment, each of the scan driver 210 and the light emission control driver 220 can receive a plurality of gate control signals from the timing controller 400.

[0046] The level shifter 500 receives a control signal from the timing controller 400 and performs level shifting or logic processing to generate a plurality of gate control signals, which can be supplied to the scan driver 210 and the light emission control driver 220 .

[0047] The scan driver 210 can supply at least one scan signal (SCAN) to each of the plurality of pixel row lines using the plurality of gate control signals supplied from the level shifter 500 or the timing controller 400. The scan driver 210 can supply the scan signal (SCAN) to at least one gate line 12 of the plurality of gate lines 12, 16 connected to the subpixels (SP) of each pixel row line.

[0048] The light emission control driver 220 can supply a plurality of light emission control signals to each of a plurality of pixel lines using a plurality of gate control signals supplied from the level shifter 500 or the timing controller 400. The light emission control driver 220 can supply a light emission control signal (EM) to at least one gate line 16 of a plurality of gate lines 12, 16 connected to the sub-pixels (SP) of each pixel row line.

[0049] According to an embodiment, the light emission control driver 220 can supply a plurality of light emission control signals to each sub-pixel SP. The light emission control driver 220 can control simultaneous driving of the first and second light emitting elements EL11 and EL12 in the first type sub-pixel SP11 of the first region DA1 using the plurality of light emission control signals. Also, the light emission control driver 220 can selectively control driving of the first and second light emitting elements EL21 and EL22 in the second type sub-pixel SP21 of the second region DA2. This will be described in detail later.

[0050] At least one of low temperature polysilicon (LTPS) transistors using LTPS semiconductors and oxide transistors using metal oxide semiconductors can be applied to the multiple transistors arranged in the display area (DA) of the display panel 100 and in the bezel areas (BZ1 to BZ4) including the gate driver 200. The display panel 100 according to one embodiment can be configured so that LTPS transistors and oxide transistors coexist in order to reduce power consumption.

[0051] The gamma voltage generator 600 may generate a plurality of reference gamma voltages having different voltage levels and supply them to the data driver 300. The gamma voltage generator 600 may generate a plurality of reference gamma voltages corresponding to the gamma characteristics of the display device under the control of the timing controller 400 and supply them to the data driver 300. In one embodiment, the gamma voltage generator 600 may adjust the reference gamma voltage level according to the gamma data supplied from the timing controller 400 and output the reference gamma voltage to the data driver 300.

[0052] The data driver 300 converts digital data supplied together with a data control signal from the timing controller 400 into an analog data signal and supplies each data voltage (Vdata) to each data line 22 of the display panel 100. The data driver 300 can subdivide a plurality of reference gamma voltages supplied from the gamma voltage generator 600 and convert digital data into an analog data voltage using the subdivided gamma voltages.

[0053] The data driver 300 can include at least one data drive IC (Integrated Circuit) that drives a plurality of data lines (DL) arranged on the display panel 100. Each data drive IC can be mounted on a respective circuit film and connected to the display panel 100. The circuit film on which the data drive IC is mounted can be bonded and connected to a bezel region (BZ3) of the display panel 100, in which a pad region is arranged, via an anisotropic conductive film (ACF). The circuit film can be a COF (Chip On Film), an FPC (Flexible Printed Circuit), or an FFC (Flexible Flat Cable).

[0054] The timing controller 400 can control the gate driver 200 and the data driver 300 using timing control signals supplied from the host system and timing setting information stored therein.

[0055] The timing controller 400 according to an embodiment can generate a plurality of gate control signals for controlling the driving timing of the gate driver 200 and supply them to the gate driver 200. The timing controller 400 according to an embodiment can generate a control signal for timing control and supply it to the level shifter 500 so that the level shifter 500 can generate a plurality of gate control signals and supply them to the gate driver 200.

[0056] The timing controller 400 can generate a plurality of data control signals for controlling the driving timing of the data driver 300 and supply the generated data control signals to the data driver 300. The timing controller 400 according to an embodiment can receive input image data and perform various image processes including image quality correction, degradation correction, and brightness correction for reducing power consumption, and can supply the image-processed data to the data driver 300.

[0057] The power management circuit 700 can generate and supply a plurality of driving voltages required for the operation of all circuit components of the display device using an input voltage. The power management circuit 700 can generate a first power supply voltage (EVDD), a second power supply voltage (EVSS), an initialization voltage (Vref), and a reference voltage and supply them to the display panel 100. The power management circuit 700 can generate and supply various driving voltages required for the operation of the gate driver 200, the data driver 300, the timing controller 400, the level shifter 500, and the gamma voltage generator 600.

[0058] FIG. 3 is a diagram illustrating a configuration in which a display device according to an embodiment is applied to an automobile, and FIG. 4 is a diagram illustrating images of first and second areas on a display panel according to an embodiment.

[0059] 3 and 4, a display device 1000 according to an embodiment may be disposed in the center of a dashboard of a vehicle to provide images to both the driver and a passenger in the front seat. The display panel 100 of the display device 1000 may include a first area (DA1) and a second area (DA2).

[0060] In one embodiment, the first area (DA1) of the display panel 100 can be expressed as a Center Information Display (CID) area or a Share Mode area, and the second area (DA2) can be expressed as a Co-driver Display (CDD) area or a Switchable Privacy Mode area.

[0061] Referring to FIGS. 2 and 4, the first area (DA1) of the display panel 100 may include a first-type sub-pixel (SP11), and the second area (DA2) may include a second-type sub-pixel (SP21).

[0062] In the first region (DA1) of the display panel 100, the first type sub-pixel (SP11) has first and second light-emitting elements (EL11, EL12) that share the anode electrode (AE1) emitting light simultaneously, and can implement a wide viewing angle mode or a shared mode through the first lens region (LZ1).

[0063] As a result, the first area (DA1) of the display panel 100 can provide the driver and the passenger in the front seat with a first image (IM1) having a wide viewing angle in the left and right directions.

[0064] In the second region (DA2) of the display panel 100, the second type subpixel (SP21) can implement a wide viewing angle mode or a shared mode through the first lens region (LZ1) when the first light-emitting element (EL21) is driven, and can implement a narrow viewing angle mode or a privacy mode that limits the viewing angle through the second lens region (LZ2) when the second light-emitting element (EL22) is driven.

[0065] As a result, the second area (DA2) of the display panel 100 can provide the second image (IM2) having a narrow viewing angle in the left-right direction to the passenger in the front passenger seat so as not to interfere with the driver's driving. In one embodiment, when the driver is not driving, the second area (DA2) of the display panel 100 can provide the second image (IM2) having a wide viewing angle in the left-right direction to the driver and passengers according to the user's request or content.

[0066] The display device 1000 according to an embodiment is not limited to a display device for an automobile, but can be applied to various display devices such as a display for a mobile device, a display for an IT device, and a display for a TV.

[0067] Fig. 5 is a plan view illustrating pixel structures of first and second regions in a display panel according to an embodiment, and Figs. 6A and 6B are perspective views illustrating first and second lens structures of a display panel according to an embodiment. Fig. 7 is a cross-sectional view of a first-type subpixel taken along line I-I' in Fig. 5, and Fig. 8 is a cross-sectional view of a second-type subpixel taken along line II-II' in Fig. 5. Fig. 9 is a schematic cross-sectional view of a 1-1 light-emitting element and a first lens region taken along line III-III' in Fig. 5, Fig. 10 is a schematic cross-sectional view of a 1-2 light-emitting element and a first lens region taken along line IV-IV' in Fig. 5, and Fig. 11 is a schematic cross-sectional view of a 2-2 light-emitting element and a second lens region taken along line V-V' in Fig. 5.

[0068] Referring to FIG. 5, the first area (DA1) of the display panel according to one embodiment may include a first type pixel area (PXA1) or a first type pixel, and the second area (DA2) may include a second type pixel area (PXA2) or a second type pixel.

[0069] The first-type pixel area (PXA1) arranged in the first area (DA1) may include a first-type red (hereinafter, R) sub-pixel area (RPA1) that emits red light, a first-type green (hereinafter, G) sub-pixel area (GPA1) that emits green light, and a first-type blue (hereinafter, B) sub-pixel area (BPA1) that emits blue light. The first-type R, G, and B sub-pixel areas (RPA1, GPA1, BPA1) may be referred to as a 1-1 type sub-pixel, a 1-2 type sub-pixel, and a 1-3 type sub-pixel, respectively.

[0070] The first-type R sub-pixel area (RPA1) may include a first light-emitting region (RE11) of the first light-emitting element (EL11) and a first lens region (LZ1) overlapping the first light-emitting region (RE11), a second light-emitting region (RE12) of the second light-emitting element (EL12), and a first lens region (LZ1) overlapping the second light-emitting region (RE12). The first light-emitting region (RE11) of the first light-emitting element (EL11) and the second light-emitting region (RE12) of the second light-emitting element (EL12) may share the anode electrode (RAE1). The size of the first light-emitting region (RE11) may be larger than the size of the second light-emitting region (RE12).

[0071] The first-type G subpixel area (GPA1) may include a first light-emitting area (GE11) of the first light-emitting element and a first lens area (LZ1) overlapping the first light-emitting area (GE11), a plurality of second light-emitting areas (GE12) of the second light-emitting element, and a first lens area (LZ1) overlapping the second light-emitting area (GE12). The first light-emitting area (GE11) of the first light-emitting element and the second light-emitting area (GE12) of the second light-emitting element may share an anode electrode (GAE1). The first-type G subpixel area (GPA1) may include one first lens area (LZ1) arranged on one first light-emitting area (GE11) and one first lens area (LZ1) arranged on multiple second light-emitting areas (GE12). The size of the first light-emitting area (GE11) may be larger than the size of the multiple second light-emitting areas (GE12).

[0072] The first-type B subpixel region (BPA1) may include a first light-emitting region (BE11) of the first light-emitting element and a first lens region (LZ1) overlapping the first light-emitting region (BE11), and a second light-emitting region (BE12) of the second light-emitting element and a first lens region (LZ1) overlapping the second light-emitting region (BE12). The first light-emitting region (BE11) of the first light-emitting element and the second light-emitting region (BE12) of the second light-emitting element may share an anode electrode (BAE1). The first-type B subpixel region (BPA1) may include one first lens region (LZ1) arranged on one first light-emitting region (BE11) and one first lens region (LZ1) arranged on multiple second light-emitting regions (BE12). The size of the first light-emitting region (BE11) may be larger than the size of the multiple second light-emitting regions (BE12).

[0073] The second-type pixel area (PXA2) arranged in the second area (DA2) can include second-type R, G, and B sub-pixel areas (RPA2, GPA2, and BPA2), which can be represented as 2-1 type sub-pixels, 2-2 type sub-pixels, and 2-3 type sub-pixels, respectively.

[0074] The second-type R subpixel area (RPA2) may include a first light-emitting area (RE21) of the first light-emitting element (EL21) and a first lens area (LZ1) overlapping the first light-emitting area (RE21), a second light-emitting area (RE22) of the second light-emitting element (EL22) and a second lens area (LZ2) overlapping the second light-emitting area (RE22). The second-type R subpixel area (RPA2) may include one first lens area (LZ1) overlapping one first light-emitting area (RE21) and one second lens area (LZ2) overlapping at least one second light-emitting area (RE22). The size of the first light-emitting area (BE21) may be larger than the size of the plurality of second light-emitting areas (BE22).

[0075] The second-type G subpixel area (GPA2) may include a first light-emitting region (GE21) of the first light-emitting element, a first lens region (LZ1) overlapping the first light-emitting region (GE21), and a second light-emitting region (GE22) of the second light-emitting element, a second lens region (LZ2) overlapping the second light-emitting region (GE22). The second-type G subpixel area (GPA2) may include one first lens region (LZ1) arranged on one first light-emitting region (GE21), and multiple second lens regions (LZ2) respectively arranged on multiple second light-emitting regions (GE22). The size of the first light-emitting region (GE21) may be larger than the size of the multiple second light-emitting regions (GE22).

[0076] The second-type B subpixel region (BPA2) may include a first light-emitting region (BE21) of the first light-emitting element and a first lens region (LZ1) overlapping the first light-emitting region (BE21), and a second light-emitting region (BE22) of the second light-emitting element and a second lens region (LZ2) overlapping the second light-emitting region (BE22). The second-type B subpixel region (BPA2) may include one first lens region (LZ1) arranged on one first light-emitting region (BE21) and multiple second lens regions (LZ2) respectively arranged on multiple second light-emitting regions (BE22). The size of the first light-emitting region (BE21) may be larger than the size of the multiple second light-emitting regions (BE22).

[0077] Referring to Figure 6A, the first lens region (LZ1) may include a half-cylindrical lens elongated in the first direction (X). Referring to Figure 6B, the second lens region (LZ2) may include a half-spherical lens.

[0078] 6A and 6B, the first direction (X) can be represented as the left-right direction, lateral direction, horizontal direction, or X-axis direction. The second direction (Y) can be represented as the up-down direction, longitudinal direction, vertical direction, or Y-axis direction. The third direction (Z) can be represented as the front-rear direction, the thickness direction of the display panel 100, or the Z-axis direction.

[0079] The first lens region (LZ1) and the second lens region (LZ2) can control (limit) the viewing angle in the left-right direction (X) differently and can control (limit) the viewing angle in the up-down direction (Y) equally.

[0080] For example, the first lens region (LZ1) does not limit the travel path of light emitted from each of the light-emitting elements (EL11, EL12, EL21) to within a specific angle in the left-right direction (X), and can control the viewing angle to a wide viewing angle, and the second lens region (LZ2) can limit the travel path of light emitted from each light-emitting element (EL22) to within a specific angle in the left-right direction (X), and can control the viewing angle to a narrow viewing angle.

[0081] The first lens region (LZ1) and the second lens region (LZ2) can both limit the light propagation path in the vertical direction (Y) to within a specific angle, thereby controlling the viewing angle to a narrow viewing angle. As a result, in one embodiment, when the display device 1000 is applied to a vehicle as shown in Fig. 3, it is possible to prevent images displayed on the first and second regions (DA1 and DA2) of the display panel 100 from being reflected by the windshield of the vehicle and obstructing the driver's view.

[0082] The size of the first lens region (LZ1) is set larger than the size of each of the light-emitting regions (RE11, GE11, BE11, RE12, GE12, BE12, RE21, GE21, BE21), thereby improving the emission efficiency of light generated in each of the light-emitting regions (RE11, GE11, BE11, RE12, GE12, BE12, RE21, GE21, BE21).

[0083] The size of the second lens region (LZ2) is set to be larger than the size of each of the light emitting regions (RE22, GE22, BE22), thereby improving the emission efficiency of light generated in each of the light emitting regions (RE22, GE22, BE22).

[0084] In an embodiment, the second light-emitting regions (RE12, GE12, BE12, RE22, GE22, BE22) of each pixel region (PXA1, PXA2) may have the same area, and the number of second light-emitting regions (RE12, GE12, BE12, RE22, GE22, BE22) may vary depending on the color of the sub-pixel region (RPA1, RPA2, GPA1, GPA2, BPA1, BPA2). For example, the number of second light-emitting regions (GE12, GE22) of the G sub-pixel regions (GPA1, GPA2) and the number of second light-emitting regions (BE12, BE22) of the B sub-pixel regions (BPA1, BPA2) may be greater than the number of second light-emitting regions (RE12, RE22) of the R sub-pixel regions (RPA1, RPA2). The number of second light-emitting regions (BE12, BE22) in the B sub-pixel regions (BPA1, BPA2) may be greater than the number of second light-emitting regions (GE12, GE22) in the G sub-pixel regions (GPA1, GPA2), so that the efficiency deviation of the second R, G, and B light-emitting elements in each pixel region (PXA1, PXA2) can be compensated for by the number of second light-emitting regions (RE12, GE12, BE12, RE22, GE22, BE22).

[0085] In an embodiment, the size of the first light-emitting regions (RE11, GE11, BE11, RE21, GE21, BE21) of each pixel region (PXA1, PXA2) may vary by color. For example, the size of the first light-emitting regions (GE11, GE21) of the G sub-pixel regions (GPA1, GPA2) and the size of the first light-emitting regions (BE11, BE21) of the B sub-pixel regions (BPA1, BPA2) may be larger than the size of the first light-emitting regions (RE11, RE21) of the R sub-pixel regions (RPA1, RPA2). The size of the first light-emitting regions (BE11, BE12) of the B sub-pixel regions (BPA1, BPA2) may be larger than the size of the first light-emitting regions (GE11, GE21) of the G sub-pixel regions (GPA1, GPA2). As a result, the efficiency deviation of the first R, G, B light emitting elements in each pixel region (PXA1, PXA2) can be compensated for by the number of first light emitting regions (RE11, GE11, BE11, RE21, GE21, BE21).

[0086] 7 and 8, the display panel 100 according to an embodiment may include a substrate 101, a circuit element layer including transistors (ET1, ET2) disposed on the substrate 101, a light emitting element layer including light emitting elements (EL11, EL12, EL21, EL22) disposed on the circuit element layer, an encapsulation layer 800 disposed on the light emitting element layer, and a lens layer including lenses (LZ1, LZ2) disposed on the encapsulation layer 800. The display panel 100 according to an embodiment may further include a touch sensor layer 900 disposed between the encapsulation layer 800 and the lens layer. The display panel 100 according to an embodiment may further include a color filter layer (not shown) including a color filter and a black matrix disposed between the touch sensor layer 900 and the lens layer.

[0087] 7, the cross-sectional structure of the R sub-pixel region (RPA1) among the first-type R, G, and B sub-pixel regions (RPA1, GPA1, BPA1) in the display panel according to an embodiment will be described as an example. The first-type R, G, and B sub-pixel regions (RPA1, GPA1, BPA1) may have the same cross-sectional structure. With reference to FIG. 8, the cross-sectional structure of the R sub-pixel region (RPA2) among the second-type R, G, and B sub-pixel regions (RPA2, GPA2, BPA2) in the display panel according to an embodiment will be described as an example. The second-type R, G, and B sub-pixel regions (RPA2, GPA2, BPA2) may have the same cross-sectional structure.

[0088] In one embodiment, the first type subpixel area (RPA1) of the display panel may include a plurality of first lens areas (LZ1) shown in FIG. 7, and the second type subpixel area (RPA2) may include first and second lens areas (LZ1, LZ2) shown in FIG. 8.

[0089] Referring to FIG. 7, the first type subpixel area (RPA1) may include a first emission control transistor (ET1) and a second emission control transistor (ET2) of the pixel circuit, a first-1 light-emitting element (EL11) connected to the first emission control transistor (ET1), a first-2 light-emitting element (EL12) connected to the second emission control transistor (ET2), a first lens area (LZ1) arranged to overlap with the first-1 light-emitting region (RE11) on the first-1 light-emitting element (EL11), and a first lens area (LZ1) arranged to overlap with the first-2 light-emitting region RE12 on the first-2 light-emitting element (EL12).

[0090] Referring to FIG. 8, the second type sub-pixel area (RPA2) may include a first emission control transistor (ET1) and a second emission control transistor (ET2) of the pixel circuit, a 2-1 light-emitting element (EL21) connected to the first emission control transistor (ET1), a 2-2 light-emitting element (EL22) connected to the second emission control transistor (ET2), a first lens area (LZ1) arranged to overlap with the 2-1 light-emitting area (RE21) on the 2-1 light-emitting element (EL21), and a second lens area (LZ2) arranged to overlap with the 2-2 light-emitting area (RE22) on the 2-2 light-emitting element (EL22).

[0091] In one embodiment of the display panel, the circuit element layer disposed on the substrate 101 may include a plurality of insulating layers stacked on the substrate 101. For example, the plurality of insulating layers may include a buffer layer 110, a gate insulating layer 120, an interlayer insulating layer 130, a protective layer 140, and a planarization layer 150.

[0092] The substrate 101 may include an insulating material such as glass or plastic. The plastic substrate may be made of a flexible material. For example, the substrate 101 may include at least one organic insulating material selected from the group consisting of acrylic resin, epoxy resin, siloxane resin, polyimide resin, and polyamide resin.

[0093] The buffer layer 110 may have a single layer or multi-layer structure including an inorganic insulating material such as silicon oxide (SiOx), silicon nitride (SiNx), aluminum oxide (Al2O3), etc. The buffer layer 110 may prevent impurities such as hydrogen from entering the semiconductor layers 211 and 221 through the substrate 101.

[0094] On the buffer layer 110, the transistors (ET1, ET2) can be disposed.

[0095] According to an embodiment, the buffer layer 110 may include a multi-buffer layer and an active buffer layer. In such a case, the multi-buffer layer may be disposed on the substrate 101, and the active buffer layer may be disposed on the multi-buffer layer. A light-shielding layer (or light-shielding metal, or BSM) may be disposed between the multi-buffer layer and the active buffer layer.

[0096] The first light-emitting control transistor (ET1) includes a semiconductor layer 211, a gate electrode 213, a source electrode 215, and a drain electrode 217 arranged on the buffer layer 110. The second light-emitting control transistor (ET2) includes a semiconductor layer 221, a gate electrode 223, a source electrode 225, and a drain electrode 227 arranged on the buffer layer 110. A gate insulating layer 120 is arranged between the semiconductor layers 211, 221 and the gate electrodes 213, 223. An interlayer insulating layer 130 is arranged between the gate electrodes 213, 223 and the source and drain electrodes 215, 217, 225, 227. The source electrode 215 and the drain electrode 217 of the first light-emitting control transistor (ET1) can be connected to the source region and the drain region of the semiconductor layer 211, respectively, via contact holes that penetrate the interlayer insulating layer 130 and the gate insulating layer 120, respectively. The source electrode 225 and the drain electrode 227 of the second light-emitting control transistor (ET2) can be connected to the source region and the drain region of the semiconductor layer 221, respectively, via contact holes that penetrate the interlayer insulating layer 130 and the gate insulating layer 120.

[0097] The semiconductor layers 211 and 221 may include polycrystalline silicon or an oxide semiconductor material. The semiconductor layers 211 and 221 may include low-temperature polysilicon (LTPS). The semiconductor layers 211 and 221 may include at least one oxide semiconductor material selected from the group consisting of IZO (InZnO)-based, IGO (InGaO)-based, ITO (InSnO)-based, IGZO (InGaZnO)-based, IGZTO (InGaZnSnO)-based, GZTO (GaZnSnO)-based, GZO (GaZnO)-based, and ITZO (InSnZnO)-based materials. A light-shielding layer (not shown) may be further disposed below the semiconductor layers 211 and 221.

[0098] The gate insulating layer 120 may include an inorganic insulating material such as silicon dioxide (SiOx) and silicon nitride (SiNx). The gate insulating layer 120 may include a material with a high dielectric constant. For example, the gate insulating layer 120 may include a high-K material such as hafnium oxide (HfO). The gate insulating layer 120 may have a multi-layer structure.

[0099] A gate line (not shown) connected to the gate electrodes 213 and 223 may be disposed on the gate insulating layer 120 .

[0100] The interlayer insulating layer 130 may include inorganic insulating materials such as silicon oxide (SiOx) and silicon nitride (SiNx), etc. The interlayer insulating layer 130 may have a multi-layer structure.

[0101] On the interlayer insulating layer 130, a data line (not shown) and a power line (not shown) connected to the source electrodes 215 and 225 or the drain electrodes 217 and 227 may be disposed.

[0102] A protective layer 140 and a planarization layer 150 may be stacked on the first and second light-emitting control transistors (ET1, ET2). The protective layer 140 may include an inorganic insulating material such as silicon oxide (SiOx) and silicon nitride (SiNx). The planarization layer 150 may include an organic insulating material different from that of the protective layer 140, and may provide a flat surface.

[0103] On the planarization layer 150, a light emitting element layer including 1-1, 1-2, 2-1, and 2-2 light emitting elements (EL11, EL12, EL21, and EL22) can be disposed.

[0104] The 1-1 and 1-2 light-emitting elements (EL11, EL12) include a first shared anode electrode (RAE1) disposed on the planarization layer 150, a light-emitting layer 312 disposed on the first shared anode electrode (RAE1), and a cathode electrode 313 disposed on the light-emitting layer 312. The 2-1 and 2-2 light-emitting elements (EL21, EL22) include a 2-1 anode electrode (RAE21) and a 2-2 anode electrode (RAE22) disposed on the planarization layer 150, light-emitting layers 322 on the 2-1 anode electrode (RAE21) and the 2-2 anode electrode (RAE22), respectively, and a cathode electrode 323 disposed on the light-emitting layer 322. The 1-1 and 1-2 light-emitting elements (EL11, EL12) and the 2-1 and 2-2 light-emitting elements (EL21, EL22) disposed in each sub-pixel area (RPA1, RPA2) can emit light of the same color.

[0105] The first shared anode electrode (RAE1) of the 1-1 light-emitting element (EL11) can be connected to one of the source electrode 215 and the drain electrode 217 of the first light-emitting control transistor (ET1) through a contact hole that penetrates the planarization layer 150 and the protective layer 140. The first shared anode electrode (RAE1) of the 1-2 light-emitting element (EL12) can be connected to one of the source electrode 225 and the drain electrode 227 of the second light-emitting control transistor (ET2) through a contact hole that penetrates the planarization layer 150 and the protective layer 140. The first anode electrode (RAE21) of the 2-1 light-emitting element (EL21) can be connected to one of the source electrode 215 and the drain electrode 217 of the first light-emitting control transistor (ET1) through a contact hole that penetrates the planarization layer 150 and the protective layer 140. The first anode electrode (RAE22) of the 2-2 light-emitting element (EL22) can be connected to either one of the source electrode 225 and the drain electrode 227 of the second light-emitting control transistor (ET2) through a contact hole that penetrates the planarization layer 150 and the protective layer 140.

[0106] The shared anode electrode (RAE1) and the anode electrodes (RAE21, RAE22) may include a conductive material with high reflectivity. The shared anode electrode (RAE1) and the anode electrodes (RAE21, RAE22) may include a metal such as aluminum (Al), silver (Ag), titanium (Ti), or a silver-palladium-copper (APC) alloy. The shared anode electrode (RAE1) and the anode electrodes (RAE21, RAE22) may further include a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). For example, the shared anode electrode (RAE1) and the anode electrodes (RAE21, RAE22) may have a multilayer structure of titanium (Ti) and aluminum (Al) (Ti / Al / Ti), a multilayer structure of ITO and aluminum (Al) (ITO / Al / ITO), or a multilayer structure of ITO and APC (ITO / APC / ITO).

[0107] The light-emitting layers 312 and 322 may include an emission material layer (EML) containing a light-emitting material. The light-emitting material may include an organic material, an inorganic material, or a hybrid material. The light-emitting layer 312 of the 1-1 light-emitting element (EL11) and the light-emitting layer 312 of the 1-2 light-emitting element (EL12) may be spaced apart or connected to each other. The light-emitting layer 322 of the 2-1 light-emitting element (EL21) and the light-emitting layer 322 of the 2-2 light-emitting element (EL22) may be spaced apart.

[0108] The light-emitting layers 312 and 322 may have a multi-layer structure, for example, the light-emitting layers 312 and 322 may further include at least one of a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL).

[0109] The cathode electrodes 313, 323 may be a common electrode and may include a conductive material that transmits light. The cathode electrodes 313, 323 may include a transparent conductive material such as ITO or IZO. The cathode electrodes 313, 323 may include aluminum (Al), magnesium (Mg), silver (Ag), or an alloy thereof and may have a thin thickness that allows light to pass through. Therefore, light generated in each of the light-emitting layers 312, 322 can be emitted through each of the cathode electrodes 313, 323.

[0110] A bank insulating layer 160 may be disposed on the shared anode electrode (RAE1) of the 1-1 and 1-2 light emitting elements (EL11 and EL12). The 2-1 anode electrode (RAE21) of the 2-1 light emitting element (EL21) may be spaced apart from the 2-2 anode electrode (RAE22) of the 2-2 light emitting element (EL22), and the bank insulating layer 160 may be disposed between the 2-1 and 2-2 anode electrodes (RAE21 and RAE22). The bank insulating layer 160 may cover each end of the shared anode electrode (RAE1) and the 2-1 and 2-2 anode electrodes (RAE21 and RAE22). The bank insulating layer 160 may include an organic insulating material. The bank insulating layer 160 may include an organic material different from that of the planarization layer 150 and may have a single-layer or double-layer structure.

[0111] The bank insulating layer 160 may have a plurality of openings through which the shared anode electrode (RAE1) of the first and second light emitting elements (EL11, EL12) is exposed, thereby defining a plurality of light emitting regions (RE11, RE12). The light emitting layer 312 and the second electrode 313 of the first and second light emitting elements (EL11, EL12) may be stacked on the shared anode electrode (RAE1) exposed by the openings in the bank insulating layer 160.

[0112] The bank insulating layer 160 may have openings through which the 2-1 and 2-2 anode electrodes (RAE21, RAE22) of the 2-1 and 2-2 light-emitting elements (EL21, EL22) are exposed, respectively, to define the 2-1 and 2-2 light-emitting regions (RE21, RE22). The light-emitting layers 322 and second electrodes 323 of the 2-1 and 2-2 light-emitting elements (EL21, EL22) may be stacked on the 2-1 and 2-2 anode electrodes (RAE21, RAE22) exposed by the openings in the bank insulating layer 160.

[0113] An encapsulation layer 800 may be positioned on a light-emitting element layer including the light-emitting elements (EL11, EL12, EL21, and EL22) of the subpixel regions (RPA1 and RPA2). The encapsulation layer 800 may prevent damage to the light-emitting elements (EL11, EL12, EL21, and EL22) due to external moisture and impact. The encapsulation layer 800 may have a multi-layer structure. For example, the encapsulation layer 800 may include a first encapsulation layer 810, a second encapsulation layer 820, and a third encapsulation layer 830 stacked in order, although the embodiments of the present specification are not limited thereto. The first encapsulation layer 810, the second encapsulation layer 820, and the third encapsulation layer 830 may include an insulating material. The second encapsulation layer 820 may include a different material from the first encapsulation layer 810 and the third encapsulation layer 830. For example, the first and third encapsulating layers 810 and 830 may be inorganic encapsulating layers containing an inorganic insulating material, and the second encapsulating layer 820 may be an organic encapsulating layer containing an organic insulating material, thereby more effectively preventing damage to the light emitting elements (EL1, EL20) of the display device due to external moisture or impact.

[0114] A touch sensor layer 900 may be disposed on the sealing member 800 in the subpixel areas (RPA1, RPA2). The touch sensor layer 900 may include a touch insulation layer 910 disposed on the sealing layer 800, a bridge electrode 920 disposed on the touch insulation layer 910, a black matrix 930 covering the bridge electrode 920, a touch interlayer insulating layer 940 covering the black matrix 930, a touch sensor electrode 950 disposed on the touch interlayer insulating layer 940, and a touch protective film 960 covering the touch sensor electrode 950. The bridge electrode 920, the black matrix 930, and the touch sensor electrode 950 may be disposed in a non-light-emitting area overlapping with the bank insulating layer 160.

[0115] A lens layer including a first lens region (LZ1) and a second lens region (LZ2) can be disposed on the touch sensor layer 900.

[0116] The first lens region (LZ1) is arranged on the 1-1 light-emitting region (RE11) of the 1-1 light-emitting element (EL11), the 1-2 light-emitting region (RE12) of the 1-2 light-emitting element (EL12), and the 2-1 light-emitting region (RE21) of the 2-1 light-emitting element (EL21), respectively, and can control the propagation path of light generated in the 1-1 light-emitting region (RE11), the 1-2 light-emitting region (RE12), and the 2-1 light-emitting region (RE21).

[0117] The first lens region (LZ1) can control the traveling path of light generated in each of the 1-1 light-emitting region (RE11), the 1-2 light-emitting region (RE12), and the 2-1 light-emitting region (RE21) to a wide viewing angle having a first specific angle in the left-right direction (X), and can control it to a narrow viewing angle having a second specific angle smaller than the first specific angle in the up-down direction (Y).

[0118] In one embodiment, the first lens region (LZ1) overlapping the 1-1 light-emitting region (RE11) of the 1-1 light-emitting element (EL11) and the 2-1 light-emitting region (RE21) of the 2-1 light-emitting 2-1 element (EL21) can emit light (L1) with a wide viewing angle having a first specific angle in the left-right direction (X) as shown in Figure 9.

[0119] In one embodiment, the first lens region (LZ1) overlapping the first and second light-emitting regions (RE12) respectively has a viewing angle in the left-right direction (X) limited by a barrier layer 970 overlapping the black matrix 930 as shown in FIG. 10 , and can emit light (L2) having a third specific angle. The third specific angle may be smaller than the first specific angle and larger than the second specific angle. The barrier layer 970 may be disposed on the touch sensor layer 900 to overlap the first lens region (LZ1) and may also be disposed to overlap the black matrix 930.

[0120] The second lens region (LZ2) is disposed on the 2-2 light-emitting region (RE22) of the 2-2 light-emitting element (EL22) and can control the traveling path of light generated in the 2-2 light-emitting region (RE22).

[0121] The second lens region (LZ2) can control the path of light generated in the second-second light-emitting region (RE22) at a narrow viewing angle having a second specific angle smaller than the first specific angle in the left-right direction (X) and the up-down direction (Y).

[0122] In one embodiment, the second lens region (LZ2) overlapping the 2-2 light-emitting region (RE22) may have a viewing angle in the left-right direction (X) limited by the barrier layer 970 overlapping the black matrix 930, as shown in Figure 11, and may emit light (L3) having a narrow viewing angle of a second specific angle. The barrier layer 970 may be disposed adjacent to the second lens region (LZ2) on the touch sensor layer 900 and may be disposed to overlap the black matrix 930.

[0123] A lens protection layer 600 may be positioned on the first lens region (LZ1) and the second lens region (LZ2). The lens protection layer 600 may include an organic insulating material. The refractive index of the lens protection layer 600 may be smaller than the refractive index of the first lens region (LZ1) and the refractive index of the second lens region (LZ2). As a result, light passing through the first lens region (LZ1) and the second lens region (LZ2) may not be reflected toward the substrate 101 due to the difference in refractive index between the lens protection layer 600 and the lens protection layer 600.

[0124] 12 and 13 are diagrams illustrating a method for controlling the viewing angle of a display panel according to an embodiment.

[0125] Referring to FIG. 12, the second type pixel area (PXA2) arranged in the second area (DA2) can control the viewing angle in the left-right direction (X) to a wide viewing angle through the first lens area (LZ1) by causing the 2-1 light-emitting area (RE21, GE21, BE21) of the 2-1 light-emitting element to emit light in response to the control of the first light-emitting control signal activated in the wide viewing angle mode.

[0126] In response to the same first light-emitting control signal as that of the second region (DA2), the first type pixel region (PXA1) of the first region (DA1) can control the viewing angle in the left-right direction (X) to a wide viewing angle through the first lens region (LZ1) by emitting light from the first-1 and first-2 light-emitting regions (RE11, GE11, BE11, RE12, GE12, BE12) of the first-1 and first-2 light-emitting elements connected to the shared anode electrodes (RAE1, GAE1, BAE1).

[0127] Referring to FIG. 13, the second type pixel area (PXA2) arranged in the second area (DA2) can control the viewing angle in the left-right direction (X) to a narrow viewing angle through the second lens area (LZ2) by causing the 2-2 light-emitting area (RE22, GE22, BE22) of the 2-2 light-emitting element to emit light in response to the control of the second light-emitting control signal activated in the narrow viewing angle mode.

[0128] In response to the control of the same second light-emitting control signal as the second region (DA2), the first type pixel region (PXA1) of the first region (DA1) can control the viewing angle in the left-right direction (X) to a wide viewing angle through the first lens region (LZ1) by emitting light from the first-1 and first-2 light-emitting regions (RE11, GE11, BE11, RE12, GE12, BE12) of the first-1 and first-2 light-emitting elements connected to the shared anode electrodes (RAE1, GAE1, BAE1).

[0129] FIG. 14 is an equivalent circuit diagram illustrating the configuration of the first and second subpixels in a display panel according to an embodiment, and FIG. 15 is a diagram illustrating the driving waveforms of the first and second subpixels in a display panel according to an embodiment.

[0130] 14, each of a first-type sub-pixel (SP1) disposed in the first region (DA1) and a second-type sub-pixel (SP2) disposed in the second region (DA2) may include a pixel circuit including a plurality of transistors (DT, ST1 to ST5, ET1, ET2) and first and second light-emitting elements (EL1, EL2). The first and second light-emitting elements (EL1, EL2) of the first-type sub-pixel (SP1) may have a structure in which the anode electrodes are connected, and the first and second light-emitting elements (EL1, EL2) of the second-type sub-pixel (SP2) may have a structure in which the anode electrodes are separated. A first lens region (LZ1) may be disposed on each light-emitting region of the first and second light-emitting elements (EL1, EL2) of the first-type sub-pixel (SP1). A first lens region (LZ1) may be disposed on the first light-emitting element (EL1) of the second type sub-pixel (SP2), and a second lens region (LZ2) may be disposed on the second light-emitting element (EL2).

[0131] Each pixel circuit of the sub-pixels (SP1, SP2) shown in FIG. 14 may include five switching transistors (ST1 to ST5), a driving transistor (DT), a storage capacitor (Cst), first and second light-emitting control transistors (ET1, ET2), and first and second light-emitting elements (EL1, EL2), but is not limited to this configuration.

[0132] 14, each pixel circuit of the sub-pixels SP1 and SP2 may be driven to include an initialization period, a sampling and program period, and an emission period for each frame period (N, N+1). Each frame period (N, N+1) is divided in synchronization with a vertical synchronization signal (Vsync) and may include a blank period and an active period.

[0133] 15, when the voltage level of the mode control signal (MODE) indicates the wide viewing angle mode or the sharing mode (SH), the first light-emitting control signal (EM1) may be activated by the gate-on voltage (VON) during the initialization period and the light-emitting period of each frame period, and the second light-emitting control signal (EM2) may be deactivated by the gate-off voltage (VOFF). The first light-emitting control signal (EM1) may be deactivated by the gate-off voltage (VOFF) during the sampling and programming periods of each frame period.

[0134] When the voltage level of the mode control signal (MODE) indicates the narrow viewing angle mode or the privacy mode (PR), the second light-emitting control signal (EM2) may be activated by the gate-on voltage (VON) during the initialization period and the light-emitting period of each frame period, and the first light-emitting control signal (EM1) may be deactivated by the gate-off voltage (VOFF). The second light-emitting control signal (EM2) may be deactivated by the gate-off voltage (VOFF) during the sampling and programming periods of each frame period.

[0135] The light emission control signal (EM0) can be activated by a gate-on voltage (VON) during the initialization period and light emission period of each frame period, and can be inactivated by a gate-off voltage (VOFF) during the sampling and programming periods.

[0136] The mode control signal (MODE) can invert the voltage levels of the first and second light emission control signals (EM1, EM2) during the blank period.

[0137] In each of the subpixels (SP1, SP2), the light emission of the first light-emitting element (EL1) can be controlled by a first light-emitting control transistor (ET1) controlled by a first light-emitting control signal (EM1), and the light emission of the second light-emitting element (EL2) can be controlled by a second light-emitting control transistor (ET2) controlled by a second light-emitting control signal (EM2).

[0138] Each of the transistors (DT, ST1 to ST5, ET1, ET2) of the subpixels (SP1, SP2) includes a gate electrode, a source electrode, and a drain electrode. The source electrode and the drain electrode are not fixed but can be changed depending on the direction of the voltage and current applied to the gate electrode, so one of the source electrode and the drain electrode can be represented as a first electrode, and the other can be represented as a second electrode. The transistors (DT, ST1 to ST5, ET1, ET2) of the subpixels (SP1, SP2) can use at least one of polysilicon semiconductors, amorphous silicon semiconductors, and oxide semiconductors. The transistors can be P-type, N-type, or a mixture of P-type and N-type.

[0139] Each of the light-emitting elements (EL1, EL2) may include an anode electrode individually connected to each of the light-emitting control transistors (ET1, ET2), a cathode electrode supplied with the second power supply voltage (EVSS) from the second power supply line 34, and a light-emitting layer between the anode and cathode electrodes. When a driving current is supplied from the driving transistor (DT) via each of the light-emitting control transistors (ET1, ET2), electrons from the cathode electrode are injected into the light-emitting layer, and holes from the anode electrode are injected into the organic light-emitting layer, and recombination of the electrons and holes in the light-emitting layer causes a fluorescent or phosphorescent material to emit light, thereby generating light with a brightness proportional to the current value of the driving current.

[0140] A first electrode of the driving transistor (DT) may be connected to a first power line 32 that supplies a first power supply voltage (EVDD). The first power supply voltage (EVDD) may be supplied from a power management circuit 700. A second electrode of the driving transistor (DT) may be commonly connected to first electrodes of the first and second light-emitting control transistors (ET1, ET2). The driving transistor (DT) may drive the first light-emitting element (EL1) through the first light-emitting control transistor (ET1) or the second light-emitting element (EL2) through the second light-emitting control transistor (ET2). The driving transistor (DT) may control the light-emitting intensity of the first light-emitting element (EL1) or the second light-emitting element (EL2) through the first light-emitting control transistor (ET1) or the second light-emitting control transistor (ET2) by controlling the drive current (Ids) according to the drive voltage (Vgs) of the storage capacitor (Cst).

[0141] The storage capacitor Cst is connected between the gate electrode of the driving transistor DT and the first electrode of the first switching transistor ST1, and can charge a driving voltage Vgs corresponding to the data voltage Vdata. The storage capacitor Cst holds the charged driving voltage Vgs during the light-emitting period when the first switching transistor ST1 is turned off, and supplies it to the driving transistor DT.

[0142] The first switching transistor (ST1) can be turned on or off in response to a first scan signal (SCAN1) supplied to a first gate line 12 arranged on an Nth (N is a natural number) pixel row line. In response to the first scan signal (SCAN1), the first switching transistor (ST1) can supply a data voltage (Vdata) supplied via a data line 22 to a first electrode of the storage capacitor (Cst) during a sampling and programming period. The first scan signal (SCAN1) can be supplied from the scan driver 210 (FIG. 1).

[0143] The second, fourth, and fifth switching transistors ST2, ST4, and ST5 can be turned on or off in response to a second scan signal SCAN2 supplied to the second gate line 14 arranged on the Nth pixel row line. The second scan signal SCAN2 can be supplied from the scan driver 210 (FIG. 1).

[0144] The second switching transistor (ST2) connects the gate electrode and the second electrode (or drain electrode) of the drive transistor (DT) in response to the second scan signal (SCAN2) during the initialization period and the sampling and programming period, thereby connecting the drive transistor (DT) in a diode structure. The second switching transistor (ST2) charges and compensates for the threshold voltage (Vth) of the drive transistor (DT) in the storage capacitor (Cst). Thus, the storage capacitor (Cst) can charge a data voltage (Vdata+Vth) that compensates for the threshold voltage (Vth) of the drive transistor (DT) during the sampling and programming period.

[0145] The fourth switching transistor (ST4) can supply the initialization voltage (Vref, or reference voltage) supplied via the initialization voltage line 24 to the anode electrode of the first light-emitting element (EL1) during the initialization period and the sampling and programming period in response to the second scan signal (SCAN2).

[0146] The fifth switching transistor (ST5) can supply the initialization voltage (Vref) supplied via the initialization voltage line 24 to the anode electrode of the second light-emitting element (EL2) during the initialization period and the sampling and programming period in response to the second scan signal (SCAN2).

[0147] The third switching transistor ST3 can be turned on or off in response to a light emitting control signal EM0 supplied to the third gate line 20 arranged on the Nth pixel row line. The light emitting control signal EM0 can be supplied from the light emitting control driver 220 (FIG. 1).

[0148] The third switching transistor (ST3) can supply the initialization voltage (Vref) supplied via the initialization voltage line 24 to the first electrode of the storage capacitor (Cst) during the initialization period and the emission period in response to the emission control signal (EM0).

[0149] The first light-emitting control transistor (ET1) is controlled by a first light-emitting control signal (EM1) supplied to the fourth gate line 16 and can be turned on or off, and the second light-emitting control transistor (ET2) is controlled by a second light-emitting control signal (EM2) supplied to the fifth gate line 18 and can be turned on or off.

[0150] In the wide viewing angle mode or the shared mode, the first light-emitting control transistor (ET1) connects the driving transistor (DT) and the first light-emitting element (EL1) during the initialization period and the light-emitting period when the first light-emitting control signal (EM1) is activated by the gate-on voltage (VON). This allows the first light-emitting element (EL1) to be driven by the driving current from the driving transistor (DT) and emit light. This allows the second-type sub-pixel (SP2) to emit light at a wide viewing angle through the first lens (LZ1) due to the emission of the first light-emitting element (EL1), and the first-type sub-pixel (SP1) to emit light at a wide viewing angle through the first lens (LZ1) due to the emission of the first and second light-emitting elements (EL1 and EL2).

[0151] In the narrow-viewing-angle mode or privacy mode, the second light-emitting control transistor (ET2) connects the driving transistor (DT) and the second light-emitting element (EL2) during the initialization period and the light-emitting period when the second light-emitting control signal (EM2) is activated by the gate-on voltage (VON). This allows the second light-emitting element (EL2) to be driven by the driving current from the driving transistor (DT) to emit light. This allows the second-type sub-pixel (SP2) to emit light at a narrow viewing angle through the second lens (LZ2) due to the emission of the second light-emitting element (EL2), and the first-type sub-pixel (SP1) to emit light at a wide viewing angle through the first lens (LZ1) due to the emission of the first and second light-emitting elements (EL1 and EL2).

[0152] FIG. 16 is a graph showing the life improvement effect of a display device according to an embodiment.

[0153] Referring to Figure 16, when the anode electrodes of the first and second light-emitting elements are separated in a first type subpixel, the room temperature lifetime trend 1310 of the second light-emitting element having a smaller second light-emitting area and the room temperature lifetime trend 1320 of the first light-emitting element having a larger first light-emitting area than the second light-emitting area are lower than the lifetime specification standard (SPEC) due to the smaller light-emitting area and increased current density.

[0154] On the other hand, in a first type subpixel, as in the display device according to one embodiment, when the first and second light-emitting elements share an anode electrode, the first and second light-emitting elements emit light simultaneously, increasing the light-emitting area in the first and second light-emitting regions. As the light-emitting area increases, the current density decreases, and the room temperature life trend 1330 is found to be improved compared to the life specification standard (SPEC).

[0155] In some embodiments of the display panel and display device, the first and second light-emitting elements of the first-type subpixel in the first region in the wide viewing angle mode share an anode electrode and emit light simultaneously, thereby increasing the light-emitting area of ​​the first-type subpixel. Increasing the light-emitting area reduces the current density, thereby increasing the power consumption and lifetime of the light-emitting elements of the first-type subpixel.

[0156] In some embodiments, the display panel and display device can reduce degradation of the light-emitting element by reducing the current density in the first region, improve brightness and color defects caused by degradation, and reduce power consumption for degradation compensation.

[0157] A display panel according to some embodiments has a display area divided into a first area in which first-type subpixels are arranged and a second area in which second-type subpixels are arranged, and each of the first-type subpixels and the second subpixels includes a first light-emitting element driven via a first light-emitting control transistor and a second light-emitting element driven via a second light-emitting control transistor, and the first and second light-emitting elements of the first-type subpixels can share an anode electrode.

[0158] In some embodiments of the display panel, the first-type subpixel includes a first-1 lens region disposed on a first-1 light-emitting region of a first light-emitting element of the first-type subpixel, and a first-2 lens region disposed on a first-2 light-emitting element of a second light-emitting element of the first-type subpixel, and the first-1 lens region and the first-2 lens region can control the viewing angle in the first direction to a wide viewing angle.

[0159] In some embodiments of the display panel, the second-type subpixel includes a first lens region disposed on a 2-1 light-emitting region of a first light-emitting element of the second-type subpixel, and a second lens region disposed on a 2-2 light-emitting region of a second light-emitting element of the second-type subpixel, wherein the first lens region can control the viewing angle in the first direction to a wide viewing angle, and the second lens region can control the viewing angle in the first direction to a narrow viewing angle having a third angle narrower than the wide viewing angle.

[0160] In a display panel according to some embodiments, the first-type subpixel may further include a barrier layer disposed on a non-emissive region adjacent to the first-second emissive region and configured to limit a viewing angle in a first direction, wherein the first-first lens region controls the viewing angle in the first direction by a first angle, the first-second lens region controls the viewing angle in the first direction by a second angle, the second angle being smaller than the first angle, and the third angle being smaller than both the first and second angles.

[0161] In some embodiments of the display panel, when a first light-emitting control signal controlling the first light-emitting control transistor is activated, the first and second light-emitting elements of the first-type subpixel emit light simultaneously, and the first light-emitting element of the second-type subpixel emits light, and the first and second regions can be driven in a wide viewing angle mode.

[0162] In some embodiments of the display panel, when a second light-emitting control signal controlling the second light-emitting control transistor is activated, the first and second light-emitting elements of the first-type subpixel emit light simultaneously, the second light-emitting element of the second-type subpixel emits light, and the first region can be driven in a wide viewing angle mode and the second region can be driven in a narrow viewing angle mode.

[0163] In some embodiments of the display panel, each of the first and second type subpixels may further include a driving transistor commonly connected to the first and second light-emitting control transistors, a storage capacitor coupled to a gate electrode of the driving transistor, a first switching transistor configured to supply a data voltage of the data line to a first electrode of the storage capacitor in response to a first scan signal on a first gate line, a second switching transistor configured to connect the driving transistor in a diode structure in response to a second scan signal on a second gate line, a third switching transistor configured to supply an initialization voltage of the initialization voltage line to the first electrode of the storage capacitor in response to an emission control signal on a third gate line, a fourth switching transistor configured to supply an initialization voltage of the initialization voltage line to an anode electrode of the first light-emitting element in response to a second scan signal on the second gate line, and a fifth switching transistor configured to supply an initialization voltage of the initialization voltage line to an anode electrode of the second light-emitting element in response to a second scan signal on the second gate line.

[0164] In some embodiments of the display panel, the first-type subpixels include a 1-1 color subpixel, a 1-2 color subpixel, and a 1-3 color subpixel, and the size of the 1-1 lens region disposed on the 1-1 light-emitting region of at least one of the 1-1 color, 1-2 color, and 1-3 color subpixels may be different from the size of the 1-1 lens region of the other subpixels, and the number of 1-2 light-emitting regions of at least one of the 1-1 color, 1-2 color, and 1-3 color subpixels may be different from the number of 1-2 light-emitting regions of the other subpixels.

[0165] In some display panels according to embodiments, the second-type subpixels include a 2-1 color subpixel, a 2-2 color subpixel, and a 2-3 color subpixel, and the size of the first lens region disposed on the 2-1 light-emitting region of at least one of the 2-1 color, 2-2 color, and 2-3 color subpixels may be different from the size of the first lens regions of the other subpixels, and the number of second lens regions disposed on the 2-2 light-emitting region of at least one of the 2-1 color, 2-2 color, and 2-3 color subpixels may be different from the number of second lens regions of the other subpixels.

[0166] A display device according to some embodiments includes a display panel including a display area divided into a first area in which first-type subpixels are arranged and a second area in which second-type subpixels are arranged, and a gate driver arranged in a bezel area outside the display area of ​​the display panel, for driving gate lines connected to the first-type subpixels and the second-type subpixels, wherein each of the first-type subpixels and the second-type subpixels includes a first light-emitting element driven via a first light-emitting control transistor and a second light-emitting element driven via a second light-emitting control transistor, and the first and second light-emitting elements of the first-type subpixels share an anode electrode, and the gate driver includes a light-emitting control driver for controlling the first and second light-emitting control transistors.

[0167] In some embodiments of the display device, the first-type subpixel includes a first-1 lens region disposed on a first-1 light-emitting region of a first light-emitting element of the first-type subpixel, and a first-2 lens region disposed on a first-2 light-emitting element of a second light-emitting element of the first-type subpixel, and the first-1 lens region and the first-2 lens region can control the viewing angle in the first direction to a wide viewing angle.

[0168] In some display devices according to embodiments, the second-type subpixel includes a first lens region disposed on a second-first light-emitting region of a first light-emitting element of the second-type subpixel and a second lens region disposed on a second-second light-emitting region of a second light-emitting element of the second-type subpixel, wherein the first lens region can control the viewing angle in the first direction to a wide viewing angle, and the second lens region can control the viewing angle in the first direction to a narrow viewing angle having a third angle narrower than the wide viewing angle.

[0169] In some embodiments, the first-type subpixel may further include a barrier layer disposed on a non-emissive region adjacent to the first-second emissive region, the barrier layer restricting a viewing angle in a first direction, the first-first lens region controlling the viewing angle in the first direction by a first angle, the first-second lens region controlling the viewing angle in the first direction by a second angle, the second angle being smaller than the first angle, and the third angle being smaller than the first and second angles.

[0170] In some embodiments of the display device, when a first light-emitting control signal, which the light-emitting control driver uses to control the first light-emitting control transistor, is activated, the first and second light-emitting elements of the first-type subpixel emit light simultaneously, and the first light-emitting element of the second-type subpixel emits light, and the first and second regions can be driven in a wide viewing angle mode.

[0171] In some embodiments of the display device, when the second light-emitting control signal, which the light-emitting control driver uses to control the second light-emitting control transistor, is activated, the first and second light-emitting elements of the first-type subpixel emit light simultaneously, the second light-emitting element of the second-type subpixel emits light, and the first region can be driven in a wide viewing angle mode and the second region can be driven in a narrow viewing angle mode.

[0172] In some embodiments, each of the first and second type sub-pixels may further include a driving transistor commonly connected to the first and second light-emitting control transistors, a storage capacitor coupled to a gate electrode of the driving transistor, a first switching transistor configured to supply a data voltage of the data line to a first electrode of the storage capacitor in response to a first scan signal on a first gate line, a second switching transistor configured to connect the driving transistor to a diode structure in response to a second scan signal on a second gate line, a third switching transistor configured to supply an initialization voltage of the initialization voltage line to the first electrode of the storage capacitor in response to an emission control signal supplied from the emission control driver to a third gate line, a fourth switching transistor configured to supply an initialization voltage of the initialization voltage line to an anode electrode of the first light-emitting element in response to a second scan signal on the second gate line, and a fifth switching transistor configured to supply an initialization voltage of the initialization voltage line to an anode electrode of the second light-emitting element in response to a second scan signal on the second gate line.

[0173] In a display device according to some embodiments, the gate driver may further include a scan driver that outputs first and second scan signals to the first and second gate lines.

[0174] The features, structures, effects, etc. described in the various examples of this specification are included in at least one example of this specification and are not necessarily limited to only one example. Furthermore, the features, structures, effects, etc. exemplified in at least one example of this specification can be combined or modified in other examples by a person skilled in the art to which the technical ideas of this specification belong. Therefore, content related to such combinations and modifications should be interpreted as being included in the technical scope or scope of rights of this specification.

[0175] The present specification described above is not limited to the above-mentioned examples and the attached drawings, and it will be apparent to those skilled in the art to which the present specification pertains that various substitutions, modifications, and alterations are possible within the scope of the technical idea of ​​the present specification. Therefore, the scope of the present specification is defined by the claims set forth below, and all modifications and variations derived from the meaning and scope of the claims and their equivalent concepts should be interpreted as being included in the scope of the present specification. [Explanation of symbols]

[0176] 100: Display panel 200: Gate driver 210: Scan driver 220: Light emission control driver 300: Data driver (BZ1~BZ4): Bezel area 400: Timing controller 500: Level shifter 600: Gamma voltage generator 700: Power management circuit 1000: Display device DA: Display Area DA1: 1st area DA2: 2nd area EL11, EL12, EL21, EL22, EL1, EL2: Light-emitting elements BPA1, RPA1, GPA1, BPA2, RPA2, GPA2: Subpixel area BE11, RE11, RE11, BE21, RE21, RE21: First light-emitting area BE12, RE12, GE12, BE22, RE22, GE22: Second light-emitting area RAE1, GAE1, BAE1: Shared anode electrode RAE21, GAE21, BAE21: First anode electrode RAE22, GAE22, BAE22: Second anode electrode ET1, ET2: light-emitting control transistors LZ1, LZ2: Lens area 12, 14, 16, 18, 20: Gate lines 22: Data line 24: Initialization voltage line 32: First power line 34: Second power line

Claims

1. a display area divided into a first area in which first-type sub-pixels are arranged and a second area in which second-type sub-pixels are arranged; the first-type subpixel includes a first light-emitting element of the first-type subpixel driven via a first light-emitting control transistor, a second light-emitting element of the first-type subpixel driven via a second light-emitting control transistor, and a first lens region disposed on the first light-emitting element and the second light-emitting element of the first-type subpixel; the second-type subpixel includes a first light-emitting element of the second-type subpixel driven via a first light-emitting control transistor, a second light-emitting element of the second-type subpixel driven via a second light-emitting control transistor, a first lens region disposed on the first light-emitting element of the second-type subpixel, and a second lens region disposed on the second light-emitting element of the second-type subpixel; the first and second light-emitting elements of the first-type sub-pixel share an anode electrode; A display panel, wherein a viewing angle of the first lens region is larger than a viewing angle of the second lens region.

2. The first type sub-pixels are a first-first lens region disposed on a first-first light-emitting region of a first light-emitting element of the first-type subpixel; and a first-second lens region disposed on a first-second light-emitting region of a second light-emitting element of the first-type subpixel; 2. The display panel of claim 1, wherein the first-1 lens region and the first-2 lens region control a viewing angle in a first direction to a wide viewing angle.

3. The second type sub-pixel is the first lens region disposed on the second-first light-emitting region of the first light-emitting element of the second-type sub-pixel; and the second lens region disposed on a second light-emitting region of a second light-emitting element of the second-type sub-pixel; the first lens region controls the viewing angle in the first direction to a wide viewing angle; The display panel of claim 2 , wherein the second lens region controls the viewing angle in the first direction to a narrow viewing angle having a third angle narrower than the wide viewing angle.

4. The first type sub-pixels are The display device further includes a barrier layer disposed on a non-light-emitting region adjacent to the first and second light-emitting regions, the barrier layer limiting a viewing angle in the first direction; 4. The display panel of claim 3, wherein the first-1 lens region controls the viewing angle in the first direction by a first angle, the first-2 lens region controls the viewing angle in the first direction by a second angle, the second angle being smaller than the first angle, and the third angle being smaller than the first angle and the second angle.

5. When a first light-emitting control signal controlling the first light-emitting control transistor is activated, In response to the control of the first light-emitting control signal activated in a wide viewing angle mode, the first and second light-emitting elements of the first-type sub-pixel simultaneously emit light, thereby controlling the viewing angle to a wide viewing angle through the first lens region; a first light-emitting element of the second-type subpixel emits light, thereby controlling the viewing angle to the wide viewing angle via the first lens region; The display panel of claim 1 , wherein the first and second regions are driven in the wide viewing angle mode.

6. When a second light-emitting control signal controlling the second light-emitting control transistor is activated, In response to the control of the second light-emitting control signal activated in a narrow viewing angle mode, the first and second light-emitting elements of the first-type sub-pixel simultaneously emit light, thereby controlling the viewing angle to a wide viewing angle through the first lens region; a second light-emitting element of the second-type subpixel emits light, thereby controlling the viewing angle to a narrow viewing angle narrower than the wide viewing angle via the second lens region; The display panel of claim 1 , wherein the first region is driven in a wide viewing angle mode and the second region is driven in the narrow viewing angle mode.

7. Each of the first type sub-pixels and the second type sub-pixels is a driving transistor commonly connected to the first and second light-emitting control transistors; a storage capacitor connected to a gate electrode of the driving transistor; a first switching transistor for supplying a data voltage of a data line to a first electrode of the storage capacitor in response to a first scan signal of a first gate line; a second switching transistor for connecting the driving transistor in a diode structure in response to a second scan signal of a second gate line; a third switching transistor for supplying an initialization voltage of an initialization voltage line to the first electrode of the storage capacitor in response to a light emission control signal of a third gate line; a fourth switching transistor for supplying the initialization voltage of the initialization voltage line to the anode electrode of the first light emitting element in response to the second scan signal of the second gate line; and 2. The display panel of claim 1, further comprising a fifth switching transistor for supplying the initialization voltage of the initialization voltage line to an anode electrode of the second light emitting element in response to the second scan signal of the second gate line.

8. the first-type subpixels include a first-first color subpixel, a first-second color subpixel, and a first-third color subpixel; a size of a first-first lens region disposed on a first-first light-emitting region of at least one of the first-first color, first-second color, and first-third color subpixels is different from a size of the first-first lens region of the other subpixels; 3. The display panel of claim 2, wherein the number of first-second light-emitting regions in at least one of the first-first color, first-second color, and first-third color subpixels is different from the number of first-second light-emitting regions in the other subpixels.

9. the second-type subpixels include a second-first color subpixel, a second-second color subpixel, and a second-third color subpixel; a size of a first lens region disposed on a second-first light-emitting region of at least one of the second-first color, second-second color, and second-third color subpixels is different from a size of the first lens region of the other subpixels; 4. The display panel of claim 3, wherein the number of second lens regions disposed on the second-second light-emitting region of at least one of the second-first color, second-second color, and second-third color subpixels is different from the number of second lens regions of the other subpixels.

10. a display panel including a display area divided into a first area in which a first type subpixel is arranged and a second area in which a second type subpixel is arranged; and a gate driver disposed in a bezel region outside the display region of the display panel, the gate driver driving gate lines connected to the first-type subpixels and the second-type subpixels; the first-type subpixel includes a first light-emitting element of the first-type subpixel driven via a first light-emitting control transistor, a second light-emitting element of the first-type subpixel driven via a second light-emitting control transistor, and a first lens region disposed on the first light-emitting element and the second light-emitting element of the first-type subpixel; the second-type subpixel includes a first light-emitting element of the second-type subpixel driven via a first light-emitting control transistor, a second light-emitting element of the second-type subpixel driven via a second light-emitting control transistor, a first lens region disposed on the first light-emitting element of the second-type subpixel, and a second lens region disposed on the second light-emitting element of the second-type subpixel; the first and second light-emitting elements of the first-type sub-pixel share an anode electrode; a viewing angle of the first lens region is larger than a viewing angle of the second lens region; The gate driver includes a light-emission control driver that controls the first and second light-emission control transistors.

11. The first type sub-pixel is a first-first lens region disposed on a first-first light-emitting region of a first light-emitting element of the first-type subpixel; and a first-second lens region disposed on a first-second light-emitting region of a second light-emitting element of the first-type subpixel; The display device of claim 10, wherein the first-1 lens region and the first-2 lens region control a viewing angle in a first direction to a wide viewing angle.

12. The second type sub-pixel is the first lens region disposed on the second-first light-emitting region of the first light-emitting element of the second-type sub-pixel; and the second lens region disposed on a second light-emitting region of a second light-emitting element of the second-type sub-pixel; the first lens region controls the viewing angle in the first direction to a wide viewing angle; The display device of claim 11 , wherein the second lens region controls the viewing angle in the first direction to a narrow viewing angle having a third angle narrower than the wide viewing angle.

13. The first type sub-pixel is The display device further includes a barrier layer disposed on a non-light-emitting region adjacent to the first and second light-emitting regions, the barrier layer limiting a viewing angle in the first direction; 13. The display device of claim 12, wherein the first-1 lens region controls the viewing angle in the first direction by a first angle, the first-2 lens region controls the viewing angle in the first direction by a second angle, the second angle being smaller than the first angle, and the third angle being smaller than the first angle and the second angle.

14. When a first light-emitting control signal controlling the first light-emitting control transistor is activated, In response to the control of the first light-emitting control signal activated in a wide viewing angle mode, the first and second light-emitting elements of the first-type sub-pixel simultaneously emit light, thereby controlling the viewing angle to a wide viewing angle through the first lens region; a first light-emitting element of the second-type subpixel emits light, thereby controlling the viewing angle to the wide viewing angle via the first lens region; 11. The display device of claim 10, wherein the first and second regions are driven in a wide viewing angle mode.

15. When a second light-emitting control signal controlling the second light-emitting control transistor is activated, In response to the control of the second light-emitting control signal activated in a narrow viewing angle mode, the first and second light-emitting elements of the first-type sub-pixel simultaneously emit light, thereby controlling the viewing angle to the wide viewing angle through the first lens region; a second light-emitting element of the second-type subpixel emits light, thereby controlling the viewing angle to a narrow viewing angle narrower than the wide viewing angle via the second lens region; The display device of claim 14 , wherein the first region is driven in the wide viewing angle mode and the second region is driven in the narrow viewing angle mode.

16. Each of the first-type sub-pixels and the second-type sub-pixels is a driving transistor commonly connected to the first and second light-emitting control transistors; a storage capacitor connected to a gate electrode of the driving transistor; a first switching transistor for supplying a data voltage of a data line to a first electrode of the storage capacitor in response to a first scan signal of a first gate line; a second switching transistor for connecting the driving transistor in a diode structure in response to a second scan signal of a second gate line; a third switching transistor for supplying an initialization voltage of an initialization voltage line to the first electrode of the storage capacitor in response to a light emission control signal supplied from the light emission control driver to a third gate line; a fourth switching transistor for supplying the initialization voltage of the initialization voltage line to the anode electrode of the first light emitting element in response to the second scan signal of the second gate line; and 11. The display device of claim 10, further comprising a fifth switching transistor for supplying the initialization voltage of the initialization voltage line to an anode electrode of the second light emitting element in response to the second scan signal of the second gate line.

17. The gate driver 17. The display device of claim 16, further comprising a scan driver that outputs the first and second scan signals to the first and second gate lines.

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