Element and manufacturing method thereof, wireless communication device and thin film transistor array

Abstract

To provide an element that suppresses electric leaks and is applicable to manufacturing techniques including conveying processes.SOLUTION: An element includes at least: a substrate; a first electrode and wiring formed on the substrate; a dielectric layer formed on the substrate and the first electrode; and a second electrode formed on the dielectric layer. An average film thickness (di2) of the dielectric layer formed on the substrate and the maximum mountain height (Sp) of the substrate have the following relationship of 50nm<Sp<di2.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to an element and a method for manufacturing the same, a wireless communication device, and a thin film transistor array. [Background technology]

[0002] In recent years, wireless communication systems using RFID (Radio Frequency IDentification) technology have been attracting attention. An RFID tag has an IC chip with a circuit composed of thin film transistors (TFTs) and an antenna for wireless communication with a reader / writer. The antenna installed in the tag receives a carrier wave transmitted from the reader / writer, and the driving circuit in the IC chip operates.

[0003] RFID tags are expected to be used for a variety of purposes, including logistics management, product management, and shoplifting prevention, and have already begun to be introduced in some areas, such as IC cards for transportation cards and product tags.

[0004] In order to use RFID tags in all kinds of products in the future, it will be necessary to reduce manufacturing costs. Therefore, in the RFID tag manufacturing process, efforts are being made to move away from processes that use vacuum and high temperatures and instead use flexible, inexpensive processes that use coating and printing technologies. This trend is not limited to RFID tags, but can also be seen in semiconductors used in sensors, TFT arrays for displays, and other applications.

[0005] When manufacturing TFTs using coating techniques, if a substrate with an uneven surface is used, problems arise such as difficulty in uniformly coating the substrate and electrical leakage in the formed element. Therefore, a method has been proposed to solve these problems by forming a layer with small surface roughness on the uneven substrate surface (see, for example, Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2011-210972 [Patent Document 2] Japanese Patent Application Laid-Open No. 2005-289054 Summary of the Invention [Problem to be solved by the invention]

[0007] However, the techniques described in Patent Documents 1 and 2 have had the problem that transportation failure occurs when, for example, an attempt is made to transport a substrate in order to perform continuous coating on the substrate.

[0008] SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide an element that suppresses electrical leakage and is applicable to manufacturing techniques that include a transfer process. [Means for solving the problem]

[0009] That is, the present invention provides: at least, A substrate; a first electrode formed on the substrate; a dielectric layer formed on the substrate and the first electrode; a second electrode formed on the dielectric layer; An element comprising: The element has the following relationship between the average film thickness (di2) of the dielectric layer formed on the substrate and the maximum peak height (Sp) of the substrate. 50nm <Sp<di2 [Effects of the Invention]

[0010] According to the present invention, it is possible to provide an element in which electrical leakage is suppressed and which is applicable to manufacturing techniques including a transfer process. [Brief explanation of the drawings]

[0011] [Figure 1] FIG. 1 is a schematic cross-sectional view showing an element according to a first embodiment of the present invention. [Figure 2]Schematic cross-sectional view showing a method for manufacturing an element according to Embodiment 1 of the present invention [Figure 3] Schematic cross-sectional view showing an element according to Embodiment 2 of the present invention [Figure 4] Schematic cross-sectional view showing a method for manufacturing an element according to Embodiment 2 of the present invention [Figure 5] Schematic cross-sectional view showing an element according to Embodiment 3 of the present invention [Figure 6] Schematic cross-sectional view showing a method for manufacturing an element according to Embodiment 3 of the present invention [Figure 7] Block diagram showing an example of a wireless communication device [Figure 8] Schematic diagram showing a configuration example of a TFT array

Embodiments for Carrying Out the Invention

[0012] Hereinafter, preferred embodiments of an element, a method for manufacturing an element, a wireless communication device, and a thin film transistor array according to the present invention will be described in detail. However, the present invention is not limited to the following embodiments, and can be variously modified and implemented according to the purpose and application.

[0013] <Element> The element according to the embodiment of the present invention is an element including at least a substrate, a first electrode formed on the substrate, a dielectric layer formed on the substrate and the first electrode, and a second electrode formed on the dielectric layer, wherein there is a relationship of 50 nm < Sp < di2 between the average film thickness (di * 2) of the dielectric layer formed on the substrate and the maximum peak height Sp of the substrate. Wiring may be formed on the substrate together with the first electrode.

[0014] Examples of the element include a thin film transistor (TFT), a capacitor, and a diode.

[0015] Examples of the TFT include an element having a gate electrode, a dielectric layer, a source electrode, a drain electrode, and a semiconductor layer in contact with the source electrode and the drain electrode on a substrate.

[0016] Examples of capacitors include elements having a lower electrode, an upper electrode, and a dielectric layer between the lower electrode and the upper electrode.

[0017] Examples of diodes include elements having a gate electrode, a dielectric layer, a source electrode, a drain electrode, and a semiconductor layer in contact with the source electrode and the drain electrode on a substrate, and in which the source electrode and the gate electrode are electrically connected by wiring.

[0018] The dielectric layer in the present invention functions as a gate insulating layer in the above TFT or diode and as a dielectric layer in a capacitor.

[0019] [Embodiment 1: TFT] FIG. 1(a) is a schematic cross-sectional view showing a TFT which is an element according to Embodiment 1 of the present invention. FIG. 1(b) is an enlarged view of a portion surrounded by a broken line in FIG. 1(a). The element according to Embodiment 1 includes a substrate 1, a gate electrode 2 which is a first electrode disposed on the substrate 1 and a wiring 12, a dielectric layer 3 and 13 disposed thereon, a source electrode 4 and a drain electrode 5 which are second electrodes disposed on the dielectric layer 3 and 13, and a semiconductor layer 6 disposed therebetween. The wiring 12 and the source electrode 4 are electrically connected at a contact hole 7 portion. As shown in FIG. 1(b), the substrate 1 has irregularities on its surface, for example, convex portions 11.

[0020] (Relationship between the maximum peak height Sp and the film thickness di2) In the element according to Embodiment 1 of the present invention, there is a relationship of 50 nm < Sp < di2 between the maximum peak height Sp of the substrate 1 and the average film thickness di2 of the dielectric layer 3 formed on the substrate , whereby electrical leakage is suppressed and the element is applicable to manufacturing techniques including a transfer process. Here, the maximum peak height Sp is the maximum peak height defined in ISO 25178.

[0021] Although the detailed mechanism is unknown, it is presumed as follows. First, if the maximum peak height Sp of the substrate 1 is 50 nm or less, when performing printing or the like using a roll-to-roll method to continuously form some component on the long substrate 1, static electricity is likely to be generated between the printing plate or photomask and the substrate, resulting in transportation problems. Therefore, by making the maximum peak height Sp greater than 50 nm, transportation problems can be suppressed. Furthermore, since Sp is smaller than di2, the dielectric layer 3 has a sufficient thickness, which is thought to make it possible to suppress electrical leakage in elements fabricated by printing or coating methods.

[0022] One method for measuring the maximum peak height Sp of the substrate 1 is to measure optical images using a color scanning white light interference microscope. The observation range is a field of view with a side of 100 μm to 150 μm, and images are taken at equal intervals at five randomly selected points in the field of view. For each field of view, equal interval images are taken at three points on each side spaced 150 μm apart, for a total of nine points, and the average Sp of the nine points is used as the Sp of that field of view. The average Sp of each of the five points in the field of view is used as the representative value Sp of the substrate. This measurement method can also be applied to embodiments 2 and 3.

[0023] The average film thickness di2 of the dielectric layer 3 formed on the substrate 1 refers to the average film thickness of the dielectric layer 3 in the region where the gate electrode 2 and the wiring 12 disposed on the substrate 1 are not present.

[0024] One method for measuring di2 is to cut out a cross section perpendicular to the film surface where the dielectric layer 3 is formed on the substrate 1, and measure the cross section observation image using a scanning electron microscope (SEM). For cross section observation using SEM, the dielectric layer on the substrate is observed for five randomly selected TFTs. The observation range is 4 to 10 times the thickness of the dielectric layer. For each cross section observation image obtained, the average film thickness of each TFT is calculated using five of the dividing lines that divide the dielectric layer into six equal parts in the width direction. The average value of the average film thicknesses for the five TFTs is taken as di2. This measurement method can also be applied to embodiments 2 and 3.

[0025] The method for making Sp<di2 is not particularly limited, and examples include known coating methods such as spin coating, blade coating, slit die coating, screen printing, bar coating, casting, printing transfer, dip coating, and inkjet printing.

[0026] It is preferable that the thickness (dc) of the first electrode has a relationship of 20 nm < dc < di2 with the above di2. By setting it within this range, electrical leakage can be more effectively suppressed. It is preferable that dc is 250 nm or less. When within this range, even if di2 is, for example, 500 nm or less, it becomes easier to suppress electrical leakage.

[0027] It is more preferable that the minimum film thickness (di3) of the dielectric layer 3 formed on the gate electrode 2 is 50 nm or more. By setting it within this range, a dielectric layer 3 with a sufficient film thickness exists on the gate electrode, so electrical leakage can be more effectively suppressed.

[0028] In order to make di3 50 nm or more, it is desirable that di2 is at least twice that of dc. Also, when dc is 20 - 50 nm, it is desirable to make di2 100 nm or more. By being within this range, the probability of making di3 50 nm or more increases, and it is particularly effective in suppressing electrical leakage.

[0029] The minimum film thickness di3 of the dielectric layer 3 formed on the gate electrode 2 refers to the minimum value of the film thickness of the dielectric layer located in the region on the gate electrode 2 among the dielectric layers 3 arranged on the substrate 1.

[0030] Similar to di2, the upper limit of di3 is preferably 500 nm or less from the perspective of the electrical characteristics of the device.

[0031] One method for measuring di3 is to cut out a cross section of the dielectric layer 3 formed on the gate electrode 2 and measure the cross-sectional image using an SEM. The cross-sections of 20 randomly selected TFTs are observed using an SEM. For each cross section, an image is acquired so that the entire gate electrode 2 is included in the observation field, and the thinnest part of the dielectric layer 3 on the gate electrode 2 is observed in each image. The magnification is set to 10,000 to 50,000 times. If the entire gate electrode 2 cannot be captured in a single image or if a higher magnification is required to identify the thin-film portion, the image may be acquired in separate images to identify the thin-film portion. Once the minimum film thickness of the dielectric layer 3 is obtained for each of the 20 cross sections, the smallest value among them is taken as di3. This measurement method can also be applied to Embodiments 2 and 3.

[0032] One method for measuring the thickness dc of the gate electrode 2 is to cut out a cross section perpendicular to the gate electrode film surface and measure the cross section observation image using an SEM. The cross section observation using an SEM is performed by observing five randomly selected locations of the gate electrode. The observation range is 10 to 50 times the gate electrode thickness. For each obtained cross section observation image, the average film thickness is calculated for each of five dividing lines that divide the gate electrode film into six equal parts in the width direction. The average film thicknesses at each of the five observed locations are averaged and calculated to obtain dc. This measurement method can also be applied to embodiments 2 and 3.

[0033] (base material) The substrate 1 may be any substrate within the scope of the present invention, provided that at least the surface on which the electrode system is disposed is insulating. Examples of suitable substrates include resin substrates made of organic materials such as polyimide, polyvinyl alcohol, polyvinyl chloride, polyethylene terephthalate, polyvinylidene fluoride, polysiloxane, polyvinylphenol (PVP), polyester, polycarbonate, polysulfone, polyethersulfone, polyethylene, polyphenylene sulfide, and polyparaxylene, as well as inorganic substrates made of silicon wafers, glass, ceramics, and the like. To enable the adoption of a cheaper manufacturing process, resin substrates are more preferred, as they have low cost per unit area and excellent flexibility.

[0034] The substrate may also have a coating layer formed on its surface. In this case, the substrate is considered to include the coating layer, and the maximum peak height Sp is measured including the coating layer. The coating layer may have an adhesive property or a wettability adjusting property.

[0035] The substrate 1 may be either sheet-shaped or long. If it is long, it can be used for manufacturing elements by a roll-to-roll method.

[0036] (gate electrodes and wiring) Any conductive material that can be generally used as an electrode may be used for the gate electrode 2 and the wiring 12. Examples of conductive materials include, but are not limited to, conductive metal oxides such as tin oxide, indium oxide, and indium tin oxide (ITO); metals such as platinum, gold, silver, copper, iron, tin, zinc, aluminum, indium, chromium, lithium, sodium, potassium, cesium, calcium, magnesium, palladium, molybdenum, amorphous silicon, and polysilicon, as well as alloys thereof; inorganic conductive materials such as copper iodide and copper sulfide; polythiophene, polypyrrole, polyaniline; complexes of polyethylenedioxythiophene and polystyrenesulfonic acid; conductive polymers whose conductivity is improved by doping with iodine or the like; carbon materials; and materials containing an organic component and a conductor.

[0037] (dielectric layer) The materials used for the dielectric layers 3 and 13 are not particularly limited as long as they exhibit sufficient insulating properties to allow the TFTs to function normally, but polymers are preferred. Examples of polymers that can be used include polysiloxane, polyamide, polyamideimide, polyimide, polybenzimidazole, polyvinyl alcohol, polyvinylphenol, polyacetal, polycarbonate, polyarylate, polyphenylene sulfide, polyethersulfone, polyetherketone, polyphthalamide, polyethernitrile, polymethyl methacrylate, polymethacrylamide, polyvinylidene fluoride, polytetrafluoroethylene, polystyrene, polyester, aromatic polyether, novolac resin, phenolic resin, acrylic resin, olefin resin, alicyclic olefin resin, vinyl chloride resin, epoxy resin, melamine resin, and urea resin. These polymers can also be copolymerized or mixed with other polymers. Among these, polysiloxane is preferred for its ability to improve the electrical properties of the TFTs and suppress electrical leakage.

[0038] The dielectric layer preferably contains inorganic particles. There are no particular limitations on the inorganic particles as long as they are made of an inorganic substance. Since inorganic particles have a small shrinkage rate during thermal curing, they can suppress the occurrence of shrinkage stress. As a result, the crack resistance of the element of the present invention can be improved, and leakage current can be reduced.

[0039] The inorganic particles in the dielectric layer may be dispersed in a polymer, but are preferably contained as polymer to which the inorganic particles are bound.

[0040] The dielectric layer is preferably a thin film with a high inorganic particle content to obtain a high capacitance element. However, if the inorganic particle content is too high, there is a concern that the occurrence rate of electrical leakage will increase. Therefore, the inorganic particle content in the dielectric layer is preferably 10 vol% or more, more preferably 15 vol% or more, and particularly preferably 20 vol% or more. Similarly, the content is preferably 60 vol% or less, more preferably 50 vol% or less, and particularly preferably 45 vol% or less.

[0041] Furthermore, the capacitance of the element is proportional to the relative permittivity of the dielectric layer. To obtain a capacitor with high capacitance or a TFT with a large on-state current, it is preferable that the relative permittivity of the dielectric layer is 5 or more. It is also preferable that the relative permittivity of the dielectric layer is 20 or less. This is because it can prevent excessive dielectric loss due to the gate insulating layer and ensure accurate operation, particularly in TFTs driven by radio waves in the high-frequency band of 100 MHz or more.

[0042] Thus, it is preferable that the content of inorganic particles in the dielectric layer is as high as possible, but on the other hand, if the content of inorganic particles is high, the leveling property during the formation of the dielectric layer is reduced, and electrical leakage is likely to occur due to the influence of the Sp of the substrate. Specifically, if the Sp of the substrate is relatively large and the content of inorganic particles in the dielectric layer is relatively high, a uniform dielectric layer may not be formed.

[0043] Therefore, it is also applicable to manufacturing technologies including a transfer process. From the perspective of suppressing electrical leakage and obtaining an element with more excellent electrical characteristics, it is preferable that 50 nm < Sp < di2 and the inorganic particle content rate in the dielectric layer is 10 to 60 vol%, more preferably 50 nm < Sp < di2 and the inorganic particle content rate in the dielectric layer is 20 to 45 vol%, and even more preferably 50 nm < Sp ≤ 200 nm and the inorganic particle content rate in the dielectric layer is 20 to 45 vol%.

[0044] The inorganic particles are not particularly limited as long as they are particles made of an inorganic substance, but particles made of a metal compound or a semi-metal compound are preferable, and inorganic oxide particles are particularly preferable from the perspective of reactivity with the polymer.

[0045] Examples of the metal or semi-metal include elements selected from the group consisting of silicon, magnesium, calcium, strontium, barium, lanthanum, cerium, tin, titanium, zirconium, hafnium, yttrium, niobium, tantalum, and aluminum. Examples of the metal compound or semi-metal compound include halides, oxides, nitrides, hydroxides, carbonates, sulfates, nitrates, or metasilicates of the above metals or semi-metals. Among these, from the perspective of improving the electrical characteristics of the TFT, being a metal oxide is preferable.

[0046] The shape of the inorganic particles is not particularly limited, but in order to keep the surface of the dielectric layer smooth, a shape with a low aspect ratio is preferable, and being spherical is more preferable.

[0047] From the viewpoint of improving the pattern processability of the dielectric layer and suppressing electrical leakage by improving crack resistance, the number average particle diameter of the inorganic particles is preferably 1 nm or more, more preferably 5 nm or more, even more preferably 15 nm or more, and particularly preferably 20 nm or more. When the number average particle diameter of the inorganic particles is within the above range, the crack resistance of the dielectric layer can be improved and electrical leakage can be suppressed. On the other hand, the number average particle diameter is preferably 100 nm or less, more preferably 70 nm or less, even more preferably 60 nm or less, and particularly preferably 50 nm or less. When the number average particle diameter is within the above range, pattern processability can be improved.

[0048] Here, the number-average particle diameter of inorganic particles can be determined by the following measurement using a scanning electron microscope (SEM) or a transmission electron microscope (TEM). A cross section of the gate insulating layer is observed at a magnification of 50,000 to 200,000 times. If the inorganic particles are spherical, the diameter of the sphere is measured and used as the particle diameter of the particle. If the inorganic particles are not spherical, the longest diameter (hereinafter referred to as the "major axis diameter") and the longest diameter in the direction perpendicular to the major axis diameter (hereinafter referred to as the "minor axis diameter") are measured, and the biaxial average diameter, which is the average of the major axis diameter and the minor axis diameter, is used as the particle diameter of the particle. This particle diameter measurement is performed on 20 or more randomly selected particles, and the arithmetic average is used as the number-average particle diameter.

[0049] Furthermore, to facilitate reaction with the resin, the inorganic particles preferably have functional groups, such as hydroxyl groups, on their surfaces that can react with the resin. If the reactivity between the inorganic particles and the resin is good, the inorganic particles are incorporated into the resin during thermal curing, suppressing the generation of shrinkage stress during thermal curing, thereby improving the crack resistance of the dielectric layer and suppressing electrical leakage.

[0050] Examples of inorganic particles include silica particles, magnesium fluoride particles, magnesium chloride particles, magnesium bromide particles, magnesium oxide particles, magnesium carbonate particles, magnesium sulfate particles, magnesium nitrate particles, magnesium hydroxide particles, calcium fluoride particles, calcium chloride particles, calcium bromide particles, calcium oxide particles, calcium carbonate particles, calcium sulfate particles, calcium nitrate particles, calcium hydroxide particles, strontium fluoride particles, barium fluoride particles, lanthanum fluoride particles, cerium fluoride, tin oxide-titanium oxide composite particles, silicon oxide-titanium oxide composite particles, titanium oxide particles, zirconium oxide particles, hafnium oxide, tin oxide particles, yttrium oxide particles, niobium oxide particles, tantalum oxide particles, acid Examples of suitable particles include tin oxide-zirconium oxide composite particles, silicon oxide-zirconium oxide composite particles, aluminum oxide particles, barium titanate particles, strontium titanate particles, and barium titanate-strontium titanate composite particles. However, from the viewpoint of compatibility with the polymer described below, silica particles, tin oxide-titanium oxide composite particles, silicon oxide-titanium oxide composite particles, titanium oxide particles, zirconium oxide particles, hafnium oxide, tin oxide particles, yttrium oxide particles, niobium oxide particles, tantalum oxide particles, tin oxide-zirconium oxide composite particles, silicon oxide-zirconium oxide composite particles, aluminum oxide particles, barium titanate particles, strontium titanate particles, and barium titanate-strontium titanate composite particles are preferred.

[0051] Furthermore, from the viewpoint of improving the electrical characteristics of the TFT, particles such as tin oxide-titanium oxide composite particles, silicon oxide-titanium oxide composite particles, titanium oxide particles, zirconium oxide particles, hafnium oxide, yttrium oxide particles, niobium oxide particles, tantalum oxide particles, tin oxide-zirconium oxide composite particles, silicon oxide-zirconium oxide composite particles, aluminum oxide particles, barium titanate particles, strontium titanate particles, and barium titanate-strontium titanate composite particles are more preferred.

[0052] Examples of silica particles include methanol silica sol using methanol (MA) as a dispersion medium, IPA-ST using isopropyl alcohol (IPA) as a dispersion medium, EG-ST using ethylene glycol (EG) as a dispersion medium, MEK-ST using methyl ethyl ketone (MEK) as a dispersion medium, PMA-ST using propylene glycol monomethyl ether acetate (PGMEA) as a dispersion medium, PGM-ST using propylene glycol monomethyl ether (PGME) as a dispersion medium, Snowtex (registered trademark) OXS using a water-based dispersion solution, Snowtex OS using a water-based dispersion solution, Snowtex O-50 using a water-based dispersion solution (all manufactured by Nissan Chemical Industries, Ltd.), OSCAL (registered trademark)-1421 using IPA as a dispersion medium, Snowtex O-1432 using IPA as a dispersion medium, Snowtex O-50 using MA ... Preferred examples of such a polymer include PL-1132, PL-1632 with ethylene glycol monomethyl ether (EGME) as a dispersion medium, and PL-1727BM with EG as a dispersion medium (all manufactured by JGC Catalysts and Chemicals Industries, Ltd.); QUARTRON (registered trademark) PL-06L with a water dispersion medium; PL-1 with a water dispersion medium; PL-2L with a water dispersion medium; PL-3 with a water dispersion medium; PL-1-IPA with IPA as a dispersion medium; PL-2L-IPA with IPA as a dispersion medium; PL-2L-MA with MA as a dispersion medium; PL-2L-PGME with PGME as a dispersion medium; and PL-2L-DAA with diacetone alcohol (DAA) as a dispersion medium (all manufactured by Fuso Chemical Co., Ltd.). These polymers are suitable for patterning in alkaline developers, but other known materials can also be used.

[0053] Examples of tin oxide-titanium oxide composite particles include Optrake (registered trademark) TR-502 and TR-504 (both manufactured by JGC Catalysts and Chemicals Industries, Ltd.). Examples of silicon oxide-titanium oxide composite particles include Optrake (registered trademark) TR-503, TR-513, TR-520, TR-521, TR-527, TR-528, TR-529, TR-543, TR-544, and TR-550 (all manufactured by JGC Catalysts and Chemicals Industries, Ltd.).

[0054] Examples of titanium oxide particles include Optrake (registered trademark) TR-505 (manufactured by JGC Catalysts and Chemicals Industries, Ltd.), Tinoc (registered trademark) A-6, M-6, or AM-15 (all manufactured by Taki Chemical Industry Co., Ltd.), nSol (registered trademark) 101-20I, 101-20L, 101-20BL, or 107-20I (all manufactured by Nanogram Co., Ltd.), TTO-51(A), TTO-51(B), TTO-55(A), TTO-55(B), TTO-55(C), TTO-55(D), TTO-V-4, or TTO-W-5 (all manufactured by Ishihara Sangyo Kaisha, Ltd.). ), RTTAP15WT%-E10, RTTDNB15WT%-E11, RTTDNB15WT%-E12, RTTDNB15WT%-E13, RTTIBA15WT%-E6, RTIPA15WT%-N08, RTIPA15WT%-N09, RTIPA20WT%-N11, RTIPA20WT%-N13, RTIPA20WT%-N14 or RTIPA20WT%-N16 (all manufactured by C.I. Kasei Co., Ltd.), or HT331B, HT431B, HT631B, HT731B or HT830X (all manufactured by Toho Titanium Co., Ltd.).

[0055] Examples of zirconium oxide particles include Nanouse (registered trademark) ZR-30BL, ZR-30BS, ZR-30BH, ZR-30AL, ZR-30AH, and OZ-30M (all manufactured by Nissan Chemical Industries, Ltd.), and ZSL-M20, ZSL-10T, ZSL-10A, and ZSL-20N (all manufactured by Daiichi Kigenso Kagaku Kogyo Co., Ltd.).

[0056] Examples of tin oxide particles include Ceramace (registered trademark) S-8 and S-10 (both manufactured by Taki Chemical Industry Co., Ltd.).

[0057] Niobium oxide particles such as Baylar (registered trademark) Nb-X10 (manufactured by Taki Chemical Industry Co., Ltd.) are an example.

[0058] Other inorganic particles include tin oxide-zirconium oxide composite particles (manufactured by Catalysts and Chemical Industries Co., Ltd.), tin oxide particles, or zirconium oxide particles (all manufactured by Kojundo Chemical Research Institute Co., Ltd.).

[0059] The polymer is preferably soluble in a solvent, and the skeleton may be any of linear, cyclic, and branched. Furthermore, it is preferable that a crosslinkable functional group, a polar functional group, or a functional group that controls various properties of the polymer be introduced into the side chain. By using a polymer with controlled properties, for example, coatability, surface flatness, solvent resistance, transparency, and good wettability with other inks can be obtained in the device fabrication process, and further, good devices with excellent durability and stability after device formation can be obtained, so the above-mentioned polymers are preferred.

[0060] The polymer preferably contains at least a polysiloxane having a structural unit represented by general formula (1).

[0061] [ka]

[0062] In general formula (1), R 1 represents a hydrogen atom, an alkyl group, a cycloalkyl group, a heterocyclic group, an aryl group, a heteroaryl group, or an alkenyl group. 2 represents a hydrogen atom, an alkyl group, a cycloalkyl group, or a silyl group. m represents 0 or 1. A 1 represents an organic group containing at least two of a carboxyl group, a sulfo group, a thiol group, a phenolic hydroxyl group, or a derivative thereof, provided that when the derivative has a cyclic condensation structure formed by two of the carboxyl group, the sulfo group, the thiol group, and the phenolic hydroxyl group, A 1 represents an organic group having at least one cyclic condensed structure.

[0063] Such polysiloxanes are described in detail in WO 2018 / 097042 and can be suitably used in the present invention.

[0064] (source electrode, drain electrode) The material used for the source electrode 4 and the drain electrode 5 may be the same as the material used for the gate electrode, but preferably contains at least metal particles and an organic component. Examples of metal particles include gold, silver, copper, nickel, tin, bismuth, lead, zinc, palladium, platinum, aluminum, tungsten, molybdenum, and carbon. More preferred metal particles are metal particles containing at least one element selected from the group consisting of gold, silver, copper, nickel, tin, bismuth, lead, zinc, palladium, platinum, aluminum, and carbon. These metal particles may be used alone, as an alloy, or as a mixture of particles.

[0065] The organic component is not particularly limited, but examples thereof include monomers, oligomers, polymers, photopolymerization initiators, compounds having a carboxyl group, polymerization inhibitors, plasticizers, leveling agents, surfactants, silane coupling agents, antifoaming agents, and pigments.

[0066] The oligomer or polymer is not particularly limited, and examples thereof include acrylic resin, epoxy resin, novolac resin, phenolic resin, polyimide precursor, and polyimide. Among these, acrylic resin is preferred from the viewpoint of crack resistance when the electrode is bent. This is presumably because acrylic resin has a glass transition temperature of 100°C or less, and softens during thermal curing of the conductive film, enhancing the bonding between metal particles.

[0067] An acrylic resin is a resin containing a repeating unit derived from at least an acrylic monomer. Specific examples of the acrylic monomer include methyl acrylate, methyl methacrylate, acrylic acid, methacrylic acid, 2-hydroxyethyl acrylate, and isobornyl acrylate. These acrylic monomers may be used alone or in combination of two or more.

[0068] The monomer may be a compound having a carbon-carbon double bond, and specific examples of the monomer include the above-mentioned acrylic monomers, as well as styrene, α-methylstyrene, maleic acid, and fumaric acid.

[0069] Examples of the compound having a carboxyl group include an acrylic resin using an unsaturated acid such as an unsaturated carboxylic acid as part of the constituent monomer, a surfactant having a carboxyl group, and other additives having a carboxyl group.

[0070] It is preferable that the organic component contains at least a compound having a carbon-carbon double bond and a compound having a carboxyl group. By containing at least these compounds, curing reactivity by polymerization reactions such as radical polymerization, cationic polymerization, and anionic polymerization and solubility in an alkaline developer can be imparted, making it possible to prepare a photosensitive conductive paste and to process fine patterns by photolithography.

[0071] (semiconductor layer) The semiconductor layer in the present invention is not particularly limited as long as it has semiconducting properties, and inorganic semiconductors such as silicon semiconductors and oxide semiconductors, organic semiconductors such as pentacene and polythiophene derivatives, and carbon semiconductors such as carbon nanotubes (CNTs) and graphene can be used. Among these, CNTs are advantageous in that they have high carrier mobility and can be applied by a simple coating process at low cost.

[0072] The CNTs may be single-walled CNTs in which one carbon film (graphene sheet) is wound cylindrically, double-walled CNTs in which two graphene sheets are wound concentrically, or multi-walled CNTs in which multiple graphene sheets are wound concentrically, or two or more of these may be used. From the viewpoint of exhibiting semiconductor properties, it is preferable to use single-walled CNTs. It is more preferable that the single-walled CNTs contain 90% by mass or more of semiconducting single-walled CNTs. It is even more preferable that the single-walled CNTs contain 95% by mass or more of semiconducting single-walled CNTs.

[0073] Furthermore, CNT composites with a conjugated polymer attached to at least a portion of the CNT surface are particularly preferred because they exhibit excellent dispersion stability in solution and low hysteresis. "Conjugated polymers attached to at least a portion of the CNT surface" refers to a state in which the conjugated polymer coats part or all of the CNT surface. It is believed that conjugated polymers can coat CNTs because of interactions caused by overlapping π-electron clouds derived from the respective conjugated structures. Whether a CNT is coated with a conjugated polymer can be determined by checking whether the reflected color of the coated CNT approaches that of the conjugated polymer, rather than that of the uncoated CNT. The presence of deposits and their mass ratio to the CNT can be quantitatively identified using elemental analysis or X-ray photoelectron spectroscopy. Furthermore, conjugated polymers attached to CNTs can be used regardless of their molecular weight, molecular weight distribution, or structure.

[0074] Examples of the conjugated polymers used to coat the CNTs include polythiophene polymers, polypyrrole polymers, polyaniline polymers, polyacetylene polymers, poly-p-phenylene polymers, poly-p-phenylene vinylene polymers, and thiophene-heteroarylene polymers having thiophene units and heteroaryl units in the repeating units, and two or more of these may be used. The polymers may be those in which a single monomer unit is arranged, those in which different monomer units are block copolymerized, random copolymerized, or graft polymerized.

[0075] The semiconductor layer may be a mixture of a CNT composite and an organic semiconductor. Uniformly dispersing the CNT composite in the organic semiconductor allows low hysteresis to be achieved while maintaining the properties of the organic semiconductor itself. Preferred organic semiconductors include known ones such as those described in International Publication No. 2019 / 065561.

[0076] The semiconductor layer may also contain other carbon materials, such as graphene and fullerene.

[0077] The semiconductor layer may further include an insulating material, such as, but not limited to, polymer materials such as poly(methyl methacrylate), polycarbonate, and polyethylene terephthalate.

[0078] (Element manufacturing method) The method for forming the dielectric layer in the present invention is not particularly limited, and examples thereof include vacuum deposition, electron beam deposition, sputtering, plating, CVD, ion plating coating, inkjet printing, printing, and coating methods. Coating methods include known coating methods such as spin coating, blade coating, slit die coating, screen printing, bar coating, casting, print transfer, immersion and lifting, and inkjet printing. From the viewpoint of cost and efficiency, formation by a coating method is preferred. Furthermore, it is preferable that the coating step of the dielectric layer includes a step of transporting the substrate using a roll-to-roll system.

[0079] Hereinafter, the method for manufacturing an element according to the first embodiment of the present invention will be specifically described, taking as an example the case of manufacturing an element having the structure shown in FIG.

[0080] First, as shown in FIG. 2(a), a gate electrode 2 and wiring 12 are formed on a substrate 1. There are no particular limitations on the method for forming them, and examples include methods using known techniques such as resistance heating evaporation, electron beam deposition, sputtering, plating, chemical vapor deposition (CVD), ion plating coating, inkjet printing, and printing. Another example of a method for forming electrodes is a method in which a paste containing an organic component and a conductor is applied to an insulating substrate by known techniques such as spin coating, blade coating, slit die coating, screen printing, bar coating, molding, print transfer, and dipping and pulling, and then dried using an oven, a hot plate, infrared rays, or the like. The first electrode group may be formed intermittently or by continuous application.

[0081] As a method for forming an electrode pattern, the electrode thin film prepared by the above method may be patterned into a desired shape by a known photolithography method or the like, or the pattern may be formed by using a mask of a desired shape during vapor deposition or sputtering of the electrode material.

[0082] Next, as shown in FIG. 2(b), dielectric layers 3 and 13 are formed on the gate electrode 2 and the wiring 12. There are no particular limitations on the method for producing the dielectric layers 3 and 13, but a coating method is preferred because it is suitable for a roll-to-roll process. For example, a coating film obtained by applying a composition containing a material for forming the dielectric layer to a substrate and drying it is subjected to photolithography to form a contact hole 7, followed by heat treatment as necessary.

[0083] The dielectric layer pattern may be formed by patterning the dielectric layer prepared by the above method into a desired shape using an exposure method or by printing using a mask of the desired shape. The pattern may have contact holes 7 used for wiring connecting the wiring 12 and the source electrode 4.

[0084] The exposure method is generally a method of exposure through a photomask, as is done in normal photolithography. Alternatively, a method of direct drawing using laser light or the like may be used. Examples of exposure devices include a stepper exposure machine or a proximity exposure machine. Examples of active light sources used in this case include near-ultraviolet light, ultraviolet light, electron beams, X-rays, and laser light, with ultraviolet light being preferred. Examples of ultraviolet light sources include low-pressure mercury lamps, high-pressure mercury lamps, ultra-high-pressure mercury lamps, halogen lamps, and germicidal lamps, with ultra-high-pressure mercury lamps being preferred.

[0085] Examples of the developing method include a method in which an alkaline developer such as tetramethylammonium hydroxide, potassium hydroxide, or sodium carbonate is used and the developer is sprayed onto the substrate while the substrate is standing still or rotating, a method in which the substrate is immersed in the developer, etc. The pattern obtained by development may be subjected to a rinse treatment with water or an aqueous alcohol solution.

[0086] Furthermore, it is also preferable to cure the obtained pattern as necessary. Examples of the curing method include heat drying using an oven, an inert oven, a hot plate, infrared rays, etc., and vacuum drying. By this formation method, a fine wiring pattern can be easily formed.

[0087] Next, as shown in FIG. 2(c), a semiconductor layer 6 is formed on top of the dielectric layer 3. The semiconductor layer 6 can be formed using dry methods such as resistance heating evaporation, electron beam deposition, sputtering, and CVD. However, a coating method is preferred from the viewpoints of manufacturing cost and suitability for large areas. Examples of coating methods include known coating methods such as spin coating, blade coating, slit die coating, screen printing, bar coating, molding, print transfer, dipping and pulling, and inkjet printing. The coating method can be selected depending on the desired coating film characteristics, such as coating film thickness control and orientation control. Using these methods, the semiconductor layer is formed so that it is in contact with the conductive patterns that will become the source electrode 4 and the drain electrode 5. The source electrode and the drain electrode may be formed after the semiconductor layer is formed.

[0088] In particular, when forming a semiconductor layer containing CNTs, it is preferable to apply a solution containing CNTs onto the gate insulating film. In this case, there are no particular limitations on the application method, but using an inkjet method is advantageous in that it reduces the amount of solution used and increases productivity. The solution containing CNTs can be prepared by stirring CNTs in a solvent using a known dispersion device such as an ultrasonic homogenizer.

[0089] When the semiconductor layer is formed by coating, the formed coating film is dried in air, under reduced pressure, or in an inert gas (nitrogen or argon) atmosphere. The drying temperature is preferably 50 to 150°C.

[0090] 2(d), a source electrode 4 and a drain electrode 5 are formed on the dielectric layers 3 and 13, the gate electrode 2, and the semiconductor layer 6. A more preferable method for forming these electrodes is to apply a paste containing at least metal particles and an organic component, and then form the second electrode group through a process including drying, exposure, and development.

[0091] Examples of the coating method include known techniques such as spin coating, blade coating, slit die coating, screen printing, bar coater, mold coating, print transfer, immersion and pulling up, etc. Examples of the drying method include drying using an oven, a hot plate, infrared rays, etc.

[0092] The exposure method is generally a method of exposure through a photomask, as is done in normal photolithography. Alternatively, a method of direct drawing using laser light or the like may be used. Examples of exposure devices include a stepper exposure machine or a proximity exposure machine. Examples of active light sources used in this case include near-ultraviolet light, ultraviolet light, electron beams, X-rays, and laser light, with ultraviolet light being preferred. Examples of ultraviolet light sources include low-pressure mercury lamps, high-pressure mercury lamps, ultra-high-pressure mercury lamps, halogen lamps, and germicidal lamps, with ultra-high-pressure mercury lamps being preferred.

[0093] Examples of the developing method include a method in which an alkaline developer such as tetramethylammonium hydroxide, potassium hydroxide, or sodium carbonate is used and the developer is sprayed onto the substrate while the substrate is standing still or rotating, a method in which the substrate is immersed in the developer, etc. The pattern obtained by development may be subjected to a rinse treatment with water or an aqueous alcohol solution.

[0094] Furthermore, it is also preferable to cure the obtained pattern as necessary. Examples of the curing method include heat drying using an oven, an inert oven, a hot plate, infrared rays, etc., and vacuum drying. By this formation method, a fine wiring pattern can be easily formed.

[0095] [Embodiment 2: Capacitor] FIG. 3(a) is a schematic cross-sectional view showing a capacitor, which is an element according to a second embodiment of the present invention. FIG. 3(b) is an enlarged view of the portion surrounded by the dashed line in FIG. 3(a). This structure has a lower electrode 22, which is a first electrode, a dielectric layer 23, and an upper electrode 24, which is a second electrode, on a substrate 21. The lower electrode 22 and the upper electrode 24 are not electrically connected, and the dielectric layer 23 is formed between them. As shown in FIG. 3(b), the substrate 1 has an uneven surface, such as a protrusion 31.

[0096] This second embodiment has the same features as the first embodiment, except that the element is a capacitor.

[0097] In the second embodiment, the average film thickness di2 of the dielectric layer 23 formed on the substrate 21 refers to the average film thickness of the dielectric layer 23 in the region where the lower electrode 22 disposed on the substrate 21 does not exist.

[0098] In this embodiment 2, the minimum film thickness di3 of the dielectric layer 23 formed on the lower electrode 22 refers to the minimum value of the film thickness of the dielectric layer 23 located in the region above the lower electrode 22, of the dielectric layer 23 arranged on the substrate 21.

[0099] (Element manufacturing method) Hereinafter, the method for manufacturing an element according to the second embodiment will be specifically described, taking as an example the case of manufacturing an element having the structure shown in FIG.

[0100] First, as shown in Fig. 4(a), a lower electrode 22 is formed on a substrate 1. Next, as shown in Fig. 4(b), a dielectric layer 23 is formed. Next, as shown in Fig. 4(c), an upper electrode 24 is formed on the dielectric layer 23. Specific operations for forming each component are the same as those for the element according to the first embodiment.

[0101] [Embodiment 3: Diode] FIG. 5(a) is a schematic cross-sectional view showing a diode, which is an element according to a third embodiment of the present invention. FIG. 5(b) is an enlarged view of the portion surrounded by the dashed line in FIG. 5(a). This structure includes a substrate 41, a gate electrode 42 serving as a first electrode disposed on the substrate 41, dielectric layers 43 and 53 disposed thereon, a source electrode 44 and a drain electrode 45 serving as second electrodes disposed on the dielectric layers 43 and 53, and a semiconductor layer 46 disposed therebetween. The gate electrode 42 and the source electrode 44 are electrically connected via a contact hole 47. As shown in FIG. 4(b), the substrate 41 has an uneven surface, such as a protrusion 51.

[0102] This third embodiment has the same features as the first embodiment, except that the element is a diode.

[0103] In the third embodiment, the average thickness di2 of the dielectric layer 43 formed on the substrate 41 refers to the average thickness of the dielectric layer 43 in the region where the gate electrode 42 arranged on the substrate 41 does not exist.

[0104] In this third embodiment, the minimum film thickness di3 of the dielectric layer 43 formed on the gate electrode 42 refers to the minimum value of the film thickness of the dielectric layer 43 arranged on the substrate 41, located in the region above the gate electrode 42.

[0105] (Element manufacturing method) Hereinafter, the method for manufacturing an element according to the third embodiment will be specifically described, taking as an example the case of manufacturing an element having the structure shown in FIG.

[0106] First, as shown in FIG. 6(a), a gate electrode 42 is formed on a substrate 41. Next, as shown in FIG. 6(b), dielectric layers 43 and 53 are formed. Next, as shown in FIG. 6(c), a semiconductor layer 46 is formed on the dielectric layer 43. Next, as shown in FIG. 6(d), a source electrode 44 and a drain electrode 45 are formed on the dielectric layers 43 and 53, the gate electrode 42, and the semiconductor layer 46. Specific operations for forming each component are the same as those for the element according to the first embodiment.

[0107] (Applicability of the element) The elements according to the embodiments of the present invention are applicable to ICs in various electronic devices, wireless communication devices such as RFID tags, TFT arrays for displays, sensors, tamper detection systems, and the like.

[0108] <Wireless communication device> Next, a wireless communication device containing the element of the present invention will be described. This wireless communication device is a device that communicates information using radio waves, such as a product tag, an anti-shoplifting tag, various tickets, or a smart card.

[0109] The wireless communication device includes at least the above-described element and an antenna. A more specific configuration of the wireless communication device according to the embodiment of the present invention is shown in FIG. 7. This device includes a power supply generating unit that rectifies an external modulated wave signal received by antenna 100 and supplies power to each unit; a demodulation circuit that demodulates the modulated wave signal and sends it to a control circuit; a modulation circuit that modulates data sent from the control circuit and sends it to the antenna; and a control circuit that writes the data demodulated by the demodulation circuit to a memory circuit and reads the data from the memory circuit and transmits it to the modulation circuit, with each circuit unit being electrically connected. At least one of the power supply generating unit, demodulation circuit, control circuit, modulation circuit, and memory circuit includes an element according to the embodiment of the present invention and may further include a resistive element. The memory circuit may further include a read-only memory unit to which information is written during manufacturing, or a non-volatile rewritable memory unit such as an EEPROM (Electrically Erasable Programmable Read-Only Memory) or FeRAM (Ferroelectric Random Access Memory). The power supply generating section is composed of a capacitor according to the embodiment of the present invention and a diode.

[0110] The antenna, resistive element, and nonvolatile rewritable memory unit may be any commonly used material, and there are no particular limitations on the materials or shapes used. Furthermore, the material electrically connecting the above components may be any commonly used conductive material. The method for connecting the components may be any method that can provide electrical continuity. The width and thickness of the connection portions of the components may be any.

[0111] <TFTアレイ> A TFT array can be obtained using TFTs according to embodiments of the present invention. FIG. 8 is a schematic diagram showing an example of a TFT array. As shown in FIG. 8, a TFT array 200 includes two gate lines 250 and 260, two source lines 270 and 280, and four TFTs 210, 220, 230, and 240. The gate line 250 is electrically coupled to the gate electrodes of the TFTs 210 and 230, and the gate line 260 is electrically coupled to the gate electrodes of the TFTs 220 and 240. The source line 270 is electrically coupled to the source electrodes of the TFTs 210 and 220, and the source line 280 is electrically coupled to the source electrodes of the TFTs 230 and 240. Note that, for the sake of simplicity, FIG. 8 illustrates a TFT array 200 including four TFTs; however, the number of gate lines, source lines, and TFTs may be changed as desired.

[0112] The material for electrically connecting the gate lines, source lines, and TFTs is not particularly limited, and may be, for example, a commonly used conductive material. The connection method may be any method that provides electrical continuity. The width and thickness of the connection portion may be any desired value.

[0113] The TFT array according to the embodiment of the present invention can be used, for example, in an active matrix driven liquid crystal display, electronic paper, and the like. [Example]

[0114] The present invention will be described in more detail below with reference to examples, although the present invention is not limited to the following examples.

[0115] (Preparation of photosensitive paste) Synthesis example 1; Compound P1 (photosensitive organic component) Copolymerization ratio (by mass): ethyl acrylate (EA) / 2-ethylhexyl methacrylate (2-EHMA) / styrene (St) / glycidyl methacrylate (GMA) / acrylic acid (AA) = 20 / 40 / 20 / 5 / 15.

[0116] A reaction vessel under a nitrogen atmosphere was charged with 750 g of diethylene glycol monoethyl ether acetate (DMEA) and heated to 80°C using an oil bath. A mixture consisting of 100 g of EA, 200 g of 2-EHMA, 100 g of St, 75 g of AA, 4 g of 2,2'-azobisisobutyronitrile, and 50 g of DMEA was added dropwise over 1 hour. After the addition was complete, the polymerization reaction was continued for an additional 6 hours. 5 g of hydroquinone monomethyl ether was then added dropwise to terminate the polymerization reaction. Subsequently, a mixture consisting of 25 g of GMA, 5 g of triethylbenzylammonium chloride, and 50 g of DMEA was added dropwise over 0.5 hours. After the addition was complete, the addition reaction was continued for an additional 2 hours. The resulting reaction solution was purified with methanol to remove unreacted impurities and further dried in vacuo for 24 hours to obtain compound P1.

[0117] Synthesis example 2; Compound P2 (photosensitive organic component) Copolymerization ratio (by mass): difunctional epoxy acrylate monomer (epoxy ester 3002A; manufactured by Kyoeisha Chemical Co., Ltd.) / difunctional epoxy acrylate monomer (epoxy ester 70PA; manufactured by Kyoeisha Chemical Co., Ltd.) / GMA / St / AA = 20 / 40 / 5 / 20 / 15.

[0118] A reaction vessel under nitrogen was charged with 750 g of DMEA and heated to 80 °C using an oil bath. A mixture consisting of 100 g of epoxy ester 3002A, 200 g of epoxy ester 70PA, 100 g of St, 75 g of AA, 4 g of 2,2'-azobisisobutyronitrile, and 50 g of DMEA was added dropwise over 1 hour. After the addition was complete, the polymerization reaction was continued for an additional 6 hours. 5 g of hydroquinone monomethyl ether was then added dropwise to terminate the polymerization reaction. Subsequently, a mixture consisting of 25 g of GMA, 5 g of triethylbenzylammonium chloride, and 50 g of DMEA was added dropwise over 0.5 hours. After the addition was complete, the addition reaction was continued for an additional 2 hours. The resulting reaction solution was purified with methanol to remove unreacted impurities and then vacuum dried for 24 hours to obtain compound P2.

[0119] Synthesis example 3; Compound P3 (photosensitive organic component) Urethane modified compound of compound P2 500 g of DMEA was placed in a nitrogen atmosphere reaction vessel and heated to 80°C using an oil bath. A mixture of 50 g of photosensitive component P2, 16.5 g of n-hexyl isocyanate, and 50 g of DMEA was added dropwise over 1 hour. After the addition was completed, the reaction was continued for another 3 hours. The resulting reaction solution was purified with methanol to remove unreacted impurities, and then vacuum dried for 24 hours to obtain compound P3 having a urethane bond.

[0120] Preparation example: Photosensitive paste A In a 500 ml clean bottle, 80 g of the compound P1 obtained above, 20 g of compound P3, 10 g of Light Acrylate BP-4EA (Kyoeisha Chemical Co., Ltd.), 20 g of photopolymerization initiator OXE-01 (BASF Japan Ltd.), 3 g of acid generator SI-110 (Sanshin Chemical Industry Co., Ltd.), and 50 g of γ-butyrolactone (Mitsubishi Gas Chemical Company, Inc.) were added and mixed using a planetary-rotating vacuum mixer "Awatori Rentaro" (registered trademark) (ARE-310; Thinky Corporation) to obtain 178 g of photosensitive resin solution 1 (solid content 78.5% by mass). 80 g of the obtained photosensitive resin solution 1 was mixed with 420 g of Ag particles with an average particle size of 0.06 μm and kneaded using a three-roller "EXAKT M-50" (trade name, EXAKT) to obtain 500 g of photosensitive paste A.

[0121] (Example of dielectric layer fabrication) In the dielectric layer fabrication example, polymer solution A was prepared. Specifically, methyltrimethoxysilane (61.29 g (0.45 mol)), 2-(3,4-epoxycyclohexyl)ethyltrimethoxysilane (12.31 g (0.05 mol)), and phenyltrimethoxysilane (99.15 g (0.5 mol)) were first dissolved in 203.36 g of propylene glycol monobutyl ether (boiling point 170°C). To this solution, water (54.90 g) and phosphoric acid (0.864 g) were added with stirring. The resulting solution was heated at a bath temperature of 105°C for 2 hours, and the internal temperature was then raised to 90°C to distill off components consisting mainly of by-product methanol. Next, the solution was heated at a bath temperature of 130°C for 2 hours, and the internal temperature was then raised to 118°C to distill off components consisting mainly of water and propylene glycol monobutyl ether. The mixture was then cooled to room temperature to obtain a polysiloxane solution A3 having a solid content of 26.0% by weight. The weight average molecular weight of the polysiloxane in the obtained polysiloxane solution A3 was 6,000.

[0122] Next, 30 g of the obtained polysiloxane solution A3 was weighed out, and 163.2 g of propylene glycol monoethyl ether acetate (hereinafter referred to as PGMEA) was mixed with this, followed by stirring at room temperature for 2 hours. In this way, polymer solution A was obtained.

[0123] (Measurement of maximum peak height of substrate) The Sp of the substrate was measured using a color scanning white light interference microscope (VS1540, manufactured by Hitachi, Ltd.). The observation range was set at a magnification of 50x, and images were taken at equal intervals at five points in the visual field. For each visual field, images were taken at equal intervals at three points on each side at intervals of 150 μm, for a total of nine points, and the Sp was calculated for each point. The Sp of the nine points was averaged and used as the Sp of the visual field. The average value of the Sp for the five visual fields was evaluated as the representative value Sp of the substrate.

[0124] Example 1 In Example 1, capacitors were continuously produced using a roll-to-roll method in the element according to the second embodiment of the present invention (see Figure 3). The capacitors were arranged on a film using the following photomask design. Using the center of the mask as the reference, the capacitors were evenly arranged vertically and horizontally so that the center coordinates of each capacitor were spaced 10.5 mm apart. Approximately 1,000 capacitors were obtained by one-pitch exposure using this photomask.

[0125] Specifically, first, copper was vacuum-deposited to a thickness of 100 nm on the entire surface of a substrate 21 (U324, manufactured by Toray Industries, Inc., width 300 mm, length 50 m, film thickness 50 μm) by resistance heating. A photoresist (product name "LC100-10cP", manufactured by Rohm and Haas Co., Ltd.) was continuously printed on the entire surface by slit coating, and then heated and dried in a hot air drying oven at 100°C for 4 minutes. The photoresist film thus produced was exposed to light at an exposure dose of 60 mJ / cm2 through a photomask on which the first electrode 2 was designed. 2 The photomask was exposed to light for 100 shots at a feed rate of 420 mm (equivalent to a wavelength of 365 nm). The first electrode designed on the photomask was 500 μm square. After exposure, the substrate was developed for 30 seconds with a 2.38 wt % tetramethylammonium hydroxide aqueous solution and then washed with water for 1 minute. The substrate was then etched for 30 seconds with mixed acid (product name SEA-5, manufactured by Kanto Chemical Co., Ltd.) and then washed with water for 30 seconds. The resist was removed by immersion in AZ Remover 100 (product name, manufactured by AZ Electronic Materials Co., Ltd.) for 2 minutes, rinsed with water for 30 seconds, and then water droplets were removed with an air knife. The substrate was then heated and dried in a hot air oven at 80°C for 60 seconds to form the lower electrode 22 (see Figure 4(a)).

[0126] Thereafter, polymer solution A, which would become the dielectric layer, was continuously printed over the entire surface by slit coating, and the substrate was heat-treated in a hot air drying oven at 100°C for 3 minutes in an air atmosphere, and then in an IR drying oven at 150°C for 20 minutes in a nitrogen atmosphere, thereby forming a dielectric layer 23 with a thickness of 400 nm (see Figure 4(b)).

[0127] Next, photosensitive paste A was applied to the dielectric layer with a print size of 280 mm x 400 mm by screen printing at a feed rate of 420 mm for 100 shots so as to overlap the exposed area when the first electrode was formed, and the resultant was pre-baked in a hot air drying oven at 100°C for 4 minutes. After that, a photosensitive paste A was applied to the dielectric layer with a print size of 280 mm x 400 mm by screen printing at an exposure dose of 80 mJ / cm2 so as to overlap the exposed area when the first electrode was formed. 2 (Equivalent to a wavelength of 365 nm) and a feed rate of 420 mm, full-line exposure was performed. After exposure, the substrate was developed with a 0.5% Na2CO3 solution for 30 seconds, washed with ultrapure water for 60 seconds, and then cured in an IR drying oven at 150°C for 10 minutes. This resulted in the production of a capacitor (Figure 4(c)).

[0128] The obtained capacitors were evaluated as described in [1] to [5] below. The volume fraction of inorganic particles in the dielectric layer and the relative dielectric constant were measured using the method described in WO 2019 / 065561 [6]. The results are shown in Table 1.

[0129] [1] Measurement of the average thickness di2 of the dielectric layer Five capacitors were randomly selected from the fabricated capacitors, and cross sections perpendicular to the film surface where the dielectric layer was formed on the substrate were cut out. Cross-sectional images were measured using an SEM (JSM-6010PLUS / LA, manufactured by JEOL Ltd.). The cross-sectional observation range for the five selected capacitors was 10 times the thickness of the dielectric layer. For each cross-sectional observation image obtained, the average film thickness was calculated for five of the dividing lines that divide the dielectric layer into six equal parts in the width direction. The average value of the average film thicknesses for the five observed capacitors was defined as di2.

[0130] [2] Measurement of the minimum thickness of the dielectric layer, di3 A cross section of the dielectric layer formed on the first electrode was cut out, and a cross section observation image was measured using an SEM (JSM-6010PLUS / LA, manufactured by JEOL Ltd.). For cross section observation, 20 capacitors were randomly selected from the manufactured capacitors, and their cross sections were observed. For the observation range, an image of the entire area of ​​the dielectric layer on the first electrode in question was first acquired at a magnification of 30,000x, and thin film locations were identified. An image of the identified thin film locations was then further imaged at a magnification of 50,000x, and the film thickness was measured. The value for the location with the thinnest film thickness among the 20 capacitors was taken as di3.

[0131] [3] Measurement of the first electrode thickness dc A cross section perpendicular to the first electrode film surface was cut out, and a cross-sectional observation image was measured using an SEM (JSM-6010PLUS / LA, manufactured by JEOL Ltd.). The cross-sectional observation was performed by observing five randomly selected first electrodes. The observation range was 40 times the thickness of the first electrode. For each cross-sectional observation image obtained, the average film thickness was calculated for five of the dividing lines that divide the first electrode film into six equal parts in the width direction. The average value of the average film thicknesses at the five observed locations was taken as dc.

[0132] [4] Evaluation of suitability for roll-to-roll processes When performing exposure through a photomask, we checked whether the photomask and the substrate would stick together, causing wrinkles and meandering during transportation. If such problems occurred, we evaluated the substrate as not being suitable for transportation.

[0133] [5] Leak rate evaluation The interelectrode current (Ie) was measured for 100 randomly selected capacitors from the fabricated capacitors when the applied voltage (Ve) was changed. The measurements were performed using a Semiconductor Characterization System 4200-SCS (Keithley Instruments, Inc.) in the atmosphere (temperature 20°C, humidity 35%). The electrode area was 0.25 mm 2 For the element, Ie at Ve=10V is 10 -8 Elements rated A or higher were considered short-circuited elements and were evaluated according to the following criteria. A (very good): The number of elements found to be short-circuited was 1 or less in 100. B (Good): The number of elements found to be short-circuited was between 2 and 5 out of 100. C (Acceptable): The number of elements found to be short-circuited is between 5 and 20 out of 100. D (Fail): 20 or more short-circuited elements out of 100.

[0134] Example 2 Except for using U40 (manufactured by Toray Industries, Inc.) instead of U324 as the substrate, the same evaluations as in [1] to [6] of Example 1 were carried out in the same manner as in Example 1. The evaluation results are shown in Table 1.

[0135] Example 3 Except for using U403 (manufactured by Toray Industries, Inc.) instead of U324 as the substrate, the same evaluations as in [1] to [6] of Example 1 were carried out in the same manner as in Example 1. The evaluation results are shown in Table 1.

[0136] Example 4 Except for using U48 (manufactured by Toray Industries, Inc.) instead of U324 as the substrate, the same evaluations as in [1] to [6] of Example 1 were carried out in the same manner as in Example 1. The evaluation results are shown in Table 1.

[0137] Example 5 The dielectric layer was evaluated in the same manner as in Example 1, [1] to [6], except that polymer solution B obtained by the method described in Example 2 of WO 2019 / 065561 was used instead of polymer solution A. The evaluation results are shown in Table 1.

[0138] Example 6 The dielectric layer was evaluated in the same manner as in Example 1, [1] to [6], except that polymer solution C obtained by the method described in Example 1 of WO 2019 / 065561 was used instead of polymer solution A. The evaluation results are shown in Table 1.

[0139] Example 7 The dielectric layer was evaluated in the same manner as in Example 1, [1] to [6], except that polymer solution D obtained by the method described in Example 3 of WO 2019 / 065561 was used instead of polymer solution A. The evaluation results are shown in Table 1.

[0140] Example 8 The dielectric layer was evaluated in the same manner as in Example 1, [1] to [6], except that polymer solution E obtained by the method described in Example 4 of WO 2019 / 065561 was used instead of polymer solution A. The evaluation results are shown in Table 1.

[0141] Example 9 The dielectric layer was evaluated in the same manner as in Example 1, [1] to [6], except that polymer solution F obtained by the method described in Example 5 of WO 2019 / 065561 was used instead of polymer solution A. The evaluation results are shown in Table 1.

[0142] (Comparative Example 1) Except for using AF2000 (manufactured by AIM Co., Ltd.) instead of U324 as the substrate, the same evaluations as in [1] to [6] of Example 1 were carried out in the same manner as in Example 1. The evaluation results are shown in Table 1.

[0143] (Comparative Example 2) An attempt was made to carry out the same evaluations as in [1] to [6] of Example 1 in the same manner as in Example 1, except that U41 (manufactured by Toray Industries, Inc.) was used instead of U324 as the substrate, but transportation problems occurred and an element could not be formed.

[0144] [Table 1] [Explanation of symbols]

[0145] 1 Base material 2 gate electrode 3 Dielectric Layer 4. Source electrode 5. Drain electrode 6 Semiconductor layer 7 Contact Hole 11 Convex part 12 Wiring 13 Dielectric layer 21 Base material 22 Lower electrode 23 Dielectric layer 24 Upper electrode 31 Convex part 41 Base material 42 gate electrode 43 Dielectric Layer 44 Source electrode 45 Drain electrode 46 Semiconductor layer 47 Contact Hole 51 Convex part 53 Dielectric layer 100 Antennas 200 TFT array 210 TFT 220 TFT 230 TFT 240 TFT 250 gate lines 260 gate lines 270 source lines 280 source lines

Claims

1. at least, A substrate; a first electrode formed on the substrate; a dielectric layer formed on the substrate and the first electrode; a second electrode formed on the dielectric layer so as to be in contact with the dielectric layer; An element comprising: An element, wherein the average film thickness (di2) of the dielectric layer formed on the substrate and the maximum peak height (Sp) of the substrate satisfy the following relationship: 50nm<Sp<di2

2. 2. The element according to claim 1, wherein the thickness (dc) of the first electrode and the average film thickness (di2) of the dielectric layer formed on the substrate satisfy the following relationship: 20nm<dc<di2

3. 3. The element according to claim 1, wherein the minimum film thickness (di3) of the dielectric layer formed on the first electrode is 50 nm or more.

4. 4. The element according to claim 1, wherein the average film thickness (di2) of the dielectric layer is 1 μm or less.

5. 5. The element according to claim 1, wherein the substrate in contact with the dielectric layer or the first electrode has a maximum peak height (Sp) of 200 nm or less.

6. The device according to any one of claims 1 to 5, wherein the dielectric layer comprises inorganic particles and a polymer.

7. 7. The element according to claim 6, wherein the polymer contains at least a polysiloxane having a structural unit represented by general formula (1). 【Chemical 1】]] (In general formula (1), R １ represents hydrogen, an alkyl group, a cycloalkyl group, a heterocyclic group, an aryl group, a heteroaryl group, or an alkenyl group. R2 represents hydrogen, an alkyl group, a cycloalkyl group, or a silyl group. m represents 0 or 1. A １ represents an organic group containing at least two of a carboxyl group, a sulfo group, a thiol group, a phenolic hydroxyl group, or a derivative thereof, provided that when the derivative has a cyclic condensation structure formed by two of the carboxyl group, the sulfo group, the thiol group, and the phenolic hydroxyl group, A １ represents an organic group having at least one cyclic condensed structure.

8. 8. The element according to claim 6, wherein the content of inorganic particles in the dielectric layer is 10 to 60 vol %.

9. The element according to any one of claims 1 to 8, wherein the element is selected from a capacitor, a thin film transistor, or a diode.

10. The device of claim 9 , wherein the thin film transistor comprises carbon nanotubes in a semiconductor layer.

11. 11. A method for manufacturing an element according to claim 1, comprising the step of forming the dielectric layer by a coating method.

12. The method for manufacturing an element according to claim 11 , wherein the step of applying the dielectric layer includes a step of transporting the substrate by a roll-to-roll method.

13. A wireless communication device comprising at least the element according to any one of claims 1 to 10 and an antenna.

14. A thin film transistor array comprising the element according to any one of claims 1 to 10.

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