Method and apparatus for wafer detection

Abstract

Embodiments described herein relate, for example, to methods and apparatus for detecting and / or monitoring anomalies in wafer transfer and operation. In one embodiment, a method for wafer dechucking verification is provided. The method includes initiating a wafer transfer operation for transferring a wafer between components of a semiconductor processing system. The semiconductor processing system includes a motor coupled to lift pins. The motor is configured to adjust a height of the lift pins above a pedestal. The lift pins are for raising and lowering the wafer. The method further includes measuring one or more first parameters during the wafer transfer operation, comparing the one or more first parameters to one or more first predetermined ranges, and modifying a force applied to the lift pins based on the one or more first parameters. An apparatus for wafer dechucking verification and a non-transitory computer readable medium having instructions stored thereon for wafer dechucking verification are also provided.

Description

[Technical Field]

[0001] FIELD OF THE DISCLOSURE

[0001] Embodiments of the present disclosure relate generally to substrate processing, and more particularly to methods and apparatus for detecting and / or monitoring anomalies, for example, in wafer transport and handling. [Background technology]

[0002]

[0002] Wafers can easily break / bend during handling and transport, especially when using electrostatic chucks. Electrostatic chucks utilize a platen with an integrated electrode. The integrated electrode is biased with a high voltage to establish an electrostatic holding force between the platen and the wafer. Residual charges on the wafer and pedestal slowly dissipate, causing wafer breakage and partial chucking. Additionally, if the lift pins are moved before the residual charges dissipate, wafer breakage occurs. As a result, wafer throughput is reduced. Conventional methods of wafer detection within semiconductor fabrication factories typically utilize sensors to monitor wafers during handling and transport. However, such sensors are expensive, and even when sensors are utilized, wafer breakage still presents a challenge.

[0003] What is needed are new and improved methods for detecting and / or monitoring anomalies during, for example, software transport and handling, that overcome one or more deficiencies in the art. Summary of the Invention

[0004] SUMMARY

[0004] Embodiments of the present disclosure relate to methods and apparatus for detecting and / or monitoring anomalies, for example, in wafer transport and handling.

[0005] In one embodiment, an apparatus for wafer dechucking verification is provided. The apparatus includes a motor coupled to lift pins, the motor configured to adjust the height of the lift pins above a pedestal. The lift pins are for raising and lowering the wafer. The apparatus further includes at least one processor configured to control the motor and initiate a wafer transfer operation to transfer the wafer between components of a semiconductor processing system using the motor and lift pins, measure parameters during the wafer transfer operation, and modify a force applied to the lift pins based on the measured parameters.

[0006] In another embodiment, a method for wafer dechucking verification is provided. The method includes initiating a wafer transfer operation to transfer a wafer between components of a semiconductor processing system. The semiconductor processing system includes a motor coupled to lift pins. The motor is configured to adjust the height of the lift pins above a pedestal. The lift pins are for raising and lowering the wafer. The method further includes measuring one or more first parameters during the wafer transfer operation, comparing the one or more first parameters to one or more first predetermined parameter ranges, and modifying a force applied to the lift pins based on the one or more first parameters.

[0007] In another embodiment, a non-transitory computer-readable medium having stored thereon instructions, which, when executed by a processor, perform a plurality of operations for wafer dechucking verification. The plurality of operations includes initiating a wafer transfer operation for transferring a wafer between components of a semiconductor processing system. The semiconductor processing system includes a motor coupled to lift pins. The motor is configured to adjust the height of the lift pins above a pedestal. The lift pins are for raising and lowering the wafer. The plurality of operations further includes one or more of measuring a first current powering the motor during the wafer transfer operation and determining a difference between the first current and a first predetermined current range, or measuring a first torque for raising and lowering the wafer during the wafer transfer operation and determining a difference between the first torque and a first predetermined torque range. The plurality of operations further includes modifying a force applied to the lift pins based on the first current, the first torque, or both.

[0008]

[0008] So that the features of the present disclosure described above may be understood in detail, a more particular description of the present disclosure briefly summarized above may be had by reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the attached drawings depict only exemplary embodiments and therefore should not be considered to limit the scope of the present disclosure, as other equally effective embodiments may also be permissible. [Brief explanation of the drawings]

[0009] [Figure 1A] 1A-1B illustrate components of an exemplary apparatus for wafer detection in accordance with at least one embodiment of the present disclosure. [Figure 1B] 1A-1B illustrate components of an exemplary apparatus for wafer detection in accordance with at least one embodiment of the present disclosure. [Figure 2A]

[0010] 1 is an exemplary graph for normal or standard wafer lift data in accordance with at least one embodiment of the present disclosure. [Figure 2B]

[0011] 1 is an exemplary graph of sample wafer lift data in accordance with at least one embodiment of the present disclosure. [Figure 3]

[0012] 1 illustrates exemplary operations of a method of wafer detection according to an exemplary embodiment of the present disclosure. [Figure 4A]

[0013] 1 is an exemplary chamber that may be utilized in several embodiments described herein. [Figure 4B]

[0014] 1 is an exemplary chamber that may be utilized in several embodiments described herein. DETAILED DESCRIPTION OF THE INVENTION

[0010]

[0015] For ease of understanding, wherever possible, like reference numerals have been used to designate like elements common to the figures. It is believed that elements and features of one embodiment may be beneficially incorporated in multiple other embodiments without further recitation.

[0011]

[0016] Embodiments described herein relate to methods and apparatus for detecting and / or monitoring anomalies, for example, in wafer transfer and handling. Briefly, the method involves monitoring / measuring motor current to determine torque, which determines the lifting force used to lift the wafer. The method can be used to detect incomplete wafer handoff (or wafer transfer) due to, among other anomalies, for example, residual chucking or excessive load applied to the wafer by the lift pin drive. For example, if anomalies in wafer transfer, lift pin position, and / or wafer position are detected, the wafer transfer process and / or other processes can be stopped before the wafer is damaged, enabling closed-loop control.

[0012]

[0017] The apparatus and methods described herein are useful, for example, for verifying whether a wafer has been fully dechucked from a substrate support. In some embodiments, the apparatus and methods described herein may be used, for example, for wafer dechucking verification and / or wafer dechucking status detection.

[0013] Exemplary Apparatus

[0018] FIG. 1A is a side view of an apparatus utilized for wafer detection and for detecting the anomalies described above. The apparatus includes a lead screw shaft 105 coupled to a motor 115 via a shaft coupling 111. The lead screw shaft 105 may be a lead screw shaft and nut 104. Additionally or alternatively, the lead screw shaft 105 and nut 104 may be a ball screw shaft and ball nut. A bearing 114 supports the lead screw shaft 105. A lift shaft 109 extending into the chamber is coupled to the nut 104 by a carrier block 113. The lift shaft 109 extends through a chamber mount 102 and is attached to a hoop mount 101 disposed within the chamber. A linear motion rail 103 serves as a guide surface for the nut 104. As shown in FIG. 1B, a hoop ring 152 is coupled to the hoop mount 101, and lift pins 151 for raising and lowering substrates are coupled to the hoop ring 152. A drive assembly 153, including a lead screw shaft 105 and nut 104, bearings 114, and other components, is coupled to the hoop ring 152 and lift pins 151. The motor 115 is connected to a power source (not shown) via a power cable 107. The motor 115 is also connected by a communication cable 108 to other components of the system, such as a programmable logic controller (PLC) 125, described below.

[0014]

[0019] In operation, the current driving the motor 115 can also be monitored and measured. This current is related to the torque used to raise or lower the load by equation (1). I a =T / K T (1) Here, I a is the armature current of the motor 115 (unit: ampere (amp)), K T is the motor torque constant (units: N·m / amp). The armature is the component of the electric machine that carries alternating current. As the load on the motor 115 increases, the motor 115 draws more current from the motor driver 120. The motor driver 120 is coupled to the motor 115 to enable control of the motor 115. The motor driver 120 is also coupled to the PLC 125. The PLC 125 controls the various components of the motor driver 120.

[0015]

[0020] A motor driver 120 (e.g., a drive motor control unit) detects increased / decreased torque and / or increased / decreased current, for example, when partial chucking is present and / or when a wafer is, for example, lifted or handed off. The motor driver 120 includes a CPU that controls / monitors the motor 115. Changes in torque (and / or current) are communicated from the motor driver 120 to the PLC 125. Detection and response times, for example, using EtherCAT or Ethernet drivers, can be on the order of microseconds. Such response times are an improvement over conventional sensors.

[0016]

[0021] As described above, PLC 125 controls motor driver 120, which in turn controls the power to drive motor(s) 115, for example, during wafer lifting, movement, and / or transfer. PLC 125 is the "master" driver (e.g., "controller device"), while the other drivers, such as motor driver 120, are "slave" driver(s) (e.g., "controlled device(s)"). PLC 125 includes controller 126, which includes central processing unit (CPU) 127, memory 128, and support circuits 129 for CPU 127. Controller 126 can be any suitable type of general-purpose computer processor, which may be used in industrial settings to control various chambers and sub-processors. Memory 128 or other computer-readable media for CPU 127 may be one or more of any readily available form of memory, such as random access memory (RAM), read-only memory (ROM), a floppy disk, a hard disk, or any other form of local or remote digital storage. Support circuits 129 may be coupled to CPU 127 in an effort to support the processor in a conventional manner. These circuits may include cache, power supplies, clock circuits, input / output circuits and subsystems, and the like. In some embodiments, the techniques disclosed herein for deposition processes and cleaning regimes may be stored in memory as software routines. The software routines may also be stored and / or executed by a second CPU (not shown) located remotely from the hardware controlled by the CPU.

[0017]

[0022] In some embodiments, a software algorithm having a predefined range of current (and / or torque) values ​​at a defined position with the wafer placed on the pedestal may trigger shutoff of the motor via a (PLC)-to-motor driver circuit. According to at least one embodiment, one or more operations of the apparatus and methods described herein may be contained as instructions in a computer-readable medium for execution by a control unit (e.g., controller 126) or any other processing system.

[0018]

[0023] As mentioned above, the motor driver 120 controlled by the PLC 125 is utilized to sense the current. This current, the sample current (I S ) can then be converted to torque using equation (1): Torque (sample torque, T S ) is then converted into torque (usually torque, T N ) is compared with the standard operating data of the normal torque T N is the amount of torque during normal operation for a suitable sample size of normal wafer exchange. T N may take the form of a range of values. Additionally or alternatively, the sample current (I S ) is the standard current (e.g., normal current, I N ) can be compared with I N may take the form of a range of values.

[0019]

[0024] In some embodiments, the force on the lift pins can be modified according to sensor signals, for example, from a motor drive unit, a pressure sensor embedded between the wafer and the electrostatic chuck, and / or a chucking current drawn by the electrostatic chuck. Each of the motor drive unit, the sensor(s), and the chucking current can include a processor, which can relay information to the PLC 125, for example, to control the motor.

[0020]

[0025] FIG. 2A is an exemplary graph of typical or standard wafer lift data, where torque (T N ) is plotted as a function of wafer lift pin position. Figure 2B is an exemplary graph of sample wafer lift data. In this case, torque (T S ) is plotted as a function of lift pin position.

[0021]

[0026] By comparing the slope of the sample wafer lift data with the slope of the standard wafer lift data, the status of the wafer transfer can be identified. Figures 2A and 2B can be plotted as current versus position by using equation (1). For simplicity, only a plot of torque versus lift pin position is shown.

[0022]

[0027] The slope of line 201 (FIG. 2A) indicates a gradual increase in torque, and a "normal" torque (or current) slope is observed across a selected scan zone. In this case, a linear, gradual increase in torque (or current) indicates, for example, normal operation. Sample wafer lift data (FIG. 2B) in line 203 indicates, for example, an abnormal wafer lift, an abnormal wafer transfer, wafer breakage, and / or an abrupt release of the wafer. Specifically, a spike in torque (or current) illustrated in line 204 indicates, for example, increased force. Meanwhile, a drop in the torque (or current) slope illustrated in line 206 indicates, for example, wafer breakage, an abrupt release of the wafer from the pedestal, and / or an abrupt wafer transfer. Additionally or alternatively, the sample current can be compared to the current of standard operating data. Thus, a plot can be current versus lift pin position.

[0023]

[0028] Referring back to equation (1), the output torque is directly proportional to the armature current. Thus, the armature current I is proportional to the position (x) or time (t) as given by equations (2) and (3), respectively. a The ratio of is also directly proportional to the ratio of torque (T) to position (x) or time (t). dI a / dx=dT / dx (2) dI a / dt=dT / dt (3)

[0024]

[0029] Here, detection of further load due to abnormal wafer lift is found when the slope of the armature current spike rate is above a threshold slope (e.g., normal operation). Wafer breakage and / or abnormal wafer release from the pedestal is found when the slope begins to reach a negative slope.

[0025] Example of a Transfer and Detection Sequence

[0030] Embodiments described herein are useful for monitoring and detecting wafer handoffs. Wafer handoffs can occur between various hardware components of a semiconductor processing system. For example, wafer handoffs can occur between lift pins and a robot (e.g., a robot blade), between a pedestal and lift pins, and between lift pins and an indexer (e.g., an indexer blade). An exemplary, non-limiting, indexer-based wafer transfer sequence is as follows:

[0026]

[0031] (1) First, a wafer held by a robot blade enters the chamber through a slot in the chamber. (2) The lift pins 151 are raised via the motor and drive assembly 153, lift shaft 174, and hoop ring 152 to lift the wafer from the robot blade. (3) The robot blade retracts. (4) The lift pins retract to place the wafer on the pedestal. (5) The lift pins retract back under the pedestal. (6) The pedestal rises for substrate processing. (7) Once substrate processing is complete, the pedestal retracts to a wafer-release position. (8) The lift pins then rise to a wafer-release position to lift the wafer from the pedestal. (9) The lift pins then rise to hand off the wafer to the indexer blade. (10) The indexer blade receives the wafer, and the lift pins retract.

[0027]

[0032] (11) The indexer blade rotates, and (12) the lift pins rise to lift the new wafer off the indexer blade. (13) The indexer blade then rotates and moves out of the way of the lift pins. (14) The lift pins retract to place the wafer on the pedestal. (15) Operations (6) through (14) are then repeated until the process is complete. (16) After the process is complete, operation (14) is bypassed in a loop, and the lift pins from operations (12) and (13) rise to hand off the wafer to the robot blade.

[0028]

[0033] In this example, the indexer and robot blade move horizontally, although other directions are contemplated. Additionally, a simplified sequence may include operations (1) through (8) and (16). For example, in operations (2), (4), (8), (10), (12), (14), (15), and (16), current and / or torque may be monitored and measured to determine if the wafer handoff is abnormal. One or more operations in the wafer transfer sequence may be performed by one or more processors, such as a PLC.

[0029]

[0034] 3 illustrates an example operation of a method 300 of wafer detection in accordance with at least one embodiment of the present disclosure. Method 300 can be utilized to detect incomplete wafer handoff (or wafer transfer) due to, for example, residual chucking or excessive load applied to the wafer by the lift pin drive, among other anomalies. For example, due to detected anomalies in wafer transfer, lift pin position, and / or wafer position, the wafer transfer process and / or other processes can be stopped before the wafer is damaged, enabling closed-loop control.

[0030]

[0035] Method 300 begins in operation 310 by a PLC (e.g., PLC 125) initiating a wafer handoff / transfer operation (and / or lift pin operation). Wafer transfer operations can include effecting wafer transfer between components of a semiconductor processing system (e.g., lift pins, pedestal, indexer (or its blade), robot (or its blade), or combinations thereof). The components can be controlled by the PLC. A wafer transfer sequence can include wafer lift pin movement (which can also be initiated by the PLC), where the wafer lift pins are raised (or lowered) by, for example, movement of a shaft, hoop ring, and motor drive assembly to a position that lifts the wafer from a robot blade, a position that lifts the wafer from a pedestal, or a position that lifts the wafer from a robot or indexer blade. For example, the lift pin(s) can be moved to a wafer transfer plane. The wafer transfer plane is a plane at a fixed height where wafer handoff occurs between the robot blade and the lift pins. As another example, the lift pins may retract (or lift) to place the wafer on the pedestal. As another example, the lift pins may lift (or retract) to a position where the indexer can grab the wafer. Other examples are described above in the exemplary wafer transfer sequence. In these and other examples, the load may be detected to determine if additional load (e.g., from incomplete chucking from the pedestal) occurs.

[0031]

[0036] In operation 320, a parameter (e.g., current driving a motor (e.g., motor 115), torque applied to a motor drive assembly, or a combination thereof) is measured and / or monitored. In some embodiments, one or more processes may be configured to measure the parameter, convert the parameter to a signal, transmit the signal, and / or receive a signal from a sensor measuring the parameter. In some examples, the sensor may include a processor for transmitting the signal to a PLC. Operation 320 may include various sub-operations. These sub-operations may include a PLC triggering a drive current measurement (read) operation based on a scan zone of lift pin positions. A scan zone is, for example, a window of lift pin positions where current (and / or torque) is monitored. Measuring and / or monitoring the current and / or torque in operation 320 may further include plotting a graph of current versus lift pin position, torque versus lift pin position, or both.

[0032]

[0037] Another sub-operation of operation 320 is to calculate the derivative of current versus lift pin position (dI a / dx), where dI a / dx can be plotted for each window of lift pin positions. For example, dI per 10 μm of wafer movement (up and down) amay be identified and then plotted. Additionally or alternatively, another sub-operation of operation 320 may include identifying the derivative of torque versus lift pin position (dT / dx) for each lift pin position window, where dT / dx may be plotted for each of the lift pin position windows. For example, dT per 10 μm of wafer movement (up and down) may be identified and then plotted. The plot(s) may be represented by the example shown in FIG. 2B. For any wafer handoff involving lift pins, embodiments described herein enable monitoring and measurement of current / torque versus lift pin position to determine if the wafer handoff is abnormal. Examples of wafer handoffs include, but are not limited to, handoffs between a pedestal and lift pins, handoffs between lift pins and an indexer, and handoffs between lift pins and a robot blade.

[0033]

[0038] In operation 330, the sample data (e.g., data from operation 320) is compared to a predefined data range (e.g., a current range and / or a torque range) based on normal operation data. The normal operation data may be reference data collected for a normal (or successful) wafer transfer, such as that shown in FIG. 2A. The normal operation data may be a data set stored in the PLC. In some embodiments, the reference data is set to, for example, the current and / or torque depending on the nature of the plot, for determining whether the wafer lifting operation is normal. Thus, the comparison performed in operation 330 may indicate, for example, wafer breakage and / or slippage.

[0034]

[0039] If the sample data is determined to be within a predefined range (indicating normal operation), the wafer transfer sequence / lift pin operation may continue. If the sample data is determined to be outside the predefined range (e.g., indicating wafer breakage or abrupt wafer release), the PLC triggers a motor (e.g., of motor 115 and / or other components) shutoff in operation 340. Here, a shutoff command (e.g., software for simultaneously controlling all slave hardware together) may be sent from PLC 125 to a motor driver (e.g., motor driver 120) to shut off motor 115. Because the motor controls the lift pin position, shutting off the motor stops the lift pin movement. In operation 350, the lift pin(s) may then be retracted by PLC 125 instructing motor driver 120 to cause motor 115 to retract the lift pin(s). Retracting the lift pin(s) acts, for example, to avoid wafer breakage. For example, if the lift pins were not stopped or retracted, the motor would apply additional load to the wafer. Further force can cause the wafer to break in a partially chucked state.

[0035]

[0040] In operation 360, wafer transfer and / or lift pin operations may resume. Here, one or more of operations 310-350, such as operations 310-330, may be repeated. For example, if the data indicates that wafer breakage or sudden wafer release (as determined in operation 330) has been observed again, the processing chamber may be opened for inspection. For example, the chamber may be opened to inspect whether the wafer actually broke or slid off. If the data indicates that there are no anomalies (or no anomalies outside of specified deviations), the wafer transfer sequence / lift pin operations continue.

[0036] Exemplary Chamber

[0041] 4A and 4B illustrate an exemplary, non-limiting chamber 400 that may be used in multiple embodiments described herein. As shown in FIGS. 4A and 4B, the pedestal 405 and other chamber components are in different positions for wafer transfer. Other chambers (having different or additional components) are also contemplated. For example, while a bellows is utilized in the exemplary chamber described herein, it is also contemplated that the chamber may lack a bellows.

[0037]

[0042] A pedestal 405 is disposed above a bellows 401 (e.g., a vacuum isolation bellows). The pedestal 405 has multiple movements 409. Throughout the multiple movements 409, one or more lift pins 403 can move up and down for wafer movement / transfer. Bolts / screws 411 connect a flange 407 to the pedestal 405. One or more surfaces of the flange 407 contact one or more surfaces of the bellows 401. The bellows 401 expands and contracts, for example, via movement of the pedestal 405.

[0038]

[0043] A motor driver 120 controlled by a PLC 125 is utilized to sense the current. The PLC 125 includes a controller 126. The controller 126 includes a central processing unit (CPU) 127, a memory 128, and support circuits 129 for the CPU 127. The motor driver 120, the PLC 125, the controller 126, the CPU 127, the memory 128, and the support circuits 129 are described above.

[0039]

[0044] During processing, as shown in FIG. 4A, the bellows 401 is in an expanded state and the lift pin(s) 403 are retracted below the top surface of the pedestal 405. FIG. 4B shows the position for wafer transfer between the lift pin(s) 403 and a robot blade (not shown). During wafer / shutter transfer, a portion of the lift pin(s) 403 is positioned above the pedestal 405, as shown in FIG. 4B. The bellows 401 is compressed when a motor (not shown), controlled by motor driver 120, drives the lift pin(s) 403, via all components that lift the lift pin(s), to lift the wafer (not shown) upward. The bellows 401, which has a spring constant (k), is compressed linearly based on the position of the lift pin(s) 403. The movement increases the load on the motor (e.g., motor 115) linearly as a function of k, x, and y. where k is the spring constant and y is the compression of the bellows 401.

[0040]

[0045] In the case of an electrostatic chuck, residual charges remaining on the wafer, pedestal (e.g., pedestal 405), and / or other chamber components (e.g., lift pin(s) 403) can result in the presence of residual chucking forces. As discussed above, these residual chucking forces can lead to wafer damage / breakage. Typically, the residual charges dissipate after approximately 2-3 seconds, but the dissipation of the charges varies based on conditions such as temperature and pressure. In typical operation, the lift pin(s) (e.g., lift pin(s) 403) are moved once the charges dissipate. Detected spikes in motor (e.g., motor 115) torque (or current) can be correlated with residual chucking forces that could cause wafer breakage, allowing for detection by motor driver 120 and / or PLC 125. Accordingly, embodiments described herein enable early detection of wafer transfer problems and / or wafer anomalies.

[0041]

[0046] Any of the operations described above, such as one or more operations of method 300, may be contained as instructions in a computer-readable medium for execution by a control unit (e.g., controller 126) or any other processing system. The computer-readable medium may include any suitable memory for storing instructions, such as read-only memory (ROM), random-access memory (RAM), flash memory, electrically erasable programmable ROM (EEPROM), compact disc ROM (CD-ROM), floppy disk, etc.

[0042]

[0047] Embodiments described herein provide methods and apparatus for detecting and / or monitoring anomalies in, for example, wafer transport and handling. The embodiments described herein enable early detection of wafer breakage during, for example, wafer transport and prevention (or mitigation) of wafer breakage or other anomalies. As a result, higher wafer throughput and fab downtime may be achieved. Furthermore, lower production costs and a lower incidence of wafer breakage may be achieved with the apparatus and methods that do not use traditional sensors.

[0043]

[0048] In the foregoing, reference has been made to several embodiments of the present disclosure. However, it should be understood that the present disclosure is not limited to the specific described embodiments. Instead, any combination of the following features and elements, whether associated with different embodiments or not, is contemplated for implementing and practicing the present disclosure. Moreover, several embodiments of the present disclosure may realize other possible solutions and / or advantages over the prior art, and whether or not a particular advantage is achieved by a given embodiment does not limit the present disclosure. Accordingly, the aforementioned aspects, features, embodiments, and advantages are merely exemplary and are not considered elements or limitations of the appended claims unless expressly recited therein. Similarly, references to "the present disclosure" should not be construed as a generalization of any inventive subject matter disclosed herein, nor should they be considered elements or limitations of the appended claims unless expressly recited therein.

[0044]

[0049] As used herein, the indefinite article "a" or "an" shall mean "at least one" unless specified to the contrary or unless the context clearly indicates otherwise.

[0045]

[0050] While the forgoing description is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, the scope of which is defined by the claims that follow.

Claims

1. 1. An apparatus for wafer dechucking verification, comprising: a motor coupled to the lift pins and configured to adjust the height of the lift pins above a pedestal, the lift pins being for raising and lowering a wafer; and and at least one processor, wherein the at least one processor: controlling the motor; initiating a wafer transfer operation using the motor and the lift pins to transfer the wafer between components of a semiconductor processing system; measuring one or more first parameters during said wafer transfer operation; determining a derivative of the one or more first parameters versus wafer position; comparing a derivative of the one or more first parameters versus wafer position to a threshold value; and and varying a force applied to the lift pins based on the comparison.

2. The apparatus of claim 1 , wherein the component comprises the pedestal, an indexer, a robot, or a combination thereof.

3. The processor: measuring a first current powering the motor and determining a difference between the first current and a first predetermined current range; measuring a first torque for raising and lowering the wafer and determining a difference between the first torque and a first predetermined torque range; or The apparatus of claim 1 , further configured to perform:

4. the first current and the first torque are measured at a first wafer position above the pedestal; 4. The apparatus of claim 3, wherein the first predetermined current range and the first predetermined torque range are measured at the first wafer position above the pedestal.

5. The at least one processor when the first current is outside the first predetermined current range; when the first torque is outside the first predetermined torque range; or When both of these are true, The apparatus of claim 3 further configured to stop the motor.

6. After the motor is stopped, the at least one processor: restarting the motor; and The apparatus of claim 5 , further configured to: lower the lift pins.

7. When the first current is within the first predetermined current range, when the first torque is within the first predetermined torque range, or both, the at least one processor: measuring a second current powering the motor and determining a difference between the second current and a second predetermined current range; measuring a second torque for raising and lowering the wafer and determining a difference between the second torque and a second predetermined torque range; or The apparatus of claim 3 further configured to perform both of these.

8. the second current and the second torque are measured at a second wafer position above the pedestal; 8. The apparatus of claim 7, wherein the second predetermined current range and the second predetermined torque range are measured at the second wafer position above the pedestal.

9. 1. A method for wafer dechucking verification, comprising: initiating a wafer transfer operation for transferring a wafer between components of a semiconductor processing system, the semiconductor processing system including a motor coupled to lift pins, the motor configured to adjust heights of the lift pins above a pedestal, the lift pins for raising and lowering the wafer; measuring one or more first parameters during said wafer transfer operation; determining a derivative of the one or more first parameters versus wafer position; comparing a derivative of the one or more first parameters versus wafer position to a threshold; and and varying a force applied to the lift pins based on the comparison.

10. The method of claim 9 , wherein the one or more first parameters are measured at a first wafer position.

11. 10. The method of claim 9, further comprising comparing the one or more first parameters to one or more first predetermined parameter ranges measured at a first wafer location.

12. the one or more first parameters include a first current for powering the motor, a first torque for lifting or lowering the wafer, or both; when the one or more first parameters include the first current powering the motor, the one or more first predetermined parameter ranges include a first predetermined current range; or when the one or more first parameters include the first torque for lifting or lowering the wafer, the one or more first predetermined parameter ranges include a first predetermined torque range; The method of claim 11 , wherein the method is one or more of:

13. when the first current is outside the first predetermined current range; when the first torque is outside the first predetermined torque range; or When both of these are true, The method of claim 12 further comprising stopping the motor.

14. After the motor is stopped, the method comprises: restarting the motor; and The method of claim 13 further comprising lowering the lift pins.

15. When the one or more first parameters are within the one or more predetermined parameter ranges, the method comprises: measuring one or more second parameters; and The method of claim 11 , further comprising determining a difference between the one or more second parameters and one or more second predetermined parameter ranges.

16. 1. A non-transitory computer-readable medium having stored thereon instructions that, when executed by a processor, perform a plurality of operations for wafer dechucking verification, the plurality of operations comprising: initiating a wafer transfer operation for transferring a wafer between components of a semiconductor processing system, the semiconductor processing system including a motor coupled to lift pins, the motor configured to adjust heights of the lift pins above a pedestal, the lift pins for raising and lowering the wafer; one or more of measuring a first current powering the motor during the wafer transfer operation and determining a difference between the first current and a first predetermined current range, and measuring a first torque for raising and lowering the wafer during the wafer transfer operation and determining a difference between the first torque and a first predetermined torque range; determining one or more of a derivative of the first current versus wafer position and a derivative of the first torque versus wafer position; comparing one or more of the derivatives to one or more thresholds; and and modifying a force applied to the lift pins based on the comparison.

17. the first current and the first torque are measured at a first wafer position above the pedestal; 17. The non-transitory computer-readable medium of claim 16, wherein the first predetermined current range and the first predetermined torque range are measured at the first wafer position above the pedestal.

18. The plurality of operations include: when the first current is outside the first predetermined current range; when the first torque is outside the first predetermined torque range; or When both of these are true, The non-transitory computer-readable medium of claim 16 , further comprising stopping the motor.

19. After the motor is stopped, the operations include: restarting the motor; and The non-transitory computer-readable medium of claim 18 , further comprising lowering the lift pins.

20. The plurality of operations include: when the first current is within the first predetermined current range, when the first torque is within the first predetermined torque range, or both. measuring a second current powering the motor and determining a difference between the second current and a second predetermined current range; measuring a second torque for raising and lowering the wafer and determining a difference between the second torque and a second predetermined torque range; or 17. The non-transitory computer-readable medium of claim 16 further comprising both of these.

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