Power modules, power circuits, and chips

Abstract

This application provides a power module, a power supply circuit, and a chip. The power module includes a first metal layer-coated substrate and a second metal layer-coated substrate arranged opposite to each other, and a chip and an interconnect pillar located between the first metal layer-coated substrate and the second metal layer-coated substrate. The chip and the first metal layer-coated substrate are electrically connected by pressure sintering using a sintering material, and the bonding reliability is improved. The chip is electrically connected to the second metal layer-coated substrate using the interconnect pillar. Since the substrates are arranged on both sides of the chip, the heat generated inside the power module is discharged from the direction of the two substrates, thereby improving the heat dissipation performance of the power module. In addition, the sintering material made of silver paste, copper paste, or silver film has the advantages of low sintering temperature, high melting point, and high thermal conductivity. Therefore, the heat dissipation performance of the power module is further improved, and the power density of the power module can be increased.

Description

[Technical Field]

[0001] child The application relates to the field of semiconductor packaging technology, particularly to power modules, power supply circuits, and chips. [Background technology]

[0002] With the development of power electronics technology, power modules have been attracting increasing attention. Furthermore, there is an urgent need for lighter and more compact power modules to save energy and reduce costs. However, this demand poses a major challenge to the development of power modules because lighter and more compact modules increase the current density of the modules, which generates relatively high heat inside the modules and thus causes an increase in junction temperature. If the generated heat cannot be dissipated in a timely manner, the relatively high junction temperature will affect the overall thermomechanical performance and reliability of the power module. Summary of the Invention

[0003] This application provides a power module, a power supply circuit, and a chip for providing a power module with relatively high heat dissipation performance, power density, and reliability.

[0004] According to a first aspect, this application provides a power module, including a first metal layer-coated substrate and a second metal layer-coated substrate arranged opposite each other, and a chip and interconnect pillars positioned between the first metal layer-coated substrate and the second metal layer-coated substrate. A sintering material is further disposed between the chip and the first metal layer-coated substrate, and the chip and the first metal layer-coated substrate are electrically connected through pressure sintering using the sintering material. The sintering material may include at least one of silver paste, copper paste, and silver film. The interconnect pillars are positioned between the chip and the second metal layer-coated substrate, and the chip is electrically connected to the second metal layer-coated substrate using the interconnect pillars. Since the substrates are disposed on both sides of the chip, heat generated inside the power module is dissipated toward the first metal layer-coated substrate and the second metal layer-coated substrate, thereby improving the heat dissipation performance of the power module. Furthermore, the sintering material has low stress, and the chip and the first metal layer-coated substrate are electrically connected through pressure sintering, improving joint reliability. Furthermore, the sintered material in this application has the advantages of low sintering temperature, high melting point, and high thermal conductivity, which not only can further improve the heat dissipation performance of the power module, but also can increase the operating environment temperature and service life of the power module, thereby increasing the power density of the power module.

[0005] In certain implementations, the first metal layer coated substrate and the second metal layer coated substrate can be, but are not limited to, a Direct Bond Copper (DBC) substrate, an Active Metal Brazed Copper (AMB, e.g., Al2O3-AMB, Si3N4-AMB, or AlN-AMB) substrate, an Insulated Metal Substrate (IMS), or the like.

[0006] For example, to further increase power density, the first metal layer-coated substrate and the second metal layer-coated substrate may be made of AlN-DBC, Si3N4-AMB, or AlN-AMB, which have high thermal conductivity, but this is not intended to be limiting.

[0007] For example, the sintered material can be made of silver paste, copper paste, or silver film.

[0008] In a specific implementation, the silver paste may include at least one of micrometer silver particle paste and nanometer silver particle paste. Micrometer silver particle paste is a silver paste made of micrometer silver particles and an organic solvent, and is low-cost and safe. Micrometer silver particle paste is generally used for sintering under pressure, and the sintered material has high density, resulting in a strong bond between the interfaces of the bodies being joined and high bonding reliability. Nanometer silver particle paste is a silver paste made of nanometer silver particles and an organic solvent, and is costly and poses safety risks due to the handling of nanometer particles.

[0009] Optionally, to improve the reliability of the sintered bond and reduce the cost, the sintered material in this application may be a micrometer silver particle based material. To It is possible that

[0010] To further improve the reliability of the sintered bond, the elastic modulus and coefficient of thermal expansion (CTE) of the sintered material can be adjusted by adding a substance to the sintered material. For example, the sintered material includes a matrix material and a filler filled in the matrix material. The matrix material includes at least one of silver paste, copper paste, and silver film. The filler is made of a material that has good bonding performance with the matrix material, and the thermal expansion coefficient of the filler is smaller than that of the matrix material, thereby improving the reliability of the sintered bond.

[0011] For example, the matrix material is a micrometer silver particle paste. A filler is added to the micrometer silver particle paste to reduce the thermal expansion coefficient of the micrometer silver particle paste and reduce the bonding stress, thereby improving the reliability of the silver sintered bond. For example, the filler may include at least one of nickel (Ni), Ni alloy, copper (Cu), nickel-plated copper, titanium (Ti), Ti alloy, iron (Fe), Fe alloy, Kovar alloy (Kovar, iron-nickel-cobalt alloy 4J29), SiC powder, and the like. This is not limited here.

[0012] In this application, the metal layers covering the surfaces of the first and second metal layer-coated substrates are generally copper. When the sintering material is a silver paste or silver film, the first metal layer-coated substrate can be plated with silver at the sintering position to improve the bonding performance between the sintering material and the first metal layer-coated substrate. That is, the first metal layer-coated substrate is covered with a silver-plated layer in the zone corresponding to the sintering material. For example, the thickness of the silver-plated layer can be controlled to be between 0.1 μm and 30 μm. Certainly, if the sintering material has relatively good bonding performance with the first metal layer-coated substrate, silver plating may not be required. For example, if the sintering material is a copper paste, silver plating is not required at the sintering position of the first metal layer-coated substrate.

[0013] For example, pressure sintering can include the following steps: Step (1): If the sintering material is copper paste or silver paste, the copper paste or silver paste can be printed on the corresponding sintering zone of the first metal layer-coated substrate using stencil printing or screen printing. The copper paste or silver paste printed on the first metal layer-coated substrate can then be pre-dried in a N2 atmosphere at 100°C to 180°C for 5 to 40 minutes. A chip is then fixed to the dried copper paste or silver paste using vacuum suction, and a pressure of 0.1 MPa to 10 MPa is applied to the chip mounted on the first metal layer-coated substrate for at least 10 ms in an environment at 100°C to 180°C. If the sintering material is a silver film, the chip can be adsorbed using a metal suction nozzle, with the temperature of the metal suction nozzle being 80°C to 200°C. The chip is then pressed onto the large silver film, and a pressure of 0.1 MPa to 5 MPa is applied to the chip for 1 ms to 10,000 ms. Thus, the silver film underneath the chip is compressed and semi-sintered, adhering to the chip. The chip with the attached silver film is then fixed to the first metal layer-coated substrate via vacuum suction. A pressure of 0.1 MPa to 10 MPa is applied to the chip mounted on the first metal layer-coated substrate for at least 10 ms in an environment with a temperature of 100°C to 180°C. Step (2): Pressure sintering is performed on the chip mounted on the first metal layer-coated substrate using a pressure head. For example, the area of ​​the pressure head is 50 mm x 50 mm. The parallelism of the pressure head can be set to ≦5 μm to reduce warpage of the product obtained through sintering. For example, the sintering conditions for pressure sintering can be as follows: the sintering temperature is controlled to be between 200°C and 300°C, the applied pressure is controlled to be between 5 MPa and 30 MPa, and the sintering time is controlled to be between 1 minute and 10 minutes. In order to prevent damage to the chip caused by the pressure head during the sintering process, a removable stress relief film may further be placed between the chip and the pressure head when pressure sintering is performed on the chip mounted on the first metal layer coated substrate.Therefore, when pressure sintering is performed, the stress relaxation film can prevent direct contact between the pressure head and the chip, reducing damage to the chip caused by the pressure head due to stress concentration. After pressure sintering is completed, the stress relaxation film can be removed. For example, the stress relaxation film can be an organic film such as a Teflon film. This is not a limitation.

[0014] In addition, in order to control the degree of warpage of the product obtained through sintering, the sintered first metal layer-coated substrate and chip can be cooled under pressure. For example, the cooling conditions can be as follows: the applied pressure is controlled to be between 5 MPa and 20 MPa, and the cooling time is controlled to be between 1 minute and 10 minutes.

[0015] Optionally, after the pressure sintering of the chip mounted on the first metal layer-coated substrate is performed, the first metal layer-coated substrate on which the chip is mounted can be further cleaned to remove residual organic matter, for example, by using a plasma treatment technique or an organic solvent cleaning technique to remove residual organic matter on the first metal layer-coated substrate, thereby improving the interface bonding performance of the subsequent molding compound, preventing the molding compound from peeling off, and further improving the reliability of the power module.

[0016] Optionally, in order to relieve stress generated on the chip when the chip is welded or sintered, thereby improving the reliability of the power module, the side of the chip facing the first metal layer coated substrate and the side of the chip remote from the first metal layer coated substrate each have a surface electrode, the surface electrode including a welded or sintered metal layer, and the surface electrode on the side of the chip facing the first metal layer coated substrate further includes a stress buffering metal layer located on the side of the welded or sintered metal layer remote from the first metal layer coated substrate, and / or the surface electrode on the side of the chip remote from the first metal layer coated substrate further includes a stress buffering metal layer located on the side of the welded or sintered metal layer facing the first metal layer coated substrate.

[0017] For example, the material of the stress buffering metal layer may be a soft metal whose hardness is lower than HV60, such as aluminum, aluminum alloy, copper, magnesium alloy, zinc, zinc alloy, silver, silver alloy, gold, or gold alloy. By using the softness of the soft metal, stress in the joint is relieved.

[0018] In certain implementations, if the material of the stress buffering metal layer is a non-weldable metal, such as aluminum, an aluminum alloy, or a magnesium alloy, the stress buffering metal layer can be disposed below the welded or sintered metal layer.

[0019] For example, the welded or sintered metal layer may include Ti / Ni / Ag, Ti / Ni / Au, Ti / NiV / Ag, Ti / NiV / Au, Ni(P) / Pd / Au, Ni(P) / Pd / Ag, Ni(P) / Au, Ni(P) / Ag, or the like.

[0020] In a particular implementation, a first solder may be used to connect an interconnect pillar to a side of the chip remote from a first metal layer coated substrate in a welding manner, and a second solder may be used to connect a side of the interconnect pillar remote from the chip to a second metal layer coated substrate in a welding manner.

[0021] In certain implementations, the thickness of the solder has a significant impact on solder joint reliability, etc. To ensure that the solder thickness is controllable and uniform, at least one first support pillar may be disposed between the interconnect pillar and the chip, and the at least one first support pillar may be formed on a surface of the interconnect pillar facing the chip, i.e., formed on the interconnect pillar, or the at least one first support pillar may be formed on a surface of the chip facing the interconnect pillar, i.e., formed on the chip, and / or at least one second support pillar may be disposed between the interconnect pillar and the second metal layer-coated substrate, and the at least one second support pillar may be formed on a surface of the interconnect pillar facing the second metal layer-coated substrate, i.e., formed on the interconnect pillar, or the at least one second support pillar may be formed on a surface of the second metal layer-coated substrate facing the interconnect pillar, i.e., formed on the second metal layer-coated substrate.

[0022] In addition to the chip and the interconnect pillars, the power module in this application may further include an electronic component located on the side of the first metal layer coated substrate facing the second metal layer coated substrate, and the electronic component is connected to the first metal layer coated substrate by using a third solder.

[0023] In this application, the first solder, the second solder, and the third solder may be solder paste or solder bumps, which is not limited here.

[0024] Optionally, the solders in this application can all be made of the same material. For example, the first solder, the second solder, and the third solder are made of the same solder. In this way, the welding between the chip and the interconnect pillar, the welding between the interconnect pillar and the second metal layer coated substrate, and the welding between the electronic component and the first metal layer coated substrate can be completed through a single reflow soldering, thereby simplifying the process steps and reducing costs.

[0025] Certainly, in certain implementations, the first solder, the second solder, and the third solder may alternatively be different solders. This is not intended to be limiting here. For example, the first solder and the third solder may be high-temperature solders, such as high-lead solders or Au-based solders, and the second solder may be a medium-temperature solder, such as SAC305 or Sn-Sb solder.

[0026] For example, an electronic component in this application includes any electronic component, such as a signal terminal, a power terminal, or a thermistor, that is welded to a first metal layer coated substrate by using solder.

[0027] To improve the bonding reliability between the electronic component and the first metal layer-coated substrate, at least one third support pillar is further disposed between the electronic component and the first metal layer-coated substrate. The at least one third support pillar may be formed on the surface of the electronic component facing the first metal layer-coated substrate, or on the surface of the first metal layer-coated substrate facing the electronic component. This is not a limitation.

[0028] Optionally, the material of the support pillar is an electrically conductive material, for example, the support pillar may be made of at least one of Al, Al alloy, Au, Au alloy, Cu, Cu alloy, Ni, Ni alloy, aluminum-coated copper, high-melting-point Cu—Sn alloy, or high-temperature solder.

[0029] This application also includes a molding compound that is filled between a first metal layer-coated substrate and a second metal layer-coated substrate and used to package the first metal layer-coated substrate and the second metal layer-coated substrate with plastic. To prevent delamination between the molding compound and the molding compound interface and thereby improve the reliability of the power module, a molding compound having a low elastic modulus is used. For example, the molding compound may be made of a material whose elastic modulus is between 0.5 GPa and 20 GPa, such as an epoxy molding compound. This is not intended to be limiting.

[0030] The power module in this application may further include a first heat sink located on a side of the first metal layer coated substrate remote from the second metal layer coated substrate, and a second heat sink located on a side of the second metal layer coated substrate remote from the first metal layer coated substrate, in order to cool the module from both sides, thereby improving the power density and module reliability of the power module.

[0031] Optionally, to improve the heat dissipation effect, the first heat sink can be connected to the first metal layer coated substrate by welding or sintering, and / or the second heat sink can be connected to the second metal layer coated substrate by welding or sintering.

[0032] Furthermore, a first support component is present between the first heat sink and the first metal layer coated substrate, and the first support component may include a plurality of fourth support pillars, metal wires, or metal meshes, and / or a second support component is present between the second heat sink and the second metal layer coated substrate, and the second support component may include a plurality of fifth support pillars or metal wires, thereby using the first support component and the second support component to control the solder thickness and thereby ensure welding reliability.

[0033] In certain implementations, the metal wires may be bonded and secured to the mating surface of the heat sink or the heat dissipation surface of the power module to prevent the metal wires from flowing along with the liquid metal during backflow.

[0034] According to a second aspect, an embodiment of the present application further provides a power supply circuit including a circuit board and a power module according to the first aspect or an implementation of the first aspect, wherein the power module is electrically connected to the circuit board, and the circuit board provides a signal to the power module.

[0035] For technical effects that can be achieved in the second aspect, please refer to the description of technical effects that can be achieved in any possible design of the first aspect, and details will not be described here.

[0036] According to a third aspect, an embodiment of the present application further provides a chip, wherein a surface electrode of the chip includes a stress buffering metal layer and a welded or sintered metal layer arranged to be stacked together. The material of the stress buffering metal layer can be a soft metal whose hardness is lower than HV60, and the softness of the soft metal is used to release stress at the joint.

[0037] For example, the soft metal may include at least one of aluminum, aluminum alloy, copper, magnesium alloy, zinc, zinc alloy, silver, silver alloy, gold, gold alloy, and the like, without being limited thereto.

[0038] In certain implementations, if the material of the stress buffering metal layer is a non-weldable metal, such as aluminum, an aluminum alloy, or a magnesium alloy, the stress buffering metal layer can be disposed below the welded or sintered metal layer.

[0039] For example, the welded or sintered metal layer may include, but is not limited to, Ti / Ni / Ag, Ti / Ni / Au, Ti / NiV / Ag, Ti / NiV / Au, Ni(P) / Pd / Au, Ni(P) / Pd / Ag, Ni(P) / Au, or Ni(P) / Ag. [Brief explanation of the drawings]

[0040] [Figure 1] FIG. 1 is a schematic diagram of a structure of a power module according to an embodiment of the present application. [Figure 2] 1 is a schematic flowchart of a power module preparation method according to an embodiment of the present application. [Figure 3] 1 is a schematic diagram of a cross section of a sintered material filled with a filler according to one embodiment of the present application. [Figure 4] 4 is a schematic flowchart of another power module preparation method according to an embodiment of the present application. [Figure 5] FIG. 1 is a schematic diagram of the structure of a power module preparation process according to an embodiment of the present application. [Figure 6] 4 is a schematic flowchart of another power module preparation method according to an embodiment of the present application. [Figure 7] FIG. 10 is a schematic diagram of the structure of another power module preparation process according to an embodiment of the present application. [Figure 8] FIG. 1 is a schematic diagram of the structure of another power module according to an embodiment of the present application. [Figure 9] 1 is a schematic diagram of the structure of a chip according to one embodiment of the present application; [Figure 10] FIG. 2 is an ultrasound scan of a sintered layer according to an embodiment of the present application. [Figure 11] 1 is a schematic diagram of a structure in which a support pillar is disposed between two joined bodies welded by using solder according to one embodiment of the present application. [Figure 12] FIG. 2 is a schematic diagram of an interconnect pillar structure according to an embodiment of the present application. [Figure 13]FIG. 1 is a schematic diagram of the structure of another power module according to an embodiment of the present application. [Figure 14] FIG. 10 is a schematic diagram of the structure of yet another power module preparation process according to an embodiment of the present application. [Figure 15] FIG. 1 is a schematic diagram of the structure of another power module according to an embodiment of the present application. [Figure 16] FIG. 1 is a schematic diagram of the structure of another power module according to an embodiment of the present application. DETAILED DESCRIPTION OF THE INVENTION

[0041] To make the objectives, technical solutions and advantages of this application clearer, the following further describes this application in detail with reference to the accompanying drawings.

[0042] It should be noted that in this specification, like reference numbers and letters in the following attached drawings represent like items, and therefore, once an item is defined in an attached drawing, that item does not need to be further defined or interpreted in subsequent attached drawings.

[0043] In the description of this application, it should be noted that the orientations or positional relationships indicated by the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," "outer," and the like are orientations or positional relationships based on the accompanying drawings, and do not indicate or imply that the device or element in question needs to have a specific orientation or be constructed or operated in a specific orientation. They are merely intended to conveniently explain and simplify the description of this application, and therefore cannot be construed as limitations on this application. The expressions of position and orientation in this application are explained by using the accompanying drawings as examples. However, changes can be made based on requirements, and these changes fall within the scope of protection of the present invention. The accompanying drawings of this application are used merely to indicate relative positional relationships and are not true to scale. Furthermore, the terms "first" and "second" are used merely for explanatory purposes and should not be understood as indicating or implying relative importance.

[0044] It should be noted that in the description of this application, unless expressly stated and limited otherwise, the terms "mount," "interconnect," and "connect" should be understood in a broad sense. For example, these terms can indicate a fixed connection, a detachable connection, or an integral connection, and can be a mechanical connection or an electrical connection, or a direct interconnection, an indirect interconnection via an intermediate medium, or an internal communication between two elements. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0045] To facilitate understanding of the power module provided in the embodiments of this application, application scenarios of the power module will be described first. Power modules are widely used in power supply circuits. The power module is a semiconductor device that converts the voltage, current, frequency, etc. of a power supply, and is a core device for power conversion in a power supply circuit. For example, the power supply circuit can be used as a core device of a motor control unit (MCU) of an electric vehicle for converting DC to AC, and can also be used as a battery in an electric vehicle to output DC or convert DC to AC required for vehicle operation.

[0046] There is an urgent need for lighter and smaller power modules to conserve energy and reduce costs. However, this poses a major challenge to the development of power modules because lighter and smaller modules increase the current density, which generates relatively high heat inside the module and thus causes an increase in junction temperature. If the generated heat cannot be dissipated in a timely manner, the relatively high junction temperature will affect the overall thermomechanical performance and reliability of the module.

[0047] On this basis, this application provides a power module with high heat dissipation performance, power density, and reliability. In order to facilitate understanding of the technical solution in this application, the following will specifically describe the power module provided in this application with reference to the accompanying drawings and specific implementations.

[0048] Referring to FIG. 1, FIG. 1 is a schematic diagram of a power module structure according to one embodiment of the present application. The power module 1 includes a first metal layer-coated substrate 10 and a second metal layer-coated substrate 20 arranged opposite each other, and a chip 11 and interconnect pillars 12 located between the first metal layer-coated substrate 10 and the second metal layer-coated substrate 20. A sintering material 13 is further disposed between the chip 11 and the first metal layer-coated substrate 10, and the chip 11 and the first metal layer-coated substrate 10 are electrically connected through pressure sintering using the sintering material 13. The sintering material 13 may include at least one of silver paste, copper paste, or silver film. The interconnect pillars 12 are located between the chip 11 and the second metal layer-coated substrate 20, and the chip 11 is electrically connected to the second metal layer-coated substrate 20 using the interconnect pillars 12. Since substrates are disposed on both sides of the chip 11, heat generated inside the power module is dissipated toward the first metal layer-coated substrate 10 and the second metal layer-coated substrate 20, thereby improving the heat dissipation performance of the power module. Furthermore, the sintered material has low stress, and the chip 11 and the first metal layer-coated substrate 10 are electrically connected by a pressure sintering method, improving the bonding reliability. Furthermore, the sintered material 13 in this application has the advantages of a low sintering temperature, a high melting point, and high thermal conductivity. Therefore, not only can the heat dissipation performance of the power module be further improved, but the operating environmental temperature and service life of the power module can also be increased, thereby increasing the power density of the power module.

[0049] 2, which is a schematic flowchart of a power module preparation method according to an embodiment of the present application. The preparation method may include the following steps:

[0050] S101: A first metal layer coated substrate and a second metal layer coated substrate are provided.

[0051] In a particular implementation, the first metal layer coated substrate and the second metal layer coated substrate are direct bond copper. (D BC) Substrate, Active Metal Brazed Copper (AMB (e.g., Al2O3-AMB, Si3N4-AMB, or AlN-AMB) substrate, insulated metal substrate (I MS), or the like, but is not limited thereto.

[0052] For example, to further increase power density, the first metal layer-coated substrate and the second metal layer-coated substrate may be made of AlN-DBC, Si3N4-AMB, or AlN-AMB, which have high thermal conductivity, but this is not intended to be limiting.

[0053] S102: Mounting a chip on a first metal layer coated substrate, with a sintered material between the chip and the first metal layer coated substrate.

[0054] For example, the sintered material may consist of silver paste, copper paste, or silver film.

[0055] In a particular implementation, the silver paste is a micrometer silver particle paste. To and nanometer silver particle base To The micrometer silver particle paste is a silver paste made of micrometer silver particles and an organic solvent, and is low-cost and safe. Micrometer silver particle paste is generally used for sintering under pressure, and the sintered material has high density, resulting in a strong bond between the interfaces of the bodies being joined, and high bonding reliability. Nanometer silver particle paste is a silver paste made of nanometer silver particles and an organic solvent, and is costly and poses safety risks in handling the nanometer particles.

[0056] Optionally, to improve the reliability of the sintered bond and reduce the cost, the sintered material in this application may be a micrometer silver particle based material. To It is possible that

[0057] To further improve the reliability of the sintered bond, the elastic modulus and coefficient of thermal expansion (CTE) of the sintered material can be adjusted by adding a substance to the sintered material. For example, the sintered material includes a matrix material and a filler filled in the matrix material. The matrix material includes at least one of silver paste, copper paste, and silver film. The filler is made of a material that has good bonding performance with the matrix material, and the thermal expansion coefficient of the filler is smaller than that of the matrix material, thereby improving the reliability of the sintered bond.

[0058] For example, the matrix material is a micrometer silver particle paste. A filler is added to the micrometer silver particle paste to reduce the thermal expansion coefficient of the micrometer silver particle paste and reduce the bonding stress, thereby improving the reliability of the silver sintered bond. For example, the filler may include at least one of nickel (Ni), Ni alloy, copper (Cu), nickel-plated copper, titanium (Ti), Ti alloy, iron (Fe), Fe alloy, Kovar alloy (Kovar, iron-nickel-cobalt alloy 4J29), SiC powder, and the like. This is not limited here.

[0059] The shape of the filler is not limited in this application. For example, as shown in FIG. 3, the length L1 of the filler 131 can be controlled to be between 20 μm and 100 μm, and the size W1 of the filler 131 in the vertical length direction can be controlled to be between 20 μm and 30 μm. The cross section along the length direction can be circular, elliptical, polygonal, or the like.

[0060] In this application, the metal layers covering the surfaces of the first and second metal layer-coated substrates are generally copper. When the sintering material is a silver paste or silver film, the first metal layer-coated substrate can be plated with silver at the sintering position to improve the bonding performance between the sintering material and the first metal layer-coated substrate. That is, the first metal layer-coated substrate is covered with a silver-plated layer in the zone corresponding to the sintering material. For example, the thickness of the silver-plated layer can be controlled to be between 0.1 μm and 30 μm. Certainly, if the sintering material has relatively good bonding performance with the first metal layer-coated substrate, silver plating may not be required. For example, if the sintering material is a copper paste, silver plating is not required at the sintering position of the first metal layer-coated substrate.

[0061] For example, if the sintering material is copper paste or silver paste, referring to FIGS. 4 and 5, the chip can be mounted on the first metal layer coated substrate by using the following steps.

[0062] S 1021a: Print sintered material onto a first metal layer coated substrate.

[0063] In a specific implementation, as shown in Figures 5(a) and (b), a sintering material 13 (copper paste or silver paste) can be printed on the corresponding sintering zone of the first metal layer-coated substrate 10 by using a stencil printing technique or a screen printing technique. Compared with the screen printing technique, the stencil printing technique has lower cost and simpler manufacturing. Therefore, optionally, in this application, the copper paste or silver paste is printed on the corresponding sintering zone of the first metal layer-coated substrate by using a stencil printing technique.

[0064] For example, the thickness of the printed copper paste or silver paste can be controlled to be between 30 μm and 160 μm, and can be specifically designed based on the actual product, which is not limited here.

[0065] Optionally, the area of ​​the printed copper or silver paste may be set larger than the area of ​​the corresponding sintering zone on the chip to accommodate alignment errors between the chip and the sintering material. The boundary of the copper or silver paste may be expanded outward by 20 μm to 300 μm compared to the target boundary (the boundary of the sintering zone on the chip under ideal conditions).

[0066] S 1022a: Pre-dry the printed sintered material.

[0067] In certain implementations, the printed copper or silver paste is pre-dried to prevent the sintered material from shattering during pressure sintering.

[0068] For example, as shown in (c) of Figure 5, the sintered material 13 (copper paste or silver paste) printed on the first metal layer coated substrate 10 can be pre-dried in an N2 atmosphere at a temperature of 100°C to 180°C for 5 to 40 minutes.

[0069] S 1023a: Mount a chip onto the sintered material of the first metal layer coated substrate and press the chip.

[0070] In a specific implementation, as shown in (d) of Figure 5, first, the chip 11 is sucked up by vacuum suction, then the sintering material 13 (copper paste or silver paste) is aligned using a profile identification system, and then the chip 11 can be fixed and pressed onto the dried sintering material 13 (copper paste or silver paste).

[0071] For example, the chip mounting conditions may be as follows: the temperature is controlled to be between 100°C and 180°C, the pressure is controlled to be between 0.1 MPa and 10 MPa, and the time is controlled to be between 10 ms and 999 ms. That is, in an environment with a temperature of 100°C to 180°C, a pressure of 0.1 MPa to 10 MPa is applied to the chip 11 mounted on the first metal layer coated substrate 10 for at least 10 ms.

[0072] For example, if the sintered material is a silver film, referring to FIGS. 6 and 7, the chip can be mounted on the first metal layer coated substrate by using the following steps.

[0073] S 1021b: A sintering material is bonded to the surface of the chip facing the first metal layer coated substrate.

[0074] In a specific implementation, as shown in Figure 7(a), the chip 11 can be sucked using a metal suction nozzle, with the temperature of the metal suction nozzle being 80°C to 200°C. The chip 11 is then pressed onto a large silver film, and a pressure of 0.1 MPa to 5 MPa is applied to the chip for a time of 1 ms to 10,000 ms. In this way, the sintered material (silver film) underneath the chip is compressed and semi-sintered, adhering to the chip 11.

[0075] S 1022b: The chip with the sintered material attached is mounted on a first metal layer coated substrate and the chip is pressed.

[0076] In a specific implementation, as shown in (b) of Figure 7, first, the chip 11 is sucked up by vacuum suction, then the first metal layer coated substrate 10 is aligned using a profile identification system, and then the chip 11 with the sintered material 13 (silver film) attached thereto can be fixed and pressed onto the first metal layer coated substrate 10.

[0077] For example, the chip mounting conditions may be as follows: temperature is controlled to be between 100°C and 180°C, pressure is controlled to be between 0.1 MPa and 10 MPa, and time is controlled to be between 10 ms and 999 ms. That is, in an environment with a temperature of 100°C to 180°C, a pressure of 0.1 MPa to 10 MPa is applied to a chip mounted on a first metal layer-coated substrate for at least 10 ms.

[0078] After the chip is mounted、S 103 is executed.

[0079] S 103: Pressure sintering is performed on the chip mounted on the first metal layer coated substrate.

[0080] Press sintering refers to applying pressure to the bodies to be joined at high temperatures, thereby increasing the density of the sintered body and promoting atomic diffusion between the particles of the sintered material and between the interfaces of the sintered material and the bodies to be joined, thereby increasing the bond strength and bond reliability. The pressure sintering technique used is not limited in this application and can be any well-known method.

[0081] In a specific implementation, as shown in Fig. 5(e) and Fig. 7(c), a pressure head may be used to perform pressure sintering on a chip 11 mounted on a first metal layer-covered substrate 10. The area of ​​the pressure head is 50 mm x 50 mm, as an example. To reduce warpage of the product obtained through sintering, the parallelism of the pressure head may be set to ≦5 μm.

[0082] For example, the sintering conditions when pressure sintering can be as follows: the sintering temperature is controlled to be between 200°C and 300°C, the applied pressure is controlled to be between 5 MPa and 30 MPa, and the sintering time is controlled to be between 1 minute and 10 minutes.

[0083] In certain implementations, the pressure sintering process may be performed in an air environment. To prevent the product from being oxidized, the pressure sintering is performed on the chip mounted on the first metal layer-coated substrate in a protective atmosphere or vacuum environment. The protective atmosphere may be a reducing atmosphere or an inert atmosphere. For example, the protective atmosphere may be N2, a mixture of N2 and H2, Ar, He, or the like. This is not intended to be limiting.

[0084] To prevent damage to the chip 11 caused by the pressure head during the sintering process, a removable stress relief film 30 can be further disposed between the chip 11 and the pressure head when pressure sintering is performed on the chip mounted on the first metal layer-coated substrate, as shown in Figures 5(e) and 7(c). Therefore, when pressure sintering is performed, the stress relief film 30 can avoid direct contact between the pressure head and the chip 11, reducing damage to the chip 11 caused by the pressure head due to stress concentration. After pressure sintering is completed, the stress relief film can be removed.

[0085] Optionally, the thickness of the stress relaxation film can be set to be 50 μm to 90 μm, which is not limited here.

[0086] For example, the stress relief film may be an organic film such as a Teflon film, but this is not intended to be limiting.

[0087] In addition, in order to control the degree of warpage of the product obtained through sintering, (f) of FIG. 5 and FIG. 7 As shown in (d) of FIG. 1, the sintered first metal layer coated substrate 10 and chip 11 can be cooled under pressure.

[0088] For example, if the pressure sintering process is carried out in a protective atmosphere or vacuum environment, the cooling process is also carried out in a protective atmosphere or vacuum environment.

[0089] For example, the cooling conditions may be as follows: the applied pressure is controlled to be between 5 MPa and 20 MPa, and the cooling time is controlled to be between 1 minute and 10 minutes.

[0090] Optionally, cooling can be achieved by using water or forced nitrogen to facilitate cooling, although this is not intended to be limiting.

[0091] Optionally, after pressure sintering is performed on the chip mounted on the first metal layer coated substrate, the first metal layer coated substrate with the mounted chip can be further cleaned to remove residual organic matter, for example, by plasma treatment. science and technology The residual organic matter on the first metal layer coated substrate, etc., is removed using a cleaning technique or organic solvent cleaning technique, thereby improving the interface bonding performance of the subsequent molding compound, preventing the molding compound from peeling off, and further improving the reliability of the power module.

[0092] Plasma treatment refers to a cleaning process for the surface of an object through the collision effect of plasma particles in plasma on the surface of the object and the reaction of plasma ions with organic matter.

[0093] S 104: Connect the side of the chip remote from the first metal layer covered substrate to a second metal layer covered substrate using interconnect pillars.

[0094] In certain implementations, the interconnect pillars can be made of a metal, alloy, or composite material and are configured to connect the side of the chip remote from the first metal layer covered substrate to a second metal layer covered substrate.

[0095] For example, the material of the interconnect pillars can be Cu, Ni, Mo, W, tungsten alloy, Cu-Mo alloy, AlSiC, nickel alloy, or the like, or Mo plated with Ni, Ni(P), or Cu, W plated with Ni, Ni(P), or Cu, Cu-Mo alloy plated with Ni, Ni(P), or Cu, or AlSiC composite plated with Ni, Ni(P), or Cu after surface sensitization treatment. Certainly, Ag or Au may be further plated on the surface of the plated layer Ni, Ni(P), or Cu.

[0096] In this application, Ni(P) refers to a Ni plating layer containing phosphorus (P) produced by chemical plating. In chemical plating, P and Ni are simultaneously precipitated from a solution and deposited on a substrate, with P being an inevitable accompaniment.

[0097] The type and number of chips in the power module are not limited in this application, and any type and number of chips can be applied to the power module. For example, as shown in Figure 8, the chips 11 can be an insulated gate bipolar transistor (IGBT) and a fast recovery diode (FRD). The IGBT chip 11 and the FRD chip 11 are electrically connected to the first metal layer-coated substrate 10 by using a sintered material 13.

[0098] In a particular implementation, still referring to FIG. 8, the gate electrode of the IGBT chip 11 may be electrically connected to the first metal layer coated substrate 10 by using an Al wire 104 .

[0099] The side of the chip facing the first metal layer-coated substrate and the side of the chip away from the first metal layer-coated substrate each have a surface electrode, the surface electrode including a welded or sintered metal layer for being welded or sintered to another electrical component.

[0100] For example, the welded or sintered metal layer may include Ti / Ni / Ag, Ti / Ni / Au, Ti / NiV / Ag, Ti / NiV / Au, Ni(P) / Pd / Au, Ni(P) / Pd / Ag, Ni(P) / Au, Ni(P) / Ag, or the like.

[0101] In this application, NiV is an alloy of Ni and V. When the surface electrode of the chip is manufactured, a NiV target material is used to manufacture a plating layer using a sputtering technique.

[0102] Optionally, a stress buffering metal layer can be added to the surface electrode to relieve stress generated in the chip during welding or sintering of the chip, thereby improving the reliability of the power module. The material of the stress buffering metal layer can be a soft metal whose hardness is lower than HV60, such as aluminum, aluminum alloy, copper, magnesium alloy, zinc, zinc alloy, silver, silver alloy, gold, or gold alloy. By using the softness of the soft metal, stress at the joint is relieved.

[0103] In certain implementations, if the material of the stress buffering metal layer is a non-weldable metal, such as aluminum, an aluminum alloy, or a magnesium alloy, the stress buffering metal layer can be disposed below the welded or sintered metal layer.

[0104] For example, the stress buffering metal layer can be disposed only on the surface electrodes on the side of the chip facing the first metal layer-coated substrate, or the stress buffering metal layer can be disposed only on the surface electrodes on the side of the chip facing the interconnect pillars, or the stress buffering metal layer can be disposed on the surface electrodes on both sides of the chip, as this is not intended to be limiting.

[0105] For example, the material of the stress buffer metal layer is aluminum or an aluminum alloy. As shown in Figure 9, the chip 11 may include a semiconductor body 110, and a surface electrode 111 is disposed on the surface of the semiconductor body 110. The stress buffer metal layer 1111 is disposed in the surface electrode 111 on the side of the chip 11 facing the first metal layer-coated substrate, and the stress buffer metal layer 1111 is located on the side of the welded or sintered metal layer 1112 remote from the first metal layer-coated substrate, i.e., the stress buffer metal layer 1111 is located between the welded or sintered metal layer 1112 and the semiconductor body 110; and / or the stress buffer metal layer 1111 is disposed in the surface electrode 111 on the side of the chip 11 facing the interconnect pillar, and the stress buffer metal layer 1111 is located on the side of the welded or sintered metal layer 1112 remote from the interconnect pillar, i.e., the stress buffer metal layer 1111 is located between the welded or sintered metal layer 1112 and the semiconductor body 110. FIG. 9 shows an example in which the stress buffer metal layer 1111 is disposed in the surface electrodes 111 on both sides of the chip 11.

[0106] In a particular implementation, when the surface electrodes of the chip are formed, they are first formed by physical vapor deposition. (P An Al film or an Al alloy layer can be formed by using a plasma PVD (Physical Vapour Deposition) method or other methods. A protective oxide film easily forms on the surface of Al, making Al unweldable. To perform welding or sintering on unweldable Al, a weldable metal and a metal with surface wettability can be chemically plated onto the stress buffer metal layer to form a welded or sintered metal layer. Alternatively, the welded or sintered metal layer can be manufactured by using a plasma PVD method or the like.

[0107] In one possible implementation, when forming the surface electrodes of a chip, an Al film can be first formed using a PVD method or other method. Then, Zn is used to replace the aluminum oxide film through a zincate process. Then, Ni(P) can be chemically plated to replace the Zn, or gold (Au) or silver (Ag) can be chemically plated on the Ni(P) layer. That is, the surface electrodes include a stress buffer metal layer Al and a welded or sintered metal layer Ni(P) / Au or Ni(P) / Ag. The phosphorus content in Ni(P) is typically 5 wt% to 12 wt%. Alternatively, after forming the Al film, a Ti / Ni / Ag layer can be formed using a PVD method. That is, the surface electrodes include a stress buffer metal layer Al and a welded or sintered metal layer Ti / Ni / Ag.

[0108] Certainly, when the surface electrode is formed, no stress buffer metal layer may be formed, and a welded or sintered metal layer, such as Ti / Ni / Ag, Ti / Ni / Au, Ti / NiV / Ag, Ti / NiV / Au, Ni(P) / Pd / Au, or Ni(P) / Pd / Ag, may be directly formed by using the PVD method.

[0109] The thickness of the surface electrode of the chip is not limited in this application and is set based on the actual product. For example, the thickness of the surface electrode can be controlled to be between 2 μm and 10 μm.

[0110] For example, a chip with a stress-buffering metal layer was sintered onto a metal-coated ceramic substrate using a filler-loaded micrometer silver particle paste. Figure 10 shows an ultrasonic (SAT) scan of the sintered layer after 1,000 temperature shocks (-40°C to 125°C) under harsh conditions without molding compound. It can be seen from Figure 10 that the sintered layer did not delaminate. Therefore, it can be seen that highly reliable bonding can be achieved by sintering a chip with a stress-buffering metal layer using a silver paste with reduced elastic modulus and thermal expansion coefficient.

[0111] In this application, after the chip is connected to the first metal layer coated substrate through pressure sintering, the chip can be connected to the interconnect pillars 12 by using a first solder 14, and the interconnect pillars 12 can be connected to the second metal layer coated substrate 20 by using a second solder 15, as shown in Figures 1 and 8. In a specific implementation, the first solder can be used to connect the interconnect pillars to the side of the chip remote from the first metal layer coated substrate in a welding manner, and the second solder can be used to connect the side of the interconnect pillars remote from the chip to the second metal layer coated substrate in a welding manner.

[0112] For example, the first solder and the second solder can be comprised of solder paste or soldering protrusions. The first solder can be a high temperature solder, such as a high lead solder or an Au-based solder, and the second solder can be a medium temperature solder, such as an SAC305 or Sn-Sb solder.

[0113] In certain implementations, the thickness of the solder has a significant impact on solder joint reliability, etc. To ensure that the solder thickness is controllable and uniform, a support pillar 03 may be disposed between two bodies 01 and 02 to be joined (two objects to be welded using solder, e.g., a chip and an interconnect pillar, or an interconnect pillar and a second metal layer-coated substrate), as shown in FIG. 11 . In this way, the support pillar 03 is used to control the thickness and thickness uniformity of the solder 04 between the two bodies 01 and 02 to be joined. The support pillar 03 may be formed on either of the two bodies 01 and 02 to be joined.

[0114] For example, in this application, as shown in FIG. 8 , at least one first support pillar 16 is disposed between the interconnect pillar 12 and the chip 11, and the at least one first support pillar 16 can be formed on the surface of the interconnect pillar 12 facing the chip 11, i.e., formed on the interconnect pillar 12, or the at least one first support pillar 16 can be formed on the surface of the chip 11 facing the interconnect pillar 12, i.e., formed on the chip 11.

[0115] For example, in this application, as shown in FIG. 8 , at least one second support pillar 17 is disposed between the interconnect pillar 12 and the second metal layer-coated substrate 20, and the at least one second support pillar 17 can be formed on the surface of the interconnect pillar 12 facing the second metal layer-coated substrate 20, i.e., formed on the interconnect pillar 12, or the at least one second support pillar 17 can be formed on the surface of the second metal layer-coated substrate 20 facing the interconnect pillar 12, i.e., formed on the second metal layer-coated substrate 20.

[0116] The number of the first support pillars and the number of the second support pillars are not limited in this application and are specifically determined based on the area of ​​the welding zone, and a larger area of ​​the welding zone indicates a larger number of support pillars.

[0117] In this application, the size of the support pillar can be set to a micrometer-level size, and the support pillar is mainly used to support the bodies to be joined located on both sides of the support pillar, to control the thickness of the solder, and to ensure the uniformity of the solder thickness.

[0118] Optionally, the material of the first support pillar and the second support pillar is an electrically conductive material, for example, the first support pillar and the second support pillar may be made of at least one of Al, Al alloy, Au, Au alloy, Cu, Cu alloy, Ni, Ni alloy, aluminum-clad copper, high-melting-point Cu—Sn alloy, or high-temperature solder.

[0119] In a particular implementation, the height of the support pillars is determined based on the target thickness of the solder. For example, the thickness of the support pillars can be controlled to be between 0.02 mm and 10 mm.

[0120] For example, by using ultrasonic technology, micrometer-sized support pillars can be implanted on the bodies to be joined, and the small size of the support pillars does not affect the solder welding technique and solder reliability. Initially, the implanted support pillars can be spherical or cylindrical. Then, the implanted support pillars are leveled so that the height of the implanted support pillars is adjustable and controllable. Thus, the thickness of the solder and the degree of warping can be controlled during the welding process.

[0121] 12 , an example is taken in which support pillars are implanted on both sides of the interconnect pillar 12. Micrometer-level metal balls are implanted on the surface of the interconnect pillar 12 facing the chip using ultrasonic technology, and the implanted metal balls are leveled to form first support pillars 16. Next, the interconnect pillar 12 is placed on a jig with the surface of the interconnect pillar 12 with the first support pillar 16 facing downwards, so that the implanted first support pillars 16 fit into the holes in the jig. Through the positioning of the jig, metal balls are implanted on the surface of the interconnect pillar 12 facing the second metal layer-coated substrate using the same method, and the implanted metal balls are leveled to form second support pillars 17. This allows the support pillars to be arranged at symmetrical positions on both sides of the interconnect pillar 12, making it easier to recognize and grasp during automatic mounting.

[0122] The metal balls are leveled by pressing and flattening them so that the height of the implanted metal balls is consistent and meets the design solder thickness requirement, thereby controlling the uniformity of the solder thickness.

[0123] As shown in FIG. 13, in addition to the chip 11 and the interconnect pillar 12, the power module in this application may further include an electronic component 101 located on the side of the first metal layer coated substrate 10 facing the second metal layer coated substrate 20, and the electronic component 101 is connected to the first metal layer coated substrate 10 by using a third solder 102.

[0124] For example, the third solder may be a high temperature solder, such as a high lead solder or an Au-based solder.

[0125] For example, as shown in FIG. 13, the electronic component in this application includes any electronic component that is welded onto the first metal layer coated substrate 10 using solder, such as the signal terminal in FIG. 13, the power terminal in FIG. 13, or thermistor.

[0126] 13 , at least one third support pillar 103 is further disposed between the electronic component 101 and the first metal layer-coated substrate 10. The at least one third support pillar 103 may be formed on the surface of the electronic component 101 facing the first metal layer-coated substrate 10, or may be formed on the surface of the first metal layer-coated substrate 10 facing the electronic component 101. This is not a limitation here.

[0127] In a specific implementation, the implementation of the third support pillar can be referred to the implementation of the first support pillar and the second support pillar, and the details will not be described here.

[0128] In this application, the first solder, the second solder, and the third solder may be solder paste or solder bumps, which is not limited here.

[0129] Optionally, the solders in this application can all be made of the same material. For example, the first solder, the second solder, and the third solder are made of the same solder. In this way, the welding between the chip and the interconnect pillar, the welding between the interconnect pillar and the second metal layer coated substrate, and the welding between the electronic component and the first metal layer coated substrate can be completed through a single reflow soldering, thereby simplifying the process steps and reducing costs.

[0130] Certainly, in certain implementations, the first solder, the second solder, and the third solder may alternatively be different solders. This is not intended to be limiting here. For example, the first solder and the third solder may be high-temperature solders, such as high-lead solders or Au-based solders, and the second solder may be a medium-temperature solder, such as SAC305 or Sn-Sb solder.

[0131] For example, take the power module shown in FIG. 13 as an example. Referring to FIG. 14, after the chip 11 and the first metal layer-coated substrate 10 are subjected to pressure sintering, the gate electrode of the IGBT chip 11 is bonded to the first metal layer-coated substrate 10 using an Al wire 104. Then, a first support pillar 16 and a second support pillar 17 are formed on both sides of the interconnect pillar 12. Then, a third support pillar 103 is implanted on the surface of the first metal layer-coated substrate 10 using an ultrasonic technique. Then, a first solder 14 is formed between the chip 11 and the interconnect pillar 12, a second solder 15 is formed between the interconnect pillar 12 and the second metal layer-coated substrate 20, and a third solder 102 is formed between the electronic component 101 (power terminals and signal terminals) and the first metal layer-coated substrate 10. The solder can be a solder bump or a solder paste. The solder bump can be formed by mounting, and the solder paste can be formed using a printing technique. The soldering bumps or solder paste may be a high temperature solder, for example a high lead solder or an Au based solder.

[0132] A vacuum reflow is then performed to weld together the chip 11 and the interconnect pillars 12, weld together the interconnect pillars 12 and the second metal layer coated substrate 20, and weld together the electronic components 101 (power and signal terminals) and the first metal layer coated substrate 10. In this way, the components of the power module are joined together. Because support pillars are embedded in the solder of each body to be joined, the thickness of the solder and the degree of warping can be controlled.

[0133] After the internal interconnection of the power module is completed, plastic packaging is required. In a specific implementation, as shown in Figure 15, a molding compound 40 is filled between the first metal layer coated substrate 10 and the second metal layer coated substrate 20, and the first metal layer coated substrate 10 and the second metal layer coated substrate 20 are packaged with plastic.

[0134] In order to prevent delamination between the molding compound and the molding compound interface and thereby improve the reliability of the power module, a molding compound having a low elastic modulus is used as the molding compound. For example, the molding compound may be made of a material whose elastic modulus is between 0.5 GPa and 20 GPa, such as an epoxy molding compound. This is not limited thereto.

[0135] In certain implementations, after the plastic packaging is completed, the top and bottom surfaces of the power module may be ground to make these two surfaces of the power module parallel. Certainly, based on requirements, grinding may not be necessary instead.

[0136] For example, after plastic packaging, the exposed terminals (eg, signal terminals and power terminals) may be further plated with tin to protect the terminals from oxidation and to improve the solderability of the terminals.

[0137] As shown in FIG. 16, the power module in this application may further include a first heat sink 50 located on the side of the first metal layer-coated substrate 10 remote from the second metal layer-coated substrate 20, and a second heat sink 60 located on the side of the second metal layer-coated substrate 20 remote from the first metal layer-coated substrate 10, in order to cool the module from both sides, thereby improving the power density and module reliability of the power module.

[0138] For example, the first heat sink and the second heat sink may be water-cooled heat sinks, although this is not limited thereto.

[0139] In a particular implementation, the first metal layer coated substrate and the first heat sink can be bonded together using thermally conductive silicone grease, and the second metal layer coated substrate and the second heat sink can be bonded together using thermally conductive silicone grease.

[0140] Optionally, to improve the heat dissipation effect, the first heat sink can be connected to the first metal layer coated substrate by welding or sintering, and / or the second heat sink can be connected to the second metal layer coated substrate by welding or sintering.

[0141] For example, a first heat sink can be connected to a first metal layer covered substrate in a welding manner, and a second heat sink can be connected to a second metal layer covered substrate in a welding manner.

[0142] Furthermore, as shown in FIG. 16, there is a first support component between the first heat sink 50 and the first metal layer coated substrate 10, which may include a plurality of fourth support pillars 51 or metal wires, and / or there is a second support component between the second heat sink 60 and the second metal layer coated substrate 20, which may include a plurality of fifth support pillars 61 or metal wires, thereby using the first support component and the second support component to control the solder thickness and thereby ensure welding reliability.

[0143] In certain implementations, the metal wires may be bonded and secured to the mating surface of the heat sink or the heat dissipation surface of the power module to prevent the metal wires from flowing along with the liquid metal during backflow.

[0144] In a specific implementation, when the first support component includes a plurality of fourth support pillars, the fourth support pillars may be formed on the first heat sink or on the first metal layer-covered substrate. This is not a limitation here. In a specific implementation, the implementation of the fourth support pillars may refer to the implementation of the first support pillars and the second support pillars. Details will not be described here.

[0145] In a specific implementation, when the second support component includes a plurality of fifth support pillars, the fifth support pillars may be formed on the second heat sink or on the second metal layer-covered substrate. This is not a limitation here. In a specific implementation, the implementation of the fifth support pillars may refer to the implementation of the first support pillars and the second support pillars. Details will not be described here.

[0146] Correspondingly, one embodiment of this application further provides a power supply circuit including a circuit board and any one of the power modules provided in the embodiments of this application. The power module is electrically connected to the circuit board, and the circuit board provides a signal to the power module. The problem-solving principle of the power supply circuit is similar to that of the aforementioned power module. Therefore, for the implementation of the power supply circuit, please refer to the implementation of the aforementioned power module. A repeated explanation will not be provided.

[0147] Accordingly, one embodiment of this application further provides a chip. Referring to Fig. 9, the surface electrode 111 of the chip 11 includes a stress buffering metal layer 1111 and a welded or sintered metal layer 1112, which are arranged to be stacked. The material of the stress buffering metal layer 1111 can be a soft metal whose hardness is lower than HV60, and the softness of the soft metal is used to release the stress of the joint.

[0148] For example, the soft metal may include at least one of aluminum, aluminum alloy, copper, magnesium alloy, zinc, zinc alloy, silver, silver alloy, gold, gold alloy, and the like, without being limited thereto.

[0149] In certain implementations, if the material of the stress buffering metal layer is a non-weldable metal, such as aluminum, an aluminum alloy, or a magnesium alloy, the stress buffering metal layer can be disposed below the welded or sintered metal layer.

[0150] For example, the welded or sintered metal layer may include, but is not limited to, Ti / Ni / Ag, Ti / Ni / Au, Ti / NiV / Ag, Ti / NiV / Au, Ni(P) / Pd / Au, or Ni(P) / Pd / Ag.

[0151] Obviously, one skilled in the art would understand this application Example Various modifications and variations can be made to this application without departing from the spirit and scope of the present invention, and this application is intended to cover such modifications and variations to this application provided they come within the scope of the claims of this application and their equivalents.

Claims

1. 1. A power module comprising: a first metal layer-coated substrate and a second metal layer-coated substrate disposed opposite each other; and a chip and an interconnect pillar located between the first metal layer-coated substrate and the second metal layer-coated substrate, a sintered material is disposed between the chip and the first metal layer-coated substrate, and the chip and the first metal layer-coated substrate are electrically connected by using the sintered material, the sintered material including at least one of silver paste, copper paste, and silver film; the interconnect pillars are located between the chip and the second metal layer covered substrate, and the chip is connected to the second metal layer covered substrate by using the interconnect pillars; a surface electrode on a side of the chip facing the first metal layer-coated substrate and a surface electrode on a side of the chip facing away from the first metal layer-coated substrate, the surface electrode having a welded or sintered metal layer; the surface electrode on the side of the chip facing the first metal layer-coated substrate further comprises a stress buffer metal layer located on the side of the welded or sintered metal layer remote from the first metal layer-coated substrate; and the surface electrode on the side of the chip remote from the first metal layer-coated substrate further comprises a stress buffer metal layer located on the side of the welded or sintered metal layer facing the first metal layer-coated substrate; Power module.

2. The sintered material has a matrix material and a filler filled in the matrix material, The filler has a thermal expansion coefficient smaller than that of the matrix material. The power module according to claim 1 .

3. 10. The power module of claim 1, wherein the silver paste comprises at least one of a micrometer silver particle paste and a nanometer silver particle paste.

4. 3. The power module of claim 2, wherein the filler comprises at least one of nickel, nickel alloy, copper, nickel-plated copper, titanium, titanium alloy, iron, iron alloy, Kovar alloy, and SiC powder.

5. 2. The power module according to claim 1, wherein the material of the stress buffering metal layer is a soft metal, and the hardness of the soft metal is lower than HV60.

6. 6. The power module of claim 5, wherein the soft metal comprises at least one of aluminum, an aluminum alloy, copper, a magnesium alloy, zinc, a zinc alloy, silver, a silver alloy, gold, and a gold alloy.

7. 7. The power module of claim 6, wherein the welded or sintered metal layers comprise Ti / Ni / Ag, Ti / Ni / Au, Ti / NiV / Ag, Ti / NiV / Au, Ni(P) / Pd / Au, Ni(P) / Pd / Ag, Ni(P) / Au, or Ni(P) / Ag.

8. 10. The power module of claim 1, wherein the chip is connected to the interconnect pillar by using a first solder and the interconnect pillar is connected to the second metal layer clad substrate by using a second solder.

9. at least one first support pillar located between the interconnect pillar and the chip, the at least one first support pillar formed on a surface of the interconnect pillar facing the chip or on a surface of the chip facing the interconnect pillar; and / or at least one second support pillar located between the interconnect pillar and the second metal layer-coated substrate, the at least one second support pillar formed on a surface of the interconnect pillar facing the second metal layer-coated substrate or on a surface of the second metal layer-coated substrate facing the interconnect pillar; The power module of claim 8 further comprising:

10. the power module further includes an electronic component located on a surface of the first metal layer-covered substrate facing the second metal layer-covered substrate; the electronic component is connected to the first metal layer-covered substrate by using a third solder; The power module according to claim 1 .

11. the power module further comprises at least one third support pillar positioned between the electronic component and the first metal layer-covered substrate; the at least one third support pillar is disposed on a surface of the electronic component facing the first metal layer-coated substrate or on a surface of the first metal layer-coated substrate facing the electronic component; The power module according to claim 10.

12. The power module according to claim 9 , wherein the material of the support pillar is an electrically conductive material.

13. 13. The power module of claim 12, wherein the material of the support pillar comprises at least one of aluminum, aluminum alloy, gold, gold alloy, copper, copper alloy, nickel, nickel alloy, aluminum-clad copper, high melting point copper-tin alloy, and high temperature solder.

14. 2. The power module of claim 1, further comprising a molding compound filled between the first metal layer-coated substrate and the second metal layer-coated substrate and used to package the first metal layer-coated substrate and the second metal layer-coated substrate with plastic, the molding compound having an elastic modulus of 0.5 GPa to 20 GPa.

15. The power module of claim 14 , wherein the molding compound material comprises an epoxy molding compound.

16. 2. The power module of claim 1, further comprising: a first heat sink located on a side of the first metal layer-coated substrate remote from the second metal layer-coated substrate; and a second heat sink located on a side of the second metal layer-coated substrate remote from the first metal layer-coated substrate.

17. the first heat sink is connected to the first metal layer-coated substrate by welding or sintering; and / or the second heat sink is connected to the second metal layer-covered substrate by welding or sintering; 17. The power module of claim 16.

18. a first support component is present between the first heat sink and the first metal layer coated substrate, the first support component having a plurality of fourth support pillars or metal wires; and / or a second support component is present between the second heat sink and the second metal layer coated substrate, the second support component having a plurality of fifth support pillars or metal wires; 18. The power module according to claim 17.

19. A power supply circuit comprising a circuit board and the power module of claim 1, said power module being electrically connected to said circuit board.

20. A chip including a semiconductor body, the semiconductor body having a first side and a second side opposite each other; each of the first surface and the second surface has a surface electrode having a welded or sintered metal layer and a stress buffer metal layer arranged in a stacked manner; the stress buffer metal layer is located between the semiconductor body and the welded or sintered metal layer on each of the first and second sides; Tips.

21. 21. The chip of claim 20, wherein the material of the stress buffering metal layer is a soft metal, and the hardness of the soft metal is less than HV60.

22. 22. The tip of claim 21, wherein the soft metal comprises at least one of aluminum, aluminum alloys, copper, magnesium alloys, zinc, zinc alloys, silver, silver alloys, gold, and gold alloys.

Images