Wiring board, package for mounting electronic components using wiring board, and electronic module

Abstract

According to one embodiment of the present disclosure, a wiring board comprises a first insulation layer, a second insulation layer, a first line conductor, and a second line conductor. The first insulation layer has a first upper surface, a first lower surface, and one or more opening parts that open at the first upper surface. The second insulation layer has a second upper surface and a second lower surface, the second upper surface being positioned under the first lower surface. The first line conductor is positioned on the second upper surface. The second line conductor is positioned on the second upper surface at an interval from the first line conductor and extends along the first line conductor. At least one of the first line conductor and the second line conductor is signal wiring. In plan view, the second insulation layer has a first region that includes the first line conductor, the second line conductor, and the region that is positioned between the first line conductor and the second line conductor. In plan view, the opening parts are positioned over the first region.

Description

[Technical Field]

[0001] The present disclosure relates to a wiring board, an electronic component mounting package using the wiring board, and an electronic module. [Background technology]

[0002] In recent years, wireless communication devices and optical communication devices have been required to operate at higher frequencies in order to transmit larger volumes of information at higher speeds. Among these, wiring boards having a differential wiring structure are known as wiring structures for transmitting high-speed, high-frequency signals (see Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2020-17830 Summary of the Invention

[0004] A wiring board according to one embodiment of the present disclosure includes a first insulating layer, a second insulating layer, a first line conductor, and a second line conductor. The first insulating layer has a first upper surface, a first lower surface, and one or more openings in the first upper surface. The second insulating layer has a second upper surface and a second lower surface, with the second upper surface overlapping the first lower surface. The first line conductor is located on the second upper surface. The second line conductor is located on the second upper surface at a distance from the first line conductor and extends along the first line conductor. The first conductor and the second conductor are a pair of differential signal wirings. In plan view, the second insulating layer has a first region including a first line conductor, a second line conductor, and a region located between the first line conductor and the second line conductor. When the direction in which the first conductor and the second conductor extend is defined as a first direction and the direction intersecting the first direction is defined as a second direction, In plan view, the opening is: the first conductor is provided continuously from the first line conductor to the second line conductor in the second direction; In the first area a part of the first line conductor and a part of the second line conductor in They are positioned overlapping each other.

[0005] An electronic component mounting package according to an embodiment of the present disclosure includes the wiring board configured as described above, a substrate, and a frame body located on the upper surface of the substrate.

[0006] An electronic module according to one embodiment of the present disclosure includes an electronic component mounting package having the above-described configuration, an electronic component located on the upper surface of the substrate and electrically connected to the wiring board, and a lid located on a frame body and covering the interior of the electronic component mounting package. [Brief explanation of the drawings]

[0007] [Figure 1] 1 is an exploded perspective view of a wiring board according to a first embodiment of the present disclosure. [Figure 2] 2 is an exploded perspective view of the wiring board shown in FIG. 1, seen from a different angle. [Figure 3A] FIG. 2 is a perspective view of the wiring board shown in FIG. [Figure 3B] 3B is a perspective view showing a first insulating layer in the wiring board shown in FIG. 3A. FIG. [Figure 4A] FIG. 2 is a plan view of the wiring board shown in FIG. [Figure 4B] 4B is a plan view showing a first insulating layer in the wiring board shown in FIG. 4A in a see-through manner. FIG. [Figure 5A] 4B is a cross-sectional view of the wiring board shown in FIG. 4A taken along the line X1-X1. [Figure 5B] 10 is a cross-sectional view showing the shape of a first modified example of an opening in a wiring substrate according to an embodiment. FIG. [Figure 5C] 10 is a cross-sectional view showing the shape of a modified example 2 of an opening in a wiring board according to an embodiment. FIG. [Figure 6] 4B is a cross-sectional view showing the shape of a modified example 3 of the opening of the wiring board shown in FIG. 4A. FIG. [Figure 7A] FIG. 10 is a plan view of a wiring substrate according to a second embodiment of the present disclosure. [Figure 7B] 7B is a plan view showing a first insulating layer in the wiring board shown in FIG. 7A in a see-through manner. FIG. [Figure 8A] 7B is a cross-sectional view of the wiring board shown in FIG. 7A taken along the line X2-X2. [Figure 8B] 7B is a cross-sectional view showing a modified shape of the opening of the wiring board shown in FIG. 7A. FIG. [Figure 9A]FIG. 10 is a cross-sectional view of an opening in a wiring substrate according to a third embodiment of the present disclosure. [Figure 9B] FIG. 11 is a cross-sectional view showing the shape of a first modified example of an opening in a wiring substrate according to the third embodiment. [Figure 9C] FIG. 11 is a cross-sectional view showing the shape of a modified example 2 of an opening in a wiring substrate according to the third embodiment. [Figure 10] FIG. 10 is an exploded perspective view of a wiring board according to a fourth embodiment of the present disclosure. [Figure 11A] 11 is a perspective view showing a fourth insulating layer in the wiring board shown in FIG. 10. FIG. [Figure 11B] 11B is a cross-sectional view of the wiring board shown in FIG. 11A taken along the line X3-X3. [Figure 12] 1 is an exploded perspective view of an electronic component mounting package and an electronic module including a wiring board according to a first embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0008] <Wiring board configuration> Hereinafter, several exemplary embodiments of the present disclosure will be described with reference to the drawings. Note that for a wiring board, an electronic component mounting package using the wiring board, and an electronic module, either direction may be considered to be up or down. However, for convenience, a Cartesian coordinate system xyz is defined, and the positive side of the z direction is considered to be up. Hereinafter, the term "first direction" refers to, for example, the x direction in the drawings. In addition, in this disclosure, a plan view is a concept that includes a planar perspective view.

[0009] First Embodiment A wiring board 101a according to a first embodiment of the present disclosure will be described with reference to FIGS. The wiring board 101a includes at least a first insulating layer 1, a second insulating layer 2, a first conductor 51, and a second conductor 52. The wiring board 101a may further include a third conductor 53, a pair of fourth conductors 54, a pair of fifth conductors 55, an insulating film 7, a third insulating layer 3, and a ground conductor layer 6.

[0010] 1 and 2, the first insulating layer 1 has a first upper surface 11, a first lower surface 12, and one or more openings 13 opening into the first upper surface 11. Examples of materials that can be used for the first insulating layer 1 include ceramic materials such as aluminum oxide sintered body, mullite sintered body, silicon carbide sintered body, aluminum nitride sintered body, and silicon nitride sintered body, and dielectric materials such as glass ceramic materials. The first insulating layer 1 may also be configured by laminating multiple insulating layers. The first insulating layer 1 may be, for example, rectangular in plan view, with dimensions of 4 mm x 4 mm to 50 mm x 50 mm and a thickness of 1 mm to 10 mm.

[0011] The second insulating layer 2 has a second upper surface 21 and a second lower surface 22. As shown in FIGS. 1 and 2, the second upper surface 21 is positioned so as to overlap the first lower surface 12 of the first insulating layer 1. The material of the second insulating layer 2 may be the same as or different from the material of the first insulating layer 1, and for example, the same material as the first insulating layer 1 described above may be used. The second insulating layer 2 may be configured by stacking multiple insulating layers. The second insulating layer 2 has, for example, a rectangular shape in a plan view, with dimensions of 4 mm × 4 mm to 50 mm × 50 mm and a thickness of 1 mm to 10 mm. The thickness of the second insulating layer 2 may be the same as or different from the thickness of the first insulating layer 1.

[0012] As shown in FIGS. 1 and 3B , the first conductor 51 is located on the second upper surface 21 of the second insulating layer 2 and extends in the first direction in one embodiment. Examples of materials for the first conductor 51 include metal materials such as gold, silver, copper, nickel, tungsten, molybdenum, and manganese. The first conductor 51 may be formed by sintering a metal paste on the second upper surface 21, or by using a thin-film formation technique such as a vapor deposition method or a sputtering method. Metal plating such as nickel plating or gold plating may be formed on the surface of the first conductor 51. The first conductor 51 has a width of 0.05 mm to 2 mm and a length of 1.5 mm to 25 mm, for example. The first conductor 51 has a thickness of 0.01 to 0.1 mm, for example. The width, length, and thickness of the first conductor 51 referred to here may refer to the dimensions in the y direction, x direction, and z direction, respectively, of the first conductor 51. The widths, lengths, and thicknesses of the second conductor 52 and the third conductor 53, which will be described later, can also be defined in the same way.

[0013] As shown in FIGS. 1 and 3B , the second conductor 52 is located on the second upper surface 21 of the second insulating layer 2 and extends along the first conductor 51 at a distance from the first conductor 51. That is, the second conductor 52 extends parallel to the first conductor 51, and in one embodiment, extends in the first direction. The material of the second conductor 52 may be the same as or different from the material of the first conductor 51, and examples of the material include the same material as the material of the first conductor 51 described above. The second conductor 52 may also be formed by the same method as the first conductor 51 described above. The second conductor 52 has a width of 0.05 mm to 2 mm and a length of 1.5 mm to 25 mm, for example. The second conductor 52 has a thickness of 0.01 mm to 0.1 mm, for example.

[0014] At least one of the first conductor 51 and the second conductor 52 is a signal wiring. That is, one of the first conductor 51 and the second conductor 52 may be a ground wiring. The first conductor 51 and / or the second conductor 52 may be curved along the way. The width of the first conductor 51 and / or the second conductor 52 may vary along the way. The third conductor 53, the pair of fourth conductors 54, and the pair of fifth conductors 55, which will be described later, may also be curved or have a width that varies along the way. In one embodiment, the first line conductor 51 and the second line conductor 52 are signal wirings that transmit signals, and are a pair of differential signal wirings that transmit differential signals. In this case, currents flow in opposite directions, which cancels out magnetic fluxes, thereby reducing EMI noise caused by high-frequency signals and enabling smoother transmission of high-frequency signals.

[0015] As described above, the first embodiment may further include a third conductor 53. As shown in FIGS. 1, 3B, and 4B, the third conductor 53 is located on the second upper surface 21 of the second insulating layer 2, is spaced apart from the first conductor 51, and extends along the first conductor 51 and the second conductor 52. That is, the third conductor 53 extends in the first direction. The material of the third conductor 53 may be the same as or different from the material of the first conductor 51. For example, the material may be the same as or similar to the material of the first conductor 51. The third conductor 53 may be formed using the same or similar method as the first conductor 51. The third conductor 53 has a width of 0.05 mm to 2 mm and a length of 1.5 mm to 25 mm. The third conductor 53 has a thickness of, for example, 0.01 to 0.1 mm. In the first embodiment, the third conductor 53 is a ground wiring.

[0016] When wiring board 101a includes third conductor 53, it is possible to reduce loss in signal transmission that occurs when bending wiring such as first conductor 51 and second conductor 52.

[0017] 1 and 4B , in a plan view, the second insulating layer 2 has a first region 22a including a first conductor 51, a second conductor 52, and a region located between the first conductor 51 and the second conductor 52. That is, the first region 22a includes the first conductor 51, the second conductor 52, and a region sandwiched between the first conductor 51 and the second conductor 52. The outer edge of the first region 22a may coincide with the outer edges of the first conductor 51 and the second conductor 52 at their outermost positions in the y direction.

[0018] In the first embodiment, as described above, the first insulating layer 1 has an opening 13 that is an opening on the first upper surface 11. As shown in Figures 1 and 4B, the opening 13 is located so as to overlap the first region 22a in plan view. The opening 13 is filled with air or a dielectric material such as a resin material or a glass material, and has a lower dielectric constant than the first insulating layer 1 and the second insulating layer 2.

[0019] In wiring board 101a, if first line conductor 51 and second line conductor 52 are positioned between first insulating layer 1 and second insulating layer 2 in a cross-sectional view taken along the x or y direction in order to transmit higher-frequency signals, reflection loss in each line conductor increases. In other words, if first line conductor 51 and second line conductor 52 are used as inner-layer wiring, the first insulating layer 1 and second insulating layer 2, which sandwich first line conductor 51 and second line conductor 52 from above and below, have high dielectric constants, which may result in a decrease in impedance. However, in one embodiment, by positioning openings 13 in first insulating layer 1 as described above, wiring board 101a can reduce the decrease in impedance in first line conductor 51 and second line conductor 52. Therefore, by using wiring board 101a, it is possible to provide electronic component mounting package 100 and electronic module 10 that can reduce loss in high-frequency signal transmission.

[0020] Furthermore, narrowing the spacing between the first conductor 51, the second conductor 52, and the third conductor 53 in plan view increases the likelihood of a decrease in impedance. However, in one embodiment, the first insulating layer 1 has an opening 13 at a position overlapping the first region 22a, thereby reducing the decrease in impedance. Therefore, compared to a case where the opening 13 is not present, the first conductor 51, the second conductor 52, and the third conductor 53 can be arranged closer together while reducing impedance, thereby achieving both a reduction in impedance and a reduction in size of the wiring board 101a. Furthermore, signal transmission loss can be reduced, and the possibility of crosstalk occurring can be reduced.

[0021] The shape of opening 13 will be described. As shown in Fig. 5A, opening 13 may penetrate from first upper surface 11 to first lower surface 12. As shown in Fig. 4A, opening 13 may be, for example, circular in plan view, with a diameter of 0.05 mm to 2 mm and a height of 0.05 mm to 5 mm. Note that opening 13 may also be elliptical, square, or rectangular with rounded corners in plan view.

[0022] When the opening 13 penetrates from the first upper surface 11 to the first lower surface 12, the first insulating layer 1, which has a high dielectric constant, is not located on the first line conductor 51 and / or the second line conductor 52, which serve as signal lines, compared to when the opening 13 has a recessed shape with an opening in the first upper surface 11, so it is possible to further reduce the decrease in impedance.

[0023] FIG. 5B illustrates the shape of a first modified example (opening 13X) of the opening 13 according to an embodiment, and FIG. 5C illustrates the shape of a second modified example (opening 13Y) of the opening 13 according to an embodiment. FIGS. 5B and 5C correspond to the X1-X1 cross-sectional view of FIG. 4A. As shown in FIG. 5B, the opening 13 has tapered sidewalls when viewed cross-sectionally in the x or y direction. Even an opening 13 having such a shape can achieve the above-described effects. Furthermore, when the opening 13 has a shape as shown in FIG. 5C, the first line conductor 51 and the second line conductor 52 are not exposed, eliminating the need for metal plating on the wiring and reducing the occurrence of connection failures due to metal plating. Furthermore, the opening 13 may have an inversely tapered or stepped sidewall when viewed cross-sectionally in the x or y direction. Furthermore, as shown in FIG. 5C, the opening 13 may not penetrate all the way to the first lower surface 12, but may have a recessed shape with an opening in the first upper surface 11. Even an opening 13 having such a shape can achieve the above-described effects. Furthermore, compared to when the opening 13 penetrates the first insulating layer 1, the opening 13 of this shape leaves the first insulating layer 1 on the first line conductor 51 and the second line conductor 52, thereby reducing the possibility of the first line conductor 51 and the second line conductor 52 shorting out.

[0024] Next, a description will be given of the arrangement of the opening 13. In plan view, the opening 13 may be located at least between the first conductor 51 and the second conductor 52 in the first region 22a. Furthermore, in a plan view, the opening 13 may be located in the first region 22a so as to overlap at least the first conductor 51 and the second conductor 52. In this case, in a cross-sectional view in the x or y direction, the first insulating layer 1 with a high dielectric constant located on the first conductor 51 and the second conductor 52 can be reduced, thereby further reducing the decrease in impedance.

[0025] 1, 3A, 3B, 4A, and 4B, the first insulating layer 1 may have a plurality of openings 13 positioned along the direction in which the first conductor 51 and the second conductor 52 extend, specifically along the first direction. In this case, compared to when only one opening 13 is provided along the outer edge of each conductor, it is easier to provide the openings 13 during manufacturing, reducing the possibility of damage to the unsintered ceramic green sheet. Furthermore, it is possible to efficiently reduce a decrease in impedance.

[0026] In one embodiment, as described above, a pair of fourth conductors 54, a pair of fifth conductors 55, an insulating film 7, a third insulating layer 3, and a ground conductor layer 6 may be further provided.

[0027] The pair of fourth conductors 54 is located on the second upper surface 21 of the second insulating layer 2, and is spaced apart on both sides of the first conductor 51 and the second conductor 52, and extends along the first conductor 51. That is, the pair of fourth conductors 54 extends parallel to the first conductor 51, and in one embodiment, extends in the first direction. The material of the pair of fourth conductors 54 may be the same as or different from the material of the first conductor 51, and may be, for example, the same material as the material of the first conductor 51 described above. The pair of fourth conductors 54 may also be formed by the same or similar method as the first conductor 51 described above. Each of the pair of fourth conductors 54 has a width of 0.05 mm to 2 mm and a length of 1.5 mm to 25 mm, for example. The thickness of each of the pair of fourth conductors 54 is, for example, 0.01 to 0.1 mm.

[0028] When the wiring board 101a is provided with a pair of fourth line conductors 54, it is possible to reduce the possibility of crosstalk or resonance occurring when the electric field distribution during transmission of a high-frequency signal becomes wider than the desired range. When the wiring board 101a includes a pair of fourth conductors 54, each of the first conductor 51 and the second conductor 52 may be a pair of differential signal wirings. Furthermore, when the wiring board 101a includes the third conductor 53, the first conductor 51 and the second conductor 52 can each be a signal line, the third conductor 53 can be a ground line, and the pair of fourth conductors 54 can be ground lines.

[0029] The pair of fifth conductors 55 is located on the first upper surface 11 of the first insulating layer 1, and overlaps the pair of fourth conductors 54 in a planar perspective view. The material of the pair of fifth conductors 55 may be the same as or different from the material of the first conductors 51, and may be, for example, the same material as the material of the first conductors 51 described above. The pair of fifth conductors 55 may also be formed by the same method as the first conductors 51 described above. Each of the pair of fifth conductors 55 has a width of 0.05 mm to 2 mm and a length of 1.5 mm to 25 mm, for example. The thickness of each of the pair of fifth conductors 55 is 0.01 to 0.1 mm, for example. When the wiring board 101a includes a pair of fifth line conductors 55, it is possible to reduce the possibility of crosstalk or resonance occurring when the electric field distribution during transmission of a high-frequency signal is wider than the desired range.

[0030] The ground conductor layer 6 is located on the second lower surface 22 of the second insulating layer 2. The material of the ground conductor layer 6 is, for example, a metal material such as tungsten, molybdenum, or manganese, and the surface may be nickel-plated or gold-plated. When the wiring board 101a includes the ground conductor layer 6, the electric field coupling can be strengthened, thereby reducing the possibility of crosstalk or resonance occurring when the electric field distribution during transmission of a high-frequency signal spreads beyond a desired range.

[0031] The third insulating layer 3 is located below the ground conductor layer 6. The material of the third insulating layer 3 may be the same as or different from the material of the first insulating layer 1, and for example, the same material as the first insulating layer 1 described above can be used. The third insulating layer 3 may be configured by stacking multiple insulating layers. The third insulating layer 3 has a rectangular shape in plan view, with dimensions of 4 mm × 4 mm to 50 mm × 50 mm, and a thickness of 1 mm to 10 mm, for example.

[0032] The pair of fourth conductors 54, the pair of fifth conductors 55, and the ground conductor layer 6 may be electrically connected to each other through vias or the like. In this case, the ground potential can be strengthened, and the possibility of crosstalk or resonance occurring when the electric field distribution during transmission of a high-frequency signal spreads beyond a desired range can be reduced.

[0033] The vias electrically connecting the pair of fourth conductors 54, the pair of fifth conductors 55, and the ground conductor layer 6 can be formed, for example, as follows. First, through holes are formed in each of the unsintered ceramic green sheets of the first insulating layer 1 and the second insulating layer 2, and the through holes are filled with a metal paste made of the same or similar metal material as the pair of fourth conductors 54, the pair of fifth conductors 55, and the ground conductor layer 6. The vias can be formed by stacking and pressing the ceramic green sheets, each having through holes filled with the metal paste, and then co-firing them. The through holes can be formed by, for example, mechanical punching using a metal pin or drilling using laser light.

[0034] Finally, a modified example of the wiring board 101a according to the first embodiment will be described with reference to FIG. 6. In the first embodiment, the wiring board 101a may include an insulating film 7 on the first conductor 51 and the second conductor 52, as shown in FIG. 6. Examples of materials for the insulating film 7 include ceramic (e.g., an alumina coating) and resin. The insulating film 7 can be provided on the first conductor 51 and the second conductor 52 by screen printing. In particular, when the opening 13 penetrates from the first upper surface 11 to the second lower surface 22, providing the insulating film 7 can reduce the possibility of a short circuit between the first conductor 51 and the second conductor 52.

[0035] 6, when wiring board 101a includes third conductor 53, insulating films 7 may be provided on first conductor 51, second conductor 52, and third conductor 53. This configuration can reduce the possibility of short-circuiting between first conductor 51, second conductor 52, and third conductor 53.

[0036] Second Embodiment Next, a wiring substrate 101b according to a second embodiment of the present disclosure will be described with reference to Figures 7A, 7B, 8A, and 8B. Note that, in the following, only the configuration of the second embodiment that differs from the configuration of the first embodiment will be described, and the other configurations will be assigned the same reference numerals as in the first embodiment and will not be described.

[0037] The wiring board 101b according to the second embodiment differs from the first embodiment in the shape of the opening 13. That is, in the second embodiment, the opening 13 may have a first opening 131 and a second opening 132, as shown in FIGS. 7A, 7B, and 8A. More specifically, as shown in FIG. 7B, in a plan view, the first opening 131 is positioned to overlap the first line conductor 51, and the second opening 132 is positioned to overlap the second line conductor 52. With this configuration, when the first line conductor 51 and the second line conductor 52 are each signal wiring that transmits a signal and form a pair of differential signal wiring that transmits a differential signal, it is possible to more efficiently reduce a decrease in impedance.

[0038] The shape of first opening 131 may be the same as or different from the shape of second opening 132. The shapes of first opening 131 and second opening 132 can be changed depending on the impedance value required in wiring substrate 101b. Furthermore, it is not necessary for all of the first openings 131 to have the same shape, and it is not necessary for all of the second openings 132 to have the same shape. In the y direction, the first opening 131 and the second opening 132 that are adjacent to each other may have the same shape. In this case, it becomes easier to make the impedance values ​​of the first line conductor 51 and the second line conductor 52 uniform.

[0039] 8B, the wiring substrate 101b may also include an insulating film 7 on the first region 22a in the second embodiment, as in the first embodiment. In the second embodiment, the first insulating layer 1 is located on the third conductor 53, and therefore the insulating film 7 is located on the first conductor 51 and the second conductor 52, but not on the third conductor 53.

[0040] Third Embodiment 9A to 9C, a wiring board 101c according to a third embodiment of the present disclosure will be described. Note that, in the following, only the configuration of the third embodiment that is different from the configuration of the first embodiment will be described, and the other configurations will be assigned the same reference numerals as in the first embodiment and will not be described.

[0041] The wiring board 101c according to the third embodiment differs from the first embodiment in that it further includes a recess 23, which will be described later. That is, in the third embodiment, the second insulating layer 2 may have one or more recesses 23 each having an opening on the second upper surface 21, as shown in Fig. 9A. Specifically, the recess 23 is located between the first line conductor 51 and the second line conductor 52, as shown in Fig. 9A.

[0042] The recess 23 is filled with air or a dielectric material such as a resin material or a glass material, and has a lower dielectric constant than the first insulating layer 1 and the second insulating layer 2. In the third embodiment, the recess 23 of the second insulating layer 2 is positioned so as to overlap the opening 13 of the first insulating layer 1 in a plan view, but the position of the recess 23 is not limited thereto. When the recess 23 of the second insulating layer 2 is positioned so as to overlap the opening 13 of the first insulating layer 1 in a plan view, it is easier to adjust the dielectric constant and a decrease in impedance can be reduced compared to when the recess 23 is not positioned so as to overlap the opening 13.

[0043] Furthermore, the recess 23 may be, for example, circular in plan view, with a diameter of 0.05 mm to 2 mm and a height of 0.05 mm to 5 mm. In plan view, the recess 23 may be elliptical, square, or rectangular with rounded corners. In cross-sectional view in the x or y direction, the recess 23 may be tapered, inversely tapered, or stepped. Furthermore, FIGS. 9B and 9C are diagrams showing modified examples of the recess 23 in the third embodiment. As shown in these figures, the recess 23 may penetrate the second insulating layer 2 from the second upper surface 21 to the second lower surface 22, or multiple recesses 23 may be located between the first line conductor 51 and the second line conductor 52. When the recess 23 penetrates the second insulating layer 2, the amount of the second insulating layer 2 located between the first line conductor 51 and the second line conductor 52 can be reduced, thereby further reducing the impedance drop compared to when the recess 23 does not penetrate.

[0044] In wiring board 101c, if first line conductor 51 and second line conductor 52 are used as inner-layer wiring to transmit higher frequency signals, the impedance will decrease due to the high dielectric constant of first insulating layer 1 and second insulating layer 2, which are positioned above and below first line conductor 51 and second line conductor 52. However, by providing recess 23 as in the third embodiment, wiring board 101c can reduce the decrease in impedance in first line conductor 51, second line conductor 52, or third line conductor 53, and can provide electronic component mounting package 100 and electronic module 10 that can further reduce loss in high frequency signal transmission.

[0045] Furthermore, when the distance between the first conductor 51, the second conductor 52, and the third conductor 53 is narrowed in plan view, the impedance value is likely to decrease. Therefore, by providing the recess 23 in the first region 22a, it is possible to reduce the decrease in impedance. Furthermore, since the first conductor 51, the second conductor 52, and the third conductor 53 can be arranged closer to each other than in the case where the recess 23 is not provided, it is possible to reduce the size of the wiring board 101c.

[0046] <Fourth embodiment> Next, a wiring substrate 101d according to a fourth embodiment of the present disclosure will be described with reference to Fig. 10, Fig. 11A, and Fig. 11B. Note that, in the following, only the configuration of the fourth embodiment that is different from the configuration of the first embodiment will be described, and the other configurations will be assigned the same reference numerals as in the first embodiment and will not be described.

[0047] The wiring board 101d according to the fourth embodiment differs from the first embodiment in that it further includes a fourth insulating layer 4, which will be described later. As shown in Figures 10, 11A, and 11B, the fourth insulating layer 4 is located on the first upper surface 11 of the first insulating layer 1. The material of the fourth insulating layer 4 may be the same as or different from the material of the first insulating layer 1, and for example, the same material as the first insulating layer 1 described above can be used. The fourth insulating layer 4 may be configured by stacking multiple insulating layers. The fourth insulating layer 4 has, for example, a rectangular shape in a plan view, with dimensions of 4 mm x 4 mm to 50 mm x 50 mm, and a thickness of 1 mm to 10 mm.

[0048] When wiring board 101d further includes fourth insulating layer 4, wiring can be further provided on the upper surface of fourth insulating layer 4. When such wiring board 101d is disposed so as to surround the outer edge of the upper surface of substrate 102 together with frame 103, seal ring 105 or lid 106 can be provided on the upper surface of fourth insulating layer 4.

[0049] <Method of manufacturing wiring board> Here, a method for manufacturing the wiring substrate 101a according to an embodiment of the present disclosure will be described. Note that the method for manufacturing the wiring substrate 101a according to the embodiment of the present disclosure is not limited to the following embodiment, and may be manufactured using, for example, a 3D printer.

[0050] (1) First, multiple green sheets are formed. Specifically, for example, a ceramic powder such as boron nitride, aluminum nitride, silicon nitride, silicon carbide, or beryllium oxide is mixed with an organic binder, a plasticizer, or a solvent to obtain a mixture, and the mixture is then layered to produce multiple green sheets. Next, the multiple green sheets are processed using a mold or the like to prepare multiple green sheets each having the outline of the first insulating layer 1, the second insulating layer 2, and the third insulating layer 3 in plan view. Furthermore, when forming a wiring board having a fourth insulating layer 4, as in the fourth embodiment of the present disclosure, a green sheet having the outline of the fourth insulating layer is also prepared. Next, an opening 13 is formed in the green sheet that will become the first insulating layer 1 using a mold, a laser, or the like. When forming a wiring board having a recess 23, the recess 23 is formed in the green sheet that will become the second insulating layer 2, similar to the opening 13.

[0051] When the opening 13 does not penetrate the first insulating layer 1, the first insulating layer 1 can be formed by laminating a green sheet having a through-hole and a green sheet having no through-hole. Also, when the recess 23 does not penetrate the second insulating layer 2, it can be formed in the same manner as the opening 13 in the first insulating layer 1. When the opening 13 in the first insulating layer 1 penetrates the first insulating layer 1, the opening 13 may be formed by punching a green sheet formed to the outer shape of the first insulating layer 1 using a die, or by using a laser or the like. In this process, through holes to become vias or the like may be formed in the green sheets having the outer shapes of the first insulating layer 1, the second insulating layer 2, the third insulating layer 3, and the fourth insulating layer 4, respectively, using a die or a laser or the like.

[0052] (2) A high-melting-point metal powder such as tungsten or molybdenum is prepared, and an organic binder, plasticizer, or solvent is added to and mixed with this powder to prepare a metal paste. The metal paste is then printed in a predetermined pattern on multiple green sheets formed to the outer shapes of the first insulating layer 1, the second insulating layer 2, the third insulating layer 3, and the fourth insulating layer 4, respectively, to form the first line conductor 51, the second line conductor 52, the third line conductor 53, a pair of fourth line conductors 54, and a pair of fifth line conductors 55. The metal paste may contain glass or ceramics to enhance the bonding strength with each insulating layer. Furthermore, vias and the like can be formed by filling the through holes created in the above process with the metal paste.

[0053] (3) Next, a method for producing the ground conductor layer 6 will be described. If the ground conductor layer 6 is a metallized layer made of a high-melting-point metal such as tungsten, molybdenum, or manganese, it can be formed as follows. That is, first, a metal paste is prepared by kneading a powder of the high-melting-point metal with an organic solvent and a binder until the powder is thoroughly mixed. The metal paste is then printed by screen printing or another method on a predetermined portion of the ceramic green sheet that will become the lower surface of the second insulating layer 2 or the upper surface of the third insulating layer 3.

[0054] (4) A green sheet laminate is formed by stacking the green sheets formed to the respective contours of the first insulating layer 1, the second insulating layer 2, the third insulating layer 3, and the fourth insulating layer 4 so that their outer edges coincide with the outer edge of the ground conductor layer 6. After forming the green sheet laminate, a metal paste may be printed in a predetermined pattern to form a pair of fifth line conductors 55 and other wiring.

[0055] (5) The green sheet laminate is fired to sinter the plurality of green sheets, thereby obtaining wiring substrate 101a.

[0056] <Configuration of electronic component mounting package> 12, electronic component mounting package 100 includes wiring board 101a, substrate 102, and frame 103. Frame 103 is bonded to the upper surface of substrate 102, and wiring board 101a is fixed to frame 103.

[0057] The substrate 102 has an upper surface. For example, the substrate 102 has a rectangular shape in plan view, with dimensions of 10 mm × 10 mm to 50 mm × 50 mm and a thickness of 0.5 mm to 20 mm. Examples of materials for the substrate 102 include metal materials such as copper, iron, tungsten, molybdenum, nickel, and cobalt, as well as alloys containing these metal materials. In this case, the substrate 102 may be a single metal plate or a laminate of multiple metal plates. Furthermore, when the substrate 102 is made of any of the above metal materials, a plating layer of nickel, gold, or the like may be formed on the surface of the substrate 102 by electroplating or electroless plating to reduce oxidation corrosion. Furthermore, the substrate 102 may be made of an insulating material, such as an aluminum oxide sintered body, a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body, a silicon nitride sintered body, or a ceramic material such as glass ceramics.

[0058] The frame 103 is located on the upper surface of the substrate 102 and protects the electronic components 104 located inside in a plan view. That is, in a plan view, the frame 103 is located so as to surround the electronic components 104. The frame 103 may be located along the outer edge of the upper surface of the substrate 102, or may be located inside the outer edge of the upper surface of the substrate 102. The frame 103 does not have to surround the entire outer edge of the upper surface of the substrate 102. That is, as shown in FIG. 12 , in one embodiment, the frame 103 is not located on one side of the outer edge of the upper surface of the substrate 102. The outer edge of the upper surface of the substrate 102 is surrounded by the frame 103 and the wiring substrate 101a.

[0059] The material of the frame 103 may be, for example, a metal material such as copper, iron, tungsten, molybdenum, nickel, or cobalt, or an alloy containing these metal materials. The material of the frame 103 may also be an insulating material, such as an aluminum oxide sintered body, a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body, a silicon nitride sintered body, or a ceramic material such as glass ceramics.

[0060] The frame 103 can be joined to the substrate 102 via a brazing material or the like. The brazing material may be, for example, silver, copper, gold, aluminum, or magnesium, and may contain additives such as nickel, cadmium, or phosphorus.

[0061] <Electronic module configuration> 12, the electronic module 10 includes an electronic component mounting package 100, an electronic component 104, and a lid 106. The electronic module 10 may also include a seal ring 105.

[0062] The electronic component 104 may be a component that processes signals, such as converting an optical signal to an electrical signal or an electrical signal to an optical signal. The electronic component 104 is located on the upper surface of the substrate 102 and is housed in the electronic component mounting package 100. Examples of the electronic component 104 include optical semiconductor elements such as semiconductor lasers (LD: Laser Diodes) or photodiodes (PD: Photo Diodes), semiconductor integrated circuit elements, and sensor elements such as optical sensors. The electronic component 104 can be formed from a semiconductor material such as gallium arsenide or gallium nitride.

[0063] Lid 106 is positioned on frame 103 to cover the interior of electronic component mounting package 100 and, together with frame 103, protects electronic component 104. Lid 106 is, for example, rectangular in plan view, measuring 10 mm × 10 mm to 50 mm × 50 mm and 0.5 mm to 2 mm in thickness. Examples of materials for lid 106 include metal materials such as iron, copper, nickel, chromium, cobalt, molybdenum, and tungsten, as well as alloys made up of a combination of these metal materials. The metal member that constitutes lid 106 can be produced by subjecting an ingot of such a metal material to metalworking methods such as rolling and punching.

[0064] The seal ring 105 functions to join the lid 106 and the frame 103. The seal ring 105 is located on the frame 103 and surrounds the electronic component 104 in a plan view. Examples of materials for the seal ring 105 include metal materials such as iron, copper, silver, nickel, chromium, cobalt, molybdenum, and tungsten, as well as alloys made by combining a plurality of these metal materials. Note that if the seal ring 105 is not provided on the frame 103, the lid 106 may be joined via a joining material such as solder, brazing material, glass, or a resin adhesive.

[0065] The present disclosure is not limited to the above-described embodiments, modifications, and examples, and various modifications are possible within the scope of the gist of the present disclosure. Furthermore, various combinations of the characteristic parts in each embodiment are not limited to the examples of the above-described embodiments, and combinations of the respective embodiments are also possible. [Industrial Applicability]

[0066] The present disclosure can be used as a wiring board, an electronic component mounting package using the wiring board, and an electronic module. [Explanation of symbols]

[0067] 1 First insulating layer 11 1st top surface 12 1st bottom surface 13X~Y opening 131 First Opening 132 Second Opening 2 Second insulating layer 21 2nd top surface 22 2nd bottom surface 22a 1st area 23a~b Recess 3 Third insulating layer 4 Fourth insulating layer 51 First line conductor 52 Second line conductor 53 Third line conductor 54 Pair of fourth line conductors 55 Pair of fifth line conductors 6 Ground conductor layer 7. Insulating film 10 Electronic Module 100 Electronic component mounting package 101a~d wiring board 102 Circuit Board 103 Frame 104 Electronic Components 105 Seal ring 106 Lid

Claims

1. a first insulating layer having a first upper surface, a first lower surface, and one or more openings having openings in the first upper surface; a second insulating layer having a second upper surface and a second lower surface, the second upper surface overlapping the first lower surface; and a first line conductor located on the second upper surface; a second line conductor located on the second top surface at a distance from the first line conductor and extending along the first line conductor; the first line conductor and the second line conductor are a pair of differential signal wirings, In a plan view, the second insulating layer has a first region including the first line conductor, the second line conductor, and a region located between the first line conductor and the second line conductor, a wiring board, wherein, when a direction in which the first line conductor and the second line conductor extend is defined as a first direction and a direction intersecting the first direction is defined as a second direction, in a plan view, the opening is provided continuously from the first line conductor to the second line conductor in the second direction and is positioned so as to overlap with a portion of the first line conductor and a portion of the second line conductor in the first region.

2. The wiring board according to claim 1 , wherein the opening penetrates from the first upper surface to the first lower surface.

3. The wiring board according to claim 1 , wherein the opening is located between the first conductor and the second conductor in a plan view.

4. The wiring board according to claim 1 , wherein the first insulating layer has a plurality of the openings positioned side by side along the first direction in plan view.

5. 3. The wiring board according to claim 1, wherein, in a plan view, the second insulating layer further includes one or more recesses having openings in the second upper surface between the first line conductor and the second line conductor.

6. 3. The wiring board according to claim 1, further comprising an insulating film on the first line conductor and the second line conductor.

7. a third line conductor is further provided on the second top surface, the third line conductor being located between the first line conductor and the second line conductor and spaced apart from the first line conductor and the second line conductor, and extending along the first line conductor and the second line conductor; the third line conductor is a ground wiring, 3. The wiring board according to claim 1, wherein the first conductor and the second conductor are signal wirings.

8. The wiring board according to claim 7 , further comprising an insulating film on the first line conductor, the second line conductor, and the third line conductor.

9. a pair of fourth conductors are further provided on the second top surface, the fourth conductors being spaced apart from the first conductor and the second conductor so as to sandwich the first conductor and the second conductor, and extending along the first conductor and the second conductor; The wiring board according to claim 1 , wherein the pair of fourth conductors are ground wirings.

10. further comprising a pair of fifth line conductors located on the first top surface, The wiring board according to claim 9 , wherein the pair of fifth conductors are ground wirings positioned to overlap the pair of fourth conductors in a plan view.

11. a ground conductor layer located on the second lower surface; 3. The wiring board according to claim 1, further comprising: a third insulating layer located below the ground conductor layer.

12. The wiring board according to claim 1 , further comprising a fourth insulating layer located on the first upper surface.

13. A wiring board as described in claim 1 or 2, wherein, in a plan view, the shape of the opening is circular, elliptical, or rectangular with rounded corners.

14. A substrate; a frame body joined to an upper surface of the substrate; An electronic component mounting package comprising: the wiring board according to claim 1 or 2 fixed to the frame.

15. The electronic component mounting package according to claim 14; an electronic component located on the upper surface of the substrate and electrically connected to the wiring substrate of the electronic component mounting package; and a lid positioned on the frame and covering the inside of the electronic component mounting package.

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