Semiconductor device and manufacturing method thereof

The semiconductor device design with specific semiconductor and insulating region configurations and a trench-type gate electrode structure addresses challenges of high breakdown voltage and stable threshold voltage, while suppressing current collapse, enhancing overall device performance.

JP7756760B2Active Publication Date: 2025-10-20KK TOSHIBA
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Patent Information

Application Number
JP2024109332
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2021-01-20
Filing Date
2024-07-08
Publication Date
2025-10-20
Estimated Expiration
2041-07-13

AI Technical Summary

Technical Problem

Existing semiconductor devices face challenges in improving characteristics such as high breakdown voltage, stable threshold voltage, and suppressing current collapse.

Method used

A semiconductor device design incorporating specific semiconductor and insulating regions with varying nitrogen and hydrogen concentrations, along with a trench-type gate electrode structure, enhances breakdown voltage and stabilizes threshold voltage while suppressing current fluctuations.

Benefits of technology

The design achieves high breakdown voltage, stable threshold voltage, and reduces current collapse, thereby improving overall device characteristics.

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Abstract

To provide a semiconductor device that can improve its characteristics, and a method for manufacturing the same.SOLUTION: The semiconductor device according to an embodiment includes first to third electrodes, first and second semiconductor regions, and first and second insulating members. The first semiconductor region includes Alx1Ga1-x1 N (0≤x1<1). The second semiconductor region includes Alx2Ga1-x2 N (x1<x2≤1). The first insulating member includes at least one of silicon and aluminum and oxygen. The second insulating member contains silicon and nitrogen. The second insulating member includes a first insulating region and a second insulating region. The second insulating region has at least one of a second nitrogen concentration higher than a first nitrogen concentration in the first insulating region, a second hydrogen concentration lower than the first hydrogen concentration in the first insulating region, and a second density higher than a first density in the first insulating region.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] FIELD Embodiments of the present invention relate to a semiconductor device and a manufacturing method thereof. [Background technology]

[0002] For example, in semiconductor devices such as transistors, improvements in characteristics are desired. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2020-150141 Summary of the Invention [Problem to be solved by the invention]

[0004] The embodiments of the present invention provide a semiconductor device capable of improving characteristics and a method for manufacturing the same. [Means for solving the problem]

[0005] According to an embodiment of the present invention, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor region, a second semiconductor region, a first insulating member, and a second insulating member. A direction from the first electrode to the second electrode is along a first direction. The third electrode includes a first electrode portion. A position of the first electrode portion in the first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The first semiconductor region is made of Al x1 Ga 1-x1It includes N(0≦x1<1). The first semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region. The direction from the first partial region to the first electrode is along a second direction that intersects the first direction. The direction from the second partial region to the second electrode is along the second direction. The direction from the third partial region to the first electrode portion is along the second direction. The fourth partial region is between the first partial region and the third partial region in the first direction. The fifth partial region is between the third partial region and the second partial region in the first direction. The second semiconductor region contains Al x2 Ga 1-x2 It includes N(x1<x2≦1). The second semiconductor region includes a first semiconductor portion and a second semiconductor portion. The direction from the fourth partial region to the first semiconductor portion is along the second direction. The direction from the fifth partial region to the second semiconductor portion is along the second direction. The first insulating member contains at least one of silicon and aluminum and oxygen. The first insulating member includes a first insulating portion. The first insulating portion is between the third partial region and the first electrode portion. The second insulating member contains silicon and nitrogen. The second insulating member includes a first insulating region and a second insulating region. The position of the first insulating region in the first direction is between the position of the first electrode in the first direction and the position of the first electrode portion in the first direction. The position of the second insulating region in the first direction is between the position of the first insulating region in the first direction and the position of the first electrode portion in the first direction. The first semiconductor portion is between the fourth partial region and the first insulating region, and between the fourth partial region and the second insulating region. The second insulating region has at least one of a second nitrogen concentration higher than the first nitrogen concentration in the first insulating region, a second hydrogen concentration lower than the first hydrogen concentration in the first insulating region, and a second density higher than the first density in the first insulating region.

Brief Description of the Drawings

[0006] [Figure 1]FIG. 1 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 2] FIG. 2 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 3] 3(a) and 3(b) are graphs illustrating the characteristics of the semiconductor device. [Figure 4] FIG. 4 is a graph illustrating the characteristics of the semiconductor device. [Figure 5] FIG. 5 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 6] FIG. 6 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 7] FIG. 7 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 8] FIG. 8 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 9] FIG. 9 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 10] 10(a) to 10(d) are schematic cross-sectional views illustrating the method for manufacturing the semiconductor device according to the second embodiment. [Figure 11] 11(a) to 11(d) are schematic cross-sectional views illustrating the method for manufacturing the semiconductor device according to the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc. are not necessarily the same as those in reality. Even when the same part is shown, the dimensions and ratios may be different depending on the drawing. In this specification and in each drawing, elements similar to those previously described with reference to the previous drawings are designated by the same reference numerals, and detailed descriptions thereof will be omitted where appropriate.

[0008] (First embodiment) FIG. 1 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. As shown in FIG. 1, the semiconductor device 110 according to the embodiment includes a first electrode 51, a second electrode 52, a third electrode 53, a first semiconductor region 10, a second semiconductor region 20, a first insulating member 41, and a second insulating member 42.

[0009] The direction from the first electrode 51 to the second electrode 52 is along the first direction. The first direction is the X-axis direction. One direction perpendicular to the X-axis direction is the Z-axis direction. The direction perpendicular to the X-axis and Z-axis directions is the Y-axis direction.

[0010] The third electrode 53 includes a first electrode portion 53a. The position of the first electrode portion 53a in the first direction (X-axis direction) is between the position of the first electrode 51 in the first direction and the position of the second electrode 52 in the first direction.

[0011] The first semiconductor region 10 is Al x1 Ga 1-x1 The composition ratio x1 is, for example, equal to or greater than 0 and less than 0.1. The first semiconductor region 10 includes, for example, GaN.

[0012] The first semiconductor region 10 includes a first partial region 11, a second partial region 12, a third partial region 13, a fourth partial region 14, and a fifth partial region 15. The direction from the first partial region 11 to the first electrode 51 is along a second direction that intersects with the first direction. The second direction is, for example, the Z-axis direction. The direction from the second partial region 12 to the second electrode 52 is along the second direction. The direction from the third partial region 13 to the first electrode portion 53a is along the second direction. The fourth partial region 14 is located between the first partial region 11 and the third partial region 13 in the first direction (the X-axis direction). The fifth partial region 15 is located between the third partial region 13 and the second partial region 12 in the first direction.

[0013] The second semiconductor region 20 is Al x2 Ga 1-x2It includes N(x1 < x2 ≤ 1). The composition ratio x2 is, for example, 0.1 or more and 0.35 or less. The second semiconductor region 20 is, for example, AlGaN. An AlN-containing region may be provided between the first semiconductor region 10 and the second semiconductor region 20. The thickness (length in the Z-axis direction) of the AlN-containing region is, for example, 1.5 nm or less.

[0014] The second semiconductor region 20 includes a first semiconductor portion 21 and a second semiconductor portion 22. The direction from the fourth partial region 14 to the first semiconductor portion 21 is along the second direction (for example, the Z-axis direction). The direction from the fifth partial region 15 to the second semiconductor portion 22 is along the second direction.

[0015] In this example, the semiconductor device 110 includes a substrate 18s and a nitride layer 18b. The substrate 18s may be, for example, a substrate. The substrate 18s may be, for example, a silicon substrate or the like. The nitride layer 18b is provided on the substrate 18s. The first semiconductor region 10 is provided on the nitride layer 18b. The second semiconductor region 20 is provided on the first semiconductor region 10. The nitride layer 18b is, for example, a buffer layer. The nitride layer 18b contains Al, Ga, and nitrogen. The first semiconductor region 10 and the second semiconductor region 20 are, for example, included in the semiconductor member 10M.

[0016] The first insulating member 41 contains at least one of silicon and aluminum and oxygen. The first insulating member 41 includes, for example, SiO2, Al2O3, or AlSiO. The first insulating member 41 may contain nitrogen. The first insulating member 41 may contain AlON or SiON. The thickness of the first insulating member 41 is, for example, 20 nm or more and 150 nm or less. Such a thickness provides a high breakdown voltage and a low channel resistance.

[0017] The first insulating member 41 includes a first insulating portion 41a. The first insulating portion 41a is between the third partial region 13 and the first electrode portion 53a.

[0018] The second insulating member 42 contains silicon and nitrogen. The concentration of nitrogen in the second insulating member 42 is higher than the concentration of nitrogen in the first insulating member 41. The concentration of oxygen in the first insulating member 41 is higher than the concentration of oxygen in the second insulating member 42.

[0019] The second insulating member 42 includes a first insulating region 42a and a second insulating region 42b. The position of the first insulating region 42a in the first direction (X-axis direction) is between the position of the first electrode 51 in the first direction and the position of the first electrode portion 53a in the first direction. The position of the second insulating region 42b in the first direction is between the position of the first insulating region 42a in the first direction and the position of the first electrode portion 53a in the first direction. The first semiconductor portion 21 is between the fourth partial region 14 and the first insulating region 42a, and between the fourth partial region 14 and the second insulating region 42b.

[0020] For example, the distance between the first electrode 51 and the first electrode portion 53 a is longer than the distance between the first electrode portion 53 a and the second electrode 52 .

[0021] The first electrode 51 is electrically connected to, for example, at least one of the first partial region 11 and the first semiconductor portion 21. The second electrode 52 is electrically connected to, for example, at least one of the second partial region 12 and the second semiconductor portion 22.

[0022] The current flowing between the first electrode 51 and the second electrode 52 can be controlled by the potential of the third electrode 53. The potential of the third electrode 53 is, for example, a potential based on the potential of the second electrode 52. The first electrode 51 is, for example, a drain electrode. The second electrode 52 is, for example, a source electrode. The third electrode 53 is, for example, a gate electrode. The first insulating portion 41a functions as, for example, a gate insulating film.

[0023] For example, the semiconductor device 110 is a transistor. A carrier region (for example, two-dimensional electron gas) is formed in a portion of the first semiconductor region 10 facing the second semiconductor region 20. For example, the semiconductor device 110 is a HEMT (High Electron Mobility Transistor).

[0024] In the embodiment, for example, the material of the second insulating region 42b is different from the material of the first insulating region 42a. In the embodiment, the second insulating region 42b has at least one of a second nitrogen concentration higher than the first nitrogen concentration in the first insulating region 42a, a second hydrogen concentration lower than the first hydrogen concentration in the first insulating region 42a, and a second density higher than the first density in the first insulating region 42a. Such a second insulating member 42 can, for example, suppress fluctuations in threshold voltage, stabilize the threshold voltage, suppress current collapse, and achieve a high breakdown voltage, for example.

[0025] For example, the second nitrogen concentration in the second insulating region 42b close to the third electrode 53 is higher than the first nitrogen concentration in the first insulating region 42a. This makes it easier to obtain a high breakdown voltage. For example, the second hydrogen concentration in the second insulating region 42b close to the third electrode 53 is lower than the first hydrogen concentration in the first insulating region 42a. This makes it easier to obtain a high breakdown voltage. For example, the second density in the second insulating region 42b close to the third electrode 53 is higher than the first density in the first insulating region 42a. This makes it easier to obtain a high breakdown voltage. According to the embodiment, it is possible to provide a semiconductor device that can improve its characteristics.

[0026] For example, the first nitrogen concentration in the first insulating region 42a close to the first electrode 51 is lower than the second nitrogen concentration in the second insulating region 42b. This makes it easier to suppress current collapse. For example, the first hydrogen concentration in the first insulating region 42a close to the first electrode 51 is higher than the second hydrogen concentration in the second insulating region 42b. This makes it easier to suppress current collapse. For example, the first density in the first insulating region 42a close to the first electrode 51 is lower than the second density in the second insulating region 42b. This makes it easier to suppress current collapse. According to the embodiment, it is possible to provide a semiconductor device capable of improving characteristics.

[0027] For example, the ratio of the concentration of silicon to the concentration of nitrogen in the second insulating region 42b is less than 0.75. The second insulating region 42b is, for example, nitrogen-rich silicon nitride.

[0028] For example, the ratio of the concentration of silicon to the concentration of nitrogen in the first insulating region 42a is greater than 0.75. The first insulating region 42a is, for example, silicon-rich silicon nitride.

[0029] In one example, such a second insulating member 42 is obtained by separately forming a film that will become the first insulating region 42a and a film that will become the second insulating region 42b when forming the second insulating member 42.

[0030] In the embodiment, the boundary between the first insulating region 42a and the second insulating region 42b may be clear or unclear, and as will be described later, a region with intermediate properties may be provided between these insulating regions.

[0031] 1, the second insulating member 42 may include a third insulating region 42c and a fourth insulating region 42d. The position of the third insulating region 42c in the first direction (X-axis direction) is between the position of the first electrode portion 53a in the first direction and the position of the second electrode 52 in the first direction. The position of the fourth insulating region 42d in the first direction is between the position of the third insulating region 42c in the first direction and the position of the second electrode 52 in the first direction. The second semiconductor portion 22 is between the fifth partial region 15 and the third insulating region 42c, and between the fifth partial region 15 and the fourth insulating region 42d.

[0032] The third insulating region 42c has at least one of a third nitrogen concentration higher than the fourth nitrogen concentration in the fourth insulating region 42d, a third hydrogen concentration lower than the fourth hydrogen concentration in the fourth insulating region 42d, and a third density higher than the fourth density in the fourth insulating region 42d. This third insulating region 42c facilitates obtaining a high breakdown voltage. For example, gate leakage current can be reduced.

[0033] For example, the material of the third insulating region 42c may be substantially the same as the material of the second insulating region 42b, and the material of the fourth insulating region 42d may be substantially the same as the material of the first insulating region 42a.

[0034] For example, the ratio of the silicon concentration to the nitrogen concentration in the third insulating region 42c is lower than 0.75, and for example, the ratio of the silicon concentration to the nitrogen concentration in the fourth insulating region 42d is higher than 0.75.

[0035] As shown in FIG. 1, in this example, at least a portion of the first electrode portion 53a is located between the first semiconductor portion 21 and the second semiconductor portion 22 in the first direction (X-axis direction). For example, at least a portion of the first electrode portion 53a is located between the fourth partial region 14 and the fifth partial region 15 in the first direction. The third electrode 53 is, for example, a trench-type gate electrode. For example, a high threshold voltage is easily obtained. For example, normally-off characteristics are obtained.

[0036] In this example, the third electrode 53 further includes a second electrode portion 53b. A portion of the first semiconductor portion 21 is located between the fourth sub-region 14 and the second electrode portion 53b. The second electrode portion 53b is, for example, an overhanging portion. At least a portion of the second insulating region 42b is located between a portion of the first semiconductor portion 21 and the second electrode portion 53b.

[0037] In this example, the third electrode 53 further includes a third electrode portion 53c. A portion of the second semiconductor portion 22 is located between the fifth sub-region 15 and the third electrode portion 53c. The third electrode portion 53c is, for example, an overhanging portion. At least a portion of the third insulating region 42c is located between a portion of the second semiconductor portion 22 and the third electrode portion 53c.

[0038] By providing the second electrode portion 53b and the third electrode portion 53c, for example, low electrical resistance can be obtained in the third electrode 53. When such an overhanging portion is provided, the second insulating region 42 as described above b By providing the third insulating region 42c, a high breakdown voltage and a stable threshold voltage can be easily obtained.

[0039] 1, the first insulating member 41 includes a second insulating portion 41b and a third insulating portion 41c. The second insulating portion 41b is located between the first semiconductor portion 21 and the first electrode portion 53a. The third insulating portion 41c is located between the first electrode portion 53a and the second semiconductor portion 22.

[0040] 1, the first insulating member 41 may include a fourth insulating portion 41d and a fifth insulating portion 41e. For example, the first insulating region 42a is located between the first semiconductor portion 21 and the fourth insulating portion 41d. The fourth insulating region 42d is located between the second semiconductor portion 22 and the fifth insulating portion 41e.

[0041] 1, in this example, the semiconductor device 110 further includes a nitride member 30. The nitride member 30 is made of Al x3 Ga 1-x3It includes N(x2 < x3 ≤ 1). The composition ratio x3 is, for example, 0.8 or more and 1 or less. The nitride member 30 is, for example, AlN. At least a part of the nitride member 30 is between the third partial region 13 and the first insulating portion 41a. By providing the nitride member 30, higher electron mobility can be obtained. For example, a lower on-resistance can be obtained. The thickness of the nitride member 30 is, for example, 1.5 nm or more and 10 nm or less. By the thickness of the nitride member 30 being 1.5 nm or more, for example, high channel mobility can be obtained. By the thickness of the nitride member 30 being 10 nm or less, for example, the nitride member 30 becomes stable and the gate leakage current is suppressed.

[0042] A part of the nitride member 30 may be provided, for example, between the fourth partial region 14 and the first electrode portion 53a. A part of the nitride member 30 may be provided, for example, between the first electrode portion 53a and the fifth partial region 15. A part of the nitride member 30 may be provided, for example, between the first semiconductor portion 21 and the first electrode portion 53a. A part of the nitride member 30 may be provided, for example, between the 1 electrode portion 53a and the second semiconductor portion 22.

[0043] For example, the first insulating region 42a may be provided between the first semiconductor portion 21 and a part of the nitride member 30. The second insulating region 42b may be provided between the first semiconductor portion 21 and a part of the nitride member 30. The third insulating region 42c may be provided between the second semiconductor portion 22 and a part of the nitride member 30. The fourth insulating region 42d may be provided between the second semiconductor portion 22 and a part of the nitride member 30.

[0044] FIG. 2 is a schematic cross-sectional view illustrating a semiconductor device according to the first embodiment. 2, the semiconductor device 111 according to the embodiment also includes a first electrode 51, a second electrode 52, a third electrode 53, a first semiconductor region 10, a second semiconductor region 20, a first insulating member 41, and a second insulating member 42. In the semiconductor device 111, the thickness of the first insulating region 42a is different from the thickness of the second insulating region 42b, and the thickness of the fourth insulating region 42d is different from the thickness of the third insulating region 42c. Other configurations of the semiconductor device 111 may be similar to those of the semiconductor device 110.

[0045] As shown in FIG. 1, the thickness of the first insulating region 42a along the second direction (Z-axis direction) is defined as the first thickness t1. The thickness of the second insulating region 42b along the second direction is defined as the second thickness t2. The thickness of the third insulating region 42c along the second direction is defined as the third thickness t3. The thickness of the fourth insulating region 42d along the second direction is defined as the fourth thickness t4. In this example, the second thickness t2 is thinner than the first thickness t1. The third thickness t3 is thinner than the fourth thickness t4. The third thickness t3 may be substantially the same as the second thickness t2. The fourth thickness t4 may be substantially the same as the first thickness t1.

[0046] The second thickness t2 is small, which further suppresses fluctuations in the threshold voltage. The third thickness t3 is small, which further suppresses fluctuations in the threshold voltage.

[0047] For example, the second thickness t2 is 5 nm or less. For example, the ratio of the second thickness t2 to the first thickness t1 is 0.5 or less. For example, the first thickness t1 is more than 5 nm and 150 nm or less.

[0048] 3(a) and 3(b) are graphs illustrating the characteristics of the semiconductor device. The horizontal axis of FIG. 3(a) represents the second thickness t2. The horizontal axis of FIG. 3(b) represents the thickness ratio Rt1. The thickness ratio Rt1 is the ratio of the second thickness t2 to the first thickness t1 (i.e., t2 / t1). The vertical axis of these figures represents the variation VC1 of the threshold voltage when a voltage stress is applied to the third electrode 53. In this example, a voltage of +15 V is applied to the third electrode 53 for a period of 1000 seconds as the voltage stress. The variation VC1 is the difference between the threshold voltage before and after the voltage stress is applied. The measurement temperature is 150°C. In these figures, the condition where the second thickness t2 is 0 corresponds to the case where the second insulating region 42b is not provided.

[0049] As shown in Figure 3(a), when the second thickness t2 is greater than 0, the fluctuation amount VC1 increases as the second thickness t2 increases. The second thickness t2 is preferably, for example, 5 nm or less. The second thickness t2 may be, for example, 3.5 nm or less. This allows the fluctuation amount VC1 to be reduced.

[0050] As shown in Fig. 3(b), as the thickness ratio Rt1 increases, the fluctuation amount VC1 increases. The thickness ratio Rt1 is preferably, for example, 0.5 or less. The thickness ratio Rt1 may be, for example, 0.3 or less. This allows the fluctuation amount VC1 to be reduced.

[0051] FIG. 4 is a graph illustrating the characteristics of the semiconductor device. FIG. 4 illustrates the characteristics when a negative voltage is applied to the third electrode 53. The horizontal axis of FIG. 4 represents the negative voltage -Vg applied to the third electrode 53. The vertical axis represents the leakage current IL between the third electrode 53 and the second electrode 52. In this measurement, the potential of the first electrode 51 is the same as the potential of the second electrode 52. FIG. 4 also illustrates the characteristics when the second thickness t2 is changed. The condition where the second thickness t2 is 0 corresponds to the case where the second insulating region 42b is not provided.

[0052] As shown in FIG. 4, when the second thickness t2 is 0 and the second insulating region 42b is not provided, the leakage current IL increases rapidly when the absolute value of the negative voltage -Vg is approximately 145 V. The rapid increase in the leakage current IL corresponds to the breakdown of the semiconductor device. In this embodiment, the second thickness t2 is preferably greater than 0 nm. For example, the second thickness t2 is preferably 0.5 nm or greater. For example, the second thickness t2 may be 1 nm or greater.

[0053] FIG. 5 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 5, the semiconductor device 112 according to the embodiment includes a first electrode 51, a second electrode 52, a third electrode 53, a first semiconductor region 10, a second semiconductor region 20, a first insulating member 41, and a second insulating member 42, as well as a first conductive member 61 and a third insulating member 43. Other configurations of the semiconductor device 112 may be similar to those of the semiconductor device 111.

[0054] In the semiconductor device 112, at least a portion of the first insulating region 42a is located between the first semiconductor portion 21 and the first conductive member 61.

[0055] The first conductive member 61 is electrically connected to either the second electrode 52 or the third electrode 53. Alternatively, it can be electrically connected to either the second electrode 52 or the third electrode 53. For example, the first conductive member 61 is electrically connected to either the second electrode 52 or the third electrode 53 by a connection member 61C. In the example of FIG. 5, the first conductive member 61 is electrically connected to the second electrode 52 by the connection member 61C. The connection member 61C may be provided at a position different from that shown in the cross section of FIG. 5. For example, a terminal 61T electrically connected to the first conductive member 61 may be provided. For example, a terminal 52T electrically connected to the second electrode 52 may be provided. These terminals may be electrically connected by the connection member 61C.

[0056] For example, the first conductive member 61 can function as a field plate. For example, it can suppress the concentration of an electric field. For example, it can obtain a high breakdown voltage. For example, it can suppress current collapse.

[0057] For example, an electric capacitance is formed between the first conductive member 61 and the carrier region. The thick first insulating region 42a increases the distance between the first conductive member 61 and the carrier region. The thick first insulating region 42a can reduce the electric capacitance. The parasitic capacitance can be reduced. For example, good switching characteristics can be easily obtained. For example, switching loss can be reduced.

[0058] FIG. 6 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 6, the semiconductor device 113 according to the embodiment also includes a first electrode 51, a second electrode 52, a third electrode 53, a first semiconductor region 10, a second semiconductor region 20, a first insulating member 41, and a second insulating member 42. In the semiconductor device 113, the second insulating member 42 includes a fifth insulating region 42e and 6 The insulating region 42f is included. The other configuration of the semiconductor device 113 may be the same as the configuration of the semiconductor device 111 (or the semiconductor device 110).

[0059] The first insulating region 42a is located between the first semiconductor portion 21 and the fifth insulating region 42e. The fifth insulating region 42e has at least one of a fifth nitrogen concentration higher than the first nitrogen concentration, a fifth hydrogen concentration lower than the first hydrogen concentration, and a fifth density higher than the first density. The material of the fifth insulating region 42e may be the same as the material of the second insulating region 42b, for example. The fifth insulating region 42e may be continuous with the second insulating region 42b.

[0060] The fourth insulating region 42d is located between the second semiconductor portion 22 and the sixth insulating region 42f. The sixth insulating region 42f has a sixth nitrogen concentration lower than the third nitrogen concentration, a sixth hydrogen concentration higher than the third hydrogen concentration, and a sixth density lower than the third density. degreeThe sixth insulating region 42f may have at least one of the above. The material of the sixth insulating region 42f may be the same as the material of the third insulating region 42c, for example. The sixth insulating region 42f may be continuous with the third insulating region 42c.

[0061] In the semiconductor devices 111 to 113, a high breakdown voltage can be obtained, a stable threshold voltage can be obtained, current collapse can be suppressed, and characteristics can be improved.

[0062] FIG. 7 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 7, the semiconductor device 114 according to the embodiment also includes a first electrode 51, a second electrode 52, a third electrode 53, a first semiconductor region 10, a second semiconductor region 20, a first insulating member 41, and a second insulating member 42. In the semiconductor device 114, the shape of the third electrode 53 is different from the shape of the third electrode 53 in the semiconductor device 112. Other configurations of the semiconductor device 114 may be similar to the configurations of the semiconductor device 113.

[0063] 7, the third electrode 53 includes a second electrode portion 53b. A portion of the first semiconductor portion 21 is located between the fourth portion region 14 and the second electrode portion 53b. At least a portion of the first insulating region 42a is located between a portion of the first semiconductor portion 21 and the second electrode portion 53b. At least a portion of the second insulating region 42b is located between another portion of the first semiconductor portion 21 and the second electrode portion 53b.

[0064] In the semiconductor device 114, the first insulating region 42a overlaps with the second electrode portion 53b in the Z-axis direction. For example, the gate-drain capacitance can be reduced. For example, the second electrode portion 53b can function as a gate field plate. For example, a high breakdown voltage can be easily obtained.

[0065] FIG. 8 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 8, a first conductive member 61 is provided in a semiconductor device 115 according to the embodiment. The remaining configuration of the semiconductor device 115 may be the same as that of the semiconductor device 113 (or the semiconductor device 114). For example, concentration of an electric field can be suppressed. For example, a high breakdown voltage can be obtained.

[0066] FIG. 9 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 9, the semiconductor device 116 according to the embodiment also includes a first electrode 51, a second electrode 52, a third electrode 53, a first semiconductor region 10, a second semiconductor region 20, a first insulating member 41, and a second insulating member 42. In the semiconductor device 116, the configuration of the second insulating member 42 is different from the configuration of the second insulating member 42 in the semiconductor device 113. Other configurations of the semiconductor device 116 may be similar to the configurations of the semiconductor device 113.

[0067] 9, the second insulating member 42 includes a seventh insulating region 42g. At least a portion of the seventh insulating region 42g is located between the first insulating region 42a and the second insulating region 42b in the first direction (X-axis direction).

[0068] The seventh insulating region 42g has at least one of a seventh nitrogen concentration between the first nitrogen concentration and the second nitrogen concentration, a seventh hydrogen concentration between the first hydrogen concentration and the second hydrogen concentration, and a seventh density between the first density and the second density.

[0069] 9, the second insulating member 42 may include an eighth insulating region 42h. At least a portion of the eighth insulating region 42h is located between the third insulating region 42c and the fourth insulating region 42d in the first direction (X-axis direction).

[0070] The eighth insulating region 42h has at least one of an eighth nitrogen concentration between the third nitrogen concentration and the fourth nitrogen concentration, an eighth hydrogen concentration between the third hydrogen concentration and the fourth hydrogen concentration, and an eighth density between the third density and the fourth density.

[0071] Thus, the second insulating member 42 may include intermediate regions (the seventh insulating region 42g and the eighth insulating region 42h). The number of intermediate regions is arbitrary. For example, the boundaries between the plurality of insulating regions in the second insulating member 42 may be clear or unclear.

[0072] In semiconductor devices 114 to 116 as well, high breakdown voltage can be obtained. A stable threshold voltage can be obtained. Current collapse can be suppressed. The characteristics can be improved.

[0073] When the second thickness t2 is thinner than the first thickness t1, as in the semiconductor device 111 or the semiconductor device 112, etc., the characteristics (such as the composition ratio or density) of the second insulating region 42b may be substantially the same as the characteristics (such as the composition ratio or density) of the first insulating region 42a. Due to the difference in thickness, a stable threshold voltage can be easily obtained.

[0074] (Second Embodiment) The second embodiment relates to a method of manufacturing a semiconductor device. FIGS. 10(a) to 10(d) and FIGS. 11(a) to 11(d) are schematic cross-sectional views illustrating a method of manufacturing a semiconductor device according to the second embodiment. As shown in FIG. 10(a), a semiconductor member 10M is prepared. The semiconductor member 10M includes a first semiconductor region 10 containing Al x1 Ga 1-x1 N (0 ≦ x1 < 1), and a second semiconductor region 20 provided on the first semiconductor region 10 and containing Al x2 Ga 1-x2 N (x1 < x2 ≦ 1).

[0075] As shown in FIG. 10(a), a first insulating film F1 is formed on the second semiconductor region 20. The first insulating film F1 contains at least one of silicon and aluminum and oxygen.

[0076] As shown in FIG. 10(b), a mask material M1 is formed on the first insulating film F1, and using the mask material M1 as a mask, a part of the first insulating film F1 is removed. The removal is performed, for example, by wet etching.

[0077] In this manner, the first insulating film F1 containing silicon and nitrogen is formed on a part of the second semiconductor region 20 of the semiconductor member 10M.

[0078] 10(c), a second insulating film F2 containing silicon and nitrogen is formed on the other portion of the second semiconductor region 20. The second insulating film F2 containing silicon and nitrogen may be formed on the other portion of the second semiconductor region 20 and the first insulating film F1.

[0079] 10(d), a portion of the second insulating film F2 is removed, and a hole 10H is formed in the semiconductor member 10M exposed by the removal of the portion of the second insulating film F2. The hole 10H reaches the first semiconductor region 10.

[0080] 11(a), a first insulating member 41 containing oxygen and at least one of silicon and aluminum is formed in the hole 10H. If necessary, before the formation of the first insulating member 41, a film that will become the nitride member 30 may be formed.

[0081] As shown in FIG. 11(b), a third electrode 53 is formed in the remaining space of the hole 10H.

[0082] As shown in FIG. 11(c), the first insulating film F1 and the second insulating film F2 are partially removed.

[0083] 11(d), a first electrode 51 and a second electrode 52 are formed. A first insulating film F1 and a second insulating film F2 are provided between the first electrode 51 and the third electrode 53, and between the second electrode 52 and the third electrode 53.

[0084] The second insulating film F2 has at least one of a second nitrogen concentration higher than the first nitrogen concentration in the first insulating film F1, a second hydrogen concentration lower than the first hydrogen concentration in the first insulating film F1, and a second density higher than the first density in the first insulating film F1. For example, the first insulating film F1 provides the first insulating region 42a and the fourth insulating region 42d. For example, the second insulating film F2 provides the second insulating region 42b and the third insulating region 42c.

[0085] According to the manufacturing method of the embodiment, a semiconductor device capable of improving characteristics can be obtained.

[0086] The first electrode 51 includes, for example, at least one selected from the group consisting of aluminum, titanium, nickel, and gold. The second electrode 52 includes, for example, at least one selected from the group consisting of aluminum, titanium, nickel, and gold. The third electrode 53 includes, for example, at least one selected from the group consisting of TiN, WN, Ni, Au, Pt, and Ti. The first conductive member 61 includes, for example, a metal. The metal included in the first conductive member 61 includes, for example, at least one selected from the group consisting of aluminum, copper, and gold. The third electrode 53 and the first conductive member 61 may include, for example, conductive silicon or polysilicon.

[0087] According to the embodiment, it is possible to provide a semiconductor device capable of improving characteristics and a method for manufacturing the same.

[0088] The embodiments of the present invention have been described above with reference to specific examples. However, the present invention is not limited to these specific examples. For example, the specific configurations of the elements included in the semiconductor device, such as the semiconductor member, semiconductor region, conductive member, electrode, and insulating member, are within the scope of the present invention as long as a person skilled in the art can implement the present invention in a similar manner and obtain similar effects by appropriately selecting them from known ranges.

[0089] Furthermore, any combination of two or more elements of each specific example within the scope of technical feasibility is also included within the scope of the present invention as long as it includes the gist of the present invention.

[0090] In addition, all semiconductor devices that can be implemented by a person skilled in the art by appropriately modifying the design based on the semiconductor device described above as an embodiment of the present invention also fall within the scope of the present invention as long as they include the gist of the present invention.

[0091] In addition, within the scope of the concept of the present invention, a person skilled in the art may come up with various modifications and alterations, and it will be understood that these modifications and alterations also fall within the scope of the present invention.

[0092] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Explanation of symbols]

[0093] DESCRIPTION OF SYMBOLS 10...first semiconductor region, 10H...hole, 10M...semiconductor member, 11-15...first to fifth partial regions, 18b...nitride layer, 18s...base, 20...second semiconductor region, 21, 22...first and second semiconductor portions, 30...nitride member, 41...first insulating member, 41a-41e...first to fifth insulating portions, 42...second insulating member, 42a-42h...first to eighth insulating regions, 43...third insulating member, 51...first electrode, 52...second electrode, 52T...terminal, 53...third electrode, 53a-53c...first to third electrode portions, 61...first conductive member, 61C...connecting member, 61T...terminal, 110-116...semiconductor device, F1, F2...first and second insulating films, IL...leakage current, M1...mask material, Rt1...thickness ratio, VC1...variation amount, t1~t4...first to fourth thicknesses

Claims

1. A first electrode; a second electrode, the direction from the first electrode to the second electrode being along a first direction; a third electrode including a first electrode portion, wherein a position of the first electrode portion in the first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction; Al x1 Ga 1-x1 N (0≦x1<1), the first semiconductor region including a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region, a direction from the first partial region to the first electrode along a second direction intersecting the first direction, a direction from the second partial region to the second electrode along the second direction, a direction from the third partial region to the first electrode along the second direction, the fourth partial region being between the first partial region and the third partial region in the first direction, and the fifth partial region being between the third partial region and the second partial region in the first direction; Al x2 Ga 1-x2 N (x1<x2≦1), the second semiconductor region including a first semiconductor portion and a second semiconductor portion, the direction from the fourth sub-region to the first semiconductor portion being along the second direction, and the direction from the fifth sub-region to the second semiconductor portion being along the second direction; a first insulating member containing oxygen and at least one of silicon and aluminum, the first insulating member including a first insulating portion, the first insulating portion being between the third region and the first electrode portion; a second insulating member containing silicon and nitrogen, the second insulating member including a first insulating region and a second insulating region, a position of the first insulating region in the first direction being between the position of the first electrode in the first direction and the position of the first electrode portion in the first direction, a position of the second insulating region in the first direction being between the position of the first insulating region in the first direction and the position of the first electrode portion in the first direction, the first semiconductor portion being between the fourth portion region and the first insulating region and between the fourth portion region and the second insulating region, and a second thickness of the second insulating region in the second direction being thinner than a first thickness of the first insulating region in the second direction; Equipped with at least a portion of the first electrode portion is located between the first semiconductor portion and the second semiconductor portion in the first direction; the second thickness is 5 nm or less; the first thickness is greater than 5 nm and less than or equal to 150 nm; a ratio of the second thickness to the first thickness is less than or equal to 0.5; Semiconductor device.

2. the second insulating member includes a third insulating region and a fourth insulating region, a position of the third insulating region in the first direction is between the position of the first electrode portion in the first direction and the position of the second electrode in the first direction; a position of the fourth insulating region in the first direction is between the position of the third insulating region in the first direction and the position of the second electrode in the first direction; the second semiconductor portion is between the fifth region and the third insulating region and between the fifth region and the fourth insulating region; 2 . The semiconductor device according to claim 1 , wherein a third thickness of said third insulating region along said second direction is thinner than a fourth thickness of said fourth insulating region along said second direction.

3. the third electrode further includes a third electrode portion; a portion of the second semiconductor portion is located between the fifth region and the third electrode portion; The semiconductor device according to claim 2 , wherein at least a portion of said third insulating region is between said portion of said second semiconductor portion and said third electrode portion.

4. a first conductive member; A third insulating member; Furthermore, at least a portion of the first insulating region is between the first semiconductor portion and the first conductive member; at least a portion of the third insulating member is located between the at least a portion of the first insulating member and the first conductive member; 4. The semiconductor device according to claim 1, wherein the first conductive member is electrically connected to either the second electrode or the third electrode, or is capable of being electrically connected to either the second electrode or the third electrode.

5. the third electrode further includes a second electrode portion; a portion of the first semiconductor portion is between the fourth region and the second electrode portion; 5. The semiconductor device according to claim 1, wherein at least a portion of said second insulating region is between said portion of said first semiconductor portion and said second electrode portion.

6. The semiconductor device according to claim 5 , wherein at least a portion of the first insulating region is between the portion of the first semiconductor portion and the second electrode portion.

7. Al x3 Ga 1-x3 Further comprising a nitride member including N (x2<x3≦1), 7. The semiconductor device according to claim 1, wherein at least a portion of said nitride member is located between said third region and said first insulating portion.

8. A first electrode; a second electrode, the direction from the first electrode to the second electrode being along a first direction; a third electrode including a first electrode portion, wherein a position of the first electrode portion in the first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction; Al x1 Ga 1-x1 N (0≦x1<1), the first semiconductor region including a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region, a direction from the first partial region to the first electrode along a second direction intersecting the first direction, a direction from the second partial region to the second electrode along the second direction, a direction from the third partial region to the first electrode along the second direction, the fourth partial region being between the first partial region and the third partial region in the first direction, and the fifth partial region being between the third partial region and the second partial region in the first direction; Al x2 Ga 1-x2 N (x1<x2≦1), the second semiconductor region including a first semiconductor portion and a second semiconductor portion, the direction from the fourth sub-region to the first semiconductor portion being along the second direction, and the direction from the fifth sub-region to the second semiconductor portion being along the second direction; a first insulating member containing oxygen and at least one of silicon and aluminum, the first insulating member including a first insulating portion, the first insulating portion being between the third region and the first electrode portion; a second insulating member containing silicon and nitrogen, the second insulating member including a first insulating region and a second insulating region, the position of the first insulating region in the first direction being between the position of the first electrode in the first direction and the position of the first electrode portion in the first direction, the position of the second insulating region in the first direction being between the position of the first insulating region in the first direction and the position of the first electrode portion in the first direction, and the first semiconductor portion being between the fourth portion region and the first insulating region and between the fourth portion region and the second insulating region; Equipped with the third electrode further includes a second electrode portion; a portion of the first semiconductor portion is between the fourth region and the second electrode portion; the second insulating region includes a first portion overlapping with the second electrode portion in the second direction and a second portion not overlapping with the second electrode portion in the second direction; the first insulating region does not overlap the second electrode portion in the second direction, a second thickness of the second portion along the second direction is smaller than a first thickness of the first insulating region along the second direction; at least a portion of the first electrode portion is located between the first semiconductor portion and the second semiconductor portion in the first direction; the second thickness is 5 nm or less; the first thickness is greater than 5 nm and less than or equal to 150 nm; The ratio of the second thickness to the first thickness is 0.5 or less.

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