Circuit board and method for manufacturing the circuit board

Abstract

According to the present invention, an interlayer connection conductor is provided within a through hole that penetrates a first insulator layer and a second insulator layer in the Z-axis direction. A first conductor layer is positioned on a negative main surface of an insulator layer that is positioned on the more negative side of the Z-axis than the second insulator layer, while being in contact with an end of the interlayer connection conductor in the negative direction of the Z-axis. A second conductor is positioned on a positive main surface of the second insulator layer, while being in contact with an end of the interlayer connection conductor in the positive direction of the Z-axis. The surface roughness of a portion of the inner circumferential surface of the through hole, the portion being positioned on the second insulator layer, is higher than the surface roughness of a portion of the inner circumferential surface of the through hole, the portion being positioned on the first insulator layer. A conductor layer, which is in contact with the interlayer connection conductor, is not provided between the first insulator layer and the second insulator layer.

Description

[Technical Field]

[0001] The present invention relates to a circuit board having a structure in which a plurality of insulating layers are laminated. [Background technology]

[0002] A known example of a conventional invention relating to a circuit board is the resin substrate described in Patent Document 1. This resin substrate includes a resin base material, an interlayer connection conductor, and two conductors. The resin base material has a structure in which multiple insulating base material layers are stacked in the vertical direction. The two conductors are provided on the upper and lower main surfaces of an insulator layer. The interlayer connection conductor penetrates the insulator layer in the vertical direction. This electrically connects the two conductors. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2020 / 045402 Summary of the Invention [Problem to be solved by the invention]

[0004] Incidentally, in the resin substrate described in Patent Document 1, there is a demand for suppressing the occurrence of connection defects between the interlayer connection conductor and the conductor.

[0005] SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a circuit board and a method for manufacturing the circuit board that can prevent poor connections from occurring between interlayer connection conductors and conductor layers. [Means for solving the problem]

[0006] A circuit board according to one aspect of the present invention comprises: a laminate having a structure in which a plurality of insulator layers including a first insulator layer and a second insulator layer having a Young's modulus at room temperature higher than that of the first insulator layer at room temperature are stacked in the Z-axis direction, each of the plurality of insulator layers having a negative principal surface located in the negative direction of the Z-axis and a positive principal surface located in the positive direction of the Z-axis, and the negative principal surface of the second insulator layer is in contact with the positive principal surface of the first insulator layer; an interlayer connection conductor provided inside a through hole that penetrates the first insulator layer and the second insulator layer in the Z-axis direction; a first conductor layer located on a negative principal surface of the insulator layer located in the negative direction of the Z axis from the second insulator layer and in contact with an end of the interlayer connection conductor in the negative direction of the Z axis; a second conductor layer located on the positive main surface of the second insulator layer and in contact with an end of the interlayer connection conductor in the positive direction of the Z axis; It is equipped with a surface roughness of a portion of the inner circumferential surface of the through hole that is located on the second insulator layer is greater than a surface roughness of a portion of the inner circumferential surface of the through hole that is located on the first insulator layer; No conductor layer that contacts the interlayer connection conductor is provided between the first insulator layer and the second insulator layer.

[0007] A method for manufacturing a circuit board according to one embodiment of the present invention includes: a preparation step of preparing a first insulator layer and a second insulator layer having a negative principal surface located in the negative direction of the Z axis and a positive principal surface located in the positive direction of the Z axis, the second insulator layer having a Young's modulus at room temperature higher than that of the first insulator layer at room temperature, and a second conductor layer being provided on the positive principal surface of the second insulator layer; a lamination step of laminating the first insulator layer and the second insulator layer such that a negative principal surface of the second insulator layer in the Z axis direction contacts a positive principal surface of the first insulator layer after the preparation step; a through-hole forming step of irradiating a laser beam from a space located in a negative direction of the first insulator layer and the second insulator layer to form a through-hole penetrating the first insulator layer and the second insulator layer in the Z-axis direction after the lamination step; an interlayer connection conductor forming step of forming an interlayer connection conductor inside the through hole after the through hole forming step; It is equipped with In the through-hole forming step, the laser beam is irradiated while increasing the intensity of the laser beam over time. [Effects of the Invention]

[0008] According to the circuit board and the method for manufacturing the circuit board of the present invention, it is possible to prevent poor connection between the interlayer connection conductor and the conductor layer. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is an exploded perspective view of a circuit board 10. FIG. [Figure 2] FIG. 2 is a cross-sectional view of the right end portion of the circuit board 10. As shown in FIG. [Figure 3] FIG. 3 is a rear view of the electronic device 1 including the circuit board 10. As shown in FIG. [Figure 4] FIG. 4 is a cross-sectional view of the circuit board 10 during manufacturing. [Figure 5] FIG. 5 is a cross-sectional view of the circuit board 10 during manufacturing. [Figure 6] FIG. 6 is a cross-sectional view of the circuit board 10 during manufacturing. [Figure 7] FIG. 7 is a cross-sectional view of the circuit board 10 during manufacturing. [Figure 8] FIG. 8 is a cross-sectional view of the circuit board 10 during manufacturing. [Figure 9] FIG. 9 is a cross-sectional view of the right end portion of the circuit board 10a. [Figure 10] FIG. 10 is a cross-sectional view of the right end portion of the circuit board 10b. [Figure 11] FIG. 11 is a cross-sectional view of the right end portion of the circuit board 10c. [Figure 12] FIG. 12 is a cross-sectional view of the right end portion of the circuit board 10d. [Figure 13] FIG. 13 is a cross-sectional view of the right end portion of the circuit board 10e. DETAILED DESCRIPTION OF THE INVENTION

[0010] (Embodiment) [Circuit board structure] The structure of a circuit board 10 according to an embodiment of the present invention will be described below with reference to the drawings. Fig. 1 is an exploded perspective view of the circuit board 10. Fig. 2 is a cross-sectional view of the right end portion of the circuit board 10. Fig. 2 shows a cross section perpendicular to the front-rear direction.

[0011] In this specification, directions are defined as follows: The stacking direction of the laminate 12 of the circuit board 10 is defined as the up-down direction. The up-down direction also coincides with the Z-axis direction. The up direction is the positive direction of the Z-axis. The down direction is the negative direction of the Z-axis. The direction in which the signal conductor layers 20 of the circuit board 10 extend is defined as the left-right direction. The line width direction of the signal conductor layers 20 as viewed in the up-down direction is defined as the front-rear direction. The up-down direction, front-rear direction, and left-rear direction are perpendicular to each other. Note that the up and down directions in the up-down direction may be interchanged, the left and right directions in the left-rear direction may be interchanged, and the front and rear directions in the front-rear direction may be interchanged.

[0012] Hereinafter, X is a component or member of the circuit board 10. In this specification, unless otherwise specified, each part of X is defined as follows: The front part of X means the front half of X. The rear part of X means the rear half of X. The left part of X means the left half of X. The right part of X means the right half of X. The upper part of X means the upper half of X. The lower part of X means the lower half of X. The front end of X means the front end of X. The rear end of X means the rear end of X. The left end of X means the left end of X. The right end of X means the right end of X. The upper end of X means the upper end of X. The lower end of X means the lower end of X. The front end of X means the front end of X and its vicinity. The rear end of X means the rear end of X and its vicinity. The left end of X means the left end of X and its vicinity. The right end of X means the right end of X and its vicinity. The upper end of X means the upper end of X and its vicinity. The lower end of X means the lower end of X and its vicinity.

[0013] First, the structure of a circuit board 10 will be described with reference to Fig. 1. The circuit board 10 transmits high-frequency signals. The circuit board 10 is used to electrically connect two circuits in electronic devices such as smartphones. As shown in Fig. 1, the circuit board 10 includes a laminate 12, a signal conductor layer 20, a first ground conductor layer 22, a second ground conductor layer 24, signal terminals 26a and 26b, connection conductor layers 28a, 28b, 30a, 30b, 32a, 32b, 34a, and 34b, interlayer connection conductors v1 to v4, and a plurality of interlayer connection conductors v5 and v6.

[0014] The laminate 12 has a plate shape. Therefore, the laminate 12 has an upper main surface and a lower main surface. The upper and lower main surfaces of the laminate 12 have a rectangular shape with long sides extending in the left-right direction. Therefore, the length of the laminate 12 in the left-right direction is longer than the length of the laminate 12 in the front-rear direction. The laminate 12 is flexible.

[0015] As shown in Fig. 1, the laminate 12 has a structure in which insulator layers 16a, 16b, 17a to 17e, 18a, and 18b are stacked in the vertical direction (Z-axis direction). The insulator layers 18a, 16a, 17a, 16b, 17b to 17e, and 18b are stacked from top to bottom in this order. The insulator layers 16a, 16b, 17a to 17e, 18a, and 18b each have a lower main surface (a negative main surface located in the negative direction of the Z-axis) and an upper main surface (a positive main surface located in the positive direction of the Z-axis). The lower main surface (negative main surface) of the insulator layer 16a (second insulator layer) is in contact with the upper main surface (positive main surface) of the insulator layer 17a (first insulator layer). The lower main surface (negative main surface) of the insulating layer 16b (second insulating layer) is in contact with the upper main surface (positive main surface) of the insulating layer 17b (first insulating layer).

[0016] The insulating layers 16a, 16b, 17a to 17e, 18a, and 18b have the same rectangular shape as the laminate 12 when viewed in the vertical direction. The insulating layers 16a, 16b, and 17a to 17e are flexible dielectric sheets. The insulating layers 16a, 16b, and 17a to 17e are made of, for example, a thermoplastic resin. However, the insulating layers 16a and 16b (second insulating layers) have a higher Young's modulus at room temperature than the insulating layers 17a to 17e (first insulating layers). The insulating layers 16a and 16b are made of, for example, a fluororesin. The insulating layers 17a to 17e are made of, for example, a liquid crystal polymer. The thickness of the insulating layers 16a and 16b (second insulating layers) in the vertical direction (Z-axis direction) is smaller than the thickness of the insulating layers 17a and 17b (first insulating layers) in the vertical direction (Z-axis direction). In this specification, the vertical thickness of an insulating layer is, for example, the average value of the thickness of the entire insulating layer in the vertical direction. The insulating layers 18a and 18b will be described later.

[0017] As shown in FIG. 1, the signal conductor layer 20 is provided in the laminate 12. In this embodiment, the signal conductor layer 20 is located on the upper main surface of the insulator layer 17c. In other words, the signal conductor layer 20 (second conductor layer) is located on the lower main surface (negative main surface) of the insulator layer 17b (first insulator layer) which is located below the insulator layer 16b (second insulator layer) (in the negative direction of the Z axis). The signal conductor layer 20 has a linear shape. The signal conductor layer 20 extends in the left-right direction. A high-frequency signal is transmitted through the signal conductor layer 20.

[0018] As shown in FIG. 1, the first ground conductor layer 22 is provided on the laminate 12. The first ground conductor layer 22 is provided above the signal conductor layer 20 so as to overlap the signal conductor layer 20 when viewed in the top-bottom direction. In this embodiment, the first ground conductor layer 22 (second conductor layer) is located on the upper main surface (front main surface) of the insulator layer 16a (second insulator layer). The first ground conductor layer 22 covers substantially the entire upper main surface of the insulator layer 16a. A ground potential is connected to the first ground conductor layer 22.

[0019] As shown in FIG. 1 , the second ground conductor layer 24 is provided in the laminate 12. The second ground conductor layer 24 is provided below the signal conductor layer 20 so as to overlap the signal conductor layer 20 when viewed in the up-down direction. In this embodiment, the second ground conductor layer 24 is located on the lower main surface of the insulator layer 17e. The second ground conductor layer 24 covers substantially the entire lower main surface of the insulator layer 17e. A ground potential is connected to the second ground conductor layer 24. The signal conductor layer 20, the first ground conductor layer 22, and the second ground conductor layer 24 as described above have a stripline structure.

[0020] The signal terminal 26b is provided at the right end of the laminate 12. More specifically, the signal terminal 26b (second conductor layer) is located on the upper main surface (front main surface) of the insulator layer 16a (second insulator layer). The signal terminal 26b overlaps with the right end of the signal conductor layer 20 when viewed in the vertical direction. The signal terminal 26b has a rectangular shape when viewed in the vertical direction. The signal terminal 26b is an external terminal through which high-frequency signals are input and output. The signal terminal 26b is not in contact with the first ground conductor layer 22.

[0021] The connection conductor layer 28b is provided at the right end of the laminate 12. More specifically, the connection conductor layer 28b (second conductor layer) is located on the upper main surface (positive main surface) of the insulator layer 16b (second insulator layer). In other words, the connection conductor layer 28b (first conductor layer) is located on the lower main surface (negative main surface) of the insulator layer 17a (first insulator layer), which is located below the insulator layer 16a (second insulator layer) (in the negative direction of the Z axis). The connection conductor layer 28b functions as a first conductor layer for the interlayer connection conductor v2a and as a second conductor layer for the interlayer connection conductor v2b. The connection conductor layer 28b overlaps with the right end of the signal conductor layer 20 when viewed in the vertical direction. The connection conductor layer 28b has a rectangular shape when viewed in the vertical direction.

[0022] The connection conductor layer 30b is provided at the right end of the laminate 12. More specifically, the connection conductor layer 30b (second conductor layer) is located on the upper main surface (positive main surface) of the insulator layer 16b (second insulator layer). The connection conductor layer 30b is located to the right of the connection conductor layer 28b. In other words, the connection conductor layer 30b (first conductor layer) is located on the lower main surface (negative main surface) of the insulator layer 17a (first insulator layer), which is located below the insulator layer 16a (second insulator layer) (in the negative direction of the Z axis). The connection conductor layer 30b overlaps with the first ground conductor layer 22 and the second ground conductor layer 24 when viewed in the up-down direction. The connection conductor layer 30b has a rectangular shape when viewed in the up-down direction.

[0023] The connection conductor layer 32b is provided at the right end of the laminate 12. More specifically, the connection conductor layer 32b (second conductor layer) is located on the upper main surface of the insulator layer 17c. In other words, the connection conductor layer 32b (first conductor layer) is located on the lower main surface (negative main surface) of the insulator layer 17b (first insulator layer), which is located below the insulator layer 16b (second insulator layer) (in the negative direction of the Z axis). The connection conductor layer 32b overlaps with the first ground conductor layer 22 and the second ground conductor layer 24 when viewed in the up-down direction. The connection conductor layer 32b has a rectangular shape when viewed in the up-down direction.

[0024] The connection conductor layer 34b is provided at the right end of the laminate 12. More specifically, the connection conductor layer 34b is located on the upper main surface of the insulating layer 17d. When viewed in the vertical direction, the connection conductor layer 34b overlaps with the first ground conductor layer 22 and the second ground conductor layer 24. When viewed in the vertical direction, the connection conductor layer 34b has a rectangular shape.

[0025] The interlayer connection conductor v2 electrically connects the signal terminal 26b, the connection conductor layer 28b, and the right end of the signal conductor layer 20. More specifically, the interlayer connection conductor v2 includes interlayer connection conductors v2a and v2b. The interlayer connection conductor v2a is provided inside a through hole that penetrates the insulator layer 16a (second insulator layer) and the insulator layer 17a (first insulator layer) in the vertical direction (Z-axis direction). As a result, the signal terminal 26b (second conductor layer) is in contact with the upper end (end in the positive direction of the Z-axis) of the interlayer connection conductor v2a. The connection conductor layer 28b (first conductor layer) is in contact with the lower end (end in the negative direction of the Z-axis) of the interlayer connection conductor v2a. However, the interlayer connection conductor v2a does not penetrate the connection conductor layer 28b (first conductor layer) and the signal terminal 26b (second conductor layer) in the vertical direction (Z-axis direction).

[0026] The interlayer connection conductor v2a has a truncated cone shape. When viewed in the vertical direction (Z-axis direction), the area of ​​the upper end (the end in the positive direction of the Z-axis) of the interlayer connection conductor v2a is smaller than the area of ​​the lower end (the end in the negative direction of the Z-axis) of the interlayer connection conductor v2a. The surface roughness of a portion Pa of the inner circumferential surface of the through hole located on insulator layer 16a (second insulator layer) is greater than the surface roughness of a portion Pb of the inner circumferential surface of the through hole located on insulator layer 17a (first insulator layer).

[0027] The interlayer connection conductor v2b is provided inside a through hole that penetrates the insulator layer 16b (second insulator layer) and the insulator layer 17b (first insulator layer) in the up-down direction (Z-axis direction). As a result, the connection conductor layer 28b (second conductor layer) is in contact with the upper end (end in the positive direction of the Z-axis) of the interlayer connection conductor v2b. The right end of the signal conductor layer 20 (first conductor layer) is in contact with the lower end (end in the negative direction of the Z-axis) of the interlayer connection conductor v2b. However, the interlayer connection conductor v2b does not penetrate the signal conductor layer 20 (first conductor layer) and the connection conductor layer 28b (second conductor layer) in the up-down direction (Z-axis direction).

[0028] The interlayer connection conductor v2b has a truncated cone shape. When viewed in the vertical direction (Z-axis direction), the area of ​​the upper end (the end in the positive direction of the Z-axis) of the interlayer connection conductor v2b is smaller than the area of ​​the lower end (the end in the negative direction of the Z-axis) of the interlayer connection conductor v2b. The surface roughness of a portion Pa of the inner circumferential surface of the through hole that is located on insulator layer 16b (second insulator layer) is greater than the surface roughness of a portion Pb of the inner circumferential surface of the through hole that is located on insulator layer 17b (first insulator layer).

[0029] The interlayer connection conductor v4 electrically connects the first ground conductor layer 22, the connection conductor layer 30b, the connection conductor layer 32b, the connection conductor layer 34b, and the second ground conductor layer 24. More specifically, the interlayer connection conductor v4 includes interlayer connection conductors v4a, v4b, v4c, v4d, and v4e. The interlayer connection conductor v4a is provided inside a through hole that penetrates the insulator layer 16a (second insulator layer) and the insulator layer 17a (first insulator layer) in the vertical direction (Z-axis direction). As a result, the first ground conductor layer 22 (second conductor layer) is in contact with the upper end (end in the positive direction of the Z-axis) of the interlayer connection conductor v4a. The connection conductor layer 30b (first conductor layer) is in contact with the lower end (end in the negative direction of the Z-axis) of the interlayer connection conductor v4a. However, the interlayer connection conductor v4a does not penetrate the connection conductor layer 30b (first conductor layer) and the first ground conductor layer 22 (second conductor layer) in the up-down direction (Z-axis direction).

[0030] The interlayer connection conductor v4a has a truncated cone shape. When viewed in the vertical direction (Z-axis direction), the area of ​​the upper end (the end in the positive direction of the Z-axis) of the interlayer connection conductor v4a is smaller than the area of ​​the lower end (the end in the negative direction of the Z-axis) of the interlayer connection conductor v4a. The surface roughness of a portion Pa of the inner circumferential surface of the through hole located on insulator layer 16a (second insulator layer) is greater than the surface roughness of a portion Pb of the inner circumferential surface of the through hole located on insulator layer 17a (first insulator layer).

[0031] The interlayer connection conductor v4b is provided inside a through hole that penetrates the insulator layer 16b (second insulator layer) and the insulator layer 17b (first insulator layer) in the up-down direction (Z-axis direction). As a result, the connection conductor layer 30b (second conductor layer) is in contact with the upper end (end in the positive direction of the Z-axis) of the interlayer connection conductor v4b. The connection conductor layer 32b (first conductor layer) is in contact with the lower end (end in the negative direction of the Z-axis) of the interlayer connection conductor v4b. However, the interlayer connection conductor v4b does not penetrate the connection conductor layer 32b (first conductor layer) and the connection conductor layer 30b (second conductor layer) in the up-down direction (Z-axis direction).

[0032] The interlayer connection conductor v4b has a truncated cone shape. When viewed in the vertical direction (Z-axis direction), the area of ​​the upper end (the end in the positive direction of the Z-axis) of the interlayer connection conductor v4b is smaller than the area of ​​the lower end (the end in the negative direction of the Z-axis) of the interlayer connection conductor v4b. The surface roughness of a portion Pa of the inner circumferential surface of the through hole located on insulator layer 16b (second insulator layer) is greater than the surface roughness of a portion Pb of the inner circumferential surface of the through hole located on insulator layer 17b (first insulator layer).

[0033] The interlayer connection conductor v4c is provided inside a through hole that passes through the insulator layer 17c in the vertical direction. As a result, the connection conductor layer 32b is in contact with the upper end of the interlayer connection conductor v4c. The connection conductor layer 34b is in contact with the lower end of the interlayer connection conductor v4c. However, the interlayer connection conductor v4c does not pass through the connection conductor layer 34b and the connection conductor layer 32b in the vertical direction. In addition, the interlayer connection conductor v4c has a truncated cone shape. When viewed in the vertical direction, the area of ​​the upper end of the interlayer connection conductor v4c is smaller than the area of ​​the lower end of the interlayer connection conductor v4c.

[0034] The interlayer connection conductors v4d, v4e are each provided inside a through hole that penetrates the insulator layers 17d, 17e in the vertical direction. The interlayer connection conductors v4d and v4e are connected so that they are aligned in the vertical direction. As a result, the connection conductor layer 34b is in contact with the upper end of the interlayer connection conductor v4d. The second ground conductor layer 24 is in contact with the lower end of the interlayer connection conductor v4e. However, the interlayer connection conductor v4d does not penetrate the connection conductor layer 34b in the vertical direction. The interlayer connection conductor v4e does not penetrate the second ground conductor layer 24 in the vertical direction. The interlayer connection conductors v4d, v4e have a truncated cone shape. When viewed in the vertical direction, the area of ​​the upper end of the interlayer connection conductor v4d is smaller than the area of ​​the lower end of the interlayer connection conductor v4d. When viewed in the vertical direction, the area of ​​the lower end of the interlayer connection conductor v4e is smaller than the area of ​​the upper end of the interlayer connection conductor v4e. The vertical positions of the lower end of the interlayer connection conductor v4d and the upper end of the interlayer connection conductor v4e coincide with the vertical positions of the lower main surface of the insulating layer 17d and the upper main surface of the insulating layer 17e.

[0035] Furthermore, no conductor layer in contact with the interlayer connection conductors v2a, v4a is provided between the insulator layer 17a (first insulator layer) and the insulator layer 16a (second insulator layer). In this embodiment, no conductor layer is provided between the insulator layer 17a (first insulator layer) and the insulator layer 16a (second insulator layer). Similarly, no conductor layer in contact with the interlayer connection conductors v2b, v4b is provided between the insulator layer 17b (first insulator layer) and the insulator layer 16b (second insulator layer). In this embodiment, no conductor layer is provided between the insulator layer 17b (first insulator layer) and the insulator layer 16b (second insulator layer).

[0036] The multiple interlayer connection conductors v5 are located in front of the signal conductor layer 20. The multiple interlayer connection conductors v5 are aligned in a row in the left-right direction. The multiple interlayer connection conductors v5 electrically connect the first ground conductor layer 22 and the second ground conductor layer 24. However, the structure of the multiple interlayer connection conductors v5 is the same as that of the interlayer connection conductors v4, so a description thereof will be omitted.

[0037] The interlayer connection conductors v6 are located behind the signal conductor layer 20. The interlayer connection conductors v6 are aligned in a row in the left-right direction. The interlayer connection conductors v6 electrically connect the first ground conductor layer 22 and the second ground conductor layer 24. However, the structure of the interlayer connection conductors v6 is the same as that of the interlayer connection conductors v4, and therefore a description thereof will be omitted.

[0038] The insulating layers 18a and 18b are flexible protective layers, and each of the insulating layers 18a and 18b has the same rectangular shape as the laminate 12 when viewed in the vertical direction.

[0039] The insulator layer 18a covers substantially the entire upper main surface of the insulator layer 16a. Thus, the insulator layer 18a protects the first ground conductor layer 22. The insulator layer 18a has openings h1 to h6. The opening h4 overlaps with the signal terminal 26b in a vertical view. Therefore, the signal terminal 26b is exposed from the circuit board 10 to the outside through the opening h4. The opening h5 is provided after the opening h4. The opening h5 overlaps with the first ground conductor layer 22 in a vertical view. Thus, a portion of the first ground conductor layer 22 is exposed from the circuit board 10 to the outside through the opening h5. A portion of the first ground conductor layer 22 functions as a ground terminal. The opening h6 is provided before the opening h4. The opening h6 overlaps with the first ground conductor layer 22 in a vertical view. Thus, a portion of the first ground conductor layer 22 is exposed from the circuit board 10 to the outside through the opening h6. A portion of the first ground conductor layer 22 functions as a ground terminal.

[0040] The insulating layer 18b covers substantially the entire lower main surface of the insulating layer 17e, thereby covering the second ground conductor layer 24.

[0041] The above has described the structure of the right end portion of the circuit board 10. The structure of the left end portion of the circuit board 10 is bilaterally symmetrical to the structure of the right end portion of the circuit board 10. Therefore, a description of the structure of the left end portion of the circuit board 10 will be omitted.

[0042] The first ground conductor layer 22, the second ground conductor layer 24, the signal terminals 26a, 26b, and the connecting conductor layers 28a, 28b, 30a, 30b, 32a, 32b, 34a, and 34b are formed by etching metal foil provided on the upper or lower principal surfaces of the insulator layers 16a, 16b, and 17a to 17e, for example. The metal foil is, for example, copper foil.

[0043] The surface roughness of the lower main surfaces (negative main surfaces) of the first ground conductor layer 22, the second ground conductor layer 24, the signal terminals 26a, 26b, and the connecting conductor layers 28a, 28b, 30a, 30b, 32a, 32b, 34a, and 34b (first and second conductor layers) is substantially equal to the surface roughness of the upper main surfaces (positive main surfaces) of the first ground conductor layer 22, the second ground conductor layer 24, the signal terminals 26a, 26b, and the connecting conductor layers 28a, 28b, 30a, 30b, 32a, 32b, 34a, and 34b (first and second conductor layers). However, the copper foil is chemically bonded to the fluororesin. Therefore, the first ground conductor layer 22 and the signal terminals 26a and 26b are formed on the insulator layer 16. a The connecting conductor layers 28a, 28b, 30a, and 30b are firmly fixed to the insulating layer 16b.

[0044] The interlayer connection conductors v1 to v6 are, for example, via-hole conductors. The via-hole conductors are fabricated by forming through-holes in the insulator layers 16a, 16b, and 17a to 17e, filling the through-holes with conductive paste, and sintering the conductive paste. The conductive paste is a mixture of metal powder and resin.

[0045] [Electronic device structure] Next, the structure of the electronic device 1 including the circuit board 10 will be described with reference to the drawings. Fig. 3 is a rear view of the electronic device 1 including the circuit board 10. The electronic device 1 is, for example, a mobile wireless communication terminal. The electronic device 1 is, for example, a smartphone.

[0046] The circuit board 10 is used in a state in which the laminate 12 is bent, as shown in Fig. 3. "The laminate 12 is bent" means that the laminate 12 is deformed and bent due to the application of an external force to the laminate 12. The deformation may be elastic deformation, plastic deformation, or a combination of elastic deformation and plastic deformation.

[0047] The laminate 12 has a first section A1, a second section A2, and a third section A3. The first section A1, the second section A2, and the third section A3 are arranged in this order from left to right. The first section A1 and the third section A3 are not bent. The second section A2 is bent downward (in the Z-axis direction) relative to the first section A1. However, the first section A1 and the third section A3 may also be slightly bent. In this case, the radius of curvature of the first section A1 and the radius of curvature of the third section A3 are larger than the radius of curvature of the second section A2.

[0048] The electronic device 1 includes a circuit board 10, connectors 50a, 50b, 150a, and 150b, and circuit boards 100a and 100b. The connector 50a is mounted on the left end of the upper main surface of the circuit board 10. The connector 150b is mounted on the right end of the upper main surface of the circuit board 10.

[0049] Connector 150a is mounted on the lower main surface of circuit board 100a. Connector 150a is connected to connector 50a. Connector 150b is mounted on the lower main surface of circuit board 100b. Connector 150b is connected to connector 50b. In this way, circuit board 10 electrically connects circuit board 100a and circuit board 100b.

[0050] [Method of manufacturing the circuit board 10] Next, a method for manufacturing the circuit board 10 will be described with reference to the drawings. Figures 4 to 8 are cross-sectional views of the circuit board 10 during manufacturing.

[0051] As shown in FIG. 4, insulator layers 17a and 17b (first insulator layers) and insulator layers 16a and 16b (second insulator layers) having a lower main surface (negative main surface located in the negative direction of the Z axis) and an upper main surface (positive main surface located in the positive direction of the Z axis) are prepared (preparation step). The insulator layers 16a and 16b (second insulator layers) have a Young's modulus at room temperature higher than that of the insulator layers 17a and 17b (first insulator layers). In this specification, room temperature is 5°C or higher and 35°C or lower. In addition, a conductor layer 200a (second conductor layer) is provided on the upper main surface (positive main surface) of the insulator layer 16a (second insulator layer). A conductor layer 200b (second conductor layer) is provided on the upper main surface (positive main surface) of the insulator layer 16b (second insulator layer).

[0052] 5, insulator layers 17c to 17e are prepared. A conductor layer 200c is provided on the upper main surface of insulator layer 17c. A conductor layer 200d is provided on the upper main surface of insulator layer 17d. A conductor layer 200e is provided on the upper main surface of insulator layer 17e.

[0053] After the preparation step, as shown in FIG. 5, the insulator layer 17a (first insulator layer) and the insulator layer 16a (second insulator layer) are laminated so that the upper main surface (positive main surface) of the insulator layer 17a (first insulator layer) contacts the lower main surface (negative main surface) of the insulator layer 16a (second insulator layer) (lamination step). At this time, the insulator layer 17a and the insulator layer 16a are subjected to a heat treatment and a pressure treatment to thermocompression bond the insulator layer 17a and the insulator layer 16a. Similarly, the insulator layer 17b (first insulator layer) and the insulator layer 16b (second insulator layer) are laminated so that the upper main surface (positive main surface) of the insulator layer 17b (first insulator layer) contacts the lower main surface (negative main surface) of the insulator layer 16b (second insulator layer) (lamination step). At this time, the insulating layer 17b and the insulating layer 16b are subjected to a heat treatment and a pressure treatment, so that the insulating layer 17b and the insulating layer 16b are thermocompression bonded to each other.

[0054] After the lamination step, the conductor layers 200a to 200e are patterned by photolithography (patterning step), as shown in Fig. 6. This forms the first ground conductor layer 22, the second ground conductor layer 24, the signal terminals 26a and 26b, and the connecting conductor layers 28a, 28b, 30a, 30b, 32a, 32b, 34a, and 34b.

[0055] After the patterning step, as shown in FIG. 7 , a laser beam is irradiated from a space located below the insulator layer 17a (first insulator layer) and the insulator layer 16a (second insulator layer) (negative direction of the Z axis) to form through holes H that penetrate the insulator layer 17a (first insulator layer) and the insulator layer 16a (second insulator layer) in the vertical direction (Z axis direction) (through hole forming step). In the through hole forming step, the laser beam is irradiated so that the through holes H do not penetrate the conductor layer 200a (second conductor layer) in the vertical direction (Z axis direction). Similarly, a laser beam is irradiated from a space located below the insulator layer 17b (first insulator layer) and the insulator layer 16b (second insulator layer) (negative direction of the Z axis) to form through holes H that penetrate the insulator layer 17b (first insulator layer) and the insulator layer 16b (second insulator layer) in the vertical direction (Z axis direction) (through hole forming step). In the through hole forming step, the laser beam is applied so that the through holes H do not penetrate the conductor layer 200b (second conductor layer) in the vertical direction (Z-axis direction). The laser beam is also applied to the insulator layers 17c to 17e to form the through holes H.

[0056] Here, in the through-hole forming process, the laser beam is irradiated while increasing its intensity over time. The increase in the laser beam intensity may be continuous or stepwise. As a result, the surface roughness of the portion Pa located on the insulator layer 16a (second insulator layer) of the inner circumferential surface of the through-hole becomes greater than the surface roughness of the portion Pb located on the insulator layer 17a (first insulator layer) of the inner circumferential surface of the through-hole. Similarly, the surface roughness of the portion Pa located on the insulator layer 16b (second insulator layer) of the inner circumferential surface of the through-hole becomes greater than the surface roughness of the portion Pb located on the insulator layer 17b (first insulator layer) of the inner circumferential surface of the through-hole.

[0057] After the through hole forming step, as shown in Fig. 8, interlayer connection conductors v1 to v6 are formed inside the through holes H (interlayer connection conductor forming step). In the interlayer connection conductor forming step, the through holes H are filled with a conductive paste.

[0058] After the through-hole forming step, as shown in FIG. 2, insulator layers 16a, 16b, 17a-17e, 18a, and 18b including insulator layers 17a and 17b (first insulator layers) and insulator layers 16a and 16b (second insulator layers) are stacked (second stacking step). In the second stacking step, the insulator layers 16a, 16b, 17a-17e, 18a, and 18b are subjected to heat treatment and pressure treatment to thermocompression-bond the insulator layers 16a, 16b, 17a-17e, 18a, and 18b. The heat treatment fuses the insulator layers 16a, 16b, 17a-17e, 18a, and 18b, and the conductive paste in the through-holes H solidifies. Through the above steps, the circuit board 10 is completed.

[0059] [effect] The circuit board 10 can prevent poor connection between the interlayer connection conductor v2a and the signal terminal 26b. More specifically, the insulator layer 16a (second insulator layer) has a Young's modulus at room temperature that is higher than that of the insulator layer 17a (first insulator layer) at room temperature (Condition 1). The surface roughness of the portion Pa located on the insulator layer 16a (second insulator layer) within the inner circumferential surface of the through hole is greater than the surface roughness of the portion Pb located on the insulator layer 17a (first insulator layer) within the inner circumferential surface of the through hole (Condition 2). This allows the interlayer connection conductor v2a to adhere strongly to the hard insulator layer 16a. That is, the interlayer connection conductor v2a is held by the insulator layer 16a due to an anchor effect. As a result, the interlayer connection conductor v2a is prevented from coming off the through hole when the laminate 12 is deformed, for example. As described above, the occurrence of poor connections between the interlayer connection conductor v2a and the signal terminal 26b can be suppressed according to the circuit board 10. Note that for the same reason as for the interlayer connection conductor v2a, the occurrence of poor connections is also suppressed for the interlayer connection conductors v2b, v4a, and v4b.

[0060] Condition 1 is verified as follows. First, a test piece is prepared by removing the insulator layers 16a and 17a from the laminate 12. The Young's modulus of the test piece at room temperature is measured while only the insulator layer 16a is removed from the test piece. If the Young's modulus of the test piece at room temperature decreases due to the removal of the insulator layer 16a, the Young's modulus of the insulator layer 16a at room temperature is higher than the Young's modulus of the insulator layer 17a at room temperature.

[0061] Condition 2 is verified as follows. The circuit board 10 is cut to form a cross section as shown in FIG. 2. The cross section is then observed using an SEM. At this time, an image of the inner circumferential surface of the through hole (i.e., the surface formed by the insulating layer) is observed. The image of the inner circumferential surface of the through hole is traced to measure the surface roughness. The surface roughness in this specification is, for example, arithmetic surface roughness. By tracing the image of the inner circumferential surface of the through hole, it is converted into height information for each location, and the arithmetic mean roughness is calculated according to the definition of arithmetic mean roughness.

[0062] The circuit board 10 can also prevent poor connections between the interlayer connection conductor v2a and the signal terminal 26b for the following reason: More specifically, when viewed in the vertical direction (Z-axis direction), the area of ​​the upper end (the end in the positive direction of the Z-axis) of the interlayer connection conductor v2a is smaller than the area of ​​the lower end (the end in the negative direction of the Z-axis) of the interlayer connection conductor v2a. With such an interlayer connection conductor v2a, poor connections are likely to occur between the upper end of the interlayer connection conductor v2a, which has a small area when viewed in the vertical direction, and the signal terminal 26b.

[0063] Therefore, the lower main surface (negative main surface) of the insulator layer 16a (second insulator layer) is in contact with the upper main surface (positive main surface) of the insulator layer 17a (first insulator layer). That is, the insulator layer 16a is located on the insulator layer 17a. The insulator layer 16a (second insulator layer) has a higher Young's modulus at room temperature than the insulator layer 17a (first insulator layer). Furthermore, the surface roughness of the portion Pa located on the insulator layer 16a (second insulator layer) of the inner circumferential surface of the through hole is greater than the surface roughness of the portion Pb located on the insulator layer 17a (first insulator layer) of the inner circumferential surface of the through hole. As a result, the upper end of the interlayer connection conductor v2a, which is prone to connection failure, is strongly adhered to the hard insulator layer 16a. That is, the upper end of the interlayer connection conductor v2a, which is prone to connection failure, is held by the insulator layer 16a due to the anchor effect. As a result, the position of the upper end of the interlayer connection conductor v2a is prevented from shifting when, for example, the laminate 12 is deformed. As described above, the circuit board 10 can prevent connection defects from occurring between the interlayer connection conductor v2a and the signal terminal 26b. Note that, for the same reason as with the interlayer connection conductor v2a, connection defects are also prevented from occurring with the interlayer connection conductors v2b, v4a, and v4b.

[0064] In the circuit board 10, the surface roughness of the portion Pa located on the insulator layer 16a (second insulator layer) of the inner circumferential surface of the through hole is greater than the surface roughness of the portion Pb located on the insulator layer 17a (first insulator layer) of the inner circumferential surface of the through hole. That is, the surface roughness of a portion of the interlayer connection conductor v2a is greater. Therefore, there are fewer portions in the interlayer connection conductor v2a where high-frequency signal loss is likely to occur. As a result, the circuit board 10 suppresses high-frequency signal loss in the interlayer connection conductor v2a. For the same reason as in the interlayer connection conductor v2a, high-frequency signal loss is suppressed in the interlayer connection conductors v2b, v4a, and v4b.

[0065] The circuit board 10 also suppresses high-frequency signal loss in the interlayer connection conductor v2a for the following reasons. More specifically, the thickness of the insulator layers 16a, 16b (second insulator layers) in the up-down direction (Z-axis direction) is smaller than the thickness of the insulator layers 17a, 17b (first insulator layers) in the up-down direction (Z-axis direction). This reduces the area of ​​the portion Pb, thereby reducing the number of areas in the interlayer connection conductor v2a where high-frequency signal loss is likely to occur. Therefore, the circuit board 10 suppresses high-frequency signal loss in the interlayer connection conductor v2a. For the same reason as in the interlayer connection conductor v2a, high-frequency signal loss is suppressed in the interlayer connection conductors v2b, v4a, and v4b.

[0066] According to the circuit board 10, the connector 50b is mounted on the signal terminal 26b. Therefore, when a mating connector is connected to the connector 50b, force is likely to be applied to the signal terminal 26b. This makes it easy for a poor connection to occur between the signal terminal 26b and the interlayer connection conductor v2a. Therefore, the insulator layers 16a and 17a located near the signal terminal 26b have the following structure: The insulator layer 16a (second insulator layer) has a Young's modulus at room temperature higher than that of the insulator layer 17a (first insulator layer). The surface roughness of the portion Pa located on the insulator layer 16a (second insulator layer) within the inner circumferential surface of the through hole is greater than the surface roughness of the portion Pb located on the insulator layer 17a (first insulator layer) within the inner circumferential surface of the through hole. This, as described above, can prevent a poor connection from occurring between the interlayer connection conductor v2a and the signal terminal 26b.

[0067] In the circuit board 10, the materials of the insulator layers 16a and 16b are different from the materials of the insulator layers 17a and 17b. This allows various combinations of materials for the insulator layers 16a and 16b and various combinations of materials for the insulator layers 17a and 17b. As a result, the circuit board 10 can have various electrical and mechanical properties.

[0068] In the circuit board 10, the insulator layers 16a and 16b (second insulator layers) have a Young's modulus at room temperature that is higher than that of the insulator layers 17a and 17b (first insulator layers). The thickness of the insulator layers 16a and 16b (second insulator layers) in the vertical direction (Z-axis direction) is smaller than the thickness of the insulator layers 17a and 17b (first insulator layers) in the vertical direction (Z-axis direction). In other words, the hard insulator layers 16a and 16b are thinner than the soft insulator layers 17a and 17b. This allows the laminate 12 to be easily bent.

[0069] (First Modification) A circuit board 10a according to a first modified example will be described below with reference to the drawings. Figure 9 is a cross-sectional view of the right end portion of the circuit board 10a.

[0070] The circuit board 10a differs from the circuit board 10 in that the interlayer connection conductors v2a, v2b, v4a to v4d are through-hole conductors and that an insulator layer 16e is provided instead of the insulator layer 17d. The through-hole conductors are formed by plating the inner circumferential surface of a through hole. The interlayer connection conductor v2a penetrates the connection conductor layer 28b in the vertical direction. The interlayer connection conductor v2b penetrates the signal conductor layer 20 in the vertical direction. The interlayer connection conductor v4a penetrates the connection conductor layer 30b in the vertical direction. The interlayer connection conductor v4b penetrates the connection conductor layer 32b in the vertical direction. The interlayer connection conductor v4c penetrates the connection conductor layer 34b in the vertical direction. The interlayer connection conductor v4d penetrates the second ground conductor layer 24 in the vertical direction. The interlayer connection conductor v4d also penetrates the insulator layers 16e and 17e in the vertical direction.

[0071] Furthermore, the interiors of the interlayer connection conductors v2a, v2b, v4a to v4c are filled with an insulating material. More specifically, the interiors of the interlayer connection conductors v2a and v4a are filled with a portion of the insulator layer 16b. The interiors of the interlayer connection conductors v2b and v4b are filled with a portion of the insulator layer 17c. The interior of the interlayer connection conductor v4c is filled with a portion of the insulator layer 16e. However, the interior of the interlayer connection conductor v4d is not filled with an insulating material. The other structure of the circuit board 10a is the same as that of the circuit board 10, so a description thereof will be omitted. The circuit board 10a can achieve the same effects as the circuit board 10.

[0072] (Second Modification) A circuit board 10b according to a second modified example will be described below with reference to the drawings. Figure 10 is a cross-sectional view of the right end portion of the circuit board 10b.

[0073] The circuit board 10b differs from the circuit board 10 in that the laminate 12 includes insulator layers 116a and 116b (third insulator layers). More specifically, the insulator layers 116a and 116b (third insulator layers) have a Young's modulus at room temperature higher than that of the insulator layers 17a and 17b (first insulator layers). The insulator layer 116a (third insulator layer) is located below the insulator layer 17a (first insulator layer) (in the negative direction of the Z axis) and in contact with the insulator layer 17a (first insulator layer). The insulator layer 116b (third insulator layer) is located below the insulator layer 17b (first insulator layer) (in the negative direction of the Z axis) and in contact with the insulator layer 17b (first insulator layer).

[0074] The connection conductor layers 28b and 30b (first conductor layer) are located on the lower main surface of the insulator layer 116a (third insulator layer) which is located below the insulator layer 16a (second insulator layer) (in the negative direction of the Z axis). The signal conductor layer 20 and the connection conductor layer 32b (first conductor layer) are located on the lower main surface of the insulator layer 116b (third insulator layer) which is located below the insulator layer 16b (second insulator layer) (in the negative direction of the Z axis).

[0075] The through holes in which the interlayer connection conductors v2a and v4a are provided penetrate the insulator layer 116a (third insulator layer) in the vertical direction (Z-axis direction). The surface roughness of a portion Pc of the inner circumferential surface of the through hole located on the insulator layer 116a (third insulator layer) is greater than the surface roughness of a portion Pb of the inner circumferential surface of the through hole located on the insulator layer 17a (first insulator layer). The through holes in which the interlayer connection conductors v2b and v4b are provided penetrate the insulator layer 116b (third insulator layer) in the vertical direction (Z-axis direction). The surface roughness of a portion Pc of the inner circumferential surface of the through hole located on the insulator layer 116b (third insulator layer) is greater than the surface roughness of a portion Pb of the inner circumferential surface of the through hole located on the insulator layer 17b (first insulator layer). The other structure of the circuit board 10b is the same as that of the circuit board 10, so a description thereof will be omitted. The circuit board 10b can achieve the same effects as the circuit board 10.

[0076] Furthermore, the circuit board 10b has a large area where the interlayer connection conductor v2a is firmly held, which can prevent poor connection between the interlayer connection conductor v2a and the signal terminal 26b.

[0077] Furthermore, the circuit board 10b can prevent poor connection between the interlayer connection conductor v2a and the connection conductor layer 28b. More specifically, the insulator layer 116a (third insulator layer) is located below (in the negative direction of the Z axis) the insulator layer 17a (first insulator layer) and is in contact with the insulator layer 17a (first insulator layer). The surface roughness of the portion Pc of the inner circumferential surface of the through hole that is located on the insulator layer 116a (third insulator layer) is greater than the surface roughness of the portion Pb of the inner circumferential surface of the through hole that is located on the insulator layer 17a (first insulator layer). This allows the lower end of the interlayer connection conductor v2a to adhere strongly to the hard insulator layer 116a. That is, the lower end of the interlayer connection conductor v2a is held by the insulator layer 116a due to the anchor effect. As a result, the position of the lower end of the interlayer connection conductor v2a is prevented from shifting when the laminate 12 is deformed, for example. From the above, the circuit board 10 bThis can prevent connection defects from occurring between the interlayer connection conductor v2a and the connection conductor layer 28b. For the same reason as the interlayer connection conductor v2a, connection defects are also prevented from occurring in the interlayer connection conductors v2b, v4a, and v4b.

[0078] (Third Modification) A circuit board 10c according to a third modified example will be described below with reference to the drawings. Figure 11 is a cross-sectional view of the right end portion of the circuit board 10c.

[0079] The circuit board 10c differs from the circuit board 10 in the structure of the insulator layers 16a and 16b. More specifically, the insulator layers 16a and 16b (second insulator layers) have a structure in which a plurality of particles P are dispersed in a resin. The plurality of particles P have a shape having a longitudinal direction and a lateral direction. The number of the plurality of particles P whose longitudinal direction forms an angle of 45 degrees or more with the Z axis is greater than the number of the plurality of particles P whose longitudinal direction forms an angle of less than 45 degrees with the Z axis. Some of the plurality of particles P are exposed on the inner circumferential surface of the through hole in the insulator layers 16a and 16b (second insulator layers). As a result, the surface roughness of a portion Pa located on the insulator layer 16a of the inner circumferential surface of the through hole is greater than the surface roughness of a portion Pb located on the insulator layer 17a of the inner circumferential surface of the through hole. The surface roughness of a portion Pa of the inner circumferential surface of the through hole located on the insulating layer 16b is greater than the surface roughness of a portion Pb of the inner circumferential surface of the through hole located on the insulating layer 17b.

[0080] Here, the resin is, for example, a fluororesin. The material of the particles P is an inorganic material. The material of the particles P is, for example, boron nitride. Therefore, the Young's modulus of the particles P at room temperature is greater than the Young's modulus of the resin at room temperature. This makes the Young's modulus of the insulator layers 16a and 16b at room temperature greater than the Young's modulus of the insulator layers 17a to 17e at room temperature. The dielectric constant of the particles P may be lower than the dielectric constant of the resin. This reduces the dielectric constant of the insulator layers 16a and 16b.

[0081] In addition, in circuit board 10c, the material of insulator layers 17a to 17e is fluororesin, the same as the material of insulator layers 16a and 16b. Other structures of circuit board 10c are the same as those of circuit board 10. Circuit board 10c can achieve the same effects as circuit board 10.

[0082] Furthermore, in the circuit board 10c, the particles P have a shape with a longitudinal direction and a lateral direction. The number of particles P whose longitudinal direction forms an angle of 45 degrees or more with the Z axis is greater than the number of particles P whose longitudinal direction forms an angle of less than 45 degrees with the Z axis (Condition 3). This reduces the linear expansion coefficients of the insulator layers 16a, 16b in the front-rear and left-right directions.

[0083] Condition 3 is verified by the following procedure. First, test pieces are cut out from the insulator layers 16a and 16b. By observing the test pieces, the number of particles P whose longitudinal direction forms an angle of 45 degrees or more with the Z axis and the number of particles P whose longitudinal direction forms an angle of less than 45 degrees with the Z axis are counted.

[0084] (Fourth Modification) A circuit board 10d according to a fourth modification will be described below with reference to the drawings. Figure 12 is a cross-sectional view of the right end portion of the circuit board 10d.

[0085] In the circuit board 10d, the surface roughness of the upper principal surfaces (positive principal surfaces) of the connection conductor layers 28b, 30b (first conductor layers) is smaller than the surface roughness of the lower principal surfaces (negative principal surfaces) of the connection conductor layers 28b, 30b (first conductor layers). As a result, the connection conductor layers 28b, 30b are firmly fixed to the insulator layer 16b due to the anchor effect. Furthermore, the surface roughness of the lower principal surfaces (negative principal surfaces) of the first ground conductor layer 22 and the signal terminal 26b (second conductor layer) is greater than the surface roughness of the upper principal surfaces (positive principal surfaces) of the first ground conductor layer 22 and the signal terminal 26b (second conductor layer). As a result, the first ground conductor layer 22 and the signal terminal 26b are firmly fixed to the insulator layer 16a due to the anchor effect. The other structure of the circuit board 10d is the same as that of the circuit board 10, so a description thereof will be omitted. The circuit board 10d can achieve the same effects as the circuit board 10.

[0086] In the circuit board 10d, the connecting conductor layers 28b and 30b are firmly fixed to the insulator layer 16b due to the anchor effect. Furthermore, the first ground conductor layer 22 and the signal terminal 26b are firmly fixed to the insulator layer 16a due to the anchor effect. Therefore, the connecting conductor layers 28b and 30b do not need to be chemically bonded to the insulator layer 16b. Furthermore, the first ground conductor layer 22 and the signal terminal 26b do not need to be chemically bonded to the insulator layer 16a. This increases the flexibility in selecting materials for the insulator layers 16a and 16b.

[0087] (Fifth Modification) A circuit board 10e according to a fifth modified example will be described below with reference to the drawings. Figure 13 is a cross-sectional view of the right end portion of the circuit board 10e.

[0088] The circuit board 10e differs from the circuit board 10a in that the interlayer connection conductors v2a, v2b, v4a to v4d are filled with a conductive material. The conductive material is formed, for example, by sintering a conductive paste that is a mixture of resin and metal powder. The rest of the structure of the circuit board 10e is the same as that of the circuit board 10a, so a description thereof will be omitted. The circuit board 10e can achieve the same effects as the circuit board 10a.

[0089] (Other embodiments) The transmission line according to the present invention is not limited to the circuit boards 10, 10a to 10e, and can be modified within the scope of the invention. Note that the configurations of the circuit boards 10, 10a to 10e may be combined arbitrarily.

[0090] A conductor layer may be present between the first and second insulating layers.

[0091] The interlayer connection conductor may pass through the first conductor layer or the second conductor layer in the Z-axis direction.

[0092] When viewed in the vertical direction, the area of ​​the end of the interlayer connection conductor in the positive direction of the Z axis may be equal to or greater than the area of ​​the end of the interlayer connection conductor in the negative direction of the Z axis.

[0093] The particles may not necessarily have a longitudinal direction and a lateral direction, i.e., the particles may be spherical.

[0094] The number of particles whose longitudinal direction and the Z axis form an angle of 45 degrees or more may be equal to or less than the number of particles whose longitudinal direction and the Z axis form an angle of less than 45 degrees.

[0095] In the circuit board 10c, the resin of the insulating layers 16a and 16b may be different from the resin of the insulating layers 17a and 17b.

[0096] The thickness of the second insulating layer in the Z-axis direction may be equal to or greater than the thickness of the first insulating layer in the Z-axis direction.

[0097] The material of the first insulating layer and / or the material of the second insulating layer may be a fluororesin. [Explanation of symbols]

[0098] 1:Electronic equipment 10, 10a to 10e: Circuit board 12: Laminate 16a, 16b, 16e, 17a to 17e, 18a, 18b, 116a, 116b: insulating layers 20: Signal conductor layer 22: First ground conductor layer 24: Second ground conductor layer 26a, 26b: Signal terminal 28a, 28b, 30a, 30b, 32a, 32b, 34a, 34b: connecting conductor layers 200a to 200e: Conductive layers A1: First section A2: Second section A3: Third Section H: Through hole P: Particle Pa,Pb,Pc:part v1, v2, v2a, v2b, v3, v4, v4a, v4b, v4c, v4d, v4e, v5, v6: Interlayer connection conductors

Claims

1. a laminate having a structure in which a plurality of insulator layers including a first insulator layer and a second insulator layer having a Young's modulus at room temperature higher than that of the first insulator layer at room temperature are stacked in the Z-axis direction, each of the plurality of insulator layers having a negative principal surface located in the negative direction of the Z-axis and a positive principal surface located in the positive direction of the Z-axis, and the negative principal surface of the second insulator layer is in contact with the positive principal surface of the first insulator layer; an interlayer connection conductor provided inside a through hole that penetrates the first insulator layer and the second insulator layer in the Z-axis direction; a first conductor layer located on a negative principal surface of the insulator layer located in a negative direction of the Z axis from the second insulator layer and in contact with an end of the interlayer connection conductor in the negative direction of the Z axis; a second conductor layer located on a front main surface of the second insulator layer and in contact with an end of the interlayer connection conductor in the positive direction of the Z axis; It is equipped with a surface roughness of a portion of the inner circumferential surface of the through hole that is located on the second insulator layer is greater than a surface roughness of a portion of the inner circumferential surface of the through hole that is located on the first insulator layer; no conductor layer in contact with the interlayer connection conductor is provided between the first insulator layer and the second insulator layer, the plurality of insulator layers includes a third insulator layer; the third insulator layer has a Young's modulus at room temperature higher than that of the first insulator layer at room temperature, is located in a negative direction of the Z axis relative to the first insulator layer, and is in contact with the first insulator layer; the through hole penetrates the third insulator layer in the Z-axis direction, the insulator layer located in the negative direction of the Z axis from the second insulator layer is the third insulator layer; Circuit board.

2. a surface roughness of a portion of the inner circumferential surface of the through hole that is located on the third insulator layer is greater than a surface roughness of a portion of the inner circumferential surface of the through hole that is located on the first insulator layer; The circuit board according to claim 1 .

3. A laminate having a structure in which a plurality of insulator layers including a first insulator layer and a second insulator layer having a Young's modulus at room temperature higher than that of the first insulator layer at room temperature are stacked in the Z-axis direction, each of the plurality of insulator layers having a negative principal surface located in the negative direction of the Z-axis and a positive principal surface located in the positive direction of the Z-axis, and the negative principal surface of the second insulator layer is in contact with the positive principal surface of the first insulator layer; an interlayer connection conductor provided inside a through hole that penetrates the first insulator layer and the second insulator layer in the Z-axis direction; a first conductor layer located on a negative principal surface of the insulator layer located in a negative direction of the Z axis from the second insulator layer and in contact with an end of the interlayer connection conductor in the negative direction of the Z axis; a second conductor layer located on the front main surface of the second insulator layer and in contact with an end of the interlayer connection conductor in the positive direction of the Z axis; It is equipped with a surface roughness of a portion of the inner circumferential surface of the through hole that is located on the second insulator layer is greater than a surface roughness of a portion of the inner circumferential surface of the through hole that is located on the first insulator layer; no conductor layer in contact with the interlayer connection conductor is provided between the first insulator layer and the second insulator layer, the surface roughness of the positive principal surface of the first conductor layer is smaller than the surface roughness of the negative principal surface of the first conductor layer; The surface roughness of the negative principal surface of the second conductor layer is greater than the surface roughness of the positive principal surface of the second conductor layer. Circuit board.

4. A laminate having a structure in which a plurality of insulator layers including a first insulator layer and a second insulator layer having a Young's modulus at room temperature higher than that of the first insulator layer at room temperature are stacked in the Z-axis direction, each of the plurality of insulator layers having a negative principal surface located in the negative direction of the Z-axis and a positive principal surface located in the positive direction of the Z-axis, and the negative principal surface of the second insulator layer is in contact with the positive principal surface of the first insulator layer; an interlayer connection conductor provided inside a through hole that penetrates the first insulator layer and the second insulator layer in the Z-axis direction; a first conductor layer located on a negative principal surface of the insulator layer located in a negative direction of the Z axis from the second insulator layer and in contact with an end of the interlayer connection conductor in the negative direction of the Z axis; a second conductor layer located on the front main surface of the second insulator layer and in contact with an end of the interlayer connection conductor in the positive direction of the Z axis; It is equipped with a surface roughness of a portion of the inner circumferential surface of the through hole that is located on the second insulator layer is greater than a surface roughness of a portion of the inner circumferential surface of the through hole that is located on the first insulator layer; no conductor layer in contact with the interlayer connection conductor is provided between the first insulator layer and the second insulator layer, the stack has a first section and a second section; The second section is bent relative to the first section in the Z-axis direction of the first section. Circuit board.

5. The first conductor layer is located on the negative principal surface of the first insulator layer. The circuit board according to claim 3 or 4.

6. No conductor layer is provided between the first insulator layer and the second insulator layer.

5. The circuit board according to claim 1.

7. the interlayer connection conductor does not penetrate the first conductor layer and the second conductor layer in the Z-axis direction; 5. The circuit board according to claim 1.

8. When viewed in the Z-axis direction, the area of ​​the end of the interlayer connection conductor in the positive direction of the Z-axis is smaller than the area of ​​the end of the interlayer connection conductor in the negative direction of the Z-axis.

5. The circuit board according to claim 1.

9. the second insulating layer has a structure in which a plurality of particles are dispersed in a resin; 5. The circuit board according to claim 1.

10. The plurality of particles have a shape having a longitudinal direction and a lateral direction. The circuit board according to claim 9.

11. the number of the plurality of particles whose longitudinal direction and the Z axis form an angle of 45 degrees or more is greater than the number of the plurality of particles whose longitudinal direction and the Z axis form an angle of less than 45 degrees; The circuit board according to claim 10.

12. a part of the plurality of particles is exposed on an inner circumferential surface of the through hole in the second insulator layer; The circuit board according to claim 9.

13. the surface roughness of the negative principal surface of the first conductor layer is substantially equal to the surface roughness of the positive principal surface of the first conductor layer; the surface roughness of the negative principal surface of the second conductor layer is substantially equal to the surface roughness of the positive principal surface of the second conductor layer; The circuit board according to claim 1, claim 2, or claim 4.

14. the material of the first insulator layer and / or the material of the second insulator layer is a fluororesin; The circuit board according to claim 13.

15. The thickness of the second insulator layer in the Z-axis direction is smaller than the thickness of the first insulator layer in the Z-axis direction.

5. The circuit board according to claim 1.

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