Chip Resistors

Abstract

To provide a chip resistor having high corrosion resistivity by preventing peel-off of an outer plated layer.SOLUTION: A chip resistor 1 of the present invention comprises an auxiliary conductive film 8 that overlaps an edge of a protection film 11 beyond a boundary location with the protection film 11 covering a whole resistive element 5, in a region apart from an edge of an insulation substrate 2 on a pair of front electrodes 3. A resistance value of the auxiliary conductive film 8 is higher than resistance values of the front electrodes 3 and an end face electrode 9. An outer plated layer 10 covers the auxiliary conductive film 8 and extends to the boundary location between the auxiliary conductive film 8 and the protection layer 11. The auxiliary conductive film 8 comprises two layers of a first auxiliary conductive film 80 formed on an edge of the protection film 11 at a position apart from the front electrodes 3 and a second auxiliary conductive film 81 that covers a portion of the first auxiliary conductive film 80 and comes into contact with the front electrodes 3. The first auxiliary conductive film 80 is made of a carbon-based conductive material, and the second auxiliary conductive film 81 is made of a metal conductive material.SELECTED DRAWING: Figure 10

Description

[Technical Field]

[0001] The present invention relates to a surface-mount type chip resistor. [Background technology]

[0002] Generally, a chip resistor is mainly composed of a rectangular parallelepiped insulating substrate, a pair of front electrodes arranged opposite each other at a predetermined distance on the surface of the insulating substrate, a pair of back electrodes arranged opposite each other at a predetermined distance on the back surface of the insulating substrate, a pair of end electrodes that connect the front electrodes to the back electrodes, a pair of external plating layers that cover each of these electrodes, a resistive element that bridges the pair of front electrodes, and an insulating protective film that covers the resistive element.

[0003] In this type of chip resistor, the front electrode is typically made of a low-resistivity Ag (silver)-based metal material, and an outer plating layer is formed to cover this front electrode. However, highly corrosive sulfide gases and the like can easily penetrate through the gap at the boundary between the outer plating layer and the protective film, and there is a risk that the front electrode portion at the boundary between the front electrode and the protective film will be corroded by the sulfide gases and the like, resulting in problems such as changes in resistance value and breakage.

[0004] 12(a), a chip resistor has been proposed in which a pair of end electrodes 100 are formed so as to extend beyond the boundary between the front electrode 104 and the protective film 101 and cover the edge of the protective film 101, and the outer plating layer 102 is tightly attached to the edge of the protective film 101, thereby eliminating the gap at the boundary between the outer plating layer 102 and the protective film 101 and preventing the front electrode portion at the boundary between the front electrode 104 and the protective film 101 from being exposed to sulfide gas (see, for example, Patent Document 1). In FIG. 12, reference numeral 103 denotes an insulating substrate, reference numeral 105 denotes a resistor, and reference numeral 106 denotes a back electrode. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-158721 Summary of the Invention [Problem to be solved by the invention]

[0006] In conventional chip resistors, electrolytic plating is widely used to form the outer plating layer because it has advantages over electroless plating, such as lower cost and shorter plating time. In electrolytic plating, the current flows perpendicular to the equipotential surface of the electrode surface, which is the object to be plated. Therefore, when the object to be plated has a complex shape, the current distribution becomes uneven, making it difficult to form a plating film of uniform thickness.

[0007] 12(a), when the outer plating layer 102 is formed by electrolytic plating, current density concentrates at the tip of the outer plating layer 102, which tends to result in the formation of a thick portion 102a at the tip of the outer plating layer 102 that is in close contact with the end of the protective film 101, as shown in Fig. 12(b). When such a thick portion 102a is formed, the outer plating layer 102 that is in close contact with the end of the protective film 101 tends to peel off from the side of the thick portion 102a at the tip, which results in a gap at the boundary between the outer plating layer 102 and the protective film 101, allowing sulfide gas and the like to enter through this portion.

[0008] The present invention has been made in view of the above-mentioned state of the art, and its object is to provide a chip resistor that is excellent in corrosion resistance by preventing peeling of the outer plating layer. [Means for solving the problem]

[0009] In order to achieve the above object, the chip resistor of the present invention comprises a rectangular parallelepiped insulating substrate, a pair of front electrodes provided at both ends of the front surface of the insulating substrate, a pair of back electrodes provided at both ends of the back surface of the insulating substrate, a resistor provided so as to straddle the pair of front electrodes, an insulating protective film covering the entire resistor including the connection portion between the front electrodes and the resistor, a pair of end surface electrodes extending at least to both end surfaces of the insulating substrate and conducting between the front electrodes and the back electrode, and a pair of external plating layers provided so as to cover the end surface electrodes and extending beyond the boundary position between the front electrodes and the protective film to the end of the protective film. In the chip resistor, an auxiliary conductive film is provided on the front electrode in an area spaced from the end face of the insulating substrate, the auxiliary conductive film extending beyond the boundary with the protective film and overlapping the end of the protective film, the resistance value of the auxiliary conductive film is set higher than the resistance values ​​of the front electrode and the end face electrode, the outer plating layer covers the auxiliary conductive film and extends to the boundary between the auxiliary conductive film and the protective film, and the auxiliary conductive film has a two-layer structure consisting of a first auxiliary conductive film formed on the end of the protective film at a position spaced from the front electrode, and a second auxiliary conductive film covering a part of the first auxiliary conductive film and contacting the front electrode, The second auxiliary conductive film is made of a metal-based conductive material, and the first auxiliary conductive film is made of a carbon-based conductive material having a higher resistance value than the second auxiliary conductive film. It is characterized by the following.

[0010] In a chip resistor configured in this manner, auxiliary conductive films are provided on both ends of the protective film, extending beyond the boundary with the surface electrode, and these auxiliary conductive films are in contact with the surface electrode at a position on the surface electrode away from the edge face of the insulating substrate, and the resistance value of the auxiliary conductive films is set higher than the resistance value of the surface electrode and the edge face electrode.The auxiliary conductive films have a two-layer structure consisting of a first auxiliary conductive film formed on the end face of the protective film at a position away from the surface electrode, and a second auxiliary conductive film covering a part of the first auxiliary conductive film and in contact with the surface electrode, The second auxiliary conductive film is made of a metal-based conductive material, and the first auxiliary conductive film is made of a carbon-based conductive material having a higher resistance value than the second auxiliary conductive film. Therefore, the resistance value of the auxiliary conductive film can be made higher on the protective film side and lower on the end face side. As a result, when the outer plating layer is formed by electrolytic plating, the current density at the tip of the outer plating layer can be reduced, so the tip of the outer plating layer does not become a thick film portion, preventing peeling of the outer plating layer and realizing a chip resistor with excellent corrosion resistance.

[0011] In the chip resistor having the above configuration, the first auxiliary conductive film is set to be higher than the upper surface of the protective film. [Effects of the Invention]

[0012] According to the present invention, it is possible to provide a chip resistor that is excellent in corrosion resistance by preventing peeling of the outer plating layer. [Brief explanation of the drawings]

[0013] [Figure 1] 1 is a cross-sectional view of a chip resistor according to a first embodiment of the present invention. [Figure 2] 3A to 3C are plan views showing the manufacturing process of the chip resistor. [Figure 3] 3A to 3C are cross-sectional views showing a manufacturing process of the chip resistor. [Figure 4] FIG. 4 is a cross-sectional view of a chip resistor according to a second embodiment of the present invention. [Figure 5] 3A to 3C are plan views showing the manufacturing process of the chip resistor. [Figure 6] 3A to 3C are cross-sectional views showing a manufacturing process of the chip resistor. [Figure 7] FIG. 10 is a cross-sectional view of a chip resistor according to a third embodiment of the present invention. [Figure 8] 3A to 3C are plan views showing the manufacturing process of the chip resistor. [Figure 9] 3A to 3C are cross-sectional views showing a manufacturing process of the chip resistor. [Figure 10] FIG. 10 is a cross-sectional view of a chip resistor according to a fourth embodiment of the present invention. [Figure 11] FIG. 10 is a cross-sectional view of a chip resistor according to a fifth embodiment of the present invention. [Figure 12] FIG. 10 is a cross-sectional view of a chip resistor according to a conventional example. DETAILED DESCRIPTION OF THE INVENTION

[0014] Hereinafter, the embodiments of the invention will be described with reference to the drawings. FIG. 1 is a cross-sectional view of a chip resistor 1 according to a first embodiment, FIG. 2 is a plan view showing a manufacturing process of the chip resistor 1, and FIG. 3 is a cross-sectional view showing a manufacturing process of the chip resistor 1.

[0015] As shown in Figure 1, the chip resistor 1 of the first embodiment is mainly composed of a rectangular insulating substrate 2, a pair of front electrodes 3 provided at both longitudinal ends of the upper surface of the insulating substrate 2, a pair of back electrodes 4 provided at both longitudinal ends of the lower surface of the insulating substrate 2, a rectangular resistor 5 provided across the pair of front electrodes 3, an undercoat layer 6 covering the entire resistor 5 including the connection portion between the front electrodes 3 and the resistor 5, an overcoat layer 7 covering the undercoat layer 6, a pair of auxiliary conductive films 8 provided at both ends of the overcoat layer 7, a pair of end electrodes 9 extending on both end surfaces of the insulating substrate 2 and connecting the corresponding front electrodes 3 and back electrodes 4, and a pair of external plating layers 10 provided to cover the end electrodes 9.

[0016] The insulating substrate 2 is made of ceramics or the like, and is obtained by dividing a large-sized aggregate substrate (described later) along primary dividing grooves and secondary dividing grooves extending lengthwise and widthwise, thereby obtaining a large number of insulating substrates 2 .

[0017] The front electrode 3 is made by screen printing an Ag (silver) paste containing 1 to 5 wt% Pd (palladium), followed by drying and firing. Similarly, the back electrode 4 is made by screen printing an Ag (silver) paste containing 1 to 5 wt% Pd, followed by drying and firing.

[0018] The resistor 5 is made by screen printing a resistive paste such as ruthenium oxide, drying and baking it, and both longitudinal ends of the resistor 5 overlap the front electrodes 3. Although not shown, the resistor 5 has trimming grooves formed therein for adjusting the resistance value.

[0019] The undercoat layer 6 and overcoat layer 7 constitute a two-layer protective film 11. The undercoat layer 6 is formed by screen-printing a glass paste, followed by drying and baking, and is formed so as to cover the resistor element 5 before the trimming groove is formed. The overcoat layer 7 is formed by screen-printing an epoxy resin paste, followed by heat curing (baking), and is formed so as to cover the undercoat layer 6 after the trimming groove is formed.

[0020] The auxiliary conductive film 8 is formed by screen printing a resin paste filled with a carbon-based conductive filler and then heating and hardening it. This auxiliary conductive film 8 covers the end of the overcoat layer 7 and is formed in an area extending from the boundary between the front electrode 3 and the overcoat layer 7 to a position closer to the end face.

[0021] The edge electrodes 9 are formed by sputtering nickel (Ni) / chromium (Cr) or the like, and provide electrical continuity between the front electrode 3 and the back electrode 4, which are separated by the edge of the insulating substrate 2. The edge electrodes 9 extend beyond the boundary between the front electrode 3 and the auxiliary conductive film 8 to the side edges of the auxiliary conductive film 8, and the upper surface of the auxiliary conductive film 8 near the overcoat layer 7 is exposed and not covered by the edge electrodes 9.

[0022] The outer plating layer 10 is a two-layer structure consisting of a barrier layer and an external connection layer. The barrier layer is a Ni-plated layer formed by electrolytic plating, and the external connection layer is a Sn-plated layer formed by electrolytic plating. The outer plating layer 10 covers the entire surface of the end electrode 9 and the exposed back electrode 4 from the end electrode 9, as well as the exposed auxiliary conductive film 8 from the end electrode 9.

[0023] Here, while the front electrode 3 and the end electrode 9 are made of a metal-based conductive material such as silver or nickel, the auxiliary conductive film 8 is made of a carbon-based conductive material that does not contain metal, and therefore the resistance value of the auxiliary conductive film 8 is higher than the resistance value of the front electrode 3 and the end electrode 9. In other words, the surface resistance of the auxiliary conductive film 8 is lower on the end face side covered by the end electrode 9 and higher on the overcoat layer 7 side exposed from the end electrode 9. Therefore, when the outer plating layer 10 is formed by electrolytic plating, the current density at the tip of the outer plating layer 10 can be reduced, preventing the tip of the outer plating layer 10 from swelling and becoming a thick film portion.

[0024] Next, a method for manufacturing the chip resistor 1 configured as above will be described with reference to FIGS.

[0025] First, an aggregate substrate 2A is prepared, on which primary and secondary dividing grooves extending in a grid pattern are formed. These primary and secondary dividing grooves divide the front and back surfaces of aggregate substrate 2A into numerous chip formation regions, each of which becomes one insulating substrate 2. While Figures 2 and 3 show one chip formation region as a representative example, in reality, many such chip formation regions are arranged in a grid pattern.

[0026] 2(a) and 3(a), an Ag-Pd paste is screen-printed on the back surface of the aggregate substrate 2A, which is then dried and fired to form a pair of opposing back electrodes 4 at both longitudinal ends of each chip formation region, with a predetermined gap between them. Simultaneously or before or after this, an Ag-Pd paste is screen-printed on the front surface of the aggregate substrate 2A, which is then dried and fired to form a pair of opposing front electrodes 3 at both longitudinal ends of each chip formation region, with a predetermined gap between them. Next, a resistive paste containing ruthenium oxide or the like is screen-printed on the surface of the aggregate substrate 2A, which is then dried and fired to form a rectangular resistor 5, with both ends overlapping the front electrodes 3.

[0027] 2(b) and 3(b), a glass paste is screen-printed on the area covering the resistor 5 and then dried and baked to form an undercoat layer 6 that covers the entire resistor 5, including the connection end with the front electrode 3. Then, a laser beam is irradiated onto the undercoat layer 6 to form a trimming groove (not shown) in the resistor 5 to adjust the resistance value, and then an epoxy resin paste is screen-printed onto the undercoat layer 6 and heat-cured (baked) to form an overcoat layer 7 that covers the entire undercoat layer 6 and the end of the front electrode 3. The undercoat layer 6 and overcoat layer 7 form a protective film 11 with a two-layer structure.

[0028] Next, a resin paste filled with a carbon-based conductive filler is screen-printed and heat-cured to form a pair of auxiliary conductive films 8 that cover both end portions of the overcoat layer 7 by a predetermined width, as shown in Figures 2(c) and 3(c). These auxiliary conductive films 8 cover the ends of the overcoat layer 7 and are formed in a range extending to a position closer to the end surface than the boundary position between the front electrode 3 and the overcoat layer 7, so that the auxiliary conductive films 8 are formed so as to connect to the front electrode 3.

[0029] The steps up to this point have been batch processing of the aggregate substrate 2A, but in the next step, the aggregate substrate 2A is primarily divided into strips along the primary dividing grooves to obtain strip-shaped substrates 2B whose width dimension is the longitudinal direction of the chip formation area.

[0030] Next, Ni / Cr is sputtered toward the divided surfaces of the strip-shaped substrate 2B to form a pair of end electrodes 9 that conduct electricity between the front electrode 3 and the back electrode 4, as shown in Figures 2(d) and 3(d). At this time, the end electrodes 9 are formed beyond the boundary between the front electrode 3 and the auxiliary conductive film 8 to the side edges of the auxiliary conductive film 8, but the upper surface of the auxiliary conductive film 8 closer to the overcoat layer 7 is not covered by the end electrodes 9.

[0031] Next, the rectangular substrate 2B is divided into a plurality of chip substrates 2C along the secondary dividing grooves, and then these chip substrates 2C are sequentially subjected to electrolytic nickel plating and electrolytic tin plating to form an external plating layer 10 that covers the end electrode 9 and back electrode 4, as shown in Figures 2(e) and 3(e), thereby completing the chip resistor 1. This external plating layer 10 has a two-layer structure consisting of a Ni plating layer and a Sn plating layer, and is formed to cover the entire surface of the end electrode 9 and the back electrode exposed from the end electrode 9, as well as to cover the auxiliary conductive film 8 exposed from the end electrode 9.

[0032] As described above, in the chip resistor 1 according to the first embodiment, auxiliary conductive films 8 are provided at both ends of the overcoat layer (protective film) 7, extending beyond the boundary with the front electrode 3. The resistance value of these auxiliary conductive films 8 is set higher than the resistance values ​​of the front electrode 3 and the end electrode 9. Therefore, when the outer plating layer 10 is formed by electrolytic plating, the auxiliary conductive film 8 can reduce the current density at the tip of the outer plating layer 10. As a result, the tip of the outer plating layer 10 does not bulge and become a thick portion, and the tip of the outer plating layer 10, which is formed to a uniform thickness, is configured to adhere closely to the end of the overcoat layer 7. This prevents peeling of the outer plating layer 10 due to the thick portion, and enables the chip resistor 1 to have high corrosion resistance (especially sulfur resistance).

[0033] Fig. 4 is a cross-sectional view of a chip resistor 20 according to a second embodiment, and parts corresponding to those in Fig. 1 are assigned the same reference numerals. The second embodiment shown in Fig. 4 differs from the first embodiment shown in Fig. 1 in that, of the end surface electrode 9, the upper surface portion 9a covering the front electrode 3, the lower surface portion 9b covering the back electrode 4, and the side surface portion 9c covering the end surface of the insulating substrate 2 are formed by sputtering from different directions; other than that, the configuration is basically the same, so repeated explanations will be omitted here.

[0034] A method for manufacturing the chip resistor 20 according to the second embodiment will be described below with reference to Figures 5 and 6. Note that in the manufacturing process for this chip resistor 20, the steps up to the step of forming the auxiliary conductive film 8 shown in Figures 5(a) and 6(a) are the same as those in the first embodiment, and Figures 5 and 6 show the steps thereafter.

[0035] That is, a two-layer protective film 11 consisting of an undercoat layer 6 and an overcoat layer 7 is formed to cover the resistor 5, and then a resin paste filled with a carbon-based conductive filler is screen-printed and heat-cured to form a pair of auxiliary conductive films 8 covering both ends of the overcoat layer 7 with a predetermined width, as shown in Figures 5(a) and 6(a).

[0036] Next, a masking paste that can be washed away with water or the like is screen-printed on the surface of the overcoat layer 7 and dried to form a masking 12 that covers the exposed portion of the overcoat layer 7 sandwiched between the pair of auxiliary conductive films 8, as shown in Figures 5(b) and 6(b). At this time, the masking 12 is formed so as to extend beyond the boundary between the auxiliary conductive film 8 and the overcoat layer 7 and cover part of the auxiliary conductive film 8, but the upper surface of the auxiliary conductive film 8 near the edge is exposed and not covered by the masking 12. Similarly, a masking 13 is formed on the back side of the aggregate substrate 2A to cover the exposed portion of the aggregate substrate 2A sandwiched between the pair of back electrodes 4.

[0037] Next, Ni / Cr is sputtered vertically toward the upper surface of aggregate substrate 2A to form upper surface portions 9a of end electrode 9 that cover front electrode 3 exposed on the front surface side of aggregate substrate 2A, auxiliary conductive film 8, and masking 12, as shown in Figures 5(c) and 6(c). Similarly, Ni / Cr is sputtered vertically toward the lower surface of aggregate substrate 2A to form lower surface portions 9b of end electrode 9 that cover back electrode 4 exposed on the back surface side of aggregate substrate 2A and masking 13.

[0038] Thereafter, the aggregate substrate 2A is primarily divided into strips along the primary dividing grooves to obtain strip-shaped substrates 2B whose width is the longitudinal direction of the chip forming area. Next, Ni / Cr is sputtered horizontally toward the divided surfaces of the strip-shaped substrates 2B to form side portions 9c of the end-face electrodes 9 on the divided surfaces of the strip-shaped substrates 2B, as shown in Figures 5(d) and 6(d).

[0039] Next, after the strip-shaped substrate 2B is secondarily divided along the secondary dividing grooves into a plurality of chip-like substrates 2C, the maskings 12 and 13 are washed and removed, as shown in Figures 5(e) and 6(e). As a result, the upper surface of the overcoat layer 7 and the upper surface of the auxiliary conductive film 8 closer to the overcoat layer 7, which were covered by the masking 12, are exposed without being covered by the edge electrodes 9, and the central portion of the back surface of the chip-like substrate 2C, which was covered by the masking 13, is exposed, forming a pair of edge electrodes 9 that connect the front electrode 3 and back electrode 4 corresponding to both ends of the chip-like substrate 2C.

[0040] Next, the chip substrate 2C is sequentially subjected to electrolytic nickel plating and electrolytic tin plating to form an external plating layer 10 that covers the end electrode 9 and back electrode 4, as shown in Figures 5(f) and 6(f), thereby completing the chip resistor 20. This external plating layer 10 has a two-layer structure consisting of a Ni plating layer and a Sn plating layer, and is formed to cover the entire surface of the end electrode 9 and the back electrode exposed from the end electrode 9, as well as to cover the auxiliary conductive film 8 exposed from the end electrode 9.

[0041] In the chip resistor 20 according to the second embodiment, the upper surface portion 9a, lower surface portion 9b, and side surface portion 9c that make up the end electrode 9 are formed by sputtering from different directions, while the upper surface portion 9a that covers the front electrode 3 and auxiliary conductive film 8 is formed by sputtering perpendicular to the substrate surface, making it easy to form the upper surface portion 9a with a uniform thickness. This prevents uneven current distribution on the upper surface portion 9a, which is the object to be plated, during subsequent electrolytic plating, and also reduces the resistivity of the end electrode 9, further differentiating the resistance value from the exposed portion of the auxiliary conductive film 8. This more reliably prevents a thick portion from forming at the tip of the outer plating layer 10.

[0042] FIG. 7 is a cross-sectional view of a chip resistor 30 according to a third embodiment of the present invention, and parts corresponding to those in FIG. 1 are given the same reference numerals.

[0043] The chip resistor 30 of the third embodiment differs from the chip resistor 1 of the first embodiment in that the end electrode 9 does not cover the surface of the front electrode 3, and the auxiliary conductive film 8 has a two-layer structure consisting of a first auxiliary conductive film 80 formed on the end of the overcoat layer 7 and a second auxiliary conductive film 81 covering part of the first auxiliary conductive film 80; otherwise, the configuration is basically the same.

[0044] That is, as shown in Figure 7, the chip resistor 30 of the third embodiment is mainly composed of a rectangular insulating substrate 2, a pair of front electrodes 3 provided at both longitudinal ends of the upper surface of the insulating substrate 2, a pair of back electrodes 4 provided at both longitudinal ends of the lower surface of the insulating substrate 2, a rectangular resistor 5 arranged to straddle the pair of front electrodes 3, an undercoat layer 6 covering the entire resistor 5 including the connection portion between the front electrodes 3 and the resistor 5, an overcoat layer 7 covering the undercoat layer 6, a pair of first auxiliary conductive films 80 covering both ends of the overcoat layer 7, a pair of second auxiliary conductive films 81 covering the side ends of these first auxiliary conductive films 80, a pair of end electrodes 9 provided on both end surfaces of the insulating substrate 2 and connecting corresponding front electrodes 3 and back electrodes 4, and a pair of external plating layers 10 arranged to cover the end electrodes 9.

[0045] The first auxiliary conductive film 80 is formed by screen-printing and heat-curing a resin paste filled with a carbon-based conductive filler. This first auxiliary conductive film 80 covers the edge of the overcoat layer 7 and is formed closer to the edge than the boundary between the front electrode 3 and the overcoat layer 7. The second auxiliary conductive film 81 is formed by screen-printing and heat-curing a resin paste filled with conductive metal particles such as silver. This second auxiliary conductive film 81 covers the side edge of the first auxiliary conductive film 80 and is formed in a range extending to a position closer to the edge than the boundary between the front electrode 3 and the first auxiliary conductive film 80. The first auxiliary conductive film 80 and the second auxiliary conductive film 81 form a two-layer auxiliary conductive film 8, and the top surfaces of the first auxiliary conductive film 80 and the second auxiliary conductive film 81 are flush with each other. Therefore, the surface resistance of the auxiliary conductive film 8 is lower on the edge side where the second auxiliary conductive film 81 is exposed and higher on the overcoat layer 7 side where the first auxiliary conductive film 80 is exposed.

[0046] Next, a method for manufacturing the chip resistor 30 configured as described above will be described with reference to Figures 8 and 9. Note that in the manufacturing process of this chip resistor 30, the steps up to the step of forming the overcoat layer 7 shown in Figures 8(a) and 9(a) are the same as those of the first embodiment, and Figures 8 and 9 show the steps thereafter.

[0047] That is, as shown in Figures 8(a) and 9(a), a two-layer protective film 11 consisting of an undercoat layer 6 and an overcoat layer 7 is formed to cover the resistor 5, and then a resin paste filled with a carbon-based conductive filler is screen-printed and heat-cured to form a pair of first auxiliary conductive films 80 covering both ends of the overcoat layer 7 with a predetermined width, as shown in Figures 8(b) and 9(b).

[0048] Next, a resin silver paste is screen-printed and heat-cured to form a pair of second auxiliary conductive films 81 that cover the side edges of the first auxiliary conductive film 80, as shown in Figures 8(c) and 9(c). As a result, an auxiliary conductive film 8 having a two-layer structure consisting of the first auxiliary conductive film 80 and the second auxiliary conductive film 81 is formed, and the surface resistance of this auxiliary conductive film 8 is lower on the end face side where the second auxiliary conductive film 81 is exposed and higher on the overcoat layer 7 side where the first auxiliary conductive film 80 is exposed.

[0049] Thereafter, the aggregate substrate 2A is primarily divided into strips along the primary dividing grooves to obtain strip-shaped substrates 2B whose width is the longitudinal direction of the chip forming area. Next, Ni / Cr is sputtered onto the divided surfaces of the strip-shaped substrates 2B to form end surface electrodes 9 that connect the front electrodes 3 and the back electrodes 4 on the divided surfaces of the strip-shaped substrates 2B, as shown in Figures 8(d) and 9(d).

[0050] Next, the rectangular substrate 2B is divided into a plurality of chip substrates 2C along the secondary dividing grooves, and then these chip substrates 2C are sequentially subjected to electrolytic nickel plating and electrolytic tin plating to form an external plating layer 10 that covers the front electrode 3, end electrode 9, and back electrode 4, as shown in Figures 8(e) and 9(e), thereby completing the chip resistor 30. This external plating layer 10 has a two-layer structure of a Ni plating layer and a Sn plating layer, and is formed to cover the entire surfaces of the end electrode 9 and back electrode, as well as to cover the front electrode 3 and auxiliary conductive film 8 (first auxiliary conductive film 80 and second auxiliary conductive film 81), and extend to the tip of the overcoat layer 7.

[0051] As described above, in the chip resistor 30 according to the third embodiment, the auxiliary conductive film 8 has a two-layer structure consisting of a first auxiliary conductive film 80 formed on the end of the overcoat layer 7 and a second auxiliary conductive film 81 covering part of the first auxiliary conductive film 80. Since the first auxiliary conductive film 80 is formed of a carbon-based conductive material and the second auxiliary conductive film 81 is formed of a metal-based conductive material such as silver, it is possible to easily form an auxiliary conductive film 8 having a higher resistance value on the overcoat layer 7 side than on the end face side.

[0052] FIG. 10 is a cross-sectional view of a chip resistor 40 according to the fourth embodiment, and parts corresponding to those in FIG. 7 are given the same reference numerals.

[0053] 10, the chip resistor 40 according to the fourth embodiment differs from the chip resistor 30 according to the third embodiment in that, of the first auxiliary conductive film 80 and the second auxiliary conductive film 81 that constitute the auxiliary conductive film 8, the first auxiliary conductive film 80 is separated from the front electrode 3 without contacting the front electrode 3, but the other configurations are basically the same. When the first auxiliary conductive film 80, which has a higher resistance value, is floating from the front electrode 3 in this way, the resistance value of the auxiliary conductive film 8 can be more effectively made higher on the overcoat layer 7 side and lower on the end face side.

[0054] FIG. 11 is a cross-sectional view of a chip resistor 50 according to the fifth embodiment, and parts corresponding to those in FIG. 1 are given the same reference numerals.

[0055] As shown in Figure 11, the chip resistor 50 of the fifth embodiment differs from the chip resistor 1 of the first embodiment in that, of the undercoat layer 6 and overcoat layer 7 that constitute the protective film 11, the overcoat layer 7 is formed in the center of the upper surface of the undercoat layer 6 excluding both end portions, and the auxiliary conductive film 8 is formed so as to cover both end portions of the undercoat layer 6; otherwise, the configuration is basically the same.

[0056] In the chip resistor 50 configured in this manner, after a pair of auxiliary conductive films 8 are formed on both ends of the undercoat layer 6, the overcoat layer 7 can be formed in the central portion of the upper surface of the undercoat layer 6 exposed between these auxiliary conductive films 8, thereby improving the linearity of the overcoat layer 7. Furthermore, since the overcoat layer 7 does not cover both ends of the undercoat layer 6, the undercoat layer 6 made of a glass material can be in close contact with the front electrode 3 over a wider area. Therefore, even if sulfuric gas or the like penetrates between the overcoat layer 7 and the auxiliary conductive films 8, the undercoat layer 6 can reliably prevent the sulfuric gas or the like from penetrating into the front electrode 3. [Explanation of symbols]

[0057] 1,20,30,40,50 Chip resistors 2. Insulating substrate 2A collective board 2B strip-shaped board 2C Chip Substrate 3. Surface electrode 4 Back electrode 5 Resistors 6 Undercoat layer 7 Overcoat layer 8. Auxiliary conductive film 80 First auxiliary conductive film 81 Second auxiliary conductive film 9 End electrode 9a Top part 9b Bottom part 9c Side part 10. Outer plating layer 11 Protective film 12,13 Masking

Claims

1. a pair of front electrodes provided at both ends of a front surface of the insulating substrate; a pair of back electrodes provided at both ends of a back surface of the insulating substrate; a resistor provided so as to straddle the pair of front electrodes; an insulating protective film covering the entire resistor including the connection portion between the front electrodes and the resistor; a pair of end electrodes extending at least to both end surfaces of the insulating substrate and conducting between the front electrodes and the back electrodes; and a pair of external plating layers provided so as to cover the end electrodes and extending beyond the boundary position between the front electrodes and the protective film to the end of the protective film, an auxiliary conductive film is provided on the front electrode in a region separated from the end face of the insulating substrate, the auxiliary conductive film extending beyond a boundary with the protective film and overlapping an end of the protective film; the resistance value of the auxiliary conductive film is set higher than the resistance values ​​of the front electrode and the end electrode, the outer plating layer covers the auxiliary conductive film and extends to a boundary between the auxiliary conductive film and the protective film; the auxiliary conductive film has a two-layer structure including a first auxiliary conductive film formed on an end of the protective film at a position separated from the front electrode, and a second auxiliary conductive film covering a part of the first auxiliary conductive film and contacting the front electrode; A chip resistor characterized in that the second auxiliary conductive film is formed of a metal-based conductive material, and the first auxiliary conductive film is formed of a carbon-based conductive material having a higher resistance value than the second auxiliary conductive film.

2. 2. The chip resistor according to claim 1, wherein the first auxiliary conductive film is set to be higher than an upper surface of the protective film.

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