Optical modulator and method of manufacturing the same

Abstract

The optical modulator, including the optical mounting portion, will be miniaturized, and costs will be reduced by simplifying the mounting process. [Solution] A modulator chip (40) in which an input waveguide (401), modulators (403a, 403b), and output waveguides (404a, 404b) are integrated on a semiconductor chip, and a silicon photonics chip (30) in which an input waveguide (301), first output waveguides (302a, 302b), a multiplexer (303), and a second output waveguide (304) are formed are arranged in a package (10) with a gap of 10 μm or less and connected using resin (70, 80), and the input waveguide and the at least two output waveguides of the modulator chip are butt-coupled to the input waveguide and the at least two first output waveguides of the silicon photonics chip, respectively.

Description

[Technical Field]

[0001] The present invention relates to an optical modulator used in optical communications and a method for manufacturing the same. [Background technology]

[0002] In recent years, there has been a growing demand for high-speed optical modulators and optical receivers compatible with advanced optical modulation methods to cope with the increase in communication traffic. In particular, the introduction of digital signal processing technologies, including digital coherent technology, into optical fiber communication systems has established backbone network transmission technologies of 100 Gbps (32 GBd operation) per wavelength, and today high-speed optical communication systems achieving 800 Gbps to 1.2 Tbps (128 GBd operation) per wavelength are becoming commercially available.

[0003] In early 100G digital coherent systems, each component of the optical modulator and optical receiver, such as the driver IC and optical modulator chip in the optical modulator and the transimpedance amplifier (TIA) and optical receiver chip in the receiver, was typically packaged individually and mounted on a printed circuit board (PCB) (see, for example, Patent Document 1). However, systems exceeding 400G require even wider bandwidth, such as modulation bandwidths of 40 GHz or more. To meet this demand, optical modulators now integrate the driver IC and optical modulator chip in the same package, while receivers integrate the TIA and optical receiver chip in the same package, aiming to reduce high-frequency loss and miniaturize the system. Furthermore, designs based on differential operation rather than single-ended operation have become commonplace in order to achieve higher speeds, smaller sizes, and lower power consumption.

[0004] Today, there is active research and development into optical transceiver devices that enable ultra-high-speed optical transmission and reception exceeding 800 Gbps or 1 Tbps, and studies aimed at introducing these devices into the market.

[0005] Various technologies have been proposed as packaging configurations to further widen the bandwidth while reducing high-frequency loss. For example, package configurations such as HB-CDM (High Bandwidth Coherent Driver Modulator) (Non-Patent Document 1) for optical transmitters, HB-ICR (High Bandwidth Intradyne Coherent Receiver) for optical receivers, and IC-TROSA (Integrated Coherent Transmit-Receive Optical Sub-Assembly) (Non-Patent Document 2) for compact packages integrating optical transmitters and receivers have been proposed. All of these packages have space-saving form factors, and realizing them requires miniaturization of the chip and optical mounting area.

[0006] However, in order to achieve a miniaturized optical modulator, the following problems have arisen.

[0007] As an example, the internal configuration of a conventional HB-CDM optical transmitter is shown in Figure 14. Optical fibers 201a and 201b are output to the outside of package 10 through pipe sections 101a and 101b. Inside package 10, an InP DP-IQ modulator chip (hereinafter referred to as the "InP modulator chip") 400, a driver IC 60 for driving it, and a spatial optical system 300 for inputting and outputting light to and from InP modulator chip 400 are arranged. One end of spatial optical system 300 is optically connected to InP modulator chip 400, and the other end of spatial optical system 300 is optically connected to optical fibers 201a and 201b.

[0008] The spatial optical system 300 is made up of numerous components, each mounted as an individual component in a complex and intricate manner, including lenses for coupling light to the InP modulator chip 400, a polarization beam combiner (PBC) for polarization synthesis, and a monitor PD for monitoring the optical power. To arrange numerous components, it is necessary to provide a certain amount of space between the components to prevent the adhesive used to secure each component from flowing in and to prevent the components from becoming impossible to grasp with the mounter's hand. This tends to increase the area occupied by the spatial optical system 300, making it difficult to miniaturize the package.

[0009] Furthermore, because the optical system is made up of a complex combination of numerous components, even a slight misalignment of one component can lead to a misalignment when light is coupled to the InP modulator chip 400, increasing optical loss. Therefore, there were issues such as the time required for assembly, which required fine adjustments to the position of each component, in order to mount each component with high precision.

[0010] In particular, in the TROSA configuration, it is necessary to integrate a modulator chip, a PD (Photo Diode) chip, a driver, a TIA, etc. inside the package, and also to integrate an optical amplifier on the optical transmitter side.

[0011] However, due to the size constraints, it is difficult to incorporate a micro-erbium doped fiber amplifier (Micro-EDFA) into the package. Therefore, IC-TROSA reported so far has adopted a method of integrating a semiconductor optical amplifier (SOA) on an InP (indium phosphide) modulator chip (Non-Patent Document 3).

[0012] However, such a method has the problem that adding functions to the InP modulator chip complicates the structure and process, resulting in a decrease in chip yield. [Prior art documents] [Patent documents]

[0013] [Patent Document 1] Patent No. 7335539 [Non-patent literature]

[0014] [Non-Patent Document 1] Kurata et al., “Ultra-Compact DP-IQ Modulator with Hybrid Integration of InP-Based High-Speed ​​Modulator and Si-Based Optical Circuit”, [online], Internet<URL:https: / / www.oiforum.com / wp-content / uploads / OIF-HB-CDM-02.0.pdf> [Non-patent document 2] The OIF, “Implementation Agreement for Integrated Coherent Transmit-Receive Optical Sub-Assembly”, OIF-IC-TROSA-01.0, August 20, 2019, Internet<URL:https: / / www.oiforum.com / wp-content / uploads / OIF-IC-TROSA-01.0.pdf> [Non-patent document 3] Rouvalis et al., “Integrated Coherent Transmit-Receive Optical Sub-Assembly (IC-TROSA) for 140 GBd Applications”, Optical Fiber Communication Conference (OFC) 2024, W3A.2 Summary of the Invention [Problem to be solved by the invention]

[0015] SUMMARY OF THE INVENTION It is therefore an object of the present invention to realize a miniaturization of an optical modulator including an optical mounting portion and the like, and to reduce costs by simplifying the mounting process. [Means for solving the problem]

[0016] In order to solve the above-described problems, an optical modulator according to one configuration example of the present invention includes a modulator chip on which an input waveguide for guiding an input optical signal, a modulator configured to modulate the input optical signal and output at least two modulated optical signals, and at least two output waveguides for guiding the at least two modulated optical signals, respectively, are integrated as one unit on a semiconductor chip; an input waveguide configured to guide the input optical signal, at least two first output waveguides for guiding the at least two modulated optical signals, respectively; a multiplexer connected to the at least two first output waveguides and configured to multiplex the two modulated optical signals; and a package accommodating the modulator chip and the silicon photonics chip, the package comprising a silicon photonics chip formed of silicon photonics and a first output waveguide configured to guide an optical signal transmitted through the modulator chip and a second output waveguide configured to guide an optical signal transmitted through the modulator chip and a second output waveguide configured to guide an optical signal transmitted through the modulator chip and a silicon photonics chip, the modulator chip and the silicon photonics chip being arranged in the package with a gap of 10 μm or less and connected using a resin, and the input waveguide and the at least two output waveguides of the modulator chip being butt-coupled to the input waveguide and the at least two first output waveguides of the silicon photonics chip, respectively.

[0017] The optical modulator according to one configuration example of the present invention described above may further include a chip carrier on which the modulator chip is mounted, wherein the combined thickness of the modulator chip and the chip carrier is 600 μm or more, and the end face of the modulator chip facing the silicon photonics chip is positioned 50 μm or more closer to the silicon photonics chip than the end face of the chip carrier facing the silicon photonics chip.

[0018] Furthermore, in the optical modulator according to the above-described configuration example of the present invention, the modulator chip and the silicon photonics chip may each have a rectangular parallelepiped shape, the input end of the input waveguide and the output ends of the at least two output waveguides of the modulator chip may be aggregated on a first end face of the modulator chip, the output end of the input waveguide of the silicon photonics chip and the input ends of the at least two first output waveguides may be aggregated on a first end face of the silicon photonics chip that faces the first end face of the modulator chip, the modulator chip may further include spot size converters integrated at the input end of the input waveguide and the output ends of the at least two output waveguides, respectively, and having a mode field diameter of 2.5 μm to 3.0 μm, and the silicon photonics chip may further include spot size converters integrated at the output end of the input waveguide and the input ends of the at least two first output waveguides, respectively, and having a mode field diameter of 3.0 μm to 3.5 μm.

[0019] Furthermore, the optical modulator according to the above-described configuration example of the present invention may further include a fiber array including a plurality of optical fibers optically connected to the input waveguide and the second output waveguide of the silicon photonics chip, the silicon photonics chip and the fiber array being arranged with a gap of 10 μm or less and connected using a resin, the input end of the input waveguide and the output end of the second output waveguide being concentrated on a second end face of the silicon photonics chip facing the fiber array, the silicon photonics chip having spot size converters integrated at the input end of the input waveguide and the output end of the second output waveguide, respectively, and having a mode field diameter of 3.5 μm to 4.0 μm, and the input waveguide and the second output waveguide of the silicon photonics chip are butt-coupled to the plurality of optical fibers constituting the fiber array.

[0020] Furthermore, the optical modulator according to the above-described configuration example of the present invention may further include a thermoelectric cooler, the modulator being an InP IQ modulator consisting of a plurality of Mach-Zehnder interferometers, and the chip carrier on which the modulator chip is mounted may be formed from aluminum nitride and configured to be mounted on the thermoelectric cooler.

[0021] In the optical modulator according to the above-described configuration example of the present invention, the silicon photonics chip may further include at least two semiconductor optical amplifiers provided in a stage preceding the multiplexer and configured to amplify optical signals propagating through the at least two first output waveguides.

[0022] Furthermore, the optical modulator according to the above-described configuration example of the present invention may further include a thermoelectric cooler, and the silicon photonics chip may be configured to be mounted on the thermoelectric cooler.

[0023] Furthermore, a method for manufacturing an optical modulator according to one configuration example of the present invention includes: a silicon photonics chip, in which an input waveguide configured to guide an input optical signal, at least two first output waveguides each guiding at least two modulated optical signals, a multiplexer connected to the at least two first output waveguides and configured to multiplex the two modulated optical signals, and a second output waveguide configured to guide the multiplexed optical signal are formed of silicon photonics; and a fiber array including a plurality of optical fibers optically connected to the input waveguides and the second output waveguides of the silicon photonics chip are connected with a gap of 10 μm or less and connected using a resin, thereby butt coupling the input waveguides and the second output waveguides of the silicon photonics chip with the optical fibers of the fiber array. a thermoelectric cooler is disposed within the package; an input waveguide for guiding the input optical signal, a modulator configured to modulate the input optical signal and output at least two modulated optical signals, and at least two output waveguides for guiding the at least two modulated optical signals, respectively, are integrated on a semiconductor chip, and the modulator chip is mounted on a chip carrier; the chip carrier on which the modulator chip is mounted is mounted on the thermoelectric cooler; the silicon photonics chip connected to the fiber array is disposed within the package with a gap of 10 μm or less and connected using a resin, so that the input waveguide and the at least two output waveguides of the modulator chip are butt-coupled to the input waveguide and the at least two first output waveguides of the silicon photonics chip, respectively. [Effects of the Invention]

[0024] According to the present invention, by connecting the modulator chip and the silicon photonics chip using resin and butt-coupling them, it is possible to reduce the size of the optical modulator and reduce costs by simplifying the mounting process. [Brief explanation of the drawings]

[0025] [Figure 1]FIG. 1 is a plan view illustrating the configuration of an optical modulator according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a plan view illustrating the internal configuration of the package of the optical modulator according to the first embodiment of the present invention. [Figure 3] FIG. 3 is a cross-sectional view illustrating the configuration of the optical modulator according to the first embodiment of the present invention. [Figure 4] FIG. 4 is a cross-sectional view showing the configuration of an optical modulator according to a modified example of the first embodiment of the present invention. [Figure 5] FIG. 5 is a plan view illustrating the configuration of an optical modulator according to the second embodiment of the present invention. [Figure 6] FIG. 6 is a cross-sectional view illustrating the configuration of an optical modulator according to the second embodiment of the present invention. [Figure 7] FIG. 7 is a plan view illustrating the internal configuration of the package of the optical modulator according to the third embodiment of the present invention. [Figure 8] FIG. 8 is a cross-sectional view showing the configuration of an optical modulator according to a modified example of the third embodiment of the present invention. [Figure 9] FIG. 9 is a plan view illustrating the internal configuration of the package of the optical modulator according to the fourth embodiment of the present invention. [Figure 10] FIG. 10 is a plan view illustrating the internal configuration of the package of the optical modulator according to the fifth embodiment of the present invention. [Figure 11] FIG. 11 is a flowchart illustrating a method for manufacturing an optical modulator according to an embodiment of the present invention. [Figure 12A] FIG. 12A is a diagram illustrating one step of a method for manufacturing an optical modulator according to an embodiment of the present invention. [Figure 12B] FIG. 12B is a diagram illustrating one step of the method for manufacturing the optical modulator according to the embodiment of the present invention. [Figure 12C] FIG. 12C is a diagram illustrating one step of the method for manufacturing the optical modulator according to the embodiment of the present invention. [Figure 12D] FIG. 12D is a diagram illustrating one step of the method for manufacturing the optical modulator according to the embodiment of the present invention. [Figure 12E] FIG. 12E is a diagram illustrating one step of a method for manufacturing an optical modulator according to an embodiment of the present invention. [Figure 13] FIG. 13 is a diagram illustrating a configuration for improving the alignment accuracy between chips. [Figure 14] FIG. 14 is a diagram showing the internal configuration of a conventional HB-CDM optical transmitter. DETAILED DESCRIPTION OF THE INVENTION

[0026] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0027] [First embodiment] An optical modulator according to a first embodiment of the present invention is an HB-CDM for an optical transmitter. Its configuration is shown in Figs. 1 to 3. As shown in Fig. 1, an optical modulator 1A according to this embodiment has a fiber array 20, a silicon photonics chip (SiPh chip) 30, and an InP DP-IQ modulator chip (hereinafter referred to as "InP modulator chip") 40 arranged inside a package 10. Note that, in addition to these, wires and pads for power supply and signal transmission are also present inside the package 10, but these are omitted from the drawings.

[0028] [package] Here, the package 10 is a roughly rectangular parallelepiped housing in which ceramic and metal members are brazed and sealed. The package 10 includes pipe portions 101a and 101b through which optical fibers 201a and 201b are inserted. The package 10 also efficiently dissipates heat generated from the internal elements to the outside by configuring a package (PKG) base substrate 101 (see FIG. 3) from a metal member with high heat dissipation properties. To ensure reliability, the package 10 is sealed by welding a cover called a lid to the package body by seam welding or the like. The pipe portions 101a and 101b of the package 10 are also sealed by solder sealing or the like.

[0029] The fiber array 20 includes optical fibers 201a and 201b, one end of which is fixed to a glass block 202. The optical fibers 201a and 201b are led out of the package 10 via solder sealing or the like of pipe sections 101a and 101b provided in the package 10. The glass block 202 supporting the optical fibers 201a and 201b is connected to the end face of the SiPh chip 30 with a resin (UV-curable adhesive) 70.

[0030] [SiPh chip] The SiPh chip 30 is a chip formed using silicon photonics, i.e., a technology for integrating optical waveguides and other optical elements on a silicon substrate, and is a device that inputs and outputs optical signals to the InP modulator chip 40 described below.

[0031] Specifically, as shown in FIG. 2, the SiPh chip 30 has integrated on one chip an input waveguide 301 configured to guide an input optical signal, two first output waveguides 302a and 302b that guide two modulated optical signals, a polarization beam combiner (PBC) 303 connected to the two first output waveguides 302a and 302b and acting as a multiplexer that multiplexes the two modulated optical signals, and a second output waveguide 304 configured to guide the multiplexed optical signal.

[0032] The SiPh chip 30 further includes a polarization rotator 305. The polarization rotator 305 rotates the polarization of a Y-channel optical signal, which is linearly polarized by the InP modulator chip 40 and guided through one of the two first output waveguides 302a and 302b, by 90 degrees, and inputs the Y-channel optical signal to the PBC 303. The PBC 303 combines the Y-channel optical signal, whose polarization has been rotated by 90 degrees, with the X-channel optical signal guided through the other first output waveguide 302a, and outputs the combined signal from the output waveguide 304. The SiPh chip 30 integrated with the polarization rotator 305 and the PBC 303 thus functions to rotate the polarization of TE light output from the InP modulator chip 40 (described later) to TM light, and further polarization combine the combined signal.

[0033] In the SiPh chip 30, tapping elements (Taps) 306a, 306b, and 306c are provided in the input and output waveguides, respectively, and the intensity of the optical signal propagating through each waveguide can be monitored by monitor photodiodes (MPDs) 307a and 307b for individual monitoring of X polarization and Y polarization, and MPD 307c for combining X+Y.

[0034] In this way, all of the functions required for a typical HB-CDM, such as the PBC and monitor PD, which were previously configured using free-space optical systems, are integrated into the SiPh chip 30. As a result, all optical components except for the fiber are concentrated in the SiPh chip 30 alone, enabling a significant reduction in the number of components. Furthermore, the integration of waveguides in the SiPh chip 30 also makes it possible to significantly reduce the mounting area itself.

[0035] The SiPh chip 30 has a rectangular parallelepiped shape, and the output end of the input waveguide 301 of the SiPh chip 30 and the input ends of the two first output waveguides 302a and 302b are concentrated on a first end face of the SiPh chip 30 that faces the InP modulator chip 40. The distance between the output end of the input waveguide 301 and the input ends of the two first output waveguides 302a and 302b is preferably 250 μm or more and 1 mm or less.

[0036] Furthermore, the input end of the input waveguide 301 of the SiPh chip 30 and the output end of the second output waveguide 304 are concentrated on a second end face of the SiPh chip 30 that faces the end face of the fiber array 20 .

[0037] Furthermore, the SiPh chip 30 has a spot size converter (SSC) on each of its first end face facing the InP modulator chip 40 and its second end face facing the fiber array 20 to align the mode field and reduce coupling loss.

[0038] As will be described later, the mode field diameter of the SSCs provided at the output end of input waveguide 301 of SiPh chip 30 and at the input ends of first output waveguides 302a and 302b may be set to 3.0 μm to 3.5 μm. The mode field diameter of the SSCs provided at the input end of input waveguide 301 of SiPh chip 30 and at the input ends of second output waveguides 302a and 302b may be set to 3.5 μm to 4.0 μm.

[0039] The fiber array 20 and the SiPh chip 30 are arranged in the package 10 with a gap of 10 μm or less and are connected to each other using a resin 70. As a result, the optical fibers 201 a and 201 b constituting the fiber array 20 are butt-coupled to the input waveguide 301 and second output waveguide 304 of the SiPh chip 30. A UV-curable adhesive can be used as the resin 70.

[0040] [InP DP-IQ modulator chip] 2, the InP modulator chip 40 is a semiconductor chip mounted on a chip carrier 50. The following components are integrated on the InP semiconductor chip: an input waveguide 401 that guides an input optical signal input via input waveguide 301 of the SiP chip 30; a 1×2 multimode interference (MMI) 402 configured to split the input optical signal into two, X-polarized and Y-polarized waves; IQ modulators 403a and 403b that modulate the two split input optical signals and output modulated optical signals; and two output waveguides 404a and 404b that guide the two modulated optical signals output from the IQ modulators 403a and 403b, respectively. Each of the IQ modulators 403a and 403b is composed of two Mach-Zehnder modulators and a phase shifter that imparts a 90° phase difference between the modulated signals output from the Mach-Zehnder modulators. In this way, the InP modulator chip 40 constitutes a dual polarization in-phase quadrature (DP-IQ) modulator having two IQ modulators 403a and 403b.

[0041] The InP modulator chip 40 has a rectangular parallelepiped shape, and the input end of the input waveguide 401 and the output ends of the two output waveguides 404a, 404b of the InP modulator chip 40 are concentrated on a first end face of the InP modulator chip 40 that faces the SiPh chip 30. The distance between the input end of the input waveguide 401 and the output ends of the two output waveguides 404a, 404b on the first end face of the InP modulator chip 40 that faces the SiPh chip 30 is equal to the distance between the output end of the input waveguide 301 and the input ends of the two first output waveguides 302a, 302b on the face of the SiPh chip 30 that faces the InP modulator chip 40.

[0042] From the perspective of connecting multiple waveguides together, it is desirable to integrate these input and output waveguides in as close a location as possible, i.e., as close as possible. However, considering that the InP modulator chip 40 is pre-tested using a bulb-tipped fiber, the input and output waveguide pitch must be 250 μm or greater to prevent interference between the bulb-tipped fibers. On the other hand, if the input and output waveguide pitch is 1 mm or greater, alignment becomes more difficult and misalignment is more likely to occur due to stresses generated when the UV-curable adhesive cures, potentially increasing coupling loss. Therefore, the spacing between the input and output waveguides is preferably between 250 μm and 1 mm, and more preferably between 500 μm and 1 mm.

[0043] The InP modulator chip 40 further includes a spot size converter at the input end of the input waveguide 401 and at the output ends of the two output waveguides 404a and 404b. As will be described later, the mode field diameter of the spot size converter is 2.5 μm to 3.0 μm.

[0044] The SiPh chip 30 and the InP modulator chip 40 are arranged in the package 10 with a gap of 10 μm or less and are connected to each other using a resin 80. A UV-curable adhesive can be used as the resin 80. This allows the output end of the input waveguide 301 of the SiPh chip 30 and the input ends of the two first output waveguides 302 a, 302 b to be butt-coupled to the input end of the input waveguide 401 of the InP modulator chip 40 and the two output waveguides 404 a, 404 b.

[0045] [UV-curing adhesive] The adhesive used for connection will now be described. Optical modulator 1A according to this embodiment is intended for use in the 1550 nm or 1300 nm communication wavelength band. Therefore, it is desirable that the light transmittance of resins 70 and 80 after the UV-curing adhesive has hardened be 90% or higher so that the effect on the propagation loss of light in the wavelength band used is 0.1 dB, in accordance with the wavelength band in which IQ modulators 403a and 403b of InP modulator chip 40 operate.

[0046] Furthermore, since the UV-curable adhesive is intended to be used for connection with the SiPh chip 30, it is desirable to use one that gives the resins 70 and 80 a refractive index of about 1.5 after curing.

[0047] However, the adhesive used to secure the InP modulator chip 40 and the SiPh chip 30 and the adhesive used to secure the SiPh chip 30 and the fiber array 20 may be the same UV-curable adhesive, but they are not necessarily the same. Because silicon and glass transmit UV light, as shown in Figure 2, UV-curable adhesive can be applied from above the paper in a plan view and cured by irradiating it with UV light from above. However, because InP is a material that does not transmit UV light, it is difficult to consistently cure the InP modulator chip 40 side simply by irradiating it with UV light from above. Therefore, it is desirable to use a UV-curable adhesive that also has a thermosetting effect to connect the InP modulator chip 40 and the SiPh chip 30. By using a UV-curable adhesive that also has a thermosetting effect, sufficient connection strength can be achieved by thermal curing even if the resin around the InP does not transmit UV light and UV light does not sufficiently cure it. It is desirable for the adhesive to be cured at a temperature of 85°C or below, which is the operating and storage temperature of typical optical devices. This is to avoid problems such as thermal expansion or melting of the resin 70 itself, which could cause misalignment of the optical connection, if high heat is applied to an adhesive that has already been UV-cured, for example, when the SiPh chip 30 is first fixed to the glass block 202 of the fiber array 20 and then connected to the InP modulator chip 40.

[0048] [SSC] Next, the waveguide structure of the connecting surfaces when fiber array 20, SiPh chip 30, and InP modulator chip 40 are connected to one another, particularly the SSC (spot size converter), will be described.

[0049] To reduce the coupling loss between devices, it is necessary to match the mode field diameters of the two devices. This is because any misalignment in the mode field diameters results in optical loss. To create a stable mode field (light intensity distribution around the waveguide direction), SSCs are integrated on the end faces of the input and output waveguides of the InP modulator chip 40 and the SiPh chip 30 to make the mode field shape closer to a perfect circle.

[0050] In the case of the InP modulator chip 40, if the mode field diameter is increased, problems such as coupling to the underlying semiconductor layer will arise due to the stacked structure of the InP semiconductor, so there is some room for design to reduce it to around 2 μm, but the upper limit is generally considered to be around 3 μm.

[0051] On the other hand, when integrating an SSC into the SiPh chip 30, it is said that due to its structure, it is difficult to confine light so that the mode field diameter is 2 μm or less. Without the SSC, it is possible to achieve a mode field diameter of about 1 μm, but in that case, the mode field diameter is small and there is no tolerance for misalignment between the waveguides, which increases loss fluctuations due to misalignment when fixing with adhesive, making stable mounting and use difficult.

[0052] Therefore, with regard to the connection between the InP modulator chip 40 and the SiPh chip 30, by designing the SSC in the InP modulator chip 40 so that the mode field diameter is, for example, approximately 2.5 to 3 μm, and by designing the SSC in the SiPh chip 30 so that the mode field diameter is approximately 3 to 3.5 μm, it is possible to appropriately suppress coupling loss.

[0053] The connection between the SiPh chip 30 and the fiber array 20 is as follows. A typical fiber diameter is approximately 10 μm, but it is difficult to expand the output power of the SiPh chip 30 to that size using SSC. Therefore, in the fiber array 20, the optical fibers 201a and 201b are replaced with thin-diameter optical fibers with a diameter of approximately 4 μm, instead of the standard 10 μm diameter fibers. The 4 μm diameter is a standard value for thin-diameter optical fibers available on the market and is readily available. The thin-diameter optical fibers are spliced ​​to standard fibers with a mode field of approximately 10 μm using thermal diffusion technology or other techniques at a fiber section or connector other than the connecting section (not shown) at least 50 cm away from the pipe sections 101a and 101b of the package 10. This forms a mode conversion section that smoothly converts the mode field diameter with minimal loss. The fiber fusion point is preferably located farther from the pipe sections 101a and 101b than the mode conversion section.

[0054] Furthermore, it is desirable that the mode field diameter of the SiPh chip 30 on the side coupled to the fiber be approximately 3.5 to 4.0 μm. That is, in the SiPh chip 30, the mode field diameter on the side coupled to the fiber array 20 is different from the mode field diameter on the side coupled to the InP modulator chip 40, and the SSC structure is designed for each end face of the SiPh chip 30 so that the mode field diameter on the side coupled to the InP modulator chip 40 is smaller than the mode field diameter on the side coupled to the fiber array 20.

[0055] Note that optical reflection at the adhesive surface can be suppressed by applying an AR coating to the end face of the InP modulator chip 40 that matches the refractive index of the SiPh chip 30 and the UV-curable resin. Also, to improve the wettability of the UV-curable adhesive at the adhesive surface, it is advisable to perform an ozone cleaning process to increase the hydrophilicity of the adhesive surface immediately before mounting.

[0056] [TEC and Chip Carrier] Fig. 3 shows a partial cross section of optical modulator 1A according to this embodiment taken along line AA shown in Fig. 1. As shown in Fig. 3, optical modulator 1A according to this embodiment has a thermo-electric cooler (TEC: Thermo-Electric Cooler) 90 made of a Peltier element provided on package (PKG) base plate 101 that forms part of package 10. A chip carrier 50 is placed on TEC 90, and an InP modulator chip 40 is placed on this chip carrier 50.

[0057] The InP modulator chip 40 operates using absorption changes due to the quantum confined Stark effect (QCSE) and is therefore very sensitive to temperature. Therefore, in the optical modulator 1A according to this embodiment, the InP modulator chip 40 is mounted on a TEC 90 and its characteristics are stabilized by controlling the temperature.

[0058] Note that, as in the optical modulator 1A according to the present embodiment, when no active elements such as the semiconductor optical amplifier (SOA) described above are mounted on the SiPh chip 30, there is no need for temperature control. From the viewpoint of power consumption, it is desirable that the mounting area of ​​the TEC 90 be small. Therefore, in the optical modulator 1A according to the present embodiment, the fiber array 20 and the SiPh chip 30 are not mounted on the TEC 90, and only the InP modulator chip 40 is mounted on the TEC 90 via the chip carrier 50.

[0059] From the viewpoint of suppressing the power consumption of the TEC 90, it is important to reduce the thermal resistance between the TEC 90 and the InP modulator chip 40. Therefore, in the optical modulator 1A according to this embodiment, the chip carrier 50 is made of aluminum nitride (AlN).

[0060] AlN is known for its high thermal conductivity and excellent compatibility with InP due to its linear expansion coefficient being very similar to that of InP. If a substrate made of a material with a different linear expansion coefficient is selected as the chip carrier, and thermal load is applied to the InP modulator chip 40 and the SiPh chip 30 connected using a UV-curable adhesive, unexpected warping may occur due to the difference in linear expansion coefficient in the stacking direction, which may lead to misalignment of the optical axis or damage. Therefore, it is desirable to match the linear expansion coefficient of the InP constituting the InP modulator chip 40 with the linear expansion coefficient of the chip carrier 50 on which the InP modulator chip 40 is mounted as much as possible, and from this perspective, the use of AlN is optimal.

[0061] To fix the InP modulator chip 40 to the chip carrier 50, for example, silver (Ag) paste or solder material can be used. In this case, it is desirable to use a fixing agent with a thermal conductivity of at least 1 W / mK or higher. Furthermore, it is desirable that the thickness of the fixing agent used to fix the InP modulator chip 40 to the chip carrier 50 be thin, and specifically, it is desirable that it be controlled to 10 μm or less. Similarly, Ag paste or solder material can be used to fix the chip carrier 50 and the TEC 90.

[0062] Furthermore, fixing the InP modulator chip 40 on the chip carrier 50 made of AlN has the following significance.

[0063] The InP modulator chip 40 uses cleavage to stably expose the waveguide end facets, but it is known that the thickness at which cleavage can be performed for InP substrates is 400 μm or less. However, when connecting the SiPh chip 30 and the InP modulator chip 40 with a resin 80 such as a UV-curable adhesive, a thickness of 400 μm or less would provide insufficient fixing area for connection, making it impossible to ensure sufficient connection strength. Therefore, by mounting the InP modulator chip 40 on a chip carrier 50 and bonding the InP modulator chip 40 and chip carrier 50 together to the SiPh chip 30, the thickness of the InP modulator chip 40 is increased, ensuring sufficient adhesive strength for connection to the SiPh chip 30.

[0064] For example, if the combined thickness of the InP modulator chip 40 and the chip carrier 50 and the thickness of the SiPh chip 30 are each 600 μm or more, sufficient adhesive strength can be ensured when the InP modulator chip 40 and the SiPh chip 30 are connected with a gap of 10 μm or less. Therefore, if the InP modulator chip 40 is 400 μm thick, the thickness of the chip carrier 50 can be set to 200 μm, and if the InP modulator chip 40 is 200 μm thick, the thickness of the chip carrier 50 can be set to 400 μm. For example, the thickness of the chip carrier 50 is adjusted to match the thickness of the InP modulator chip 40 so that the combined thickness of the InP modulator chip 40 and the chip carrier 50 is 600 μm. In this case, the combined thickness of the InP modulator chip 40 and the chip carrier 50 does not necessarily have to be the same as the thickness of the SiPh chip 30. However, if the chip carrier 50 and the SiPh chip are mounted on the same plane, the thicknesses must be the same.

[0065] Furthermore, chip carrier 50 does not protrude toward SiPh chip 30 beyond the first end face of InP modulator chip 40 that faces SiPh chip 30. This is because if chip carrier 50 protruded toward SiPh chip 30 beyond the first end face of InP modulator chip 40, it may become impossible to connect InP modulator chip 40 and SiPh chip 30 with a gap of 10 μm or less. Considering general mounting tolerances, it is desirable that chip carrier 50 be offset from the first end face of InP modulator chip 40 by at least 50 μm or more.

[0066] Furthermore, the chip carrier 50 may be constructed from a single AlN plate, but as shown in Figure 4, by stacking multiple AlN plates to form the chip carrier 50a, it is possible to create unevenness between the connection surface of the SiPh chip 30, increase the adhesive area, and improve the connection strength.

[0067] Although not shown, it is also possible to mount elements such as capacitors and thermistors on the chip carrier 50, in addition to wiring and pads for extracting DC wiring for operating the IQ modulators 403a and 403b of the InP modulator chip 40. In this case, to ensure space, the chip carrier 50 may be made larger than the InP modulator chip 40 in a direction other than the direction of the SiPh chip 30 in a plan view, for example, in the vertical direction in FIG. 2, and wiring and the like may be provided thereon. On the other hand, if wiring and the like is not required, it is desirable to make the chip carrier 50 one size smaller than the InP modulator chip 40 in a plan view so that it does not protrude from any side of the InP modulator chip 40 in a plan view, in order to avoid the risk of the Ag paste used for fixing swelling up on the top surface of the InP modulator chip 40.

[0068] [Gap between elements] The reason why the gap between the InP modulator chip 40 and the SiPh chip 30 and the gap between the fiber array 20 and the SiPh chip 30 are set to 10 μm or less is as follows.

[0069] From the perspective of linear expansion coefficient, it is desirable that the linear expansion coefficient of resin 80 is the same as that of InP modulator chip 40 and SiPh chip 30. However, in practice, UV-curable adhesives used as resin 80 are generally known to be acrylic resins, whose linear expansion coefficients differ by one to two orders of magnitude from those of InP modulator chip 40 and SiPh chip 30, making it nearly impossible to match the linear expansion coefficients. Therefore, to keep the positional and angular misalignment that may occur due to the difference in linear expansion coefficient within an acceptable range, the gap between InP modulator chip 40 and SiPh chip 30 is set to 10 μm or less. This is because, even if the linear expansion coefficients differ by two orders of magnitude, a gap of 10 μm or less is necessary to keep the difference in optical propagation loss due to positional and angular misalignment within an acceptable range, specifically, 0.1 dB or less.

[0070] Furthermore, the connection between the SiPh chip 30 and the fiber array 20 using resin 70, particularly the thickness of the fiber array 20 and the gap between the SiPh chip 30 and the fiber array 20, is similar to the connection between the InP modulator chip 40 and the SiPh chip 30 described above. However, since the fiber array 20 is not mounted on the TEC 90, there is no need to manage the thickness of the fiber array 20 to be the same as that of the SiPh chip 30, as long as sufficient adhesive strength can be ensured.

[0071] [Advantages of the first embodiment] According to the first embodiment, the InP modulator chip 40 and the SiPh chip 30 are connected using a UV-curable adhesive and butt-coupled to each other, thereby achieving a compact optical modulator. Furthermore, because the number of components is reduced, the mounting process can be simplified because mounting only requires connecting the InP modulator chip 40 and the SiPh chip 30, thereby achieving a reduction in the mounting process time and mounting costs.

[0072] [Second embodiment] In the above-described first embodiment of the present invention, an example was shown in which the driver IC is provided separately from the optical modulator 1A, rather than within the package 10. However, in an optical modulator 1B according to a second embodiment of the present invention, a driver IC 60 is mounted within the package 10, as shown in FIGS. 5 and 6. FIG. 6 is a partial cross-sectional view taken along line BB in FIG. 5. Components common to the optical modulator 1A according to the first embodiment are given the same reference numerals, and detailed descriptions thereof will be omitted.

[0073] In the optical modulator 1B according to the second embodiment of the present invention, a driver IC 60 is mounted on the opposite side of the SiPh chip 30 across the InP modulator chip 40. The driver IC 60 is mounted on a carrier 62 provided on the package base plate 101.

[0074] When using wire mounting, it is desirable to make the wire as short as possible because the characteristics may deteriorate depending on the length of the wire. From this perspective, by mounting the driver IC 60 on the carrier 62, the heights of the top surfaces of the driver IC 60 and the InP modulator chip 40 may be aligned, and the chip carrier 50 may be offset in a direction away from the driver IC 60 to narrow the gap between the driver IC 60 and the InP modulator chip 40 as much as possible, so that the chip carrier 50 does not protrude from the side of the InP modulator chip 40 on the driver IC 60 side in a plan view and does not interfere with the driver IC 60 or the carrier 62.

[0075] [Advantages of the second embodiment] According to the second embodiment, the driver IC 60 is housed in the package 10, thereby making it possible to reduce the size of the optical modulator.

[0076] [Third embodiment] The optical modulator 1A according to the first embodiment of the present invention is an example of an HB-CDM for an optical transmitter, in which no active elements such as a semiconductor optical amplifier (SOA) are mounted on the SiPh chip 30. However, it goes without saying that the present invention can also be applied to a configuration such as an IC-TROSA in which a modulator and a receiver are integrated. In particular, in a configuration such as an IC-TROSA, the modulator, receiver, and laser are integrated in a single package. In this case, the mounting area is smaller than when each component is individually packaged, and the mounting part becomes more complex. Therefore, this patent, which makes it possible to reduce the optical mounting area, reduce the number of components, and simplify the mounting process, is extremely useful.

[0077] Furthermore, in the case of HB-CDM, it was not necessary to integrate the SOA inside the package, but in the case of IC-TROSA, it is necessary to integrate the SOA inside the package, and in the IC-TROSA currently being researched and developed, the SOA is integrated into the InP DP-IQ modulator chip.

[0078] However, integrating an active element such as an SOA into an InP modulator chip complicates the process and may result in a decrease in yield due to the increased SOA within the chip. In particular, the InP DP-IQ modulator process is extremely complex, the maximum wafer size is approximately 3 to 4 inches, and manufacturing costs are generally high. Therefore, integrating an SOA into an InP DP-IQ modulator and reducing yield would lead to increased costs, which is undesirable.

[0079] Therefore, as a third embodiment of the present invention, an example in which SOAs 308a and 308b are integrated within a SiPh chip 30C is shown. As shown in Figures 7 and 8, the optical modulator according to the third embodiment of the present invention includes two SOAs 308a and 308b, which are provided in front of a PBC 303 and configured to amplify optical signals propagating through two first output waveguides 302a and 302b, respectively, within a SiPh chip 30C.

[0080] This configuration, in which two SOAs 308a and 308b are hybrid-integrated into the SiPh chip 30C immediately before multiplexing at the PBC 303 of the output waveguide, and by attaching an SOA for each polarization immediately before multiplexing, it is possible to boost the optical power when the light loss is greatest before multiplexing. This is highly efficient, and the SOA can compensate for losses not only in the InP modulator chip 40 but also in the SiPh chip 30C and the loss at the coupling point between the InP modulator chip 40 and the SiPh chip 30C. Furthermore, by inserting an SOA before the PBC, it is possible to compensate for the loss difference between the two polarizations. As a result, it is possible to suppress the loss difference between the polarizations, known as PDL, to almost zero.

[0081] When hybrid-mounting active elements such as SOAs 308a and 308b on the SiPh chip 30C, the SiPh chip 30C also requires temperature control. Therefore, as shown in Figure 8, the SiPh chip 30C must also be mounted on the TEC 90C. In this case, the SiPh chip 30C, like the InP modulator chip 40 and chip carrier 50, is mounted on the TEC 90C using a conductive paste such as Ag paste. On the other hand, the fiber array 20 does not have any active elements and does not require temperature control. Therefore, to prevent unnecessary increases in power consumption and costs, the fiber array 20 is placed outside the TEC 90C. In this case, because the InP modulator chip 40, chip carrier 50, and SiPh chip 30C are mounted on the same TEC 90C, it is desirable that the combined thickness of the InP modulator chip 40 and chip carrier 50 is approximately the same as the thickness of the SiPh chip 30C.

[0082] [Fourth embodiment] In the optical modulator of the third embodiment described above, SOAs 308a and 308b are provided only on the output waveguides 302a and 302b of the SiPh chip 30C, but in the optical modulator of the fourth embodiment of the present invention, an SOA 308c is also provided on the input waveguide 301 of the SiPh chip 30D, as shown in Figure 9.

[0083] In this way, by providing SOA 308c also in input waveguide 301 of SiPh chip 30D, the optical signal input to InP modulator chip 40 can be amplified in SiP chip 30D. As a result, it is possible to avoid integrating an SOA into InP modulator chip 40, and therefore it is possible to avoid a decrease in yield during the manufacture of InP modulator chip 40.

[0084] [Fifth embodiment] In the fourth embodiment described above, an SOA 308c is provided in the input waveguide 301 of the SiPh chip 30D. However, in this case, it is not possible to compensate for the loss that occurs at the connection between the InP modulator chip 40, which is the path of the input light, and the SiPh chip 30D. Therefore, an optical modulator according to a fifth embodiment of the present invention integrates an SOA that amplifies the input optical signal into an InP modulator chip 40e. Specifically, as shown in FIG. 10, the InP modulator chip 40e includes two SOAs 405a and 405b that amplify the input optical signal.

[0085] In this embodiment, it is desirable that SOAs 405a and 405b are monolithically integrated between splitter 402a of InP modulator chip 40e and the Mach-Zehnder interferometers constituting IQ modulators 403a and 403b. This allows SOAs 405a and 405b to increase optical power not only by eliminating losses at the connections between chips and in SiPh chip 30c, but also by eliminating branching losses that occur when an optical signal is branched into two on InP modulator chip 40e. However, instead of providing the SOAs 405a and 405b after the splitter 402a, the SOAs may be provided before the splitter 402a.

[0086] Furthermore, in this embodiment, because SOAs 308a and 308b that amplify output optical signals are provided on SiPh chip 30c, the number of SOAs integrated on InP modulator chip 40e can be reduced to just two on the input side. Therefore, compared to a case in which four SOAs (SOAs that amplify input optical signals to IQ modulators 403a and 403b and SOAs that amplify output optical signals output from IQ modulators 403a and 403b) are all monolithically integrated on InP modulator chip 40e, the number of SOAs integrated on InP modulator chip 40e can be reduced to half, thereby improving the yield due to SOAs.

[0087] [Method for manufacturing optical modulator] Next, the steps for assembling an HB-CDM optical modulator 1B for an optical transmitter according to the second embodiment (see FIGS. 5 and 6) will be described with reference to FIG. 11 and FIGS. 12A to 12E.

[0088] Typically, the InP modulator chip 40, SiPh chip 30, and fiber array 20 are all assembled first, and then housed in the package 10. However, with this method, the chip carrier 50 and the InP modulator chip 40 are fixed to the TEC 90 using Ag paste or solder, and temperatures exceed 85°C. This can cause the UV-curable adhesive resins 70 and 80 to loosen due to the heat generated during fixation using Ag paste, resulting in misalignment of the optical coupling. Furthermore, transporting and mounting an assembly with many optical connection points can potentially damage the connections. While this problem can be solved by using an Ag paste with a curing temperature below 85°C, in this embodiment, to avoid dependency on the curing temperature of the paste or solder, the SiP chip 30, which may optionally integrate an SOA or the like, and the fiber array 20 are first connected, and then the InP modulator chip 40 is connected within the package 10.

[0089] 12A, the SiPh chip 30 and the fiber array 20 are first aligned with a gap of 10 μm or less, and then aligned. After that, a UV-curable adhesive is applied and the two are fixed together by ultraviolet (UV) irradiation (Step 1 in FIG. 11). In this way, the input waveguide 301 and second output waveguide 304 of the SiPh chip 30 are butt-coupled to the input optical fiber 201b and output optical fiber 201a of the fiber array 20.

[0090] Meanwhile, as shown in FIG. 12B, the TEC 90 and the driver IC 60 are fixed inside the package 10 (Step 2 in FIG. 11).

[0091] 12C, the InP modulator chip 40 is fixed onto a chip carrier 50 made of AlN using thermally conductive paste (Step 3 in FIG. 11). Then, as shown in FIG. 12D, the InP modulator chip 40 mounted on the chip carrier 50 is mounted together with the chip carrier 50 on a TEC 90 provided in the package 10, and various wiring such as wire bonding is performed, followed by treatment such as UV ozone cleaning (Step 4 in FIG. 11).

[0092] 12E, the SiPh chip 30 and fiber array 20 fixed in Step 1 are placed into package 10, and fibers 201a and 201b are passed through pipes 101a and 101b of package 10 to extend outward. The SiPh chip 30 and InP modulator chip 40 are then aligned with a gap of 10 μm or less, and fixed by applying a UV-curable adhesive and irradiating them with UV light. This butt-couples the input waveguide 401 and two output waveguides 404a and 404b of the InP modulator chip 40 with the input waveguide 301 and two first output waveguides 302a and 302b of the SiPh chip 30, respectively. Before applying the UV-curable adhesive, the end faces of the InP modulator chip 40 may be subjected to a hydrophilic treatment, such as ozone cleaning. Furthermore, the component located below the resin 80, for example, the top surface of the TEC 90, or if some other plate-like component is placed on top of the TEC 90, the top surface of the plate-like component may be metallized in advance to diffuse UV irradiation light. Then, a heat treatment is further performed to harden the adhesive (Step 5 in FIG. 11).

[0093] It should be noted that because both the SiPh chip 30 and the InP modulator chip 40 are incorporated within the package 10, UV irradiation cannot be performed from the backside of the package 10. Therefore, there is a possibility that UV light will not sufficiently reach the bottom of the InP modulator chip 40 if UV light is only irradiated from the top side, so heat treatment is performed to harden the adhesive. The heat treatment is preferably performed at a temperature of 85°C or less, which is within the operating and storage temperature range and will not cause the UV-curable adhesive to slip after fixation.

[0094] Then, after wiring the SOA and MPD of the SiPh chip 30, the pipes 101a and 101b are sealed with solder or the like, and the wires of the terminals such as the SOA and MPD on the SiPh chip 30 are taken out into the package. Finally, a lid is mounted on the main body of the package 10 and sealed by seam welding or the like (Step 6 in Figure 11).

[0095] As described above, by first connecting the SiPh chip 30 and the fiber array 20, and then mounting the InP modulator chip 40 in the package 10, and then connecting the SiPh chip 30 and the InP modulator chip 40 within the package 10, the mounting process can be simplified and the cost of the optical modulator can be reduced.

[0096] [Improved alignment accuracy] When connecting the InP modulator chip 40 and the SiPh chip 30, it is necessary to properly manage the pitch of the input and output waveguides, etc., but one way to further improve the alignment accuracy is, for example, to form an alignment mark such as a triangular marker for alignment near the SSC by etching when processing the waveguide of the InP modulator chip 40.

[0097] Alignment marks are easier to recognize than waveguides, and if the alignment marks are highly accurate, the position can be aligned with higher precision during initial alignment, which has the advantage of shortening the alignment time.

[0098] A common method for forming alignment marks is to use metal patterns, but if the metal alignment marks are formed at a different time from the waveguide processing, the marks will be misaligned due to misalignment of the photomask, making them insufficient as alignment marks in areas where high-precision alignment of 1 μm or less is required. Therefore, it is desirable to form the alignment marks by etching at the same time as the waveguide processing.

[0099] Furthermore, as shown in FIG. 13, in addition to the waveguides connecting to the SiPh chip 30f, monitor output waveguides 407a and 407b may be provided on the InP modulator chip 40f to improve alignment accuracy, and MPDs 309a and 309b may be provided on the SiPh chip 30f to receive output light from these monitor output waveguides 407a and 407b, and alignment may be performed with high precision by monitoring the output power of the MPDs 309a and 309b.

[0100] Here, monitor output waveguides 407a and 407b can be realized by using 2x2 MMIs 406a and 406b as the portions where light beams passing through IQ modulators 403a and 403b are multiplexed. In this case, monitor output waveguides 407a and 407b are preferably provided closer to the top and bottom edges of InP modulator chip 40f in FIG. 13 than two output waveguides 404a and 404b of InP modulator chip 40f. This is because the monitor output waveguides 407a, 407b are located closer to the upper and lower edges than the two output waveguides 404a, 404b of the InP modulator chip 40f, and are therefore more sensitive to the relative tilt and angular misalignment between the InP modulator chip 40f and the SiPh chip 30f.When the monitor power of the MDPs 309a, 309b of the SiPh chip 30f is maximized, the two output waveguides 404a, 404b located further inside are aligned with high precision.

[0101] However, it is desirable to form the monitor output waveguides 407a and 407b at least 100 μm inward from the upper and lower edges of the InP modulator chip 40f in Fig. 13. This is to prevent the monitor output waveguides 407a and 407b from being damaged and rendered unusable during, for example, wall cleaving during the manufacturing process of the InP modulator chip 40f.

[0102] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments. Various modifications that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention.

[0103] (Addendum) The following additional clauses are disclosed in relation to the above-described embodiment.

[0104] (Appendix 1) a modulator chip in which an input waveguide for guiding an input optical signal, a modulator configured to modulate the input optical signal and output at least two modulated optical signals, and at least two output waveguides for guiding the at least two modulated optical signals, are integrated on a semiconductor chip; a silicon photonics chip, in which an input waveguide configured to guide the input optical signal, at least two first output waveguides that guide the at least two modulated optical signals, a multiplexer connected to the at least two first output waveguides and configured to multiplex the two modulated optical signals, and a second output waveguide configured to guide the multiplexed optical signal are formed of silicon photonics; a package that houses the modulator chip and the silicon photonics chip; and the modulator chip and the silicon photonics chip are arranged in the package with a gap of 10 μm or less and connected using a resin; the input waveguide and the at least two output waveguides of the modulator chip are butt-coupled with the input waveguide and the at least two first output waveguides of the silicon photonics chip, respectively; Optical modulator.

[0105] (Appendix 2) a chip carrier for carrying the modulator chip; The combined thickness of the modulator chip and the chip carrier is 600 μm or more; an end face of the modulator chip facing the silicon photonics chip is located 50 μm or more closer to the silicon photonics chip than an end face of the chip carrier facing the silicon photonics chip; 10. The optical modulator of claim 1.

[0106] (Appendix 3) the modulator chip and the silicon photonics chip each have a rectangular parallelepiped shape; an input end of the input waveguide and an output end of the at least two output waveguides of the modulator chip are gathered on a first end face of the modulator chip; an output end of the input waveguide of the silicon photonics chip and input ends of the at least two first output waveguides are collected on a first end face of the silicon photonics chip that faces the first end face of the modulator chip; the modulator chip further includes spot size converters integrated at the input end of the input waveguide and the output ends of the at least two output waveguides, each having a mode field diameter of 2.5 μm to 3.0 μm; the silicon photonics chip further includes spot size converters integrated at the output end of the input waveguide and the input ends of the at least two first output waveguides, respectively, and each having a mode field diameter of 3.0 μm to 3.5 μm; 3. The optical modulator of claim 1 or 2.

[0107] (Appendix 4) a fiber array including a plurality of optical fibers optically connected to the input waveguide and the second output waveguide of the silicon photonics chip; the silicon photonics chip and the fiber array are arranged with a gap of 10 μm or less and connected using a resin; an input end of the input waveguide and an output end of the second output waveguide are aggregated on a second end face of the silicon photonics chip facing the fiber array; the silicon photonics chip includes a spot size converter integrated at the input end of the input waveguide and the output end of the second output waveguide, the spot size converter having a mode field diameter of 3.5 μm to 4.0 μm; the input waveguide and the second output waveguide of the silicon photonics chip are butt-coupled to the plurality of optical fibers constituting the fiber array, respectively. 4. The optical modulator of claim 3.

[0108] (Appendix 5) It also has a thermoelectric cooler. the modulator is an InP IQ modulator consisting of multiple Mach-Zehnder interferometers; the chip carrier on which the modulator chip is mounted is made of aluminum nitride and is mounted on the thermoelectric cooler; 10. The optical modulator of claim 2.

[0109] (Appendix 6) The silicon photonics chip comprises: further comprising at least two semiconductor optical amplifiers provided before the multiplexer and configured to amplify the optical signals propagating through the at least two first output waveguides; 3. The optical modulator of claim 1 or 2.

[0110] (Appendix 7) It also has a thermoelectric cooler. The silicon photonics chip is mounted on the thermoelectric cooler. 7. The optical modulator of claim 6.

[0111] (Appendix 8) a silicon photonics chip including an input waveguide configured to guide an input optical signal, at least two first output waveguides each guiding at least two modulated optical signals, a multiplexer connected to the at least two first output waveguides and configured to multiplex the two modulated optical signals, and a second output waveguide configured to guide the multiplexed optical signal, formed of silicon photonics; and a fiber array including a plurality of optical fibers optically connected to the input waveguides and the second output waveguides of the silicon photonics chip, the fiber array being connected with a gap of 10 μm or less and connected using a resin, thereby butt-coupling the input waveguides and the second output waveguides of the silicon photonics chip with the optical fibers of the fiber array; A thermoelectric cooler is disposed within the package, an input waveguide for guiding the input optical signal, a modulator configured to modulate the input optical signal and output at least two modulated optical signals, and at least two output waveguides for guiding the at least two modulated optical signals, respectively, are integrated on a semiconductor chip, and the modulator chip is mounted on a chip carrier; Mounting the chip carrier with the modulator chip on the thermoelectric cooler; the silicon photonics chip connected to the fiber array is disposed in the package with a gap of 10 μm or less and connected using a resin, so that the input waveguide and the at least two output waveguides of the modulator chip are butt-coupled to the input waveguide and the at least two first output waveguides of the silicon photonics chip, respectively; A method for manufacturing an optical modulator. [Industrial Applicability]

[0112] The present invention can be used in an optical modulator used in optical communications. [Explanation of symbols]

[0113] 1A, 1B...optical modulator, 10...package, 20...fiber array, 30, 30c, 30d, 30f...SiPh chip, 40, 40e, 40f...InP DP-IQ modulator chip, 50, 50a...chip carrier, 60...driver IC, 70, 80...resin, 90, 90c...TEC, 201a, 201b...optical fiber, 202...glass block, 301...input waveguide, 302a, 302b...first output waveguide, 303...PBC, 304...second output waveguide, 305...polarization rotator, 308a, 308b, 308c, 405a, 405b...SOA, 401...input waveguide, 402...MMI, 403a, 403b...IQ modulator, 404a, 404b...output waveguide.

Claims

1. a modulator chip in which an input waveguide for guiding an input optical signal, a modulator configured to modulate the input optical signal and output at least two modulated optical signals, and at least two output waveguides for guiding the at least two modulated optical signals, are integrated on a semiconductor chip; a silicon photonics chip, in which an input waveguide configured to guide the input optical signal, at least two first output waveguides that guide the at least two modulated optical signals, a multiplexer connected to the at least two first output waveguides and configured to multiplex the two modulated optical signals, and a second output waveguide configured to guide the multiplexed optical signal are formed of silicon photonics; a package that houses the modulator chip and the silicon photonics chip; and the modulator chip and the silicon photonics chip are arranged in the package with a gap of 10 μm or less and connected using a resin; the input waveguide and the at least two output waveguides of the modulator chip are butt-coupled to the input waveguide and the at least two first output waveguides of the silicon photonics chip, respectively; the modulator chip includes at least two demultiplexers that branch each of the at least two modulated optical signals from the modulator, and at least two monitor waveguides that guide the modulated optical signals branched by the demultiplexers, The silicon photonics chip has at least two monitor photodiodes that receive modulated optical signals from the respective monitor waveguides. Optical modulator.

2. a chip carrier for carrying the modulator chip; The combined thickness of the modulator chip and the chip carrier is 600 μm or more; an end face of the modulator chip facing the silicon photonics chip is located 50 μm or more closer to the silicon photonics chip than an end face of the chip carrier facing the silicon photonics chip; 2. The optical modulator according to claim 1.

3. the modulator chip and the silicon photonics chip each have a rectangular parallelepiped shape; an input end of the input waveguide and an output end of the at least two output waveguides of the modulator chip are gathered on a first end face of the modulator chip; an output end of the input waveguide of the silicon photonics chip and input ends of the at least two first output waveguides are aggregated on a first end face of the silicon photonics chip that faces the first end face of the modulator chip; the modulator chip further includes spot size converters integrated at the input end of the input waveguide and the output ends of the at least two output waveguides, respectively, and each having a mode field diameter of 2.5 μm to 3.0 μm; the silicon photonics chip further includes spot size converters integrated at the output end of the input waveguide and the input ends of the at least two first output waveguides, respectively, and each having a mode field diameter of 3.0 μm to 3.5 μm; 3. The optical modulator according to claim 1.

4. a fiber array including a plurality of optical fibers optically connected to the input waveguide and the second output waveguide of the silicon photonics chip; the silicon photonics chip and the fiber array are arranged with a gap of 10 μm or less and connected using a resin; an input end of the input waveguide and an output end of the second output waveguide are aggregated on a second end face of the silicon photonics chip facing the fiber array, the silicon photonics chip includes a spot size converter integrated at an input end of the input waveguide and an output end of the second output waveguide, the spot size converter having a mode field diameter of 3.5 μm to 4.0 μm; the input waveguide and the second output waveguide of the silicon photonics chip are butt-coupled to the plurality of optical fibers constituting the fiber array, respectively; 4. The optical modulator according to claim 3.

5. It also has a thermoelectric cooler. the modulator is an InP IQ modulator consisting of multiple Mach-Zehnder interferometers; the chip carrier on which the modulator chip is mounted is made of aluminum nitride and is mounted on the thermoelectric cooler; 3. The optical modulator according to claim 2.

6. The silicon photonics chip comprises: and further comprising at least two semiconductor optical amplifiers provided before the multiplexer and configured to amplify the optical signals propagating through the at least two first output waveguides.

3. The optical modulator according to claim 1.

7. It also has a thermoelectric cooler. The silicon photonics chip is mounted on the thermoelectric cooler.

7. The optical modulator according to claim 6.

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