Semiconductor device manufacturing method

Abstract

To provide a manufacturing method of a semiconductor device which can prevent burrs from being obstacle for a junction between chips while reducing a process to remove the burrs.SOLUTION: A manufacturing method of a semiconductor device comprises: a chip division step of dividing a device wafer which comprises a functional layer 103 having devices 105 formed in a region partitioned by matrix type division-scheduled lines on a surface 102 along the division-scheduled lines to divide it into individual devices 105; and a chip lamination step of laminating and fixing a side of the surface 102 where the functional layer 103 exists of the device 105 formed in the chip division step by facing it to a side of a rear surface 106 of other device 105. The device 105 has a side surface shape, in which the side of the surface 102 has a larger area than the side of the rear surface 106, formed in a trapezoid, to prevent burrs 130 of the functional layer 103 which is generated at a periphery of the side of the surface 102 of the device 105 from coming into contact with the device 105 to be laminated.SELECTED DRAWING: Figure 13

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a semiconductor device by stacking chips. [Background technology]

[0002] As electronic devices become lighter, thinner, and smaller, semiconductor devices are becoming smaller through the miniaturization of patterns and chip stacking. For example, technologies such as direct bonding, which stacks chips on top of each other and directly bonds the electrodes, have been developed. In direct bonding, the device surface (the surface on the functional layer side, or front surface) of a chip equipped with TSV (Through-Silicon Via) electrodes is directly placed on the back surface of the other chip, so that the surface is processed to be flat and prevent foreign matter from getting trapped inside.

[0003] The devices that will become chips are separated along the planned separation lines by ablation with a laser beam or machining with a cutting blade, but the edges of the separated devices have burrs measuring submicrons to several microns that rise from the device surface. These burrs interfere with the joining of chips. A method for removing these burrs using a cutting blade is known (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-162809 Summary of the Invention [Problem to be solved by the invention]

[0005] However, there is a problem in that adding the process of removing burrs with a cutting blade may cause new problems in the chip.

[0006] The present invention has been made in consideration of such problems, and its purpose is to provide a method for manufacturing a semiconductor device that can reduce the process of removing burrs while preventing burrs from interfering with the joining of chips to each other in a method for manufacturing a semiconductor device that is manufactured by stacking chips. [Means for solving the problem]

[0007] In order to solve the above-mentioned problems and achieve the object, the method of manufacturing a semiconductor device of the present invention comprises the steps of: forming a semiconductor device in an area partitioned by lattice-shaped division lines; By providing an insulating film or a conductive film, The functional layer on which the device is formed is The entire surface The device wafer to be prepared in the step is divided along the division lines. The functional layer is formed up to the periphery. a chip dividing step of dividing into device chips; and a chip stacking step of stacking and fixing a surface side of the device chip formed in the chip dividing step, on which the functional layer is formed, facing a back side of another device chip, the device chip having a trapezoidal side shape with a larger area on the surface side than on the back side, and burrs of the functional layer occurring on the periphery of the surface side of the device chip, By being arranged so as to protrude from the back surface of the stacked device chip to the outer periphery, The device chips to be stacked The back side of It is characterized by suppressing contact with the

[0008] The method may further include a side surface forming step of forming the side surface shape of the device chips individually divided in the chip dividing step into the trapezoid shape before the chip stacking step is performed. Another device chip to be stacked on the backside of the device chip may have its front side fixed to the substrate via an adhesive layer. In addition, the device chip may have a through electrode that penetrates the device chip from the electrode formed on the functional layer to the back surface, and in the chip stacking step, the electrode of the device chip may be joined to the through electrode of another device chip to be stacked.

[0009] In the chip stacking step, the electrodes of the device chip and the through electrodes of the other device chip to be stacked are joined together, so that the through electrodes of the two chips to be stacked on each other are connected to each other via one of the functional layers, and the functional layers of the two chips to be stacked on each other are connected to each other via one of the through electrodes, thereby electrically connecting each other. That's fine.

[0010] The chip dividing step may include plasma etching using a plasma-like gas, cutting using a cutting blade, or laser processing using a laser beam. [Effects of the Invention]

[0011] The present invention can reduce the number of processes for removing burrs, while preventing the burrs from interfering with the joining of chips to each other. [Brief explanation of the drawings]

[0012] [Figure 1] FIG. 1 is a flowchart showing the procedure of a method for manufacturing a semiconductor device according to an embodiment. [Figure 2] FIG. 2 is a perspective view showing an example of a device wafer to be processed in the method for manufacturing a semiconductor device according to the embodiment. [Figure 3] FIG. 3 is a cross-sectional view of a main part of the device wafer shown in FIG. [Figure 4] FIG. 4 is a cross-sectional view illustrating the chip dividing step shown in FIG. [Figure 5] FIG. 5 is a cross-sectional view illustrating the chip dividing step shown in FIG. [Figure 6] FIG. 6 is a cross-sectional view illustrating the chip dividing step shown in FIG. [Figure 7] FIG. 7 is a cross-sectional view illustrating the chip dividing step shown in FIG. [Figure 8] FIG. 8 is a cross-sectional view illustrating the chip dividing step shown in FIG. [Figure 9] FIG. 9 is a cross-sectional view illustrating the chip dividing step shown in FIG. [Figure 10] FIG. 10 is a cross-sectional view illustrating a side surface forming step for forming the side surface of the device into a trapezoidal shape. [Figure 11] FIG. 11 is a cross-sectional view illustrating the side surface shape formed in the side surface forming step shown in FIG. [Figure 12] FIG. 12 is a cross-sectional view illustrating the chip stacking step shown in FIG. [Figure 13] FIG. 13 is a cross-sectional view illustrating the chip stacking step shown in FIG. DETAILED DESCRIPTION OF THE INVENTION

[0013] Modes (embodiments) for carrying out the present invention will be described in detail with reference to the drawings. The present invention is not limited to the contents described in the following embodiments. Furthermore, the components described below include those that can be easily imagined by a person skilled in the art and those that are substantially the same. Furthermore, the configurations described below can be combined as appropriate. Furthermore, various omissions, substitutions, or modifications of the configuration can be made within the scope of the gist of the present invention.

[0014] [Embodiment] A method for manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a flowchart showing the processing steps of the method for manufacturing a semiconductor device according to the embodiment. FIG. 2 is a perspective view showing an example of a device wafer 100 to be processed in the method for manufacturing a semiconductor device according to the embodiment. FIG. 3 is a cross-sectional view of a main part of the device wafer 100 shown in FIG. 2. As shown in FIG. 1, the method for manufacturing a semiconductor device according to the embodiment includes a chip dividing step 1001 and a chip stacking step 1002.

[0015] In the semiconductor device manufacturing method according to the embodiment, a device wafer 100 to be processed is a disk-shaped semiconductor wafer or optical device wafer having a substrate 101 made of silicon, sapphire, gallium arsenide, or the like, as shown in Fig. 2. As shown in Fig. 3, the device wafer 100 has a functional layer 103 formed on a surface 102 of the substrate 101. As shown in Figs. 2 and 3, the device wafer 100 has devices 105 formed in multiple regions partitioned by multiple planned division lines 104 formed in a grid pattern on the functional layer 103. The devices 105 are, for example, integrated circuits such as ICs (Integrated Circuits) or LSIs (Large Scale Integration).

[0016] The functional layer 103 includes an insulating film and a conductive film. The insulating film forming the functional layer 103 is composed of a low-dielectric-constant insulator coating (hereinafter referred to as a low-k film) made of an inorganic film such as SiO2, SiOF, or BSG (BoroSilicate Glass, SiOB) or an organic film such as a polymer film of a polyimide or parylene system, and has a thickness of about 10 μm. The conductive film forming the functional layer 103 is composed of a conductive metal. The low-k film is laminated with a conductive film to form the device 105. The conductive film forms the circuit and electrodes of the device 5. For this reason, the device 105 is composed of low-k films laminated on top of each other and a conductive film laminated between the low-k films.

[0017] 3, the device wafer 100 has through electrodes 107 that extend through the substrate 101 in the thickness direction from the front surface 102 to the back surface 106 behind the front surface 102. The device wafer 100 is divided into individual chip-shaped devices 105 (device chips according to the present invention) along planned division lines 104. When the device wafer 100 is divided into the individual devices 105, the through electrodes 107 become so-called TSV (Through-Silicon Via) electrodes that penetrate the devices 105 from the circuits and electrodes formed in the functional layer 103 to the back surface 106 of the substrate 101.

[0018] 4 to 9 are cross-sectional views illustrating the chip dividing step 1001 shown in FIG. 1. Note that through electrodes 107 are not shown in FIGS. 4 to 9. The chip dividing step 1001 is a step of dividing the device wafer 100 along the planned division lines 104 to divide into individual devices 105. The chip dividing step 1001 includes plasma etching using plasma gas 231 (see FIG. 6), cutting using a cutting blade 41 (see FIG. 7), or laser processing using a laser beam 221 (see FIG. 5). In this embodiment, the chip dividing step 1001 uses a combination of laser processing and plasma etching processing as shown in FIGS. 5 and 6. However, the present invention is not limited to this, and cutting processing may be used instead of plasma etching processing as shown in FIG. 7. The chip dividing step 1001 may also be performed using only laser processing.

[0019] 2, in the chip division step 1001, first, an adhesive tape 108 having a diameter larger than that of the device wafer 100 is adhered to the back surface 106 of the device wafer 100, and an annular frame 109 is attached to the outer edge of the adhesive tape 108, so that the device wafer 100 is supported by the adhesive tape 108 and the annular frame 109. Here, the adhesive tape 108 is, for example, a dicing tape formed in a sheet shape. However, the present invention is not limited to this, and instead of the adhesive tape 108 and the annular frame 109, a hard support substrate having a diameter equal to or larger than that of the device wafer 100 may be adhered to the back surface 106, so that the device wafer 100 is supported by the support substrate.

[0020] 4, in the chip division step 1001, after the annular frame 109 is attached, the exposed surface (front surface) of the functional layer 103 of the device wafer 100 is coated with a water-soluble resin 211 by the protective film forming apparatus 10 to form a protective film 212 necessary for the subsequent laser processing and plasma etching processing. In the chip division step 1001, the device wafer 100 is suction-held from the back surface 106 side on the holding surface 13 of the spinner table 12 via adhesive tape 108, and the spinner table 12 is rotated around its axis, while the water-soluble resin 211 is supplied toward the center of the front surface of the functional layer 103 of the device wafer 100 from a resin supply nozzle 11 disposed above the center of the holding surface 13 of the spinner table 12. In the chip division step 1001, the supplied water-soluble resin 211 is thereby spread on the surface of the functional layer 103 of the device wafer 100 by centrifugal force generated by the rotation of the spinner table 12, forming a protective film 212 of the water-soluble resin 211 that covers the surface of the functional layer 103. In the chip division step 1001, a lamination process may be performed in which a further protective film 212 is laminated on the protective film 212 to form a thickness necessary for the plasma etching that will be performed thereafter, or a hardening process may be performed in which the protective film 212 is hardened by heating or the like.

[0021] In this embodiment, the water-soluble resin 211 used to form the protective film 212 in the chip division step 1001 is, for example, polyvinyl alcohol (PVA), polyvinyl pyrrolidone (PVP), etc. The protective film 212 functions as a shielding film (mask) that prevents the functional layer 103 and substrate 101 necessary for the device 105 from being removed by the laser processing and plasma etching processing that are performed subsequently.

[0022] 5 , in the chip dividing step 1001, after forming the protective film 212, the functional layer 103 of the device wafer 100 is divided by laser processing along the planned dividing lines 104 using a laser processing apparatus 20. In the chip dividing step 1001, the device wafer 100 is suction-held from the back surface 106 side on the holding surface 23 of the chuck table 22 via adhesive tape 108, and while a laser irradiator 21 disposed above the holding surface 23 of the chuck table 22 irradiates a laser beam 221 having a wavelength absorbable by the functional layer 103, the chuck table 22 is moved relative to the laser irradiator 21 along the planned dividing lines 104, so that the protective film 212 and the functional layer 103 are irradiated with the laser beam 221 along the planned dividing lines 104. In the chip dividing step 1001, as a result, the protective film 212 and the functional layer 103 are laser-processed (ablated) with a laser beam 221 along the planned dividing lines 104, thereby removing and dividing the protective film 212 and the functional layer 103 along the planned dividing lines 104 and forming laser-processed grooves 222, thereby exposing the substrate 101 along the planned dividing lines 104. In the chip dividing step 1001, burrs 130 (see FIG. 13 ) rising from the functional layer 103 to a height of submicrons to several microns are generated around the periphery of the functional layer 103 divided along the planned dividing lines 104.

[0023] In the chip dividing step 1001, after dividing the functional layer 103, the substrate 101 of the device wafer 100 is plasma etched along the dividing lines 104 by the plasma etching processing apparatus 30 to perform half-cutting to form grooves 232 deep enough to prevent complete division, as shown in Fig. 6. In the chip dividing step 1001, the device wafer 100 is suction-held from the back surface 106 side by the holding surface 33 of the chuck table 32 via adhesive tape 108, a high-frequency voltage that draws in plasma-state gas 231 is applied to the chuck table 32, and the gas supply unit 31, which is disposed above the holding surface 33 of the chuck table 32, supplies the plasma-state gas 231 while applying a high-frequency voltage that generates and maintains the plasma-state gas 231 to the gas supply unit 31. In the chip dividing step 1001, the substrate 101 is plasma-etched with gas 231 in a plasma state along the laser-processed grooves 222 (planned dividing lines 104) where the protective film 212 and functional layer 103 were removed by the previous laser processing to expose the substrate 101, thereby forming grooves 232 in the substrate 101 that are deep enough not to completely divide the substrate 101 along the planned dividing lines 104. Due to this half-cut, the device wafer 100 is in a state where the devices 105 are connected at the back surface 106 side of the substrate 101.

[0024] In the chip dividing step 1001, in this embodiment, after dividing the functional layer 103, the substrate 101 is plasma etched to perform half-cutting, but the present invention is not limited to this, and half-cutting may be performed by irradiating the substrate 101 with a laser beam having a wavelength that is absorbed by the substrate 101, as in the case of dividing the functional layer 103, to form grooves 232 of the same depth. Also, in the chip dividing step 1001, as shown in Fig. 7, half-cutting may be performed by cutting the substrate 101 of the device wafer 100 along the laser-processed grooves 222 (planned division lines 104) using a cutting device 40 to form grooves 232 of the same depth. In the chip division step 1001, the device wafer 100 is suction-held from the back surface 106 side on the holding surface 43 of the chuck table 42 via adhesive tape 108, and while rotating the cutting blade 41 attached to the tip of a spindle arranged above the holding surface 43 of the chuck table 42, the chuck table 42 is moved relative to the cutting blade 41 along the planned division line 104, whereby the cutting blade 41 cuts the substrate 101 along the planned division line 104 to form a groove 232.

[0025] In addition, in the chip division step 1001, as in this embodiment, it is preferable to divide the functional layer 103 and then plasma etch the substrate 101 to half-cut it.In this case, a device 105 with high flexural strength can be obtained, and processing debris generated when half-cutting the substrate 101 can be reduced, thereby reducing contamination adhering to the device 105.

[0026] In the chip division step 1001, after the substrate 101 is half-cut, the protective film 212 of the water-soluble resin 211 formed on the surface of the functional layer 103 of the device wafer 100 is removed. Specifically, in the chip division step 1001, the device wafer 100 is removed and held on a spinner table (not shown), and the spinner table is rotated about its axis while cleaning water is supplied toward the protective film 212 of the device wafer 100 from a cleaning water supply nozzle disposed above the center of the holding surface of the spinner table. In the chip division step 1001, the supplied cleaning water is spread over the protective film 212 of the device wafer 100 by centrifugal force generated by the rotation of the spinner table, and the protective film 212 of the water-soluble resin 211 is dissolved and removed.

[0027] 8, after removing the protective film 212, the back surface 106 of the device wafer 100 is peeled off from the adhesive tape 108, and the adhesive tape 108 is attached to the functional layer 103 side of the front surface 102 of the device wafer 100, and an annular frame 109 is attached to the outer edge of the adhesive tape 108. Instead of the adhesive tape 108, a hard support substrate having a diameter equal to or larger than that of the device wafer 100 may be attached to the front surface 102, and the device wafer 100 may be supported by the support substrate.

[0028] 9, the substrate 101 of the device wafer 100 is ground from the back surface 106 side by a grinding apparatus 50 to thin the portions connecting the devices 105 on the substrate 101 of the device wafer 100. In the chip division step 1001, the device wafer 100 is suction-held from the functional layer 103 side on the holding surface 53 of the chuck table 52 via the adhesive tape 108, and the chuck table 52 is rotated about its axis, and a grinding wheel 51 attached to the tip of a spindle disposed above the holding surface 53 of the chuck table 52 is pressed against the back surface 106 of the substrate 101 of the device wafer 100 while being rotated about its axis. In the chip division step 1001, the substrate 101 of the device wafer 100 is ground from the back surface 106 side with a grinding wheel 51 to thin the portions of the substrate 101 of the device wafer 100 connecting the devices 105 together.

[0029] In the chip division step 1001, in this embodiment, the portions connecting the devices 105 on the substrate 101 of the device wafer 100 are completely ground to divide the device wafer 100 into individual devices 105. However, the present invention is not limited to this, and the portions connecting the devices 105 on the substrate 101 of the device wafer 100 may be left to the maximum thickness that can be removed in the subsequent plasma etching process, and the device wafer 100 may be divided into individual devices 105 in the subsequent plasma etching process.

[0030] The semiconductor device manufacturing method according to the embodiment further includes a side surface forming step. FIG. 10 is a cross-sectional view illustrating the side surface forming step in which the side surface of the device 105 is formed into a trapezoidal shape. FIG. 11 is a cross-sectional view illustrating the side surface formed in the side surface forming step illustrated in FIG. 10. Note that FIG. 10 does not illustrate the through electrodes 107. The side surface forming step is a step in which the side surface of each divided device 105 is formed into a trapezoidal shape as illustrated in FIG. 11 using a plasma etching apparatus 60, as illustrated in FIG. 10. Here, the trapezoidal side surface shape of the device 105 refers to the shape of the side surface intersecting the front surface 102 of the functional layer 103 and the back surface 106 of the device 105. In this embodiment, the side surfaces of the device 105 are formed in multiple regions partitioned by multiple planned division lines 104 arranged in a grid pattern, so that four trapezoids are formed for each device 105.

[0031] 10 , in the side surface forming step, the device wafer 100 is suction-held from the functional layer 103 side on the holding surface 63 of the chuck table 62 via the adhesive tape 108, and the gas supply unit 61 supplies the plasma gas 241 from the back surface 106 side of the device wafer 100. In this way, in the side surface forming step, the substrate 101 of the device wafer 100 is plasma-etched from the back surface 106 side with the plasma gas 241.

[0032] The plasma etching process performed in the side surface formation step is not the so-called Bosch process, which repeats etching in the depth direction and the formation of an etching sidewall protective film, but is an isotropic dry etching process that does not involve the formation of an etching sidewall protective film. Furthermore, in the side surface formation step, the device wafer 100 is positioned with the back surface 106 closer to the gas supply unit 61 than the functional layer 103 side (front surface 102 side), and plasma etching is performed. Therefore, in the side surface formation step, more plasma-state gas 241 is supplied to the back surface 106 side than to the functional layer 103 side (front surface 102 side) of the grooves 232 that form the side surfaces of the individual devices 105, thereby removing the side surfaces of the devices 105 more on the back surface 106 side than on the functional layer 103 side (front surface 102 side). As a result, in the side surface formation step, an inclined surface 110 is formed in the grooves 232 that form the side surfaces of the individual devices 105, narrowing the groove width from the back surface 106 side toward the front surface 102 side (functional layer 103 side), as shown in FIG. For this reason, the inclined surface 110 is formed into a trapezoid with sides longer on the front surface 102 side (functional layer 103 side) than on the back surface 106 side. Also, for this reason, in the side surface forming step, each device 105 is formed with an area larger on the front surface 102 side (functional layer 103 side) than on the back surface 106 side.

[0033] In the side surface forming step, the inclination angle of the inclined surfaces 110 formed on the side surfaces of the grooves 232 can be controlled by controlling the plasma etching processing conditions, such as the amount of plasma gas 241 supplied by the gas supply unit 61 and the high-frequency voltage applied to the gas supply unit 61 and the chuck table 62. In this embodiment, for example, when the thickness 301 of the device 105 is approximately 55 μm and the spacing 302 between the grooves 232 is approximately 50 μm, in the side surface forming step, the spacing 303 between adjacent inclined surfaces 110 formed from the same groove 232 on the functional layer 103 side is controlled to approximately 80 μm, and the spacing 304 between adjacent inclined surfaces 110 formed from the same groove 232 on the back surface 106 side is controlled to approximately 104 μm or less.

[0034] In this embodiment of the method for manufacturing a semiconductor device, the side surface forming step is carried out after the device wafer 100 is divided into individual devices 105 by grinding to complete the chip dividing step 1001, but the present invention is not limited to this. The grinding process carried out earlier may leave the portions connecting the devices 105 on the substrate 101 of the device wafer 100, and the remaining portions may be removed by plasma etching to divide the device wafer 100 into individual devices 105, completing the chip dividing step 1001, and the plasma etching process may then be continued to carry out the side surface forming step.

[0035] Figures 12 and 13 are cross-sectional views illustrating the chip stacking step 1002 shown in Figure 1. As shown in Figures 12 and 13, the chip stacking step 1002 is a step in which the front surface 102 of the device 105 formed in the chip dividing step 1001 and the side surface forming step, on which the functional layer 103 is located, is stacked and fixed to the back surface 106 of another device 105 by using a chip stacking apparatus 70.

[0036] In the chip stacking step 1002, first, the front surface 102 side of the device 105 formed in the chip dividing step 1001 and the side surface forming step, on which the functional layer 103 is located, is placed on a predetermined substrate 120. The predetermined substrate 120 is, for example, a circuit board. In the chip stacking step 1002, the front surface 102 side of the device 105, on which the functional layer 103 is located, may be fixed to the substrate 120 via a predetermined adhesive layer. In this case, the adhesive layer can prevent burrs 130 rising from the functional layer 103 from interfering with placement on the substrate 120. Note that the device 105 placed on the substrate 120 is another device chip on the back side of which the device chip of the present invention is stacked.

[0037] In chip stacking step 1002, after arranging devices 105 on substrate 120, the devices 105 formed in chip dividing step 1001 and side surface forming step are held from the back surface 106 side by chip stacking apparatus 70, and the held devices 105 are stacked and fixed such that the front surface 102 side on which functional layer 103 is located faces the back surface 106 side of the devices 105 placed on substrate 120. In chip stacking step 1002, a semiconductor device 140 is thereby manufactured in which devices 105 are stacked in the thickness direction.

[0038] Since the surface 102 side (functional layer 103 side) of the device 105 is formed to have a larger area than the back surface 106 side in the side surface forming step, in the chip stacking step 1002, the device 105 can be stacked by the chip stacking apparatus 70 so that the central region of the functional layer 103 on the surface 102 side of the device 105 faces the back surface 106 of the device 105 placed on the substrate 120, so that the burr 130 formed on the periphery of the functional layer 103 on the surface 102 side of the device 105 stacked by the chip stacking apparatus 70 protrudes beyond the periphery of the back surface 106 of the device 105 placed on the substrate 120. This prevents the burr 130 from coming into contact with the back surface 106 of the device 105 placed on the substrate 120 and interfering with the stacking of the devices 105.

[0039] In addition, in the chip stacking step 1002, an electrode formed by a conductive film of the functional layer 103 of the device 105 to be stacked by the chip stacking apparatus 70 is joined to the through electrode 107 of the device 105 placed on the substrate 120, thereby electrically connecting these stacked devices 105.

[0040] In the manufacturing method of the semiconductor device according to the embodiment having the above configuration, the device 105 is formed into a trapezoidal side shape with a larger area on the front surface 102 side (functional layer 103 side) than on the back surface 106 side, and burrs 130 of the functional layer 103 generated on the periphery of the front surface 102 side (functional layer 103 side) of the device 105 are prevented from contacting the stacked device 105. Therefore, the manufacturing method of the semiconductor device according to the embodiment has the advantageous effect of reducing the process of removing burrs 130 when stacking devices 105 to manufacture a semiconductor device 140, while preventing the burrs 130 from interfering with stacking and joining of the devices 105.

[0041] Furthermore, in the method for manufacturing a semiconductor device according to the embodiment, the surface 102 of the device 105 to be placed on the substrate 120 is fixed to the substrate 120 via an adhesive layer. Therefore, in the method for manufacturing a semiconductor device according to the embodiment, the adhesive layer can prevent the burrs 130 from interfering with the placement on the substrate 120.

[0042] Furthermore, in the manufacturing method of the semiconductor device according to the embodiment, since the device wafer 100 and the device 105 are provided with through electrodes 107, it is possible to prevent the burrs 130 from interfering with the bonding of the devices 105 to each other, thereby reducing the risk that the burrs 130 will interfere with the bonding between the through electrodes 107 of the device 105 placed on the substrate 120 and the electrodes formed by the conductive film of the functional layer 103 of the device 105 stacked on this device 105, resulting in a defect.

[0043] The present invention is not limited to the above-described embodiment, and can be implemented in various modifications without departing from the gist of the present invention. [Explanation of symbols]

[0044] 41 Cutting blade 100 device wafers 102 Surface 103 Functional Layer 104 Planned division line 105 devices 106 Back side 107 Through electrode 110 Slope 130 Bali 140 Semiconductor devices 221 Laser Beam 231,241 Gas in plasma state

Claims

1. a chip dividing step of dividing a device wafer having a functional layer on the entire surface of which devices are formed by providing an insulating film or a conductive film in an area partitioned by a grid-like dividing line along the dividing line into device chips each having the functional layer formed up to its periphery; a chip stacking step of stacking and fixing the front surface side of the device chip formed in the chip dividing step, on the back surface side of another device chip, with the front surface side having the functional layer facing the back surface side of another device chip; The device chip has a trapezoidal side shape with a larger area on the front side than on the back side, and burrs of the functional layer that occur on the periphery of the front side of the device chip are positioned so that they extend beyond the back side of the stacked device chip to the outer periphery, thereby preventing them from coming into contact with the back side of the stacked device chip.

2. A method for manufacturing a semiconductor device as described in claim 1, further comprising a side surface forming step of forming the side surface shape of the device chips individually divided in the chip dividing step into a trapezoid before performing the chip stacking step.

3. 3. The method for manufacturing a semiconductor device according to claim 1, wherein the other device chips stacked on the backside of the device chip are fixed on the front side to the substrate via an adhesive layer.

4. A method for manufacturing a semiconductor device as described in claim 1, 2 or 3, wherein the device chip has a through electrode that penetrates the device chip from an electrode formed in the functional layer to the back surface, and in the chip stacking step, the electrode of the device chip is joined to the through electrode of another device chip to be stacked.

5. A method for manufacturing a semiconductor device as described in claim 4, wherein in the chip stacking step, the electrodes of the device chip and the through electrodes of the other device chip to be stacked are joined together, so that the respective through electrodes of the two device chips stacked on top of each other are connected to each other via one of their functional layers, and the respective functional layers of the two device chips stacked on top of each other are connected to each other via one of their through electrodes, thereby electrically connecting each other.

6. 6. The method for manufacturing a semiconductor device according to claim 1, wherein the step of dividing into chips includes a plasma etching process using a plasma gas, a cutting process using a cutting blade, or a laser process using a laser beam.

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