Method for producing a substrate for epitaxial growth of layers of gallium-based III-N alloys

Abstract

A method for manufacturing a substrate for epitaxially growing a layer of a gallium-based III-N alloy includes the steps of: providing a monocrystalline silicon carbide donor substrate; implanting ion species into the donor substrate to form a weakened region that defines a thin layer of monocrystalline SiC to be transferred; bonding the donor substrate to a first receiver substrate via a bonding layer; separating the donor substrate along the weakened region to transfer the thin layer of SiC to the first receiver substrate; epitaxially growing a layer of semi-insulating SiC having a thickness greater than 1 μm on the thin layer of SiC; bonding the layer of semi-insulating SiC to a second receiver substrate; removing at least a portion of the bonding layer to separate the first receiver substrate; and removing the transferred thin layer of monocrystalline SiC to expose the layer of semi-insulating SiC.

Description

[Technical Field]

[0001] [1] The present invention relates to a method for producing a substrate for epitaxial growth of a gallium-based III-N alloy layer (i.e., a gallium nitride (GaN), an aluminum gallium nitride (AlGaN) layer, or an indium gallium nitride (InGaN) layer), a method for producing such a III-N alloy layer, and a method for producing a high electron mobility transistor (HEMT) on such a III-N alloy layer. [Background technology]

[0002] [2] III-N semiconductors, in particular gallium nitride (GaN), aluminum gallium nitride (AlGaN) or indium gallium nitride (InGaN), appear to be particularly promising, especially for the formation of high-power light-emitting diodes (LEDs) and electronic devices operating at high frequencies, such as high electron mobility transistors (HEMTs) or other field-effect transistors (FETs).

[0003] [3] Insofar as these III-N alloys are difficult to find in the form of large bulk substrates, they are generally formed by heteroepitaxy, i.e., by epitaxy on substrates made of different materials.

[0004] [4] The choice of such a substrate takes into account, among other things, the differences in the lattice constant and the thermal expansion coefficient between the substrate material and the III-N alloy. In particular, the greater these differences, the greater the risk of the formation of crystalline defects, such as dislocations, in the III-N alloy layer, and the greater the risk of high mechanical stresses that can lead to excessive strain.

[0005] [5] The materials most frequently considered for heteroepitaxy of III-N alloys are sapphire and silicon carbide (SiC).

[0006] [6] In addition to having a smaller difference in lattice constant from gallium nitride, silicon carbide is particularly preferred for high-power electronic applications because its thermal conductivity is significantly higher than that of sapphire and therefore can more easily dissipate the heat energy generated during the operation of the component.

[0007] [7] For radio frequency (RF) applications, semi-insulating silicon carbide, typically 10 5 It is desirable to use silicon carbide, which has an electrical resistivity of Ωcm or higher, however this material is particularly expensive and is currently only available in substrates of limited size.

[0008] [8] While silicon significantly reduces manufacturing costs and allows for the use of larger substrate sizes, III-N alloy-on-silicon structures are disadvantaged by RF propagation losses above 20 GHz and by poor heat dissipation.

[0009] [9] Composite structures such as SopSiC or SiCopSiC structures have also been investigated [1] but have proven to be less than entirely satisfactory. These structures comprise a monocrystalline silicon layer or a monocrystalline SiC layer (intended to form a seed layer for epitaxial growth of gallium nitride) on a polycrystalline SiC substrate, respectively. Polycrystalline SiC is an inexpensive, available in large substrate sizes, and a good heat dissipating material, but these composite structures are disadvantaged by the presence of a silicon oxide layer at the interface between the monocrystalline silicon or SiC layer and the polycrystalline SiC substrate, which forms a thermal barrier that prevents heat dissipation from the III-N alloy layer to the polycrystalline SiC substrate. Summary of the Invention

[0010] (Brief Description of the Invention)

[10] It is therefore an object of the present invention to remedy the aforementioned drawbacks, particularly the size and cost limitations of semi-insulating SiC substrates.

[0011]

[11] It is therefore an object of the present invention to provide a method for producing a substrate for epitaxial growth of gallium-based III-N alloys, particularly for the formation of HEMTs or other high frequency, high power electronic devices with minimized RF losses and maximized heat dissipation.

[0012]

[12] To this end, the invention provides a method for producing a substrate for the epitaxial growth of a layer of gallium nitride (GaN), aluminum gallium nitride (AlGaN) or indium gallium nitride (InGaN), comprising the following successive steps: providing a single crystal silicon carbide donor substrate; implanting ionic species into the donor substrate to form a weakened region that defines a thin layer of single crystal SiC to be transferred; bonding the donor substrate to a first receiver substrate via a bonding layer; Separating the donor substrate along the weakened region so as to transfer the thin layer of SiC to a first receiver substrate; epitaxially growing on the thin layer of SiC a layer (30) of semi-insulating SiC having a thickness greater than 1 μm; bonding the layer of semi-insulating SiC to a second receiver substrate, the second receiver substrate having a high electrical resistivity; removing at least a portion of the bonding layer to separate the first receiver substrate; removing the thin layer of transferred single crystal SiC to expose the semi-insulating SiC layer; The present invention provides a method including:

[0013]

[13] "High frequency" as used herein means frequencies above 3 kHz.

[0014]

[14] "High power" as used herein means that the power injected through the gate of the transistor is greater than 0.5 W / mm.

[0015]

[15] "High electrical resistivity" as used herein means an electrical resistivity of 100 Ω cm or greater.

[0016]

[16] "Semi-insulating SiC" means, as used herein, 5 It means silicon carbide having an electrical resistivity of Ωcm or more.

[0017]

[17] This method makes it possible to form a substrate based on silicon or another low-cost material with high electrical resistivity available in large sizes, comprising a layer of semi-insulating SiC with a crystalline quality suitable for the subsequent epitaxial growth of a layer of III-N alloy, allowing the final structure to benefit from its good properties in terms of heat dissipation and limiting RF losses. Because the layer of semi-insulating SiC is in direct contact with the silicon substrate (or a substrate of another material with high electrical resistivity), the structure does not include any additional thermal barriers.

[0018]

[18] Direct epitaxy of semi-insulating SiC layers on high-resistivity silicon substrates results in the formation of numerous dislocations in the semi-insulating SiC due to the difference in lattice constants between silicon and silicon carbide. In contrast, the method according to the present invention allows the use of a layer of monocrystalline SiC as a seed for growing semi-insulating SiC, the quality of which is optimal because it was obtained by transfer from a donor substrate.

[0019]

[19] Furthermore, the use of a first receiver substrate acting as a temporary carrier allows optimal orientation of the silicon side of the SiC during the various steps of the method.

[0020]

[20] According to advantageous but optional features of the method, these features may be implemented separately or in any technically possible combination thereof.

[21] The difference in thermal expansion coefficient between the first receiver substrate and the donor substrate is 3×10 -6 K -1 is as follows:

[22] The first receiver substrate is a SiC substrate having a crystal quality lower than that of the donor substrate;

[23] The thin layer of single crystal SiC transferred to the first receiver substrate has a thickness of less than 1 μm;

[24] the bonding layer is formed from a material that is thermally stable during epitaxial growth of the layer of semi-insulating SiC and that can be removed from the interface between the transferred layer of single-crystal SiC and the first receiver substrate;

[25] The bonding layer is a layer of silicon nitride or gallium nitride;

[26] The step of removing at least a portion of the bonding layer comprises chemical etching, laser delamination, and / or application of mechanical stress;

[27] A layer of semi-insulating SiC is formed by doping with vanadium during the epitaxial growth of SiC.

[28] A layer of semi-insulating SiC is formed by co-depositing silicon, carbon, and vanadium.

[29] The second receiver substrate is a silicon substrate having an electrical resistivity of 100 Ω cm or more;

[30] The epitaxial layer of semi-insulating SiC has a thickness comprised between 1 and 5 μm;

[31] The second receiver substrate is a polycrystalline SiC substrate or a polycrystalline AlN substrate having an electrical resistivity of 100 Ωcm or more;

[32] The epitaxial layer of semi-insulating SiC has a thickness of 80 μm or less,

[33] The method further comprises recycling a segment of the donor substrate separated from the transferred layer to form a new donor substrate;

[34] Ion species are implanted through the silicon surface of a donor substrate, which is bonded to a first receiver substrate such that the silicon surface of the layer of semi-insulating SiC is exposed after the thin layer of transferred single-crystal SiC is removed.

[0021]

[35] Another subject of the invention relates to a method for producing a layer of a gallium-based III-N alloy on a substrate obtained using the method described above.

[36] The method further comprises: providing a substrate manufactured using a method such as those described above; epitaxially growing a layer of gallium nitride on the layer of semi-insulating SiC of the substrate; Includes:

[0022]

[37] In a particular embodiment, the layer of gallium nitride has a thickness comprised between 1 and 2 μm.

[0023]

[38] Another subject of the invention relates to a method for manufacturing high electron mobility transistors (HEMTs) on layers of such III-N alloys.

[39] The method further comprises: epitaxy of a layer of gallium nitride, aluminum gallium nitride or indium gallium nitride using a method such as those described above; forming a heterojunction on said layer by epitaxy of a layer of III-N material different from the material of said layer; forming a channel of a transistor at the same level as the heterojunction; forming a source, a drain and a gate of a transistor on the channel; Includes: [Brief explanation of the drawings]

[0024] Further features and advantages of the present invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings. [Figure 1] FIG. 1 is a schematic cross-sectional view of a single-crystal SiC donor substrate. [Figure 2] 2 is a schematic cross-sectional view of the donor substrate of FIG. 1 in which a weakened region has been formed by implantation with ionic species to define a thin layer to be transferred. [Figure 3] FIG. 1 is a schematic cross-sectional view of a temporary carrier covered with a removable bonding layer. [Figure 4]4 is a schematic cross-sectional view of the temporary carrier of FIG. 3 bonded to the donor substrate of FIG. 2 via a removable bonding layer. [Figure 5] FIG. 1 is a schematic cross-sectional view of a donor substrate being separated along a weakened region to transfer a thin layer of single crystal SiC to a temporary carrier. [Figure 6] FIG. 10 is a schematic cross-sectional view of a thin layer of single-crystal SiC transferred onto a temporary carrier after the free surface of the temporary carrier has been polished. [Figure 7] 1 is a schematic cross-sectional view showing a layer of semi-insulating SiC formed by epitaxy on a thin layer of transferred single crystal SiC. [Figure 8] FIG. 8 is a schematic cross-sectional view of the structure of FIG. 7 bonded to a receiver substrate via an epitaxial layer of semi-insulating SiC. [Figure 9] FIG. 9 is a schematic cross-sectional view of the structure of FIG. 8 with the temporary carrier removed. [Figure 10] FIG. 2 is a schematic cross-sectional view of a receiver substrate and an epitaxial layer of semi-insulating SiC after a thin layer of single crystal SiC has been removed. [Figure 11] FIG. 1 is a schematic cross-sectional view in which a layer of GaN is formed by epitaxy on a layer of semi-insulating SiC. [Figure 12] 1 is a schematic cross-sectional view in which a heterojunction is formed by epitaxy of a layer of a III-N alloy different from GaN on a layer of GaN.

[0025] For clarity of illustration, the various layers are not necessarily drawn to scale. DETAILED DESCRIPTION OF THE INVENTION

[0026] Detailed Description of the Embodiments

[54] The present invention provides a method for producing a substrate for epitaxial growth of gallium-based binary or ternary III-N alloys, such as gallium nitride (GaN), aluminum gallium nitride (Al x Ga 1-xN, where 0 < x < 1, hereinafter abbreviated as AlGaN) and indium gallium nitride (In x Ga 1-x N, where 0 < x < 1, hereinafter abbreviated as InGaN). For the sake of brevity, in the remainder of this specification, the manufacture of a substrate for epitaxially growing a layer of GaN will be described. However, those skilled in the art will be able to adjust the growth conditions to form a layer of AlGaN or InGaN, and the substrate useful for this epitaxial growth remains the same.

[0027]

[55] This method uses a donor substrate of doped single-crystalline silicon carbide (SiC), and the thin layer of the donor substrate transferred to the first receiver substrate serves as a seed for growing a layer of semi-insulating SiC. In the remainder of this specification, the transfer of layers via the Smart Cut (trademark) process is considered, but it is needless to say that any other layer transfer technique, such as cleaving or laser cutting, may be used.

[0028]

[56] For this purpose, a single-crystalline SiC substrate having excellent crystal quality, that is, a substrate particularly without dislocations, is selected.

[0029]

[57] In certain embodiments, the donor substrate may be a bulk substrate of single-crystalline SiC. In other embodiments, the donor substrate may be a composite substrate including a surface layer of single-crystalline SiC and at least one other layer of another material. In this case, the layer of single-crystalline SiC has a thickness of 0.5 μm or more.

[0030]

[58] Silicon carbide has various crystal forms (also called polytypes). The most common ones are the 4H, 6H, and 3C forms. Single-crystalline silicon carbide is preferably selected from the 4H and 6H polytypes, but the present invention can be implemented using any polytype.

[0031]

[59] The figure shows a bulk substrate 10 of single-crystalline SiC.

[0032]

[60] As known per se, such a substrate has a silicon face 10-Si and a carbon face 10-C, as shown in FIG.

[0033]

[61] Currently, GaN epitaxy is mainly performed on the silicon face of SiC. However, it is possible to grow GaN on the carbon face of SiC. The orientation (silicon face / carbon face) of the donor substrate during this process is selected depending on the face of the SiC on which the GaN layer is intended to grow.

[0034]

[62] Referring to Figure 2, ionic species are implanted into a donor substrate 10 to form a weakened region 12 that defines a thin layer 11 of single crystal SiC. The implanted species typically include hydrogen and / or helium. Those skilled in the art will be able to define the required implant dose and energy.

[0035]

[63] If the donor substrate is a composite substrate, the implantation is performed in a surface layer of single crystal SiC of said substrate.

[0036]

[64] The ionic species are preferably implanted through the silicon face 10-Si of the donor substrate. As will be seen below, this orientation of the donor substrate allows the silicon face of the SiC to be placed at the surface of the final substrate on which it is intended to grow a layer of GaN, which is preferred. However, if it is envisaged to grow a layer of GaN on the carbon face of the SiC, the ionic species must be implanted through the carbon face 10-C of the donor substrate.

[0037]

[65] The thin layer of monocrystalline SiC 11 preferably has a thickness of less than 1 μm. In particular, such a thickness is achievable on an industrial scale using the Smart Cut™ process. In particular, implantation tools available on industrial production lines allow such implantation depths to be obtained.

[0038]

[66] Referring to Figure 3, a first receiver substrate 20 is also provided.

[0039]

[67] The main function of the first receiver substrate is to temporarily hold the layer of monocrystalline SiC 11 between the transfer of the layer of monocrystalline SiC 11 from the donor substrate and the growth of the layer of semi-insulating SiC on the layer of monocrystalline SiC.

[0040]

[68] For this purpose, the first receiver substrate is selected to have a thermal expansion coefficient substantially equal to that of SiC so as not to generate stress or strain during epitaxy of the semi-insulating SiC. Thus, the first receiver substrate and the donor substrate (or the layer of single-crystal SiC in the case of a composite donor substrate) have a thermal expansion coefficient difference of less than 3×10 -6 K -1 It is particularly advantageous that:

[0041]

[69] The first receiver substrate is also preferably made of SiC to minimize the difference in thermal expansion coefficients. It is particularly advantageous for the first receiver substrate 20 to be a SiC substrate with a lower crystalline quality than that of the donor substrate. This means that the first receiver substrate may be a polycrystalline SiC substrate, or indeed a monocrystalline SiC substrate, but may contain dislocations of all types (as opposed to the monocrystalline SiC of the donor substrate, which is chosen for its excellent crystalline quality to ensure the quality of the GaN epitaxial layer). Such a substrate with lower crystalline quality has the advantage of being cheaper than a substrate of the same quality as the donor substrate, while still being perfectly suited to the function of a temporary carrier.

[0042]

[70] Referring to Figure 4, a donor substrate 10 comprising a thin layer 11 of single crystal SiC is bonded to a first receiver substrate 20.

[0043]

[71] To ensure good adhesion of the donor substrate to the first donor substrate, a bonding layer 21 is formed at the interface between the substrates.

[0044]

[72] In Figure 3 the bonding layer 21 is formed on the first receiver substrate 20, but in other embodiments not shown the bonding layer may be formed on the donor substrate (on the side of the thin layer 11), or indeed partly on the donor substrate and partly on the first receiver substrate.

[0045]

[73] The bonding layer is formed from a material that is thermally stable during the subsequent epitaxial growth of semi-insulating SiC on the thin layer 11.

[0046]

[74] For reference, epitaxy of 4H- or 6H-SiC is typically performed at temperatures above 1500°C, so the bonding layer material chosen does not degrade or dissociate at such temperatures.

[0047]

[75] Additionally, bonding layer material may be removed from the interface between the transferred layer of single crystal SiC and the first receiver substrate 20, for example, by selective etching, optionally assisted by plasma.

[0048]

[76] According to a preferred embodiment, the bonding layer is a layer of silicon nitride or gallium nitride, the thickness of said layer being typically comprised between 10 nm and several hundred nanometers.

[0049]

[77] Referring to Figure 5, the donor substrate is separated along the weakened region 12. In a manner known per se, the separation may be caused by a heat treatment, by mechanical action, or by a combination of these means.

[0050]

[78] The effect of this separation is to transfer a thin layer of single crystal SiC 11 to a first receiver substrate 20. The remaining portion of the donor substrate 10' may optionally be recycled for another use.

[0051]

[79] As shown in Figure 6, the free surface of the transferred single-crystal SiC layer 11 is the carbon surface 11-C (the silicon surface 11-Si is on the side of the bonded interface). This surface is polished, for example by chemical mechanical polishing (CMP), to remove defects related to the implantation of ionic species and to reduce the roughness of the layer 11.

[0052]

[80] Referring to Figure 7, epitaxial growth of a layer 30 of semi-insulating SiC is performed on a thin layer of monocrystalline SiC 11. The polytype of the semi-insulating SiC is advantageously the same as the polytype of SiC of the donor substrate.

[0053]

[81] This epitaxial growth is performed at very high temperatures, typically above 1500 °C, at which the bonding layer 21 is stable, as mentioned above. Additionally, the small difference in thermal expansion coefficient between the material of the first receiver substrate and SiC minimizes the mechanical stresses created within the stack.

[0054]

[82] There are various techniques for forming semi-insulating SiC. In one embodiment, a layer of SiC is doped with vanadium during its epitaxial growth. In another embodiment, silicon, carbon, and vanadium are simultaneously deposited using appropriate precursors in an epitaxial reactor.

[0055]

[83] The layer of semi-insulating SiC advantageously has a thickness greater than 1 μm so as to contribute significantly to the dissipation of heat within the final structure, which is greater than can be achieved directly with the Smart Cut™ process using commercially available equipment.

[0056]

[84] Thus, the method of transferring a layer of monocrystalline SiC with a thickness of less than 1 μm and then forming a monocrystalline layer of monocrystalline SiC by epitaxy on the transferred layer makes it possible to circumvent the technical limitations of industrially available implantation tools for carrying out the Smart Cut™ process. Furthermore, the method does not require a donor substrate made of (particularly expensive) semi-insulating SiC; in particular, the transferred layer may be formed from monocrystalline SiC with a standard electrical resistivity, since the transferred layer serves as a seed layer for forming a heat spreader layer made substantially of semi-insulating SiC.

[0057]

[85] Referring to Figure 8, a second receiver substrate 40 having a high electrical resistivity is provided and bonded to the layer of semi-insulating SiC 30. For example, the second receiver substrate may be a silicon substrate having an electrical resistivity of 100 Ωcm or more, a polycrystalline SiC substrate or a polycrystalline AlN substrate also having an electrical resistivity of 100 Ωcm or more.

[0058]

[86] The thickness of the layer of semi-insulating SiC 30 is possibly selected depending on the material of the second receiver substrate. Thus, if the second receiver substrate is a silicon substrate with high electrical resistivity, the layer of semi-insulating SiC 30 advantageously has a thickness comprised between 1 and 5 μm. If the second receiver substrate is made of polycrystalline AlN or polycrystalline SiC, the layer of semi-insulating SiC 30 may advantageously have a much larger thickness, possibly up to 80 μm, for example about 50 to 80 μm, in order to improve the dissipation of heat in the final structure.

[0059]

[87] Next, at least a portion of bonding layer 21 is removed to separate the first receiver substrate from the remainder of the structure. During this removal, layer 21 must be sufficiently damaged to allow separation from the structure. Any suitable means may be used. For example, without limitation, the bonding layer may be removed by chemical etching, laser delamination, and / or application of mechanical stress.

[0060]

[88] Thus, at the end of this separation, a structure remains consisting successively of the second receiver substrate 40, the layer of semi-insulating SiC 30 and the thin layer of transferred monocrystalline SiC 11, as shown in Figure 9. Any residues of the bonding layer 21 are removed by polishing and / or etching.

[0061]

[89] Referring to Figure 10, thin layer 11 is removed to expose layer of semi-insulating SiC 30. Thin layer 11 may be removed by any suitable means, such as chemical or mechanical etching.

[0062]

[90] The exposed surface is the silicon surface of the semi-insulating SiC, which is favorable for epitaxial growth of GaN. In this way, a suitable substrate for epitaxial growth of III-N alloys was formed.

[0063]

[91] Referring to Figure 11, a layer 50 of GaN (or, as mentioned above, AlGaN or InGaN) is grown on the free surface of the layer 30 of semi-insulating SiC. The thickness of layer 50 is typically comprised between 1 and 2 µm.

[0064]

[92] A heterojunction is then formed on layer 50 by epitaxy growing a layer 60 of a III-N alloy different from that of layer 50, as shown in Figure 12.

[0065]

[93] It is then possible to continue fabricating a transistor, in particular a HEMT, from this heterojunction using methods known to those skilled in the art, with the channel of the transistor being formed flush with the heterojunction and the source, drain and gate of the transistor being formed above the channel.

[0066]

[94] The structure thus obtained is particularly advantageous in that it contains a relatively thick layer of semi-insulating SiC, which acts as a seed for the epitaxial growth of the III-N alloy layer, and which dissipates heat well and limits RF losses. Furthermore, the second receiver substrate carrying the layer of semi-insulating SiC is in direct contact with said layer, so that the structure does not contain any thermal barriers.

[0067]

[95] Thus, a HEMT or another high-frequency, high-power electronic device fabricated on a layer of II-N alloy formed by epitaxy on such a structure has minimized RF losses and maximized heat dissipation.

[0068] (References)

[96] [1] Comparative study on stress in AlGaN / GaN HEMT structures grown on 6H-SiC, Si and on composite substrates of the 6H-SiC / poly-SiC and Si / poly-SiC, M. Guziewicz et al, Journal of Physics: Conference Series 100 (2008) 040235

Claims

1. A method for manufacturing a substrate for epitaxially growing a layer of gallium nitride (GaN), aluminum gallium nitride (AlGaN) or indium gallium nitride (InGaN), comprising the following successive steps: Providing a single crystal silicon carbide donor substrate (10); implanting ionic species into the donor substrate (10) to form a weakened region (12) that defines a thin layer (11) of monocrystalline SiC to be transferred; bonding the donor substrate (10) to a first receiver substrate (20) via a bonding layer (21); Separating the donor substrate (10) along the weakened region (12) so as to transfer the thin layer of SiC (11) to the first receiver substrate (20); epitaxial growth of a layer (30) of semi-insulating SiC having a thickness greater than 1 μm on said thin layer (11) of SiC; bonding the layer of semi-insulating SiC (30) to a second receiver substrate (40), the second receiver substrate (40) having a high electrical resistivity; removing at least a portion of the bonding layer (21) so as to separate the first receiver substrate (20); removing the transferred thin layer of single crystal SiC (11) to expose the layer of semi-insulating SiC (30); A method comprising:

2. The difference in thermal expansion coefficient between the first receiver substrate (20) and the donor substrate (10) is 3×10 －６ K －１ 2. The method of claim 1, wherein:

3. The method of claim 1 or 2, wherein the first receiver substrate (20) is a SiC substrate having a lower crystalline quality than that of the donor substrate.

4. The method according to any one of claims 1 to 3, wherein the thin layer (11) of single crystal SiC transferred to the first receiver substrate (20) has a thickness of less than 1 μm.

5. 5. The method according to claim 1, wherein the bonding layer (21) is formed from a material that is thermally stable during the epitaxial growth of the layer of semi-insulating SiC (30) and that can be removed from the interface between the transferred layer of monocrystalline SiC (11) and the first receiver substrate (20).

6. The method according to any one of claims 1 to 5, wherein the bonding layer (21) is a layer of silicon nitride or gallium nitride.

7. The method according to any one of the preceding claims, wherein removing at least a portion of the bonding layer (21) comprises chemical etching, laser delamination, and / or application of mechanical stress.

8. The method of any one of claims 1 to 7, wherein the layer (30) of semi-insulating SiC is formed by doping with vanadium during the epitaxial growth of the SiC.

9. The method of any one of claims 1 to 7, wherein the layer (30) of semi-insulating SiC is formed by co-depositing silicon, carbon and vanadium.

10. The method according to any one of claims 1 to 9, wherein the second receiver substrate (40) is a silicon substrate having an electrical resistivity of 100 Ωcm or more.

11. The method according to claim 10, wherein said epitaxial layer (30) of semi-insulating SiC has a thickness comprised between 1 and 5 μm.

12. The method according to any one of claims 1 to 9, wherein the second receiver substrate (40) is a polycrystalline SiC substrate or a polycrystalline AlN substrate having an electrical resistivity of 100 Ωcm or more.

13. 13. The method of claim 12, wherein the epitaxial layer (30) of semi-insulating SiC has a thickness of 80 μm or less.

14. The method according to any one of claims 1 to 13, further comprising recycling the segment (10') of the donor substrate separated from the transferred layer (11) for the purpose of forming a new donor substrate.

15. the ion species are implanted through the silicon surface (10-Si) of the donor substrate (10); After the transferred thin layer of single-crystal SiC (11) is removed, the silicon surface (10-Si) of the donor substrate (10) is bonded to the first receiver substrate (20) so that the silicon surface of the layer of semi-insulating SiC (30) is exposed. The method according to any one of claims 1 to 14.

16. Providing a substrate manufactured using the method of any one of claims 1 to 15; epitaxially growing a layer of gallium nitride (50) on the layer of semi-insulating SiC (30) of the substrate; a method for epitaxy producing said layer of gallium nitride, comprising:

17. The method according to claim 16, wherein said layer (50) of gallium nitride has a thickness comprised between 1 and 2 μm.

18. 1. A method for fabricating a high electron mobility transistor (HEMT), comprising: - producing the layer (50) of gallium nitride by epitaxy using the method according to claim 16 or 17; forming a heterojunction on said layer (50) by epitaxy of a layer (60) of III-N material different from the material of said layer (50); forming a channel of the transistor at the same level as the heterojunction; forming a source, a drain and a gate of the transistor on the channel; A method comprising:

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