Imaging devices and electronic devices

Abstract

Provided is an imaging device comprising a semiconductor substrate and a plurality of imaging elements (100) that are arrayed in a matrix on the semiconductor substrate along a first direction and a second direction, and that perform photoelectric conversion with respect to incident light. Each of the plurality of imaging elements includes: a plurality of pixels provided adjacent to each other in a predetermined unit region of the semiconductor substrate, and including a first conductivity type of impurity; an isolating portion (304) isolating the plurality of pixels; two first element isolating walls (310) provided through at least a part of the semiconductor substrate along two first side surfaces of the predetermined unit region extending in the second direction; and a first diffusion region (306) provided in the semiconductor substrate around the first element isolating walls and the isolating portion and including a second conductivity type of impurity.

Description

[Technical Field]

[0001] The present disclosure relates to an imaging device and an electronic device. [Background technology]

[0002] In recent years, imaging devices have adopted a method of detecting a phase difference using a pair of phase difference detection pixels as an autofocus function. An example of such a method is the imaging element disclosed in Patent Document 1 below. In the technology disclosed in Patent Document 1, both effective pixels that capture an image of a subject and phase difference detection pixels that detect the above-mentioned phase difference are separately provided on the light receiving surface. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2000-292685 Summary of the Invention [Problem to be solved by the invention]

[0004] However, in the technology disclosed in Patent Document 1, when acquiring a captured image of a subject, it is difficult to use information obtained from the phase difference detection pixels as information similar to information from the imaging pixels. Therefore, in the technology, information from effective pixels surrounding the phase difference detection pixels is used to interpolate images of pixels corresponding to the phase difference detection pixels to generate a captured image. That is, in the technology disclosed in Patent Document 1, because phase difference detection pixels are provided to detect the phase difference, it is difficult to avoid degradation of the captured image due to loss of information of the captured image corresponding to the phase difference detection pixels.

[0005] Therefore, the present disclosure proposes an imaging device and electronic device that can improve the accuracy of phase difference detection while avoiding degradation of captured images. [Means for solving the problem]

[0006] According to the present disclosure, there is provided an imaging device comprising: a semiconductor substrate; and a plurality of imaging elements arranged in a matrix on the semiconductor substrate along a first direction and a second direction, the imaging elements performing photoelectric conversion on incident light, each of the plurality of imaging elements being arranged adjacent to one another in a predetermined unit region of the semiconductor substrate, the imaging elements comprising: a plurality of pixels having a photoelectric conversion unit containing impurities of a first conductivity type; an isolation section isolating the plurality of pixels; two first element isolation walls provided along two first side surfaces of the predetermined unit region extending in the second direction so as to penetrate at least a portion of the semiconductor substrate; an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels; and a first diffusion region provided in the semiconductor substrate around the first element isolation wall and the isolation section, the first diffusion region containing impurities of a second conductivity type having a conductivity type opposite to the first conductivity type.

[0007] According to the present disclosure, there is also provided an electronic device comprising: an imaging device including a semiconductor substrate; and a plurality of imaging elements arranged in a matrix on the semiconductor substrate along a first direction and a second direction, the imaging elements performing photoelectric conversion on incident light, wherein each of the plurality of imaging elements is provided adjacent to one another in a predetermined unit region of the semiconductor substrate, and includes a plurality of pixels having a photoelectric conversion unit containing impurities of a first conductivity type, an isolation section that isolates the plurality of pixels, two first element isolation walls provided along two first side surfaces of the predetermined unit region extending in the second direction so as to penetrate at least a portion of the semiconductor substrate, an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels, and a first diffusion region provided in the semiconductor substrate around the first element isolation wall and the isolation section, the first diffusion region containing impurities of a second conductivity type having a conductivity type opposite to the first conductivity type. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is an explanatory diagram showing an example of the planar configuration of an imaging device 1 according to an embodiment of the present disclosure. [Figure 2] 1 is an explanatory diagram (part 1) showing a part of a cross section of an image pickup element 100 according to a comparative example. [Figure 3] FIG. 10 is a second explanatory diagram showing a part of a cross section of the image sensor 100 according to the comparative example. [Figure 4] FIG. 2 is an explanatory diagram showing a plane of an image pickup element 100 according to a comparative example. [Figure 5] FIG. 2 is a perspective view of an image pickup element 100 according to a comparative example. [Figure 6] 1 is a plan view of an imaging element 100 according to a first embodiment of the present disclosure. [Figure 7A] 1 is a plan view (part 1) for explaining a part of the manufacturing process of a manufacturing method 1 for an image sensor 100 according to a first embodiment of the present disclosure. [Figure 7B] FIG. 2 is a plan view (part 2) for explaining a part of the manufacturing process of the manufacturing method 1 of the image sensor 100 according to the first embodiment of the present disclosure. [Figure 7C] FIG. 10 is a plan view (part 3) for explaining a part of the manufacturing process of the manufacturing method 1 of the image sensor 100 according to the first embodiment of the present disclosure. [Figure 8A] 1 is a plan view (part 1) for explaining a part of the manufacturing process of a manufacturing method 2 for the image sensor 100 according to the first embodiment of the present disclosure. [Figure 8B] FIG. 10 is a plan view (part 2) for explaining a part of the manufacturing process of the manufacturing method 2 of the image sensor 100 according to the first embodiment of the present disclosure. [Figure 8C] FIG. 10 is a plan view (part 3) for explaining a part of the manufacturing process of the manufacturing method 2 of the image sensor 100 according to the first embodiment of the present disclosure. [Figure 8D] FIG. 10 is a plan view (part 4) for explaining a part of the manufacturing process of the manufacturing method 2 of the image sensor 100 according to the first embodiment of the present disclosure. [Figure 8E] FIG. 5 is a plan view (part 5) for explaining a part of the manufacturing process of the manufacturing method 2 of the image sensor 100 according to the first embodiment of the present disclosure. [Figure 9] 1 is a plan view (part 1) of an image sensor 100 according to Modification 1 of the first embodiment of the present disclosure. [Figure 10] 1 is a plan view (part 2) of the image sensor 100 according to Modification 1 of the first embodiment of the present disclosure. FIG. [Figure 11] 10 is a plan view (part 3) of the image sensor 100 according to Modification 1 of the first embodiment of the present disclosure. FIG. [Figure 12] FIG. 10 is a plan view of an image sensor 100 according to a second modification of the first embodiment of the present disclosure. [Figure 13] FIG. 10 is a plan view of a portion of the imaging device 1 according to a third modification of the first embodiment of the present disclosure. [Figure 14] 10 is a plan view (part 1) of a portion of the imaging device 1 according to Modification 4 of the first embodiment of the present disclosure. FIG. [Figure 15] 10 is a plan view (part 2) of a portion of the imaging device 1 according to Modification 4 of the first embodiment of the present disclosure. FIG. [Figure 16] FIG. 10 is a plan view of an imaging element 100 according to a second embodiment of the present disclosure. [Figure 17] FIG. 10 is a cross-sectional view of an imaging element 100 according to a second embodiment of the present disclosure. [Figure 18] 10A to 10C are cross-sectional views for explaining a part of the manufacturing process of a manufacturing method 1 of an image sensor 100 according to a second embodiment of the present disclosure. [Figure 19] 10A to 10C are cross-sectional views illustrating a part of the manufacturing process of a manufacturing method 2 for the image sensor 100 according to the second embodiment of the present disclosure. [Figure 20] 10A to 10C are cross-sectional views illustrating a part of the manufacturing process of a manufacturing method 3 of the image sensor 100 according to the second embodiment of the present disclosure. [Figure 21] 10A and 10B are a plan view and a cross-sectional view of an image sensor 100 according to a modified example of the second embodiment of the present disclosure. [Figure 22A] FIG. 2 is a plan view of a portion of an imaging device 1 according to a comparative example. [Figure 22B] FIG. 2 is a cross-sectional view of a portion of an imaging device 1 according to a comparative example. [Figure 23A] 10 is a plan view (part 1) of a portion of an imaging device 1 according to a third embodiment of the present disclosure. FIG. [Figure 23B] FIG. 10 is a cross-sectional view of a portion of an imaging device 1 according to a third embodiment of the present disclosure. [Figure 24] FIG. 10 is a plan view (part 2) of a portion of the imaging device 1 according to the third embodiment of the present disclosure. [Figure 25A] FIG. 11 is a plan view of a portion of the imaging device 1 according to a modified example of the third embodiment of the present disclosure. [Figure 25B] FIG. 11 is a cross-sectional view of a portion of the imaging device 1 according to a modified example of the third embodiment of the present disclosure. [Figure 26] FIG. 10 is an explanatory diagram (part 1) showing a plane of an image sensor 100 according to a fourth embodiment of the present disclosure. [Figure 27] FIG. 11 is an explanatory diagram showing a plane of an image sensor 100 according to a comparative example of the fourth embodiment of the present disclosure. [Figure 28] FIG. 10 is a second explanatory diagram showing a plan view of the image sensor 100 according to the fourth embodiment of the present disclosure. [Figure 29] FIG. 10 is a third explanatory diagram showing a plane of the image sensor 100 according to the fourth embodiment of the present disclosure. [Figure 30] FIG. 10 is a fourth explanatory diagram showing a plane of the image sensor 100 according to the fourth embodiment of the present disclosure. [Figure 31] FIG. 13 is a fifth explanatory diagram showing a plane of the image sensor 100 according to the fourth embodiment of the present disclosure. [Figure 32] FIG. 10 is a sixth explanatory diagram showing a plane of the image sensor 100 according to the fourth embodiment of the present disclosure. [Figure 33] FIG. 13 is an explanatory diagram (part 7) showing a plane of the image sensor 100 according to the fourth embodiment of the present disclosure. [Figure 34] FIG. 13 is an explanatory diagram (part 8) showing a plane of the image sensor 100 according to the fourth embodiment of the present disclosure. [Figure 35] FIG. 10 is an explanatory diagram (part 1) showing a plane view of an image sensor 100 according to another embodiment of the present disclosure. [Figure 36] 10A to 10C are explanatory diagrams (part 1) illustrating a portion of a cross section of an imaging element 100 for each structure according to another embodiment of the present disclosure. [Figure 37] 10 is an explanatory diagram (part 2) showing a plane of an image sensor 100 according to another embodiment of the present disclosure. FIG. [Figure 38]10A and 10B are explanatory diagrams showing a part of a cross section of the image sensor 100 for each structure according to another embodiment of the present disclosure (part 2). [Figure 39] 10 is an explanatory diagram (part 3) showing a plane of an image sensor 100 according to another embodiment of the present disclosure. FIG. [Figure 40] 10 is an explanatory diagram (part 4) showing a plane of an image pickup element 100 according to another embodiment of the present disclosure. FIG. [Figure 41] 1 is an explanatory diagram showing a cross section of a two-layer laminated structure to which an imaging device 1 according to an embodiment of the present disclosure can be applied. [Figure 42] 1 is an explanatory diagram showing a cross section of a three-layer laminated structure to which an imaging device 1 according to an embodiment of the present disclosure can be applied. [Figure 43] 1 is an explanatory diagram showing a cross section of a two-stage pixel structure to which an imaging device 1 according to an embodiment of the present disclosure can be applied. [Figure 44] 1 is an explanatory diagram showing a plane of an image sensor 100 according to an embodiment of the present disclosure. [Figure 45] 1 is an explanatory diagram showing a plane of a plurality of image sensors 100 according to an embodiment of the present disclosure. [Figure 46] FIG. 2 is an explanatory diagram showing an example of a schematic functional configuration of a camera. [Figure 47] FIG. 1 is a block diagram illustrating an example of a schematic functional configuration of a smartphone. [Figure 48] FIG. 1 is a diagram illustrating an example of a schematic configuration of an endoscopic surgery system. [Figure 49] FIG. 2 is a block diagram showing an example of the functional configuration of a camera head and a CCU. [Figure 50] 1 is a block diagram showing an example of a schematic configuration of a vehicle control system; [Figure 51] FIG. 2 is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit. DETAILED DESCRIPTION OF THE INVENTION

[0009] Preferred embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. In this specification and drawings, components having substantially the same functional configurations are designated by the same reference numerals, and redundant description will be omitted.

[0010] The drawings referred to in the following description are for explaining and facilitating understanding of an embodiment of the present disclosure, and for the sake of clarity, the shapes, dimensions, ratios, etc. shown in the drawings may differ from the actual ones. Furthermore, the design of the imaging device shown in the drawings can be modified as appropriate, taking into consideration the following description and known technologies.

[0011] The shapes and dimensions expressed in the following description not only refer to mathematically or geometrically defined shapes and dimensions, but also include similar shapes and dimensions that include allowable differences (errors and distortions) in the operation and manufacturing process of the imaging device. Furthermore, the term "same" used in the following description for specific shapes and dimensions does not only mean that they are mathematically or geometrically identical, but also includes cases where they have allowable differences (errors and distortions) in the operation and manufacturing process of the imaging device.

[0012] Furthermore, in the following description, "electrically connected" means connecting a plurality of elements directly or indirectly via another element.

[0013] In the following description, "sharing" means that different elements (such as pixels) share one other element (such as an on-chip lens).

[0014] The explanation will be given in the following order. 1. Overview of the imaging device 2. Comparative Example 2.1 Background 2.2 Cross-sectional configuration 2.3 Planar configuration 3. First Embodiment 3.1 Background 3.2 Implementation 3.3 Manufacturing method 3.4 Variations 4. Second Embodiment 4.1 Background 4.2 Implementation 4.3 Manufacturing method 4.4 Variations 5. Third Embodiment 5.1 Background 5.2 Implementation 5.3 Variations 6. Fourth Embodiment 7. Summary 7.1 Summary 7.2 Other Forms 8. Camera Application Examples 9. Smartphone Application Examples 10. Application to endoscopic surgery systems 11. Mobile Applications 12. Supplementary Information

[0015] <<1. General configuration of the imaging device>> First, a schematic configuration of an imaging device 1 according to an embodiment of the present disclosure will be described with reference to FIG. 1. FIG. 1 is an explanatory diagram showing an example of the planar configuration of the imaging device 1 according to an embodiment of the present disclosure. As shown in FIG. 1, the imaging device 1 according to an embodiment of the present disclosure includes a pixel array section 20 in which a plurality of imaging elements 100 are arranged in a matrix on a semiconductor substrate 10 made of, for example, silicon, and a peripheral circuit section provided to surround the pixel array section 20. Furthermore, the imaging device 1 includes, as the peripheral circuit section, a vertical drive circuit section 21, a column signal processing circuit section 22, a horizontal drive circuit section 23, an output circuit section 24, a control circuit section 25, and the like. Each block of the imaging device 1 will be described in detail below.

[0016] (Pixel array section 20) The pixel array unit 20 has a plurality of image sensors 100 arranged two-dimensionally in a matrix along the row direction (first direction) and column direction (second direction) on the semiconductor substrate 10. Each image sensor 100 is an element that performs photoelectric conversion on incident light, and has a photoelectric conversion unit (not shown) and a plurality of pixel transistors (e.g., MOS (Metal-Oxide-Semiconductor) transistors) (not shown). The pixel transistors include, for example, four MOS transistors: a transfer transistor, a selection transistor, a reset transistor, and an amplification transistor. Furthermore, in the pixel array unit 20, the plurality of image sensors 100 are arranged two-dimensionally, for example, according to a Bayer array. Here, the Bayer array is an arrangement pattern in which image pickup elements 100 that absorb light having a green wavelength (for example, wavelengths of 495 nm to 570 nm) and generate electric charges are arranged in a checkerboard pattern, and in the remaining portion, image pickup elements 100 that absorb light having a red wavelength (for example, wavelengths of 620 nm to 750 nm) and image pickup elements 100 that absorb light having a blue wavelength (for example, wavelengths of 450 nm to 495 nm) and generate electric charges are arranged alternately in each row. The detailed structure of the image pickup element 100 will be described later.

[0017] (vertical drive circuit section 21) The vertical drive circuit unit 21 is formed of, for example, a shift register, selects pixel drive wirings 26, supplies pulses for driving the image sensor 100 to the selected pixel drive wirings 26, and drives the image sensor 100 row by row. That is, the vertical drive circuit unit 21 selects and scans each image sensor 100 in the pixel array unit 20 row by row in the vertical direction (up and down in FIG. 1), and supplies pixel signals based on signal charges generated in accordance with the amount of light received by a photoelectric conversion unit (not shown) of each image sensor 100 to a column signal processing circuit unit 22 (described later) via vertical signal lines 27.

[0018] (Column signal processing circuit unit 22) The column signal processing circuit unit 22 is arranged for each column of the image sensor 100, and performs signal processing such as noise removal for each pixel column on pixel signals output from one row of the image sensor 100. For example, the column signal processing circuit unit 22 performs signal processing such as CDS (Correlated Double Sampling) and AD (Analog-Digital) conversion in order to remove fixed pattern noise specific to each pixel.

[0019] (horizontal drive circuit section 23) The horizontal drive circuit unit 23 is formed, for example, by a shift register, and by sequentially outputting horizontal scanning pulses, selects each of the above-mentioned column signal processing circuit units 22 in turn and causes each column signal processing circuit unit 22 to output a pixel signal to the horizontal signal line 28.

[0020] (output circuit section 24) The output circuit unit 24 processes and outputs pixel signals sequentially supplied from each of the column signal processing circuits 22 via the horizontal signal line 28. The output circuit unit 24 may function as a functional unit that performs buffering, or may perform processes such as black level adjustment, column variation correction, and various digital signal processing. Buffering refers to temporarily storing pixel signals to compensate for differences in processing speed and transfer speed when exchanging pixel signals. Furthermore, the input / output terminal 29 is a terminal for exchanging signals with an external device.

[0021] (Control circuit section 25) The control circuit unit 25 receives an input clock and data instructing the operation mode and the like, and outputs data such as internal information of the imaging device 1. That is, based on a vertical synchronization signal, a horizontal synchronization signal, and a master clock, the control circuit unit 25 generates clock signals and control signals that serve as references for the operations of the vertical drive circuit unit 21, the column signal processing circuit unit 22, the horizontal drive circuit unit 23, etc. Then, the control circuit unit 25 outputs the generated clock signals and control signals to the vertical drive circuit unit 21, the column signal processing circuit unit 22, the horizontal drive circuit unit 23, etc.

[0022] <<2. Comparative Example>> <2.1 Background> Next, before describing the details of the embodiment of the present disclosure, a comparative example that the inventors considered before creating the embodiment of the present disclosure will be described. First, menopause, for which the comparative example was created, will be described.

[0023] The comparative example compared to the embodiment of the present disclosure was created through extensive research into providing phase difference detection pixels across the entire surface of the pixel array unit 20 of the imaging device 1 (all-pixel phase difference detection) to further improve the autofocus function while avoiding degradation of the captured image, i.e., to improve the accuracy of phase difference detection. In the comparative example, an imaging element 100 that functions as a single imaging element during imaging and as a pair of phase difference detection pixels during phase difference detection is provided across the entire surface of the pixel array unit 20 (dual photodiode structure). According to this comparative example that enables all-pixel phase difference detection, the accuracy of phase difference detection can be improved because phase difference detection pixels are provided across the entire surface, and further, imaging can be performed using all imaging elements, thereby avoiding degradation of the captured image.

[0024] Furthermore, in the comparative example, in order to improve the accuracy of phase difference detection, an element is provided that physically and electrically separates the phase difference detection pixels to prevent the outputs of a pair of phase difference detection pixels from mixing during phase difference detection. Additionally, in the comparative example, an overflow path is provided between the pair of phase difference detection pixels to prevent degradation of the captured image. Specifically, when the charge of one of the phase difference detection pixels approaches saturation during normal imaging, the charge is transferred to the other pixel via the overflow path, thereby preventing saturation of the one pixel. Furthermore, by providing such an overflow path, the linearity of the pixel signal output from the imaging element can be ensured, preventing degradation of the captured image.

[0025] The following describes these comparative examples in detail.

[0026] <2.2 Cross-sectional configuration> First, the cross-sectional configuration of the image sensor 100 according to the comparative example will be described with reference to Fig. 2 and Fig. 3. Fig. 2 and Fig. 3 are explanatory diagrams showing a part of the cross section of the image sensor 100 according to the comparative example, and more specifically, correspond to cross sections of the image sensor 100 cut at different positions along the thickness direction of the semiconductor substrate 10.

[0027] 2 and 3, the image sensor 100 according to the comparative example includes an on-chip lens 200, a color filter 202, a light-shielding portion 204, a semiconductor substrate 10, and transfer gates 400a and 400b. In this embodiment, the semiconductor substrate 10 includes a pair of pixels 300a and 300b, each of which has a photoelectric conversion portion 302. The semiconductor substrate 10 also includes a protrusion (pixel isolation region) 304 (an example of an isolation portion) that isolates the pair of pixels 300a and 300b, an element isolation wall 310 that surrounds the pixels 300a and 300b, and a diffusion region (first diffusion region) 306 provided around the protrusion 304 and the element isolation wall 310.

[0028] The layered structure of the image sensor 100 according to the comparative example will be described below, starting from the top (the light receiving surface 10a side) to the bottom in Figures 2 and 3. Note that Figure 2 corresponds to a cross section of the image sensor 100 cut at a position that cuts the above-mentioned protrusions 304, and Figure 3 corresponds to a cross section of the image sensor 100 cut at a position that cuts the region between the opposing protrusions 304 (slits 312, see Figure 4).

[0029] 2 and 3, the image sensor 100 has one on-chip lens 200 that is provided above the light-receiving surface 10a of the semiconductor substrate 10 and focuses incident light onto a photoelectric conversion unit 302. The image sensor 100 has a structure in which one on-chip lens 200 is provided with a pair of pixels 300a, 300b. In other words, the on-chip lens 200 is shared by the two pixels 300a, 300b. The on-chip lens 200 can be formed from, for example, a silicon nitride film (SiN) or a resin material such as a styrene-based resin, an acrylic-based resin, a styrene-acrylic copolymer resin, or a siloxane-based resin.

[0030] The incident light collected by the on-chip lens 200 is irradiated onto each of the photoelectric conversion units 302 of the pair of pixels 300a and 300b via a color filter 202 provided below the on-chip lens 200. The color filter 202 is any one of a color filter that transmits a red wavelength component, a color filter that transmits a green wavelength component, and a color filter that transmits a blue wavelength component. For example, the color filter 202 can be formed from a material in which a pigment or a dye is dispersed in a transparent binder such as silicone.

[0031] Furthermore, a light-shielding portion 204 is provided on the light-receiving surface 10a of the semiconductor substrate 10 so as to surround the color filter 202. By providing the light-shielding portion 204 between adjacent image sensors 100, it is possible to suppress crosstalk between the adjacent image sensors 100 and to provide light shielding between the image sensors 100 in order to further improve the accuracy of phase difference detection. The light-shielding portion 204 can be formed from a metal material containing, for example, tungsten (W), aluminum (Al), copper (Cu), titanium (Ti), molybdenum (Mo), nickel (Ni), or the like.

[0032] Furthermore, for example, a photoelectric conversion unit (photodiode) 302 having a first conductivity type (e.g., n-type) impurity is provided for each of the adjacent pixels 300a and 300b in a predetermined unit region in the semiconductor substrate 10 of a second conductivity type (e.g., p-type). As described above, the photoelectric conversion unit 302 absorbs light having a red wavelength component, a green wavelength component, or a blue wavelength component that is incident through the color filter 202, and generates electric charges. In this embodiment, the photoelectric conversion unit 302 of the pixel 300a and the photoelectric conversion unit 302 of the pixel 300b can function as a pair of phase difference detection pixels during phase difference detection. That is, in this embodiment, the phase difference can be detected by detecting the difference between pixel signals based on the electric charges generated by the photoelectric conversion unit 302 of the pixel 300a and the photoelectric conversion unit 302 of the pixel 300b.

[0033] Specifically, the amount of charge generated by the photoelectric conversion unit 302, i.e., its sensitivity, varies depending on the angle of incidence of light relative to its optical axis (the axis perpendicular to the light-receiving surface). For example, the photoelectric conversion unit 302 has the highest sensitivity when the angle of incidence is 0 degrees. Furthermore, the sensitivity of the photoelectric conversion unit 302 is symmetrical with respect to the angle of incidence, with the angle of incidence being 0 degrees. Therefore, light is incident from the same point at different angles of incidence on the photoelectric conversion unit 302 of pixel 300a and the photoelectric conversion unit 302 of pixel 300b, and each generates an amount of charge according to the angle of incidence, resulting in a shift (phase difference) in the detected images. In other words, the phase difference can be detected by detecting the difference in pixel signals based on the amount of charge generated by the photoelectric conversion unit 302 of pixel 300a and the photoelectric conversion unit 302 of pixel 300b. Therefore, such a difference (phase difference) between the pixel signals is detected as a differential signal, for example, in a detection unit (not shown) of the output circuit unit 24, and the defocus amount is calculated based on the detected phase difference, and the imaging lens (not shown) is adjusted (moved), thereby achieving autofocus. Note that in the above description, the phase difference is detected as the difference between the pixel signals of the photoelectric conversion unit 302 of pixel 300a and the photoelectric conversion unit 302 of pixel 300b, but this is not limited to this in the present embodiment, and the phase difference may be detected as the ratio between the pixel signals of the photoelectric conversion unit 302 of pixel 300a and the photoelectric conversion unit 302 of pixel 300b, for example.

[0034] Furthermore, in the comparative example, the two photoelectric conversion units 302 are physically separated by a protrusion 304 (pixel separating region) (an example of a separating unit). The protrusion 304 is formed as a through-hole DTI (Deep Trench Isolation) by a groove (trench) (not shown) that penetrates the semiconductor substrate 10 from the surface 10b side facing the light-receiving surface 10a along the thickness direction of the semiconductor substrate 10, and a material filled in the trench, such as an oxide film or a metal film, such as silicon dioxide (SiO), silicon nitride, amorphous silicon, polycrystalline silicon, titanium dioxide (TiO), aluminum, or tungsten. In the image sensor 100, if pixel signals output from a pair of pixels 300a and 300b mix with each other during phase difference detection, causing color mixing, the accuracy of phase difference detection will deteriorate. In this embodiment, the protrusion 304 penetrates the semiconductor substrate 10, and therefore can effectively physically separate the pair of pixels 300a, 300b, thereby suppressing color mixing and further improving the accuracy of phase difference detection.

[0035] Furthermore, when the image sensor 100 is viewed from the light receiving surface 10a or the front surface 10b side, a slit 312 (see FIG. 4 ) corresponding to the space between the two protrusions 304 is provided near the center of the image sensor 100. Furthermore, in a region of the semiconductor substrate 10 where the slit 312 is located (one example of a region located around the protrusion 304 and extending in the thickness direction of the semiconductor substrate 10), impurities of a second conductivity type (e.g., p-type) are diffused by conformal doping through the trenches of the protrusions 304 to form a diffusion region 306 (more specifically, as described below, the diffusion region 306 is also formed around the element isolation wall 310). Providing the diffusion region 306 electrically isolates the pair of pixels 300a and 300b, preventing color mixing and further improving the accuracy of phase difference detection.

[0036] Furthermore, in the comparative example, since the protrusion 304 penetrates the semiconductor substrate 10, the diffusion region 306 can be formed deep within the semiconductor substrate 10 (here, "depth" refers to the distance from the light-receiving surface 10a of the semiconductor substrate 10 along the thickness direction of the semiconductor substrate 10) by conformal doping via the protrusion 304. Therefore, in the comparative example, the desired diffusion region 306 can be formed with high precision, and the pair of pixels 300a, 300b can be effectively electrically isolated, thereby suppressing color mixing and further improving the precision of phase difference detection. Details of the region of the slit 312 will be described later.

[0037] Furthermore, in the comparative example, as shown in FIG. 3 , a diffusion region 320 is formed below the diffusion region 306 (on the surface 10b side) provided in the slit 312 by introducing impurities of a first conductivity type (e.g., n-type) by ion implantation. Specifically, the diffusion region 320 is formed below the diffusion region 306 by ion implanting impurities of the first conductivity type into a lower region within the diffusion region 306. The diffusion region 320 can function as an overflow path (sometimes referred to as a “path” in this specification) that can transfer generated charges between the pixels 300a and 300b. Specifically, when the charge of one of the pixels 300a and 300b approaches saturation during normal imaging, the charge is transferred to the other pixel via the overflow path, thereby preventing saturation of the other pixel. Furthermore, providing such an overflow path ensures the linearity of the pixel signal output from the image sensor 100 and prevents degradation of the captured image. Furthermore, in a comparative example, instead of forming the diffusion region 320 by ion implantation, a gate (not shown) may be provided between the transfer gates 400a, 400b, etc. on the surface 10b of the semiconductor substrate 10. In this case, by adjusting the voltage applied to the gate, the pair of pixels 300a, 300b may be electrically isolated during phase difference detection, and a channel serving as an overflow path may be formed in the region of the slit 312 on the surface 10b side during normal imaging.

[0038] In the comparative example, an element isolation wall 310 is provided in the semiconductor substrate 10, surrounding the pixels 300a and 300b and physically separating adjacent image sensors 100. The element isolation wall 310 is formed by a groove (trench) (not shown) that penetrates the semiconductor substrate 10 in the thickness direction of the semiconductor substrate 10, and a material filled in the trench, such as an oxide film or a metal film, such as a silicon oxide film, a silicon nitride film, amorphous silicon, polycrystalline silicon, titanium oxide film, aluminum, or tungsten. In other words, the protrusion 304 and the element isolation wall 310 may be formed from the same material. In the comparative example, the element isolation wall 310 and the protrusion 304 have similar configurations, and therefore can be formed as an integrated structure. As a result, according to the comparative example, the protrusion 304 can be formed simultaneously with the element isolation wall 310, thereby minimizing the increase in process steps for the image sensor 100.

[0039] Furthermore, in the comparative example, a diffusion region 306 can be formed deep within the semiconductor substrate 10 around the element isolation wall 310 (here, depth refers to the distance from the light-receiving surface 10a of the semiconductor substrate 10 along the thickness direction of the semiconductor substrate 10) by conformal doping of impurities of a second conductivity type (e.g., p-type) through the element isolation wall 310.

[0040] Furthermore, in the comparative example, the charges generated in the photoelectric conversion units 302 of the pixels 300a and 300b are transferred via transfer gates 400a and 400b of transfer transistors (one type of pixel transistor) provided on the surface 10b of the semiconductor substrate 10 opposite the light-receiving surface 10a. The transfer gates 400a and 400b can be formed, for example, from a metal film. The charges may then be accumulated, for example, in a floating diffusion (charge accumulation unit) (not shown) provided in a semiconductor region having a first conductivity type (e.g., n-type) provided in the semiconductor substrate 10. Note that, in the comparative example, the floating diffusion is not limited to being provided in the semiconductor substrate 10 and may be provided, for example, in another substrate (not shown) stacked on the semiconductor substrate 10.

[0041] Furthermore, a plurality of various pixel transistors (not shown) other than the transfer transistors described above, which are used for reading out charges as pixel signals, etc., may be provided on the surface 10b of the semiconductor substrate 10. Furthermore, in the comparative example, the pixel transistors may be provided on the semiconductor substrate 10, or may be provided on another substrate (not shown) stacked on the semiconductor substrate 10.

[0042] <2.3 Planar configuration> Next, the planar configuration of the image sensor 100 according to the comparative example will be described with reference to Fig. 4. Fig. 4 is an explanatory diagram showing a plan view of the image sensor 100 according to the comparative example, and more specifically, corresponds to a cross section of the image sensor 100 taken along line AA' shown in Fig. 3.

[0043] As shown in FIG. 4 , in the comparative example, adjacent pixels 300a and 300b are separated by a protrusion 304 formed integrally with an element isolation wall 310. More specifically, when the image sensor 100 is viewed from above the light-receiving surface 10a or the front surface 10b, the element isolation wall 310 has two protrusions 304 that protrude along the column direction toward the center O of the image sensor 100 and face each other. Here, when the image sensor 100 is viewed from the light-receiving surface 10a or the front surface 10b side, a region between the two protrusions 304 located near the center of the image sensor 100 is referred to as a slit 312. As described above, in the region of the slit 312, impurities of a second conductivity type (e.g., p-type) are diffused through the trenches of the protrusions 304 by conformal doping, and a diffusion region 306 is formed surrounding the protrusions 304. As described above, the pair of pixels 300a, 300b are electrically isolated from each other by the diffusion region 306, thereby preventing color mixing. Furthermore, in the comparative example, the second conductivity type impurity is diffused through the trench of the element isolation wall 310 by conformal doping, and the diffusion region 306 is formed along the element isolation wall 310.

[0044] Furthermore, when the image sensor 100 is viewed from above the light receiving surface 10a or the surface 10b, the two protrusions 304 are provided at the center of the image sensor 100 in the row direction, and their protruding lengths (lengths in the column direction) are approximately the same. As described above, the two protrusions 304 are provided so as to penetrate the semiconductor substrate 10. Note that in the comparative example, the width of the protrusions 304 is not particularly limited as long as it can separate the pair of pixels 300a, 300b.

[0045] Furthermore, the protrusions 304 and element isolation walls 310 according to the comparative example described above have a configuration as shown in Fig. 5, which is a see-through perspective view of the image sensor 100 according to the comparative example. That is, the protrusions 304 and element isolation walls 310 according to the comparative example are provided so as to penetrate the semiconductor substrate 10. Furthermore, a slit 312 is provided between the two protrusions 304 near the center of the image sensor 100. Note that a diffusion region 306 is formed in at least a portion of the slit 312.

[0046] As described above, in the comparative example, the slit 312 is located near the center O of the image sensor 100, which reduces scattering of light by the protrusion 304. Therefore, according to the comparative example, light incident on the center O of the image sensor 100 can enter the photoelectric conversion unit 302 without being scattered. As a result, according to the comparative example, the image sensor 100 can more reliably capture light incident on the center O of the image sensor 100, thereby preventing degradation of the imaging pixels.

[0047] Furthermore, in the comparative example, as described above, for example, impurities of the first conductivity type are introduced by ion implantation into the region on the surface 10b side of the slit 312, thereby forming a channel that serves as an overflow path. Therefore, according to the comparative example, the pair of pixels 300a, 300b can be separated during phase difference detection while an overflow path can be formed during normal imaging, thereby improving the accuracy of phase difference detection and avoiding degradation of captured images.

[0048] Furthermore, in the comparative example, the diffusion region 306 can be formed by introducing impurities into the region of the slit 312 through the trench of the protrusion 304 by conformal doping, thereby avoiding the use of ion implantation. Therefore, according to the comparative example, the introduction of impurities into the photoelectric conversion unit 302 can be avoided by not using ion implantation, and shrinkage or damage to the photoelectric conversion unit 302 can be avoided. Furthermore, by using conformal doping, crystal defects can be repaired while applying high temperatures to uniformly diffuse the impurities. As a result, according to the comparative example, a decrease in sensitivity and a narrowing of the dynamic range of the image sensor 100 can be suppressed.

[0049] Conformal doping is a method of uniformly introducing impurities into the semiconductor substrate 10, and specifically, the uniformity of the impurities is achieved by using plasma doping, vapor phase decomposition (VPD), solid phase diffusion, thermal diffusion, etc. Compared to conformal doping, the ion implantation method used for introducing impurities produces an impurity distribution with a peak that depends on the implantation energy, making it difficult to introduce the impurities uniformly.

[0050] In the comparative example, the element isolation wall 310 may have two protrusions 304 that protrude in the row direction toward the center O of the image sensor 100 and face each other when the image sensor 100 is viewed from above the light receiving surface 10a or the surface 10b. Furthermore, in this case, the two protrusions 304 may be provided at the center of the image sensor 100 in the column direction when the image sensor 100 is viewed from above the light receiving surface 10a or the surface 10b.

[0051] As described above, according to the comparative example, during phase difference detection, the provision of the protrusion 304 that physically separates the pair of pixels 300a and 300b, the diffusion region 306 that electrically separates the pair of pixels 300a and 300b, and the diffusion region 320 that electrically separates the pair of pixels 300a and 300b, etc., improves the accuracy of phase difference detection while preventing degradation of the captured image. Specifically, in the comparative example, the protrusion 304 and the diffusion region 306 effectively separate the pair of pixels 300a and 300b, thereby suppressing color mixing and further improving the accuracy of phase difference detection. Furthermore, since the comparative example includes an overflow path, when the charge of one of the pixels 300a and 300b approaches saturation during normal imaging, the charge is transferred to the other pixel via the overflow path, thereby preventing saturation of the other pixel. Therefore, according to the comparative example, the provision of such an overflow path ensures the linearity of the pixel signal output from the image sensor 100 and prevents degradation of the captured image.

[0052] Furthermore, in the comparative example, the diffusion region 306 can be formed by diffusing impurities into the region of the slit 312 through the trench of the protrusion 304 by conformal doping, thereby avoiding the use of ion implantation. Therefore, according to the comparative example, since ion implantation is not used, the introduction of impurities into the photoelectric conversion unit 302 can be avoided, and shrinkage or damage to the photoelectric conversion unit 302 can be avoided. Furthermore, by using conformal doping, crystal defects can be repaired while applying high temperatures to uniformly diffuse the impurities. As a result, according to the comparative example, a decrease in sensitivity and a narrowing of the dynamic range of the image sensor 100 can be suppressed.

[0053] Furthermore, in the comparative example, since the protrusion 304 penetrates the semiconductor substrate 10, the diffusion region 306 can be formed in a deep region within the semiconductor substrate 10 by conformal doping via the protrusion 304. Therefore, in the comparative example, the desired diffusion region 306 can be formed with high precision, and the pair of pixels 300a, 300b can be effectively electrically isolated, thereby suppressing the occurrence of color mixing and further improving the accuracy of phase difference detection. Furthermore, according to the comparative example, since the element isolation wall 310 and the protrusion 304 have the same shape, the protrusion 304 can be formed simultaneously with the element isolation wall 310, and an increase in the number of process steps for the image sensor 100 can be suppressed.

[0054] Additionally, in the comparative example, slit 312 is provided at center O of image sensor 100, which suppresses scattering of light by protrusion 304, and light incident on center O of image sensor 100 can be incident on photoelectric conversion unit 302 without being scattered. As a result, according to the comparative example, image sensor 100 can more reliably capture light incident on center O of image sensor 100, thereby preventing degradation of imaging pixels.

[0055] Hereinafter, based on the above-mentioned comparative examples, details of the embodiments of the present disclosure created by the present inventors will be sequentially described.

[0056] <<3. First Embodiment>> <3.1 Background> Next, a first embodiment of the present disclosure created by the present inventors will be described. First, the background that led to the creation of the first embodiment of the present disclosure will be described.

[0057] In the image sensor 100 according to the comparative example, the element isolation wall 310 surrounding the image sensor 100 and the diffusion region 306 provided around the element isolation wall 310 and the protrusion 304 inevitably result in a small photoelectric conversion unit 302 (photodiode). In particular, as the image sensor 100 becomes more miniaturized, the photoelectric conversion unit 302 becomes smaller, limiting the amount of charge generated even when a large amount of light is incident on the image sensor 100. In other words, the comparative example limits the increase in the saturation signal level (Qs) of the image sensor 100. Additionally, in the comparative example, the element isolation wall 310 is provided along the row and column directions, limiting the range in which the transfer gates 400a and 400b, various pixel transistors (not shown), floating diffusion regions (charge accumulation regions) (not shown), and the like can be arranged. In other words, the comparative example has low flexibility in layout.

[0058] Therefore, the inventors have come up with the creation of the first embodiment of the present disclosure in order to further increase the saturation signal amount (Qs) and further improve the degree of freedom in layout in the image sensor 100 according to such a comparative example.

[0059] <3.2 Embodiment> First, the planar configuration of this embodiment will be described with reference to Fig. 6. Fig. 6 is a plan view of the image sensor 100 according to the first embodiment of the present disclosure, as seen from above the surface 10b of the semiconductor substrate 10. Note that, for ease of understanding, in Fig. 6, the transfer gates 400a, 400b, floating diffusion portion (FD portion) (charge storage portion) 601, and ground portion (well region) 602 provided on the surface 10b side are indicated by dashed lines. In the following description, elements common to the comparative example will be denoted by the same reference numerals in the figure, and their description will be omitted.

[0060] In the comparative example, the element isolation walls 310 are provided along the row direction (first direction) and the column direction (second direction), whereas in this embodiment, as shown in FIG. 6, the element isolation walls (first element isolation walls) 310b are provided only along the column direction (second direction) (the up-and-down direction in FIG. 6). In detail, the two element isolation walls 310b are provided along two side surfaces (first side surfaces) extending in the column direction of a predetermined unit region (the entire region shown in FIG. 6) of the semiconductor substrate 10 in which the imaging elements 100 are provided, so as to penetrate from the surface 10b through at least a part or all of the semiconductor substrate 10. Note that in this embodiment, since the multiple imaging elements 100 are arranged in a matrix, the element isolation walls 310b and the protrusions 304 adjacent to each other in the column direction are provided so as to be connected to each other.

[0061] Furthermore, in this embodiment, adjacent imaging elements 100 in the row direction (first direction) are physically and electrically separated by the element isolation walls 310b. However, unlike the comparative example, there is no element isolation wall 310 along the row direction, and therefore no element for separating adjacent imaging elements 100 in the column direction (second direction). This increases the possibility of color mixing between adjacent imaging elements 100 in the column direction. Therefore, in this embodiment, in order to electrically separate adjacent imaging elements 100 in the column direction, a diffusion region (second diffusion region) 306d is provided between adjacent imaging elements 100 in the column direction. In detail, as shown in FIG. 6 , in this embodiment, the diffusion region 306d can be formed by diffusing impurities of a second conductivity type (e.g., p-type) along and around two side surfaces (second side surfaces) extending in the row direction of a predetermined unit region (the entire region shown in FIG. 6 ) of the semiconductor substrate 10 in which the imaging elements 100 are provided. In addition, in this embodiment, at least a portion of the diffusion region 306d (diffusion region 306c in FIG. 6) contains a higher concentration of impurities of the second conductivity type than the diffusion region (first diffusion region) 306e around the element isolation wall 310 and the protrusion 304.

[0062] As described above, in this embodiment, the element isolation walls 310b are provided only along the column direction (second direction), and the diffusion regions (second diffusion regions) 306d are provided between the image sensors 100 adjacent in the column direction, thereby electrically isolating the image sensors 100 adjacent in the column direction. Therefore, in this embodiment, the element isolation walls 310 are not provided along the row direction, and therefore the photoelectric conversion units 302 (photodiodes) can be made larger than in the comparative example. As a result, according to this embodiment, the saturation signal amount (Qs) of the image sensor 100 can be further increased.

[0063] In addition, in this embodiment, since the element isolation wall 310 along the row direction is not provided, the area in which the transfer gates 400a, 400b, various pixel transistors (not shown), floating diffusion portion (charge accumulation portion) 601, ground portion 602, etc. can be arranged is widened. As a result, according to this embodiment, the degree of freedom in layout is improved.

[0064] Furthermore, in this embodiment, the element isolation walls 310b are provided only along the column direction (second direction) and are not provided along the row direction (first direction), so the element isolation walls 310 do not have a lattice pattern (in plan view). Therefore, according to this embodiment, the element isolation walls 310b can have a simple shape, so the element isolation walls 310b can be formed with greater precision and the rectangularity of the element isolation walls 310b can be improved.

[0065] In the above description, the element isolation walls 310b are provided only along the column direction (second direction), but in this embodiment, the element isolation walls 310 may be provided only along the row direction (first direction). In this case, in order to electrically isolate the image pickup elements 100 adjacent to each other in the row direction, a diffusion region (second diffusion region) 306d is provided between the image pickup elements 100 adjacent to each other in the row direction.

[0066] <3.3 Manufacturing method> (Manufacturing method 1) Next, a part of the manufacturing process (manufacturing method) of the image sensor 100 according to this embodiment will be described with reference to Fig. 7A to Fig. 7C. Fig. 7A to Fig. 7C are plan views for explaining a part of the manufacturing process of the manufacturing method 1 of the image sensor 100 according to the first embodiment of the present disclosure, and correspond in detail to the plan view shown in Fig. 6.

[0067] First, to form the element isolation wall 310b and the protrusion 304 in the semiconductor substrate 10, a trench is formed in a predetermined location in the semiconductor substrate 10, and a material (e.g., polysilicon) containing impurities of a second conductivity type (e.g., p-type) is formed in the trench. The material containing impurities in the trench is then removed by dry etching, leaving the material on the inner wall surface of the trench. Next, heat is applied to the semiconductor substrate 10, causing the impurities to diffuse from the material into the semiconductor substrate 10. That is, a diffusion region 306 is formed by conformal doping. Next, an insulating material is formed in the trench, thereby obtaining the configuration shown in FIG. 7A.

[0068] Furthermore, in this embodiment, a mask or the like is used to ion-implant (pattern-implant) impurities of a first conductivity type (e.g., n-type) into the region 500 shown in Fig. 7B. The amount of impurities implanted at this time is set to be less than the amount that electrically cancels out the impurities of a second conductivity type (e.g., p-type) already contained in the diffusion region 306.

[0069] In this way, as shown in FIG. 7C, a diffusion region 306d (including the diffusion region 306c) containing a high concentration of impurities of the second conductivity type (e.g., p-type) and a diffusion region 306e containing a low concentration of impurities of the second conductivity type can be separately created by electrically canceling out a portion of the diffusion region 306d by the subsequently implanted impurities of the first conductivity type (e.g., n-type).

[0070] (Manufacturing method 2) Next, the image sensor 100 according to this embodiment can also be formed by another method (anisotropic conformal doping). A portion of the manufacturing steps (manufacturing method) of manufacturing method 2 will be described with reference to FIGS. 8A to 8E. FIGS. 8A to 8E are plan views for explaining a portion of the manufacturing steps of manufacturing method 2 of the image sensor 100 according to the first embodiment of the present disclosure, and correspond in detail to the plan view shown in FIG. 6.

[0071] First, as shown in FIG. 8A, a trench is formed in a predetermined location of the semiconductor substrate 10, a material (e.g., polysilicon) containing impurities of a second conductivity type (e.g., p-type) is formed in a predetermined region within the trench, and an insulating material is formed in the remaining portion of the trench to form an element isolation wall 310b and a protrusion 304.

[0072] Next, a material (e.g., polysilicon) containing impurities of the second conductivity type (e.g., p-type) is etched using a mask or the like, leaving the material only in the desired locations. Furthermore, polysilicon containing no impurities is formed in the etched locations, resulting in the configuration shown in FIG. 8B.

[0073] 8C, by applying heat to the semiconductor substrate 10, impurities from the above material are diffused into the semiconductor substrate 10. That is, a diffusion region 306d is formed by conformal doping.

[0074] Next, a trench is formed along the element isolation wall 310b and the protrusion 304, and a material (e.g., polysilicon) containing impurities of a second conductivity type (e.g., p-type) is formed in the trench, thereby obtaining the configuration shown in FIG. 8D.

[0075] 8E, by applying heat to the semiconductor substrate 10, impurities from the above-mentioned material are diffused into the semiconductor substrate 10. That is, diffusion regions 306d and 306e are formed by conformal doping.

[0076] <3.4 Modifications> (Variation 1) In the above-described embodiment, the element isolation wall 310 is not provided along the row direction (second direction), but this embodiment is not limited to this and can be modified as appropriate. Therefore, a first modification of this embodiment will be described with reference to Figures 9 to 11. Figures 9 to 11 are plan views of the image sensor 100 according to the first modification of this embodiment, and correspond to the plan view of Figure 6.

[0077] 9 and 10, in this modification, an element isolation wall (second element isolation wall) 340 may be provided between the element isolation wall (first element isolation wall) 310b and the protrusion 304 (an example of an isolation portion) along two side surfaces (second side surfaces) extending in the row direction (first direction) of a predetermined unit region (the entire region shown in FIGS. 9 and 10) in which the imaging elements 100 are provided, the element isolation wall 340 penetrating at least a part or all of the semiconductor substrate 10 from the surface 10b. In this modification, by providing such element isolation wall 340, adjacent imaging elements 100 in the column direction (second direction) can be physically separated.

[0078] 9 and 10, the length of the element isolation wall 340 in the row direction, the distance L (FIG. 9) from the element isolation wall (first element isolation wall) 310b, and the distance L (FIG. 10) between the element isolation walls 340 are not limited. In this modification, the longer the length and the distance L, the larger the photoelectric conversion unit 302 (photodiode) can be compared to the comparative example, and the saturation signal amount (Qs) of the image sensor 100 can be further increased. In addition, the degree of freedom in layout is improved. In this modification, impurities can be diffused through the trenches of the element isolation wall 340 to form the diffusion region 306d (conformal doping).

[0079] Furthermore, in this modification, as shown in Fig. 10, the four corners of the element isolation wall (first element isolation wall) 310d of a predetermined unit area (the entire area shown in Fig. 10) of the image sensor 100 may be cut off to shorten the length in the column direction (second direction). By doing so, in this modification, the area of ​​the photoelectric conversion unit 302 (photodiode) can be made larger than in the comparative example, which makes it possible to further increase the saturation signal amount (Qs) of the image sensor 100. In addition, in this modification, the degree of freedom in layout is improved.

[0080] In this modification, the shape of the element isolation wall (second element isolation wall) 340 is not limited, and various shapes can be selected, such as a rectangle, a circle, an ellipse, a polygon, and a shape in which the vertices of two triangles are connected as shown in Fig. 11. Furthermore, in this modification, the number of element isolation walls 340 between the element isolation wall (first element isolation wall) 310b and the protrusion 304 (an example of an isolation portion) is not limited, and a plurality of element isolation walls 340 may be provided in a dot pattern.

[0081] (Variation 2) Furthermore, in this embodiment, the elements separating the two pixels 300a, 300b (photoelectric conversion units 302) are not limited to the pair of protrusions 304 (an example of a separation unit) and the diffusion region 306e surrounding the pair of protrusions 304. Therefore, with reference to FIG. 12, a modified example of a separation unit separating the two pixels 300a, 300b will be described. FIG. 12 is a plan view of an image sensor 100 according to a second modification of this embodiment, and corresponds to the plan view of FIG. 6. For ease of understanding, FIG. 6 illustrates the above-described diffusion regions 306d, 306e as a single diffusion region.

[0082] For example, the separation portion shown at the left end of Figure 12 may be a single pixel separation wall (first pixel separation wall) 334 that extends between the two pixels 300a, 300b along the column direction (second direction) and penetrates the semiconductor substrate 10 from the surface 10b so as to separate the two pixels 300a, 300b.

[0083] Furthermore, as shown in the second from the left in Fig. 12, when imaging element 100 is viewed from above surface 10b, pixel isolation wall (first pixel isolation wall) 334 may have its top and bottom portions cut away, making it shorter than pixel isolation wall 334 shown on the left side of Fig. 12. In this case, the length of pixel isolation wall 334 along the column direction (second direction) is shorter than element isolation wall (first element isolation wall) 310b within a predetermined unit area (the entire area of ​​imaging element 100 shown second from the left in Fig. 12).

[0084] Furthermore, as shown in the third from the left in Figure 12, the pixel separation wall (first pixel separation wall) 334b ​​does not have to be arranged so as to penetrate the semiconductor substrate 10 from the surface 10b, and may be arranged, for example, so as to penetrate from the surface 10b to partway through the semiconductor substrate 10 along the thickness direction of the semiconductor substrate 10.

[0085] In this modification, instead of physically separating the two pixels 300a and 300b, the two pixels 300a and 300b may be electrically separated by a diffusion region (fourth diffusion region) 306h extending between the two pixels 300a and 300b in the column direction (second direction), as shown on the right side of Fig. 12. In this case, the diffusion region 306h contains impurities of a second conductivity type (e.g., p-type).

[0086] (Variation 3) Furthermore, in this embodiment, since there is a high degree of freedom in layout, the arrangement of pixel transistors and the like is not limited. Therefore, the arrangement of pixel transistors will be described with reference to FIG. 13. FIG. 13 is a plan view of a portion of an imaging device 1 according to a third modification of this embodiment. In detail, FIG. 13 shows a configuration in which a plurality of imaging elements 100 are arranged in a matrix on a semiconductor substrate 10, and further shows the positions of various pixel transistors (AMP, SEL, RST, FDG), transfer gates (TG) 400a, 400b, floating diffusion section (FD section) (charge accumulation section) 601, and ground section (well region) 602 provided on the surface 10b.

[0087] 13, a transfer gate (TG) 400, a floating diffusion portion (FD portion) 601, and a ground portion (well region) 602 may be provided on the diffusion region 306d of the semiconductor substrate 10 or in place of a part of the diffusion region 306d. In this case, various pixel transistors are provided on another substrate (not shown) stacked on the surface 10b side of the semiconductor substrate 10, for example.

[0088] For example, in this modification, pixel transistors such as an amplifier transistor (AMP), a selection transistor (SEL), a reset transistor (RST), and an FD transfer transistor (FDG) may be provided on the semiconductor substrate 10 as shown on the right side of FIG.

[0089] (Variation 4) In the embodiment described above, the element isolation wall 310 along the row direction (second direction) is not provided, and therefore there is no element separating adjacent image sensors 100 in the column direction (second direction). This increases the likelihood of color mixing between adjacent image sensors 100 in the column direction. To prevent this color mixing, it is possible to modify the light-shielding portion 204 provided on the light-receiving surface 10a of the semiconductor substrate 10. Hereinafter, modifications of such light-shielding portion 204 will be described with reference to FIGS. 14 and 15. FIGS. 14 and 15 are plan views of a portion of an image sensor 1 according to a fourth modification of the embodiment. Specifically, the left side shows a plan view seen from the surface 10b of the semiconductor substrate, and the right side shows a plan view seen from the light-receiving surface 10a of the semiconductor substrate.

[0090] 14, in this comparative example, light-shielding portions 204 extending along the row direction (first direction) and light-shielding portions 204 extending along the column direction (second direction) are provided on the light-receiving surface 10a of the semiconductor substrate 10. In this modified example, by making the width a of the light-shielding portions 204 extending along the row direction larger than the width b of the light-shielding portions 204 extending along the column direction, it is possible to suppress color mixing between image sensors 100 adjacent to each other in the column direction.

[0091] 15, in this comparative example, light-shielding portions 204a extending along the row direction (first direction) and light-shielding portions 204b extending along the column direction (second direction) are provided on the light-receiving surface 10a of the semiconductor substrate 10. In this modification, the light-shielding portions 204a and 204b are formed of different materials. Specifically, the light-shielding portions 204a are formed of a material that can more effectively block light. For example, the light-shielding portions 204a can be formed of silicon (Si), titanium (Ti), tungsten (W), aluminum (Al), oxide films or nitride films of these materials, or stacked films of these materials. Furthermore, the light-shielding portions 204a may have a hollow structure (air gap) made of, for example, the above-mentioned materials.

[0092] <<4. Second Embodiment>> <4.1 Background> Next, a second embodiment of the present disclosure created by the present inventors will be described. First, the background that led to the creation of the second embodiment will be described.

[0093] In the image sensor 100 according to the comparative example, the size of the photoelectric conversion unit 302 (photodiode) inevitably becomes small due to the provision of the element isolation wall 310 surrounding the image sensor 100 and the diffusion region 306 provided around the element isolation wall 310 and the protrusion 304. In other words, in the comparative example, there is a limit to how much the saturation signal amount (Qs) of the image sensor 100 can be increased.

[0094] Therefore, the inventors have come up with the creation of a second embodiment of the present disclosure in order to further increase the saturation signal amount (Qs) of the image sensor 100 according to the comparative example, similar to the first embodiment described above.

[0095] <4.2 Embodiment> (Plane configuration) First, the planar configuration of the image sensor 100 of this embodiment will be described with reference to Fig. 16. Fig. 16 is a plan view of the image sensor 100 of this embodiment, seen from the front surface 10b side. In the following description, elements common to those in the comparative example will be denoted by the same reference numerals in the figure, and their description will be omitted.

[0096] 16, in this embodiment, an isolation wall (third isolation wall) 310a extending along the row direction (first direction) and an isolation wall (first isolation wall) 310b extending along the column direction (second direction) are provided on the semiconductor substrate 10. Furthermore, in the comparative example, the isolation wall 310a and the isolation wall 310b are provided to have the same width, whereas in this embodiment, the width of the isolation wall 310a is narrower than that of the isolation wall 310b.

[0097] In this embodiment, a diffusion region 306 containing impurities of a second conductivity type (e.g., p-type) is provided around the isolation walls 310a and 310b (the isolation wall 310a includes a surrounding diffusion region (third diffusion region)). Specifically, in this embodiment, the diffusion region 306 around the isolation wall 310a may be narrower than the diffusion region 306 around the isolation wall 310b, and the impurity concentration in the diffusion region 306 around the isolation wall 310a may be lower than the impurity concentration in the diffusion region 306 around the isolation wall 310b.

[0098] (Cross-sectional configuration) Next, the cross-sectional configuration of the image sensor 100 of this embodiment will be described with reference to Fig. 17. Fig. 17 is a cross-sectional view of the image sensor 100 of this embodiment, and more specifically, cross sections AA, A'-A', and BB in Fig. 16 from above. In the following description, elements common to the comparative example will be denoted by the same reference numerals in the drawing, and description thereof will be omitted.

[0099] 17, the element isolation wall (second element isolation wall) 310a and the element isolation wall (first element isolation wall) 310b are provided so as to penetrate the entire semiconductor substrate 10 from the surface 10b. More specifically, the element isolation wall 310a is provided so as to penetrate the semiconductor substrate 10 along two side surfaces (second side surfaces) extending in the row direction (first direction) of a predetermined unit region of the image sensor 100. Furthermore, the element isolation wall 310b is provided so as to penetrate the semiconductor substrate 10 along two side surfaces (first side surfaces) extending in the column direction (second direction) of a predetermined unit region of the image sensor 100.

[0100] Furthermore, as described above, in this embodiment, the width B of the element isolation wall 310a is narrower than the width A of the element isolation wall 310b. Also, in this embodiment, the diffusion region 306 around the element isolation wall 310a may be narrower than the diffusion region 306 around the element isolation wall 310b, and the impurity concentration in the diffusion region 306 around the element isolation wall 310a may be lower than the impurity concentration in the diffusion region 306 around the element isolation wall 310b.

[0101] In this embodiment, by making the width B of the element isolation wall 310a narrower than the width A of the element isolation wall 310b, the area of ​​the photoelectric conversion section 302 (photodiode) can be made larger than in the comparative example, thereby making it possible to further increase the saturation signal quantity (Qs).

[0102] 16 and 17, the two element isolation walls 310a surrounding one image sensor 100 have the same width, but this is not limited to this in the present embodiment. In the present embodiment, for example, the width of the element isolation wall 310a on the floating diffusion portion (FD portion) 601 side may be narrower than the width of the element isolation wall 310a on the ground portion (well region) 602 side. In this case, the impurity concentration of the diffusion region 306 around the element isolation wall 310a on the floating diffusion portion (FD portion) 601 side may be lower than the impurity concentration of the diffusion region 306 around the element isolation wall 310a on the ground portion (well region) 602 side. This allows the area of ​​the photoelectric conversion portion 302 (photodiode) to be expanded toward the floating diffusion portion (FD portion) 601 side, and the floating diffusion portion 601 and the photoelectric conversion portion 302 to be closer to each other, thereby improving charge transfer efficiency.

[0103] <4.3 Manufacturing method> (Manufacturing method 1) Next, a portion of the manufacturing steps (manufacturing method) of the image sensor 100 according to this embodiment will be described with reference to Fig. 18. Fig. 18 is a cross-sectional view for explaining a portion of the manufacturing steps of a manufacturing method 1 of the image sensor 100 according to this embodiment. In detail, Fig. 18 corresponds to a portion of the cross-sectional view shown in Fig. 17, with the cross-sectional view on the right side corresponding to the AA cross section in Fig. 16 and the cross-sectional view on the left side corresponding to the A'-A' cross section in Fig. 16.

[0104] First, as shown in the upper and middle rows of FIG. 18 , trenches 750 are formed by using a mask 752 having a predetermined pattern and dry etching, extending along the row direction (first direction) and the column direction (second direction) and penetrating the semiconductor substrate 10 from the surface 10b side. In manufacturing method 1, the trenches 750 extending along the row direction are formed so that their widths are narrower than those of the trenches 750 extending along the column direction. In this manufacturing method, the trenches 750 may penetrate only a portion of the semiconductor substrate 10, instead of penetrating the semiconductor substrate 10 from the surface 10b side. In this manufacturing method, the trenches 750 are not limited to being formed using a mask and dry etching, and the trenches 750 may be formed using an anisotropic etching technique or the like. The trenches 750 extending along the row direction and the trenches 750 extending along the column direction may be formed simultaneously or in separate steps.

[0105] Next, as shown in the lower part of FIG. 18 , a diffusion region 306 made of polysilicon or the like containing impurities of a second conductivity type (e.g., p-type) is formed on the side surface of the trench 750 using a pulsed laser deposition method or the like. At this time, the impurity concentration of the diffusion region 306 on the side surface of the trench 750 extending along the row direction is set to be lower than the impurity concentration of the diffusion region 306 on the side surface of the trench 750 extending along the column direction. Furthermore, in this manufacturing method, impurities are diffused into the semiconductor substrate 10 by applying heat to the semiconductor substrate 10 (conformal doping). Furthermore, although not shown, an insulating material is formed in the trench 750 to form element isolation walls 310 a, 310 b.

[0106] (Manufacturing method 2) Also, in this embodiment, it is possible to form the image sensor 100 by other manufacturing methods. Next, a part of the manufacturing steps (manufacturing method) of the image sensor 100 according to this embodiment will be described with reference to Fig. 19. Fig. 19 is a cross-sectional view for explaining a part of the manufacturing steps of a manufacturing method 1 of the image sensor 100 according to this embodiment. In detail, Fig. 19 corresponds to a part of the cross-sectional view shown in Fig. 17, the cross-sectional view on the right side corresponds to the AA cross-section in Fig. 16, and the cross-sectional view on the left side corresponds to the A'-A' cross-section in Fig. 16.

[0107] 19, a diffusion region 306 made of polysilicon or the like containing impurities of a second conductivity type (e.g., p-type) is formed in the range from the front surface 10b side of the semiconductor substrate 10 to the light-receiving surface 10a side, extending along the row direction (first direction) and the column direction (second direction). At this time, the impurity concentration of the diffusion region 306 extending along the row direction is set to be the same as the impurity concentration of the diffusion region 306 extending along the column direction. Furthermore, the width of the diffusion region 306 extending along the row direction is formed to be the same as the width of the diffusion region 306 extending along the column direction.

[0108] 19, trenches 750 are formed in the diffusion regions 306. At this time, the trenches 750 are formed so that the diffusion regions 306 remain on the sidewalls of the trenches 750. In this manufacturing method, the width of the trenches 750 in the diffusion regions 306 extending along the row direction is formed to be the same as the width of the trenches 750 in the diffusion regions 306 extending along the column direction.

[0109] Next, as shown in the lower part of Figure 19, impurities of a first conductivity type (e.g., n-type) are injected into the diffusion region 306 on the sidewall of the trench 750 extending in the row direction (first direction), thereby electrically canceling out the impurities of a second conductivity type (e.g., p-type) in the diffusion region 306.

[0110] Furthermore, although not shown, in this manufacturing method, impurities are diffused into the semiconductor substrate 10 (conformal doping) by applying heat to the semiconductor substrate 10. Furthermore, an insulating material is formed in the trench 750, thereby forming element isolation walls 310a and 310b.

[0111] (Manufacturing method 3) Next, a portion of the manufacturing steps (manufacturing method) of the image sensor 100 according to this embodiment will be described with reference to Fig. 20. Fig. 20 is a cross-sectional view for explaining a portion of the manufacturing steps of a manufacturing method 1 of the image sensor 100 according to this embodiment. In detail, Fig. 20 corresponds to a portion of the cross-sectional view shown in Fig. 17, with the cross-sectional view on the right side corresponding to the AA cross section in Fig. 16 and the cross-sectional view on the left side corresponding to the A'-A' cross section in Fig. 16.

[0112] 20, a diffusion region 306 made of polysilicon or the like containing impurities of a second conductivity type (e.g., p-type) is formed in the range from the front surface 10b side of the semiconductor substrate 10 to the light-receiving surface 10a side, extending along the row direction (first direction) and the column direction (second direction). At this time, the impurity concentration of the diffusion region 306 extending along the row direction is made lower than the impurity concentration of the diffusion region 306 extending along the column direction. Furthermore, the width of the diffusion region 306 extending along the row direction is made narrower than the width of the diffusion region 306 extending along the column direction.

[0113] 20, a trench 750 is formed in the diffusion region 306. At this time, the trench 750 is formed so that the diffusion region 306 remains on the sidewall of the trench 750.

[0114] 20, heat is applied to the semiconductor substrate 10 to diffuse impurities from the diffusion region 306 into the semiconductor substrate 10 (conformal doping). Furthermore, although not shown, an insulating material is formed in the trench 750 to form element isolation walls 310a and 310b.

[0115] <4.4 Modifications> Furthermore, in this embodiment, the elements separating the two pixels 300a, 300b (photoelectric conversion units 302) are not limited to the pair of protrusions 304 (an example of a separation unit) and the diffusion region 306 surrounding the protrusions 304. Therefore, a modified example of a separation unit separating the two pixels 300a, 300b will be described with reference to FIG. 21. FIG. 21 shows a plan view and a cross-sectional view of an image sensor 100 according to a modified example of this embodiment. In detail, the diagram on the left is a plan view corresponding to FIG. 16, and the diagram on the right shows a cross-section taken along the dashed line in the diagram on the left.

[0116] 21 may be a pixel isolation wall 334 provided within the slit 312 so as to penetrate from the light-receiving surface 10a to partway through the semiconductor substrate 10 along the thickness direction of the semiconductor substrate 10, and a diffusion region 306 located around the pixel isolation wall 334. In addition, in the case of such a modified example, as shown in the second row from the top of FIG. 21, an element isolation wall 310b may also be provided so as to penetrate from the light-receiving surface 10a to partway through the semiconductor substrate 10 along the thickness direction of the semiconductor substrate 10.

[0117] 21 may be composed of only a diffusion region (fourth diffusion region) 306. The diffusion region 306 contains impurities of the second conductivity type (e.g., p-type). In this case, the element isolation wall 310b may also be composed of the diffusion region 306.

[0118] Furthermore, for example, as shown in the lower part of Figure 21, the element isolation wall 310b may be formed by connecting an element isolation portion (STI) consisting of a trench that penetrates from the light-receiving surface 10a to partway through the semiconductor substrate 10 along the thickness direction of the semiconductor substrate 10, and an element isolation portion (RDTI) consisting of a trench that penetrates from the surface 10b to partway through the semiconductor substrate 10.

[0119] <<5. Third Embodiment>> <5.1 Background> Next, a third embodiment of the present disclosure created by the present inventors will be described with reference to Figs. 22A and 22B. First, the background that led to the creation of the third embodiment will be described. Fig. 22A is a plan view of a portion of an imaging device 1 according to a comparative example, as viewed from the surface 10b. Fig. 22B is a cross-sectional view of a portion of the imaging device 1 according to the comparative example, specifically a cross-sectional view of the semiconductor substrate 10 taken along line DD' shown in Fig. 22A.

[0120] 22A and 22B, in the comparative example, the transfer gates 400a and 400b are formed by flat electrodes provided on the semiconductor substrate 10, making it difficult to modulate the potential deep within the semiconductor substrate 10 and to efficiently transfer the charge from the PD to the FD. Therefore, it is conceivable to enlarge the transfer gate 400 itself, but this becomes more difficult as the imaging element 100 becomes smaller.

[0121] Furthermore, in the comparative example, when the transfer gate 400 is enlarged, it is closer to the position of the overflow path between the pixels 300a and 300b. Therefore, when a line passing through the center of the overflow path and extending along the column direction is used as the axis of symmetry, the potential gradient of the overflow path may not be line-symmetric due to the influence of modulation from the transfer gate 400. In addition, when the transfer gate 400 is enlarged, the photoelectric conversion unit 302 (photodiode: PD) inevitably becomes smaller, which limits the increase in the saturation signal amount (Qs) of the image sensor 100.

[0122] Therefore, the inventors have come up with the creation of a third embodiment of the present disclosure, which is capable of suppressing the influence from the transfer gate 400, making the potential gradient of the overflow path more linearly symmetrical, and further increasing the modulation degree and saturation signal quantity (Qs) by the transfer gate 400.

[0123] <5.2 Embodiment> First, the configuration of the imaging element 100 of this embodiment will be described with reference to Figs. 23A, 23B, and 24. Figs. 23A and 24 are plan views of the imaging device 1 according to this embodiment as viewed from the front surface 10b. Fig. 23B is a cross-sectional view of a portion of the imaging device 1 according to this embodiment, specifically a cross-sectional view of the semiconductor substrate 10 taken along line EE' in Fig. 23A. In the following description, elements common to those in the comparative example will be denoted by the same reference numerals in the drawings, and their description will be omitted.

[0124] 23A, the transfer gate (transfer gate electrode) 400 is disposed at a position away from the overflow path (denoted as "path" in the drawing) so as not to interfere with the overflow path. In detail, when the semiconductor substrate 10 is viewed from above the surface 10b, the transfer gate 400 is provided adjacent to the element isolation wall (first element isolation wall) 310b extending along the column direction (second direction), and extends along the element isolation wall (first element isolation wall) 310b.

[0125] When viewed from above the surface 10b, the floating diffusion portion (FD portion) (charge storage portion) 601 is provided near a first intersection point where one element isolation wall (third element isolation wall) 310a intersects with the protruding portion 304 (an example of an isolation portion). Furthermore, the transfer gate 400 is provided near a second intersection point where the element isolation wall (third element isolation wall) 310a forming the first intersection point intersects with the element isolation wall (first element isolation wall) 310b extending along the column direction (second direction).

[0126] In this embodiment, by arranging the transfer gate (transfer gate electrode) 400 as described above, it can be arranged at a position away from the overflow path. Note that in this embodiment, it is preferable to arrange the transfer gate 400 at a position as far away from the overflow path as possible, as long as it does not interfere with the arrangement or function of other elements. According to this embodiment, the influence of potential modulation by the transfer gate 400 can be suppressed, and therefore the potential gradient of the overflow path can be made closer to line symmetry. In addition, in this embodiment, by arranging the transfer gate 400 at a position away from the overflow path, the photoelectric conversion unit 302 (photodiode: PD) can be formed widely, and therefore the saturation signal quantity (Qs) of the image sensor 100 can be further increased.

[0127] 23B, the transfer gate (transfer gate electrode) 400 has an embedded electrode portion 402 in the semiconductor substrate 10. Thus, in this embodiment, providing the embedded electrode portion 402 in the transfer gate 400 makes it easy to modulate the potential deep within the semiconductor substrate 10, and allows charges from the photoelectric conversion portion 302 (photodiode: PD) to be efficiently transferred to the floating diffusion portion (FD portion) (charge accumulation portion) 601. Note that in this embodiment, the diffusion region 306 located near the transfer gate 400 is arranged below the embedded electrode portion 402, as shown in FIG. 24B.

[0128] 24, when viewed from above the surface 10b, the length of the transfer gate 400 extending along the element isolation wall (first element isolation wall) 310b may be shorter than that in the example of FIG. 23A. By doing so, the transfer gate (transfer gate electrode) 400 can be disposed at a position away from the overflow path, and the influence of the transfer gate 400 can be suppressed, so that the potential gradient of the overflow path can be made closer to line symmetry. In addition, by disposing the transfer gate 400 at a position away from the overflow path, the photoelectric conversion unit 302 (photodiode: PD) can be formed widely, and the saturation signal amount (Qs) of the image sensor 100 can be further increased.

[0129] <5.3 Modifications> Furthermore, this embodiment can be modified. A modified example of the transfer gate (transfer gate electrode) 400 will be described with reference to Fig. 25A and Fig. 25B. Fig. 25A is a plan view of the imaging device 1 according to this embodiment as seen from the front surface 10b. Fig. 25B is a cross-sectional view of a portion of the imaging device 1 according to this embodiment, specifically a cross-sectional view of the semiconductor substrate 10 taken along line FF' shown in Fig. 25A.

[0130] As shown in FIGS. 25A and 25B, the transfer gate (transfer gate electrode) 400 has two buried electrode portions 402 buried in the semiconductor substrate 10. This configuration facilitates more effective modulation of the potential deep within the semiconductor substrate 10, enabling efficient transfer of charges from the photoelectric conversion portion 302 (photodiode: PD) to the floating diffusion portion (FD portion) (charge storage portion) 601. The two buried electrode portions 402 are preferably provided in a balanced manner so as not to obstruct the path of charges from the photoelectric conversion portion 302 (photodiode: PD) to the floating diffusion portion (FD portion) 601. However, the number of buried electrode portions 402 is not limited to two, and the cross section is not limited to a circular shape, as long as the potential can be modulated as desired. For example, three or four or more buried electrode portions 402 may be provided per transfer gate 400, and the cross section may be circular, elliptical, or polygonal.

[0131] <<6. Fourth Embodiment>> Furthermore, in an embodiment of the present disclosure, the two transfer gates 400a, 400b, the FD section (floating diffusion section) 601, and the ground section 602 may be arranged as shown in FIG. 26. Such an embodiment will be described below as a fourth embodiment of the present disclosure with reference to FIGS. 26 and 27. FIG. 26 is an explanatory diagram showing a plan view of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section obtained by cutting the image sensor 100 along the planar direction. FIG. 27 is an explanatory diagram showing a plan view of the image sensor 100 according to a comparative example of this embodiment, and more specifically, corresponds to a cross section obtained by cutting the image sensor 100 according to the comparative example along the planar direction.

[0132] 26, in this embodiment, two transfer gates 400a and 400b are positioned on one end side (for example, the upper side in FIG. 26) of a cell region surrounded by an element isolation wall 310. The cell region is included in the imaging element 100. In the example of FIG. 26, the cell region is square.

[0133] The FD section 601 is a floating diffusion shared by two adjacent cell regions (see the dotted line region in FIG. 26). This FD section 601 is positioned on one end side of the cell region (for example, the upper side in FIG. 26). In the example of FIG. 26, the shape of the FD section 601 is not a regular octagon, but an octagonal shape having long and short sides. Specifically, the FD section 601 is horizontally long, and the length of the FD section 601 in a direction perpendicular to the extension direction of the protrusion 304 is longer than the length of the protrusion 304 in the extension direction. For example, Poly-Si (polycrystalline Si) is used as the FD section 601.

[0134] The ground portion 602 is a ground portion shared by two adjacent cell regions (see the dotted line region in FIG. 26). This ground portion 602 is positioned on one end side of the cell region (for example, the lower side in FIG. 26). In the example of FIG. 26, the shape of the ground portion 602 is not a regular octagon, but an octagonal shape having long and short sides. Specifically, the ground portion 602 is horizontally elongated, and the length of the ground portion 602 in a direction perpendicular to the extension direction of the protrusion 304 is longer than the length of the protrusion 304 in the extension direction. For example, Poly-Si (polycrystalline Si) is used as the ground portion 602. The ground portion 602 is at ground (GND) potential and functions, for example, as a well contact.

[0135] Here, as shown in FIG. 27 , when the FD section 601 and the ground section 602 each have a regular octagonal shape, the width g of the slit 312 (the vertical length in FIG. 27 ) is narrower than the width f of the slit 312 shown in FIG. 27 (the vertical length in FIG. 75 ). In FIG. 26 , from the viewpoint of optical factors (improvement of Qe and suppression of color mixing) or for further miniaturization, the ratio of the width g of the slit 312 to the cell pitch of the cell region (the vertical length in FIG. 27 ) is increased. For example, when the width g of the slit 312 shown in FIG. 27 is widened, the region (dividing portion) of the slit 312 is brought closer to the FD section 601 (e.g., N+ diffusion layer) and the ground section 602 (e.g., P+ diffusion layer). As a result, the FD section 601 and the ground section 602 interfere with the region of the slit 312, which may result in increased variations in single-pixel Qs and deterioration of FD white spots.

[0136] Therefore, in this embodiment, as shown in FIG. 26 , the FD section 601 and the ground section 602 each have a horizontally elongated shape. For example, in each of the FD section 601 and the ground section 602, the length in the extension direction of the protrusion 304 is shorter than the length in the direction perpendicular to the extension direction of the protrusion 304. As a result, the FD section 601 and the ground section 602 are located farther from the region (division portion) of the slit 312 than in FIG. 27 . Therefore, the influence of diffusion of the FD section 601 and the ground section 602 on the potential in the region of the slit 312 is suppressed, thereby suppressing an increase in single-pixel Qs variation and FD white spot degradation. Furthermore, the shape of each transfer gate 400 a, 400 b, for example, the shape of the transfer gate 400 a, 400 b on the slit 312 side, can be enlarged, thereby realizing transfer improvement (improvement of transfer characteristics) and suppression of potential barrier variation.

[0137] Furthermore, in this embodiment, the ground section 602 can be modified as follows. Therefore, the detailed configuration of the ground section 602 will be described with reference to Fig. 28 to Fig. 31. Fig. 28 to Fig. 31 are explanatory diagrams showing a plan view of the image sensor 100 according to this embodiment, and more specifically, correspond to cross sections of the image sensor 100 cut along the planar direction.

[0138] As shown in FIG. 28, in this embodiment, ground portions 602 are provided at two of the four corners of the cell region. These ground portions 602 are shared by four adjacent cell regions. In the example of FIG. 28, the ground portions 602 are provided at the bottom left and bottom right of the four corners of the cell region. Each ground portion 602 is shifted from the FD portion 601 by half the cell pitch of the cell region (the length in the horizontal direction in FIG. 28). As a result, each ground portion 602 is further away from the region of the slit 312 than in FIGS. 26 and 27. Therefore, it is possible to reliably suppress an increase in single-pixel Qs variation, FD white spot degradation, and the like.

[0139] 29, in this embodiment, the ground section 602 shown in FIG. 28 is rotated by 90 degrees (other configurations are the same as those in FIG. 28). As a result, each ground section 602 is located farther away from the area of ​​the slit 312 than in FIG. 28. Therefore, it is possible to more reliably suppress an increase in single-pixel Qs variation, FD white spot degradation, and the like.

[0140] 30, in this embodiment, the ground portion 602 shown in FIG. 28 is formed in a regular octagon (other configurations are the same as those in FIG. 28). Even in this case, each ground portion 602 is located farther from the region of the slit 312 than in FIG. 27. Therefore, it is possible to reliably suppress an increase in single-pixel Qs variation, FD white spot degradation, and the like.

[0141] 31, in this embodiment, the FD section 601 shown in FIG. 30 is formed in a regular octagon, and the shape of each transfer gate 400a, 400b is the same as that in FIG. 74 (other configurations are the same as those in FIG. 30). Even in this case, each ground section 602 is located farther from the region of the slit 312 than in FIG. 27. Therefore, it is possible to reliably suppress an increase in single-pixel Qs variation, FD white spot deterioration, and the like.

[0142] Furthermore, in this embodiment, the FD section 601 and the ground section 602 can be modified as follows. Therefore, the detailed configurations of the FD section 601 and the ground section 602 will be described with reference to Fig. 32 to Fig. 34. Fig. 32 to Fig. 34 are explanatory diagrams showing a plan view of the image sensor 100 according to this embodiment, and more specifically, correspond to cross sections obtained by cutting the image sensor 100 along the planar direction.

[0143] 32 and 33, in this embodiment, the FD section 601 and the ground section 602 are formed in a square shape (other configurations are the same as those in FIG. 28). By doing so, the PD can be formed larger, and the saturation signal quantity (Qs) can be further increased.

[0144] 34, in this embodiment, the ground portion 602 is formed in a square shape (other configurations are the same as those in FIG. 28). This allows the PD to be formed larger, thereby further increasing the saturation signal quantity (Qs). In the example of FIG. 34, it is preferable to make the transfer gate 400 longer in the row direction, which allows the distance from the overflow path to be increased and the load caused by the application of a high voltage to be reduced.

[0145] The shapes of the FD section 601 and the ground section 602 may be the same (see FIGS. 26 to 29, 31 to 33) or different (see FIGS. 30 and 34). The shape of the FD section 601 or the ground section 602 may have long and short sides, for example, a shape that is symmetrical in the vertical and horizontal directions (see FIGS. 26 to 34), or a shape that is asymmetrical in the vertical and horizontal directions.

[0146] Furthermore, the FD section 601 and the ground section 602 are arranged in an array (for example, in a matrix along the row and column directions), but may be arranged at the same pitch as the cell pitch of the cell area, or may be arranged offset by half a pitch from each other.

[0147] Furthermore, the shape of the FD section 601 and the ground section 602 may be, for example, another polygonal shape other than an octagonal shape having long and short sides, or may be an elliptical shape.

[0148] <<7. Summary>> <7.1 Summary> As described above, according to the embodiments of the present disclosure, it is possible to improve the accuracy of phase difference detection while avoiding degradation of captured images.

[0149] In the above-described embodiment of the present disclosure, a case has been described in which the present disclosure is applied to a back-illuminated CMOS image sensor structure, but the embodiment of the present disclosure is not limited to this and may be applied to other structures.

[0150] In the above-described embodiment of the present disclosure, the image sensor 100 is described in which the first conductivity type is n-type, the second conductivity type is p-type, and electrons are used as signal charges, but the embodiment of the present disclosure is not limited to this example. For example, this embodiment can be applied to an image sensor 100 in which the first conductivity type is p-type, the second conductivity type is n-type, and holes are used as signal charges.

[0151] In the above-described embodiments of the present disclosure, the semiconductor substrate 10 does not necessarily have to be a silicon substrate, but may be another substrate (for example, an SOI (Silicon On Insulator) substrate, a SiGe substrate, etc.) The semiconductor substrate 10 may also be one in which a semiconductor structure or the like is formed on such various substrates.

[0152] Furthermore, the imaging device 1 according to the embodiment of the present disclosure is not limited to an imaging device that detects the distribution of incident light amount of visible light and captures an image. For example, the present embodiment can be applied to an imaging device that captures the distribution of incident amounts of infrared rays, X-rays, particles, etc. as an image, or an imaging device (physical quantity distribution detection device) such as a fingerprint detection sensor that detects the distribution of other physical quantities such as pressure or capacitance and captures an image.

[0153] Furthermore, the imaging device 1 according to the embodiment of the present disclosure can be manufactured using methods, devices, and conditions that are used in the manufacture of general semiconductor devices. That is, the imaging device 1 according to the present embodiment can be manufactured using existing semiconductor device manufacturing processes.

[0154] Examples of the above-mentioned methods include physical vapor deposition (PVD), chemical vapor deposition (CVD), and atomic layer deposition (ALD). Examples of PVD methods include vacuum deposition, electron beam (EB) deposition, various sputtering methods (magnetron sputtering, RF (radio frequency)-direct current (DC) combined bias sputtering, electron cyclotron resonance (ECR) sputtering, facing target sputtering, and high-frequency sputtering), ion plating, laser ablation, molecular beam epitaxy (MBE), and laser transfer. Examples of CVD methods include plasma CVD, thermal CVD, metalorganic (MO) CVD, and photo-CVD. Other methods include electroplating, electroless plating, spin coating, dipping, casting, microcontact printing, drop casting, various printing methods such as screen printing, inkjet printing, offset printing, gravure printing, and flexographic printing, stamping, spraying, and various coating methods such as air doctor coater, blade coater, rod coater, knife coater, squeeze coater, reverse roll coater, transfer roll coater, gravure coater, kiss coater, cast coater, spray coater, slit orifice coater, and calendar coater. Furthermore, patterning methods include chemical etching such as shadow masking, laser transfer, and photolithography, and physical etching using ultraviolet light or lasers. Additionally, planarization techniques include chemical mechanical polishing (CMP), laser planarization, and reflow.

[0155] <7.2 Other forms> In the above-described embodiment of the present disclosure, the structures of the protrusion 304 and the pixel separation wall 334 have been described, but the structures according to the embodiments of the present disclosure are not limited to these. Various aspects of the structure of each part will now be described in detail with reference to FIGS. 35 to 40.

[0156] Fig. 35 is an explanatory diagram showing a plane of the imaging element 100 according to this embodiment (variation), and more specifically, corresponds to a cross section obtained by cutting the imaging element 100 along the planar direction. Fig. 36 is an explanatory diagram showing a portion of a cross section of the imaging element 100 for each structure according to this embodiment (variation), i.e., the semiconductor substrate 10 for each structure, and more specifically, corresponds to a cross section obtained by cutting the semiconductor substrate 10 for each structure along line JJ' shown in Fig. 35.

[0157] As shown in FIGS. 35 and 36, the pixel isolation wall 334 is formed in one of the following structures: RDTI (back surface DTI), FDTI (front surface DTI), FFTI (front surface FTI: Full Trench Isolation), RFTI (back surface FTI), and RDTI+FDTI. In these structures, a trench T3 is formed in the thickness direction of the semiconductor substrate 10. A material such as an oxide film is filled in the trench T3. In the example of FIG. 36, the trench T3 is formed in a tapered shape that widens from the surface of the semiconductor substrate 10 toward the inside, but this is not limited to this. For example, the trench T3 may be formed straight so as to be perpendicular (or approximately perpendicular) to the surface of the semiconductor substrate 10.

[0158] RDTI is a structure in which a trench T3 is formed from the light-receiving surface 10a of the semiconductor substrate 10 to partway through the semiconductor substrate 10. FDTI is a structure in which a trench is formed from the surface 10b of the semiconductor substrate 10 to partway through the semiconductor substrate 10. FFTI is a structure in which a trench T3 is formed penetrating from the surface 10b of the semiconductor substrate 10 to the light-receiving surface 10a. RFTI is a method in which a trench T3 is formed penetrating from the light-receiving surface 10a of the semiconductor substrate 10 to the surface 10b. RDTI+FDTI is a method that combines the above-mentioned RDTI and FDTI. In RDTI+FDTI, the trench T3 extending from the light-receiving surface 10a and the trench T3 extending from the surface 10b are connected near the center of the semiconductor substrate 10 in the thickness direction.

[0159] Fig. 37 is an explanatory diagram showing a plane of the imaging element 100 according to this embodiment (variation), and more specifically, corresponds to a cross section obtained by cutting the imaging element 100 along the planar direction. Fig. 38 is an explanatory diagram showing a portion of a cross section of the imaging element 100 for each structure according to this embodiment (variation), i.e., the semiconductor substrate 10 for each structure, and more specifically, corresponds to a cross section obtained by cutting the semiconductor substrate 10 for each structure along line KK' shown in Fig. 37.

[0160] As shown in FIGS. 37 and 38, the protruding portion 304 is formed in one of the following structures: RDTI, FDTI, FFTI, RFTI, or RDTI+FDTI, similar to the pixel isolation wall 334 described above (see FIG. 36). In these structures, the trench T3 is formed in the thickness direction of the semiconductor substrate 10. At this time, as shown in FIG. 38, the trench T3 is formed so that the protruding portion 304 contacts the element isolation wall 310 and is not spaced apart from it. A material that will become an oxide film or the like is filled into the trench T3. In the example of FIG. 38, the trench T3 is formed in a tapered shape that widens from the surface of the semiconductor substrate 10 toward the inside, but this is not limited thereto. For example, the trench T3 may be formed straight so as to be perpendicular (or approximately perpendicular) to the surface of the semiconductor substrate 10.

[0161] Here, the pixel isolation wall 334 may have a structure other than a single pixel isolation wall 334 that is not in contact with the element isolation wall 310 as shown in FIG. 35. For example, as shown in FIG. 39, a plurality of pixel isolation walls 334 may be formed in a dotted row so as to be not in contact with the element isolation wall 310. In the example of FIG. 39, the number of pixel isolation walls 334 is six, but this number is not limited thereto. Furthermore, as shown in FIG. 40, the pixel isolation wall 334 may be formed so that both ends thereof are in contact with the element isolation wall 310. Note that in the examples of FIGS. 35, 39, and 40, the pixel isolation walls 334 are formed in the column direction, but this is not limited thereto and may be formed in the row direction, for example.

[0162] Although the above-described embodiments of the present disclosure have been described with reference to applications to a single-layer CMOS image sensor structure, the embodiments of the present disclosure are not limited thereto and may be applied to other structures, such as a stacked CMOS image sensor (CIS) structure. For example, as shown in FIGS. 41 to 43, embodiments of the present disclosure may be applied to a two-layer stacked CIS, a three-layer stacked CIS, a two-tier pixel CIS, etc. Application to a two-tier pixel CIS is an example, and application to a single-tier pixel CIS is also possible. Here, the structures of a two-layer stacked CIS, a three-layer stacked CIS, and a two-tier pixel CIS will be described in detail with reference to FIGS. 41 to 43.

[0163] (2-layer laminated CIS) An example of a two-layer stacked structure to which an embodiment of the present disclosure can be applied is shown in Fig. 41. Fig. 41 is an explanatory diagram showing a cross section of a two-layer stacked structure to which an imaging device 1 according to an embodiment of the present disclosure can be applied.

[0164] In the structure shown in FIG. 41 , the imaging device 1 is configured by electrically connecting the pixel region (pixel array section 20) and control circuit section 25 on the first semiconductor substrate 31 side to the logic circuit (not shown) on the second semiconductor substrate 45 side by one through-connection conductor 84 formed in the first semiconductor substrate 31. That is, in the example of FIG. 41 , the first semiconductor substrate 31 and the second semiconductor substrate 45 are stacked, and these semiconductor substrates 31 and 45 are electrically connected by the through-connection conductor 84. In detail, a through-connection hole 85 is formed so as to penetrate the first semiconductor substrate 31 from the back surface 31b side of the first semiconductor substrate to reach the wiring 53 in the uppermost layer of the second semiconductor substrate 45 and also to reach the wiring 40 in the uppermost layer of the first semiconductor substrate 31. After forming an insulating film 63 on the inner wall surface of the through-connection hole 85, the through-connection conductor 84 that connects the wiring 40 on the pixel region and control circuit section 25 side to the wiring 53 on the logic circuit side is embedded in the through-connection hole 85. In FIG. 41, the through-connection conductor 84 is connected to the wiring 40 in the uppermost layer, and therefore the wirings 40 in each layer are connected to each other so that the wiring 40 in the uppermost layer to which it is connected serves as the connection end.

[0165] 41, a photodiode (PD) serving as a photoelectric conversion unit of each pixel is formed in a semiconductor well region 32 of a first semiconductor substrate 31. Furthermore, source / drain regions 33 of each pixel transistor are formed in the semiconductor well region 32. The semiconductor well region 32 is formed by introducing, for example, p-type impurities, and the source / drain regions 33 are formed by introducing, for example, n-type impurities. Specifically, the photodiode (PD) and the source / drain regions 33 of each pixel transistor are formed by ion implantation from the surface of the substrate.

[0166] The photodiode (PD) has an n-type semiconductor region 34 and a p-type semiconductor region 35 on the substrate surface side. A gate electrode 36 is formed on the substrate surface constituting the pixel via a gate insulating film, and pixel transistors Tr1 and Tr2 are formed by the gate electrode 36 and a pair of source / drain regions 33. For example, the pixel transistor Tr1 adjacent to the photodiode (PD) corresponds to a transfer transistor, and its source / drain region corresponds to a floating diffusion (FD). Each unit pixel is isolated by an element isolation region 38.

[0167] Also, MOS transistors Tr3 and Tr4 constituting a control circuit are formed on the first semiconductor substrate 31. Each of the MOS transistors Tr3 and Tr4 is formed by an n-type source / drain region 33 and a gate electrode 36 formed via a gate insulating film. Furthermore, a first-layer interlayer insulating film 39 is formed on the surface of the first semiconductor substrate 31, and connecting conductors 44 connected to required transistors are formed within the interlayer insulating film 39. In addition, a multilayer wiring layer 41 is formed by multiple layers of wiring 40 via the interlayer insulating film 39 so as to connect to each connecting conductor 44.

[0168] 41, a p-type semiconductor well region 46 on the surface side of a second semiconductor substrate 45 has formed therein a plurality of MOS transistors constituting a logic circuit separated by element isolation regions 50. Each of the MOS transistors Tr6, Tr7, and Tr8 has a pair of n-type source / drain regions 47 and a gate electrode 48 formed therethrough via a gate insulating film. A first interlayer insulating film 49 is formed on the surface of the second semiconductor substrate 45, and connecting conductors 54 connected to required transistors are formed within the interlayer insulating film 49. A connecting conductor 51 is also provided, penetrating from the surface of the interlayer insulating film 49 to a desired depth within the second semiconductor substrate 45. An insulating film 52 is also provided to insulate the connecting conductor 51 from the semiconductor substrate 45.

[0169] Furthermore, a multilayer wiring layer 55 is formed by providing multiple layers of wiring 53 within the interlayer insulating film 49 so as to connect to each of the connection conductors 54 and the connection conductors 51 for taking out the electrodes.

[0170] Furthermore, as shown in FIG. 41, the first semiconductor substrate 31 and the second semiconductor substrate 45 are bonded together so that the multilayer wiring layers 41 and 55 face each other.

[0171] As shown in FIG. 41, color filters 74 of, for example, red (R), green (G), and blue (B) are provided on the planarization film 73 in correspondence with each pixel, and on-chip lenses 75 are provided thereon.

[0172] On the other hand, on the second semiconductor substrate 45 side, an opening 77 corresponding to the connection conductor 51 is provided, and a spherical electrode bump 78 electrically connected to the connection conductor 51 through the opening 77 is provided.

[0173] (3-layer laminated CIS) An example of a three-layer stacked structure to which an embodiment of the present disclosure can be applied is shown in Fig. 42. Fig. 42 is an explanatory diagram showing a cross section of a three-layer stacked structure to which an imaging device 1 according to an embodiment of the present disclosure can be applied.

[0174] 42, the imaging device 1 has a three-layer structure in which a first semiconductor substrate 211, a second semiconductor substrate 212, and a third semiconductor substrate 213 are stacked. In detail, the structure shown in Fig. 42 includes, for example, the first semiconductor substrate 211 on which a sensor circuit is formed, the second semiconductor substrate 212 on which a logic circuit is formed, and the third semiconductor substrate 213 on which a memory circuit is formed. Note that the logic circuit and the memory circuit are configured to operate by inputting and outputting signals to and from the outside, respectively.

[0175] 42, a photodiode (PD) 234 serving as a photoelectric conversion unit of a pixel is formed on the first semiconductor substrate 211, and the source / drain regions of each pixel transistor are formed in the semiconductor well region. Furthermore, a gate electrode is formed on the substrate surface of the first semiconductor substrate 211 via a gate insulating film, and the pixel transistors Tr1 and Tr2 are formed by the gate electrode and the paired source / drain regions. In detail, the pixel transistor Tr1 adjacent to the photodiode (PD) 234 corresponds to a transfer transistor, and its source / drain region corresponds to a floating diffusion (FD). Furthermore, an interlayer insulating film (not shown) is provided on the first semiconductor substrate 211, and a connection conductor 244 connected to the pixel transistors Tr1 and Tr2 is provided in the interlayer insulating film.

[0176] Furthermore, the first semiconductor substrate 211 is provided with a contact 265 used for electrical connection with the second semiconductor substrate 212. The contact 265 is connected to a contact 311 of the second semiconductor substrate 212, which will be described later, and is also connected to a pad 280a of the first semiconductor substrate 211.

[0177] On the other hand, a logic circuit is formed on the second semiconductor substrate 212. In detail, a plurality of transistors constituting the logic circuit, namely, MOS transistor Tr6, MOS transistor Tr7, and MOS transistor Tr8, are formed in a p-type semiconductor well region (not shown) of the second semiconductor substrate 212. Also, on the second semiconductor substrate 212, a connection conductor 254 is formed which is connected to the MOS transistor Tr6, MOS transistor Tr7, and MOS transistor Tr8.

[0178] Furthermore, a contact 311 is formed on the second semiconductor substrate 212 to be used for electrical connection with the first semiconductor substrate 211 and the third semiconductor substrate 213. The contact 311 is connected to the contact 265 of the first semiconductor substrate 211 and also to the pad 330a of the third semiconductor substrate 213.

[0179] Furthermore, a memory circuit is formed on the third semiconductor substrate 213. In detail, a plurality of transistors constituting the memory circuit, that is, a MOS transistor Tr11, a MOS transistor Tr12, and a MOS transistor Tr13, are formed in a p-type semiconductor well region (not shown) of the third semiconductor substrate 213.

[0180] Furthermore, on the third semiconductor substrate 213, a connection conductor 344 is formed which is connected to the MOS transistor Tr11, the MOS transistor Tr12, and the MOS transistor Tr13.

[0181] (2-level pixel CIS) An example of a two-tiered pixel structure to which an embodiment of the present disclosure can be applied is shown in Fig. 43. Fig. 43 is an explanatory diagram showing a cross section of a two-tiered pixel structure to which an imaging device 1 according to an embodiment of the present disclosure can be applied.

[0182] In the structure shown in FIG. 43, the first substrate 80 is configured by laminating an insulating layer 86 on the semiconductor substrate 11. The first substrate 80 has the insulating layer 86 as part of an interlayer insulating film 87. The insulating layer 86 is provided in the gap between the semiconductor substrate 11 and a semiconductor substrate 21A, which will be described later. The first substrate 80 has a photodiode PD (83), a transfer transistor TR, and a floating diffusion FD. The first substrate 80 is configured such that the transfer transistor TR and the floating diffusion FD are provided on the front surface side of the semiconductor substrate 11 (the side opposite the light incident surface side, the second substrate 20A side).

[0183] 43, the transfer transistor TR has a planar transfer gate TG. However, the configuration is not limited to this, and the transfer gate TG may be a vertical transfer gate that penetrates the well layer 42.

[0184] The second substrate 20A is configured by laminating an insulating layer 88 on the semiconductor substrate 21A. The second substrate 20A has the insulating layer 88 as part of an interlayer insulating film 87. The insulating layer 88 is provided in the gap between the semiconductor substrate 21A and the semiconductor substrate 81. The second substrate 20A has a readout circuit 22A. Specifically, the second substrate 20A is configured such that the readout circuit 22A is provided on the front surface side (the third substrate 30 side) of the semiconductor substrate 21A. The second substrate 20A is bonded to the first substrate 80 with the back surface of the semiconductor substrate 21A facing the front surface side of the semiconductor substrate 11. In other words, the second substrate 20A is bonded to the first substrate 80 face-to-back. The second substrate 20A further has an insulating layer 89 that penetrates the semiconductor substrate 21A in the same layer as the semiconductor substrate 21A. The second substrate 20A has the insulating layer 89 as part of the interlayer insulating film 87.

[0185] The stacked body made up of the first substrate 80 and the second substrate 20A has an interlayer insulating film 87 and through wiring 90 provided in the interlayer insulating film 87. Specifically, the through wiring 90 is electrically connected to the floating diffusion FD and a connection wiring 91 described below. The second substrate 20A further has, for example, a wiring layer 56 on the insulating layer 88.

[0186] The wiring layer 56 further has, for example, a plurality of pad electrodes 58 in the insulating layer 57. Each pad electrode 58 is formed of a metal such as Cu (copper) or Al (aluminum). Each pad electrode 58 is exposed on the surface of the wiring layer 56. Each pad electrode 58 is used to electrically connect the second substrate 20A and the third substrate 30 and to bond the second substrate 20A and the third substrate 30 together.

[0187] The third substrate 30 is formed, for example, by laminating an interlayer insulating film 61 on a semiconductor substrate 81. As will be described later, the third substrate 30 is bonded to the second substrate 20A with their front surfaces facing each other. The third substrate 30 is configured such that a logic circuit 82 is provided on the front surface of the semiconductor substrate 81. The third substrate 30 further includes, for example, a wiring layer 62 on the interlayer insulating film 61. The wiring layer 62 includes, for example, an insulating layer 92 and a plurality of pad electrodes 64 provided in the insulating layer 92. The plurality of pad electrodes 64 are electrically connected to the logic circuit 82. Each pad electrode 64 is formed, for example, from Cu (copper). Each pad electrode 64 is exposed on the surface of the wiring layer 62. Each pad electrode 64 is used to electrically connect the second substrate 20A and the third substrate 30 and to bond the second substrate 20A and the third substrate 30 together.

[0188] When the technology of the present disclosure is applied to a single-stage pixel (normal CIS), for example, as shown in FIG. 43 , in the image sensor 100, transistors (e.g., CMOS transistors) other than the transfer gates 400a and 400b can be arranged in two pixel transistor regions Ra and Rb. The floating diffusion FD is provided adjacent to the transfer gates 400a and 400b. In the example of FIG. 43 , the pixel transistor regions Ra and Rb are formed to sandwich a pixel region Rc including the pixels 300a and 300b. The pixel transistor region Ra on the left side in FIG. 43 is arranged with a selection transistor SEL and an amplification transistor AMP, and the pixel transistor region Rb on the right side in FIG. 43 is arranged with a reset transistor RST. The pixel sharing scheme, transistor arrangement, embedded photodiode structure, and the like shown in FIG. 43 are merely examples and are not limited thereto.

[0189] Alternatively, the image sensor 100 shown in FIG. 44 may be arranged (repeatedly arranged) as shown in FIG. 45, with one selection transistor SEL, one amplification transistor AMP, one reset transistor RST, and one FD transfer transistor FDG arranged in each pixel transistor region Ra, Rb of each image sensor 100. The FD transfer transistor FDG is used to switch the conversion efficiency. The arrangement of each transistor may be uniform or uneven for each pixel transistor region Ra, Rb. For example, multiple amplification transistors AMP may be arranged for four image sensors 100, and these amplification transistors AMP may be arranged in parallel.

[0190] <<8. Camera Application Example>> The technology according to the present disclosure (the present technology) can be further applied to various products. For example, the technology according to the present disclosure may be applied to a camera or the like. Therefore, with reference to FIG. 46, a configuration example of a camera 700 as an electronic device to which the present technology is applied will be described. FIG. 46 is an explanatory diagram showing an example of a schematic functional configuration of a camera 700 to which the technology according to the present disclosure (the present technology) can be applied.

[0191] As shown in FIG. 46, the camera 700 includes an imaging device 702, an optical lens 710, a shutter mechanism 712, a drive circuit unit 714, and a signal processing circuit unit 416. The optical lens 710 focuses image light (incident light) from a subject on the imaging surface of the imaging device 702. This causes signal charges to accumulate in the image sensor 100 of the imaging device 702 for a certain period of time. The shutter mechanism 712 opens and closes to control the light irradiation period and light blocking period of the imaging device 702. The drive circuit unit 714 supplies drive signals to the imaging device 702 that control the signal transfer operation and the shutter operation of the shutter mechanism 712. In other words, the imaging device 702 transfers signals based on the drive signals (timing signals) supplied from the drive circuit unit 714. The signal processing circuit unit 416 performs various signal processing. For example, the signal processing circuit unit 416 outputs the processed video signal to a storage medium (not shown) such as a memory, or to a display unit (not shown).

[0192] <<9. Smartphone Application Examples>> The technology according to the present disclosure (the present technology) can be further applied to various products. For example, the technology according to the present disclosure may be applied to a smartphone or the like. Therefore, with reference to Fig. 47, a configuration example of a smartphone 900 as an electronic device to which the present technology is applied will be described. Fig. 47 is a block diagram showing an example of a schematic functional configuration of a smartphone 900 to which the technology according to the present disclosure (the present technology) can be applied.

[0193] 47, the smartphone 900 includes a CPU (Central Processing Unit) 901, a ROM (Read Only Memory) 902, and a RAM (Random Access Memory) 903. The smartphone 900 also includes a storage device 904, a communication module 905, and a sensor module 907. The smartphone 900 also includes an imaging device 909, a display device 910, a speaker 911, a microphone 912, an input device 913, and a bus 914. The smartphone 900 may also include a processing circuit such as a DSP (Digital Signal Processor) instead of or in addition to the CPU 901.

[0194] The CPU 901 functions as an arithmetic processing device and a control device, and controls all or part of the operations of the smartphone 900 in accordance with various programs recorded in the ROM 902, the RAM 903, the storage device 904, or the like. The ROM 902 stores programs and calculation parameters used by the CPU 901. The RAM 903 temporarily stores programs used in the execution of the CPU 901 and parameters that change as appropriate during the execution. The CPU 901, the ROM 902, and the RAM 903 are interconnected by a bus 914. The storage device 904 is a data storage device configured as an example of a storage unit of the smartphone 900. The storage device 904 is configured, for example, by a magnetic storage device such as an HDD (Hard Disk Drive), a semiconductor storage device, an optical storage device, or the like. The storage device 904 stores the programs and various data executed by the CPU 901, as well as various data acquired from the outside.

[0195] The communication module 905 is, for example, a communication interface configured with a communication device for connecting to a communication network 906. The communication module 905 may be, for example, a communication card for a wired or wireless local area network (LAN), Bluetooth (registered trademark), or wireless USB (WUSB). The communication module 905 may also be a router for optical communication, a router for asymmetric digital subscriber line (ADSL), or a modem for various types of communication. The communication module 905 transmits and receives signals, for example, between the Internet and other communication devices using a predetermined protocol such as TCP (Transmission Control Protocol) / IP (Internet Protocol). The communication network 906 connected to the communication module 905 is a network connected by wire or wirelessly, for example, the Internet, a home LAN, infrared communication, or satellite communication.

[0196] The sensor module 907 includes various sensors such as a motion sensor (e.g., an acceleration sensor, a gyro sensor, a geomagnetic sensor, etc.), a biometric sensor (e.g., a pulse sensor, a blood pressure sensor, a fingerprint sensor, etc.), or a position sensor (e.g., a GNSS (Global Navigation Satellite System) receiver, etc.).

[0197] The imaging device 909 is provided on the surface of the smartphone 900 and can capture an image of an object located on the back or front side of the smartphone 900. In particular, the imaging device 909 can include an imaging element (not shown) such as a CMOS (Complementary MOS) image sensor to which the technology according to the present disclosure (the present technology) can be applied, and a signal processing circuit (not shown) that performs imaging signal processing on a signal photoelectrically converted by the imaging element. Furthermore, the imaging device 909 can further include an optical system mechanism (not shown) including an imaging lens, a zoom lens, a focus lens, and the like, and a drive system mechanism (not shown) that controls the operation of the optical system mechanism. The imaging element collects incident light from an object as an optical image, and the signal processing circuit photoelectrically converts the formed optical image on a pixel-by-pixel basis, reads out the signal of each pixel as an imaging signal, and performs image processing to obtain a captured image.

[0198] The display device 910 is provided on the surface of the smartphone 900, and can be, for example, a display device such as an LCD (Liquid Crystal Display) or an organic EL (Electro Luminescence) display. The display device 910 can display an operation screen, captured images acquired by the above-described imaging device 909, and the like.

[0199] The speaker 911 can output, for example, a call voice, a voice accompanying the video content displayed by the display device 910 described above, and the like to the user.

[0200] The microphone 912 can collect, for example, the user's call voice, voice including a command to activate a function of the smartphone 900, and voice from the surrounding environment of the smartphone 900.

[0201] The input device 913 is a device operated by a user, such as a button, a keyboard, a touch panel, or a mouse. The input device 913 includes an input control circuit that generates an input signal based on information input by the user and outputs the signal to the CPU 901. By operating the input device 913, the user can input various data to the smartphone 900 and instruct processing operations.

[0202] The above describes an example of the configuration of the smartphone 900. Each of the above components may be configured using general-purpose components, or may be configured using hardware specialized for the function of each component. Such a configuration may be changed as appropriate depending on the technical level at the time of implementation.

[0203] <<10. Application example to endoscopic surgery system>> The technology according to the present disclosure (the present technology) can be further applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0204] FIG. 48 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0205] Figure 48 shows an operator (doctor) 11131 performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical instruments 11110 such as an insufflation tube 11111 and an energy treatment instrument 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0206] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the example shown, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible scope having a flexible lens barrel.

[0207] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens towards an object to be observed inside the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0208] An optical system and an image sensor are provided inside the camera head 11102, and light reflected from the object of observation (observation light) is collected onto the image sensor by the optical system. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The image signal is sent to a camera control unit (CCU) 11201 as RAW data.

[0209] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102, and performs various image processing on the image signal, such as development processing (demosaic processing), to display an image based on the image signal.

[0210] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0211] The light source device 11203 is configured from a light source such as an LED (Light Emitting Diode), and supplies irradiation light to the endoscope 11100 when photographing an operation site or the like.

[0212] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiating light, magnification, focal length, etc.) of the endoscope 11100.

[0213] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 inflates the body cavity of the patient 11132 through the insufflation tube 11111 in order to ensure a clear field of view for the endoscope 11100 and a working space for the surgeon. The recorder 11207 is a device capable of recording various types of information related to the surgery. The printer 11208 is a device capable of printing various types of information related to the surgery in various formats such as text, images, or graphs.

[0214] The light source device 11203 that supplies illumination light to the endoscope 11100 when photographing the surgical site can be configured from a white light source configured from, for example, an LED, a laser light source, or a combination of these. When the white light source is configured from a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, making it possible to adjust the white balance of the captured image in the light source device 11203. In this case, it is also possible to capture images corresponding to each RGB color in a time-division manner by irradiating the object of observation with laser light from each RGB laser light source in a time-division manner and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter to the image sensor.

[0215] Furthermore, the light source device 11203 may be controlled to change the intensity of light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity to acquire images in a time-division manner and combining the images, it is possible to generate an image with a high dynamic range that is free of so-called blocked-up shadows and blown-out highlights.

[0216] The light source device 11203 may also be configured to supply light in a predetermined wavelength band corresponding to special light observation. Special light observation, for example, utilizes the wavelength dependence of light absorption in body tissues to irradiate light with a narrower band than the light irradiated during normal observation (i.e., white light), thereby capturing high-contrast images of specific tissues, such as blood vessels on the surface of mucous membranes, known as narrow-band imaging. Alternatively, special light observation may be performed using fluorescence observation, in which images are obtained using fluorescence generated by irradiating excitation light. Fluorescence observation can involve irradiating excitation light onto body tissues and observing the fluorescence from the tissues (autofluorescence observation), or locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow-band light and / or excitation light corresponding to such special light observation.

[0217] FIG. 49 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0218] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other by a transmission cable 11400 so that they can communicate with each other.

[0219] The lens unit 11401 is an optical system provided at the connection point with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses including a zoom lens and a focus lens.

[0220] The imaging unit 11402 is configured with an imaging element. The imaging element constituting the imaging unit 11402 may be one (a so-called single-chip type) or multiple (a so-called multi-chip type). When the imaging unit 11402 is configured with a multi-chip type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining these signals. Alternatively, the imaging unit 11402 may be configured with a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to 3D (dimensional) display. 3D display enables the surgeon 11131 to more accurately grasp the depth of the biological tissue at the surgical site. Note that when the imaging unit 11402 is configured with a multi-chip type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0221] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately after the objective lens.

[0222] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted appropriately.

[0223] The communication unit 11404 is configured by a communication device for transmitting and receiving various types of information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0224] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201 and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of imaging, and / or information specifying the magnification and focus of the captured image.

[0225] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by the user, or may be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 is equipped with so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0226] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404 .

[0227] The communication unit 11411 is configured by a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0228] Furthermore, the communication unit 11411 transmits to the camera head 11102 a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0229] The image processing unit 11412 performs various image processing operations on the image signal, which is RAW data sent from the camera head 11102 .

[0230] The control unit 11413 performs various controls related to the imaging of the surgical site, etc. by the endoscope 11100 and the display of the captured image obtained by imaging the surgical site, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0231] Furthermore, the control unit 11413 causes the display device 11202 to display a captured image showing the surgical site, etc., based on the image signal that has been image processed by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical tools such as forceps, specific biological parts, bleeding, mist generated when using the energy treatment tool 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When displaying the captured image on the display device 11202, the control unit 11413 may use the recognition results to superimpose various surgical support information on the image of the surgical site. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0232] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for communication of electrical signals, an optical fiber for optical communication, or a composite cable of these.

[0233] In the illustrated example, communication is performed by wire using the transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0234] The above describes an example of an endoscopic surgery system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to, for example, the endoscope 11100, the camera head 11102 (the imaging unit 11402), the CCU 11201 (the image processing unit 11412), etc., among the above-described configurations.

[0235] Although an endoscopic surgery system has been described as an example here, the technology disclosed herein may also be applied to other systems, such as a microsurgery system.

[0236] <<11. Mobile Application Examples>> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0237] FIG. 50 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0238] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 50, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (interface) 12053.

[0239] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, a braking device for generating a braking force of the vehicle, etc.

[0240] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches may be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0241] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc., based on the received images.

[0242] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0243] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0244] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drivetrain control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including avoiding or mitigating collisions between vehicles, following based on the distance between vehicles, maintaining vehicle speed, warning of vehicle collisions, or warning of vehicle lane departure.

[0245] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0246] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information about the outside of the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control for the purpose of preventing glare, such as switching from high beams to low beams.

[0247] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying information to vehicle occupants or the outside of the vehicle. In the example of Fig. 50, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as output devices. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0248] FIG. 51 is a diagram showing an example of the installation position of the imaging unit 12031.

[0249] In FIG. 51, a vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as the imaging unit 12031.

[0250] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided at the front nose and the imaging unit 12105 provided at the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided at the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided at the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The forward images acquired by the imaging units 12101 and 12105 are mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0251] 51 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, a bird's-eye view image of the vehicle 12100 viewed from above can be obtained.

[0252] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera made up of multiple imaging elements, or may be an imaging element having pixels for phase difference detection.

[0253] For example, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104, thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (for example, 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of automatic driving, which runs autonomously without relying on driver operation.

[0254] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the degree of risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drivetrain control unit 12010.

[0255] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the images captured by the image capturing units 12101 to 12104. The pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104, which are infrared cameras, and then performing pattern matching on a series of feature points that indicate the outline of an object to determine whether or not the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0256] The above describes an example of a vehicle control system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to, for example, the image capture unit 12031 and the like among the above-described configurations.

[0257] <<12. Supplementary Information>> Although the preferred embodiments of the present disclosure have been described in detail above with reference to the accompanying drawings, the technical scope of the present disclosure is not limited to such examples. It is clear that a person skilled in the art of the present disclosure can conceive of various modifications or alterations within the scope of the technical ideas described in the claims, and it is understood that these also naturally fall within the technical scope of the present disclosure. Furthermore, the above-described embodiments and modifications can also be implemented in combination with each other.

[0258] Furthermore, the effects described herein are merely descriptive or exemplary and are not limiting. In other words, the technology according to the present disclosure may achieve other effects that will be apparent to those skilled in the art from the description of this specification, in addition to or in place of the above-described effects.

[0259] The present technology can also be configured as follows. (1) a semiconductor substrate; a plurality of image pickup elements arranged in a matrix on the semiconductor substrate along a first direction and a second direction, the image pickup elements performing photoelectric conversion on incident light; Equipped with Each of the plurality of imaging elements a plurality of pixels provided adjacent to each other within a predetermined unit region of the semiconductor substrate, each pixel having a photoelectric conversion unit containing a first conductivity type impurity; a separation unit that separates the plurality of pixels; two first element isolation walls provided along two first side surfaces of the predetermined unit region extending in the second direction so as to penetrate at least a part of the semiconductor substrate; an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels; a first diffusion region provided in the semiconductor substrate around the first element isolation wall and the isolation portion, the first diffusion region including impurities of a second conductivity type opposite to the first conductivity type; An imaging device comprising: (2) The imaging device described in (1) above, wherein the imaging element is provided within the semiconductor substrate around two second side surfaces extending along the first direction of the specified unit area, and further has a second diffusion region containing impurities of the second conductivity type. (3) The imaging device according to (2) above, wherein at least a portion of the second diffusion region contains impurities of the second conductivity type at a higher concentration than the first diffusion region. (4) The imaging device according to (2) or (3) above, wherein the imaging element further has a second element isolation wall provided along the second side surface between the first element isolation wall and the isolation portion. (5) The imaging element is two third element isolation walls provided along two second side surfaces of the predetermined unit region extending in the first direction so as to penetrate at least a part of the semiconductor substrate; a third diffusion region provided in the semiconductor substrate around the third element isolation wall and containing the second conductivity type impurity; further comprising further comprising The imaging device according to (1) above. (6) The imaging device according to (5) above, wherein the width of the third element isolation wall is narrower than the width of the first element isolation wall when viewed from above the light receiving surface. (7) The imaging device according to (5) or (6) above, wherein the third element isolation wall is provided along the thickness direction of the semiconductor substrate so as to penetrate the semiconductor substrate from the surface opposite the light receiving surface. (8) The imaging device described in any one of (2) to (6) above, wherein the first element isolation wall is provided along the thickness direction of the semiconductor substrate so as to penetrate the semiconductor substrate from the surface opposite the light receiving surface. (9) the first direction is a row direction of the plurality of image pickup elements arranged in a matrix, the second direction is a column direction of the plurality of image pickup elements arranged in the matrix. The imaging device according to any one of (2) to (8) above. (10) The imaging device described in any one of (2) to (9) above, wherein the separation portion is composed of a first pixel separation wall extending along the second direction so as to separate the plurality of pixels and provided so as to penetrate the semiconductor substrate. (11) the first pixel separation wall has two pixel separation regions separated by a slit, The first diffusion region is located within the slit. The imaging device according to (10) above. (12) the slit is provided so as to be positioned at the center of the image sensor when viewed from above the light receiving surface. The imaging device according to (11) above. (13) Each pixel is a transfer gate electrode that transfers charges generated in the photoelectric conversion portion; a charge storage unit that stores charges from the photoelectric conversion unit; and the charge accumulation portion is provided in the vicinity of a first intersection where one of the third element isolation walls and the isolation portion intersect, when viewed from above on a surface of the semiconductor substrate facing the light-receiving surface. The imaging device according to (5) above. (14) The imaging device according to (13) above, wherein the transfer gate electrode is provided adjacent to the first element isolation wall and extending along the first element isolation wall when viewed from above the surface. (15) The imaging device described in (14) above, wherein the transfer gate electrode is provided near a second intersection where the third element isolation wall, which forms the first intersection, intersects with the first element isolation wall when viewed from above the surface. (16) The imaging device according to any one of (13) to (15) above, wherein the transfer gate electrode has one or more buried electrode portions buried in the semiconductor substrate. (17) The imaging device described in (10) above, wherein the first pixel isolation wall is arranged to be shorter than the first element isolation wall in the second direction when viewed from above the light receiving surface. (18) The imaging device described in any one of (1) to (6) above, wherein the separation portion is composed of a second pixel separation wall extending along the second direction so as to separate the plurality of pixels and provided so as to penetrate from the surface opposite the light receiving surface to partway through the semiconductor substrate along the thickness direction of the semiconductor substrate. (19) The imaging device according to any one of (1) to (9) above, wherein the separation section is made of a fourth diffusion region containing impurities of the second conductivity type. (20) a semiconductor substrate; a plurality of image pickup elements arranged in a matrix on the semiconductor substrate along a first direction and a second direction, the image pickup elements performing photoelectric conversion on incident light; an imaging device having Each of the plurality of imaging elements a plurality of pixels provided adjacent to each other within a predetermined unit region of the semiconductor substrate, each pixel having a photoelectric conversion unit containing a first conductivity type impurity; a separation unit that separates the plurality of pixels; two first element isolation walls provided along two first side surfaces of the predetermined unit region extending in the second direction so as to penetrate at least a part of the semiconductor substrate; an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels; a first diffusion region provided in the semiconductor substrate around the first element isolation wall and the isolation portion, the first diffusion region including impurities of a second conductivity type opposite to the first conductivity type; An electronic device having: [Explanation of symbols]

[0260] 1. Imaging device 10, 11, 20A, 21A, 30, 31, 45, 80, 81, 211, 212, 213 boards 10a Photosensitive surface 10b surface 20 Pixel array section 21 Vertical drive circuit section 22 Column signal processing circuit section 22A Readout circuit 23 Horizontal drive circuit section 24 Output circuit section 25 Control circuit section 26 Pixel drive wiring 27 Vertical signal line 28 horizontal signal line 29 Input / output terminal 31b back side 32, 46 well area 33, 47 Source / drain region 34, 35 Semiconductor area 36, 48 Gate electrode 38 Element isolation region 39, 49, 61, 87 Interlayer insulating film 40, 53 Wiring 41, 55 Multilayer wiring layer 42 well layer 44, 51, 54, 244, 254, 344 Connecting conductor 52,63 Insulating film 56, 62 wiring layer 57, 86, 88, 89, 92 Insulation layer 58, 64 Pad electrodes 73 Planarization film 74, 202 color filters 75, 200 On-chip lens 77 Aperture 78 Electrode bump 82 Logic Circuits 84 Through-connecting conductor 234 PD 85 Through-hole 90 Through-wiring 91 Connection wiring 100 image sensor 204, 204a, 204b Light shielding part 265, 311 Contact 280a, 330a pads 300a, 300b pixels 302 Photoelectric conversion unit 304 Protrusion 306, 306c, 306d, 306e, 306h, 320 Diffusion Area 310, 310a, 310b, 340 element isolation wall 312 Slit 334, 334b ​​Pixel separation wall 400a, 400b Transfer gates 402 Embedded electrode part 601 FD Department 602 Ground Section 750 Trench 752 Mask

Claims

1. a semiconductor substrate; a plurality of image pickup elements arranged in a matrix on the semiconductor substrate along a first direction and a second direction, the image pickup elements performing photoelectric conversion on incident light; Equipped with Each of the plurality of imaging elements a plurality of pixels provided adjacent to each other within a predetermined unit region of the semiconductor substrate, each pixel having a photoelectric conversion unit containing a first conductivity type impurity; a separation unit that separates the plurality of pixels; two first element isolation walls provided along two first side surfaces of the predetermined unit region extending in the second direction so as to penetrate at least a part of the semiconductor substrate; an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels; a first diffusion region provided in the semiconductor substrate around the first element isolation wall and the isolation portion, the first diffusion region including impurities of a second conductivity type opposite to the first conductivity type; a second diffusion region provided in the semiconductor substrate around two second side surfaces of the predetermined unit region extending along the first direction, the second diffusion region including the second conductivity type impurity; and At least a portion of the second diffusion region contains a higher concentration of impurities of the second conductivity type than the first diffusion region; the separation portion includes a first pixel separation wall extending along the second direction so as to separate the plurality of pixels and provided so as to penetrate the semiconductor substrate; the first pixel separation wall has two pixel separation regions separated by a slit, The first diffusion region is located within the slit, the slit is provided so as to be positioned at the center of the image sensor when viewed from above the light receiving surface. Imaging device.

2. The imaging device according to claim 1 , wherein the imaging element further comprises a second element isolation wall provided along the second side surface between the first element isolation wall and the isolation portion.

3. A semiconductor substrate; a plurality of image pickup elements arranged in a matrix on the semiconductor substrate along a first direction and a second direction, the image pickup elements performing photoelectric conversion on incident light; Equipped with Each of the plurality of imaging elements a plurality of pixels provided adjacent to each other within a predetermined unit region of the semiconductor substrate, each pixel having a photoelectric conversion unit containing a first conductivity type impurity; a separation unit that separates the plurality of pixels; two first element isolation walls provided along two first side surfaces of the predetermined unit region extending in the second direction so as to penetrate at least a part of the semiconductor substrate; an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels; a first diffusion region provided in the semiconductor substrate around the first element isolation wall and the isolation portion, the first diffusion region including impurities of a second conductivity type opposite to the first conductivity type; two third element isolation walls provided along two second side surfaces of the predetermined unit region extending in the first direction so as to penetrate at least a part of the semiconductor substrate; a third diffusion region provided in the semiconductor substrate around the third element isolation wall and containing impurities of the second conductivity type; and When viewed from above the light-receiving surface, the width of the third element isolation wall is narrower than that of the first element isolation wall, the separation portion includes a first pixel separation wall extending along the second direction so as to separate the plurality of pixels and provided so as to penetrate the semiconductor substrate; the first pixel separation wall has two pixel separation regions separated by a slit, The first diffusion region is located within the slit, the slit is provided so as to be positioned at the center of the image sensor when viewed from above the light receiving surface. Imaging device.

4. The imaging device according to claim 3 , wherein the third element isolation wall is provided along a thickness direction of the semiconductor substrate so as to penetrate the semiconductor substrate from a surface opposite to the light receiving surface.

5. 4. The imaging device according to claim 1, wherein the first element isolation wall is provided along a thickness direction of the semiconductor substrate so as to penetrate the semiconductor substrate from a surface opposite to the light receiving surface.

6. the first direction is a row direction of the plurality of image pickup elements arranged in a matrix, the second direction is a column direction of the plurality of image pickup elements arranged in the matrix. The imaging device according to any one of claims 1 to 5.

7. a semiconductor substrate; a plurality of image pickup elements arranged in a matrix on the semiconductor substrate along a first direction and a second direction, the image pickup elements performing photoelectric conversion on incident light; an imaging device having Each of the plurality of imaging elements a plurality of pixels provided adjacent to each other within a predetermined unit region of the semiconductor substrate, each pixel having a photoelectric conversion unit containing a first conductivity type impurity; a separation unit that separates the plurality of pixels; two first element isolation walls provided along two first side surfaces of the predetermined unit region extending in the second direction so as to penetrate at least a part of the semiconductor substrate; an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels; a first diffusion region provided in the semiconductor substrate around the first element isolation wall and the isolation portion, the first diffusion region including impurities of a second conductivity type opposite to the first conductivity type; a second diffusion region provided in the semiconductor substrate around two second side surfaces of the predetermined unit region extending along the first direction, the second diffusion region including the second conductivity type impurity; and At least a portion of the second diffusion region contains a higher concentration of impurities of the second conductivity type than the first diffusion region; the separation portion includes a first pixel separation wall extending along the second direction so as to separate the plurality of pixels and provided so as to penetrate the semiconductor substrate; the first pixel separation wall has two pixel separation regions separated by a slit, The first diffusion region is located within the slit, the slit is provided so as to be positioned at the center of the image sensor when viewed from above the light receiving surface. electronic equipment.

Images