Method for manufacturing heteroepitaxial substrate
By manufacturing a thicker silicon single crystal substrate and subsequently thinning it to meet SEMI standards after heteroepitaxial layer growth, the method addresses warping and cracking issues, enabling use in existing semiconductor processes.
Patent Information
- Application Number
- JP2022190167
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-11-29
- Publication Date
- 2026-02-03
- Estimated Expiration
- 2042-11-29
AI Technical Summary
Existing methods for forming heteroepitaxial layers on silicon single crystal substrates face issues with warping and cracking due to differences in lattice constant and linear expansion coefficients, leading to substrates that exceed SEMI standards and cannot be used in subsequent device processes, necessitating costly dedicated equipment modifications.
A method involving manufacturing a silicon single crystal substrate thicker than the standard, growing a heteroepitaxial layer, and then thinning the substrate to meet SEMI standards, thereby suppressing warping and cracking, allowing compatibility with existing device processes.
Enables heteroepitaxial growth without cracking, making the substrate adaptable to existing semiconductor device processes while maintaining compatibility with standard equipment.
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Abstract
Description
[Technical Field]
[0001] The present invention relates to a method for producing a heteroepitaxial substrate. [Background technology]
[0002] The technology of forming various heteroepitaxial layers, including diamond, on silicon single crystal substrates is a very effective method for growing expensive materials on inexpensive silicon, enabling low cost and large diameter growth. However, since a material different from silicon is grown, the lattice constant and linear expansion coefficient differ from those of silicon, which causes stress in the substrate after epitaxial growth. This stress can cause the substrate to warp or, in the worst case, crack and break.
[0003] Therefore, methods have been proposed to ensure the strength of silicon by adjusting the content of light elements in the substrate (Patent Documents 1 to 3), but in addition to methods of adjusting the content, methods have also been proposed to control (basically make thicker) the thickness of the silicon single crystal substrate itself. For example, Patent Document 4 states that when a diamond layer is formed on a silicon single crystal substrate to form a composite substrate, the lower limit of the thickness of the silicon support substrate is preferably 0.05 mm or more, more preferably 0.2 mm or more, and the upper limit of the thickness is 5 mm or less.
[0004] Furthermore, Patent Document 5 proposes a silicon single crystal substrate having a thickness of 0.3 to 2 mm, Patent Document 6 proposes a base material for growing single crystal diamond, the silicon single crystal substrate having a thickness of at least 0.03 mm to 20.00 mm, Patent Document 7 proposes a base material made of single crystal silicon (Si) having a thickness of 0.03 mm or more and 20.00 mm or less, Patent Document 8 proposes a diamond formation structure for forming single crystal diamond and a method for manufacturing said structure, the base substrate having a thickness of approximately 0.01 to 15 mm, and Patent Document 9 proposes a silicon substrate for growing a free-standing diamond film having a thickness of 4 mm or more or 2 mm or more. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] Japanese Patent Application Publication No. 2020-102598 [Patent Document 2] Japanese Patent Publication No. 2022-124012 [Patent Document 3] Japanese Patent Application Laid-Open No. 2002-261011 [Patent Document 4] International Publication No. 2019 / 039533 [Patent Document 5] Japanese Patent Application Laid-Open No. 2009-238971 [Patent Document 6] Japanese Patent Application Laid-Open No. 2011-079683 [Patent Document 7] Japanese Patent Application Laid-Open No. 2012-001394 [Patent Document 8] Japanese Patent Publication No. 2022-068862 [Patent Document 9] International Publication No. 2016 / 168796 Summary of the Invention [Problem to be solved by the invention]
[0006] As mentioned above, there have been proposals to suppress warping and cracking by focusing on the thickness of the silicon single crystal substrate when heteroepitaxial growth is performed on a silicon single crystal substrate. However, if the thickness of the silicon single crystal substrate is increased, the resulting substrate will have a thickness that differs from the SEMI standard for each diameter for silicon devices. Substrates that do not meet the standard thickness cannot be used in existing device processes. Even if a heteroepitaxial layer can be formed, the difference in thickness prevents them from being used in subsequent processes, such as using diamond and other materials in devices or bonding processes, posing a major problem for their use in semiconductor devices. This is because when epitaxial substrates are fed into semiconductor device manufacturing equipment used in subsequent processes after heteroepitaxial growth, the manufacturing equipment is designed to only feed epitaxial substrates with dimensions specified by the SEMI standard. While it is theoretically possible to create dedicated processes for thick film substrates made of diamond or various other materials, preparing equipment for various processes solely for processing thick film substrates would result in enormous increases in costs and is therefore unrealistic.
[0007] The present invention has been made to solve the above problems, and aims to provide a method for manufacturing a heteroepitaxial substrate that can be used in existing device processes even when a heteroepitaxial layer is formed on a silicon single crystal substrate with a thickness greater than the standard. [Means for solving the problem]
[0008] The present invention relates to a technology relating to a silicon single crystal substrate used for heteroepitaxial growth, including diamond growth on a silicon single crystal substrate. More specifically, the present invention relates to a technology that optimizes the thickness of the silicon single crystal substrate to suppress cracking of the wafer during heteroepitaxial growth, and enables the epitaxial substrate after growth of the heteroepitaxial layer to be used in existing device processes. Specifically, the present invention has been made to achieve the above-mentioned object, and provides a method for manufacturing a heteroepitaxial substrate, comprising: a substrate manufacturing process for manufacturing a silicon single crystal substrate under thickness conditions that exceed the upper limit of the thickness standard established corresponding to its diameter and are 2 mm or less; an epitaxial process for growing a heteroepitaxial layer on the silicon single crystal substrate obtained in the substrate manufacturing process to obtain an epitaxial substrate; and a thinning process for grinding the surface of the silicon single crystal substrate after the epitaxial process opposite to the surface on which the heteroepitaxial layer is formed, to thin the silicon single crystal substrate to within the thickness standard.
[0009] In this method, a thicker silicon single crystal substrate for heteroepitaxial growth, such as diamond, on a silicon single crystal substrate is prepared, exceeding the upper limit of the thickness standard (i.e., a silicon single crystal substrate with higher rigidity than those within the thickness standard), and this substrate is used to grow a heteroepitaxial layer of diamond or other heteroepitaxial material, thereby suppressing warping and cracking. After the heteroepitaxial layer is grown, the surface of the silicon single crystal substrate opposite to the surface on which the heteroepitaxial layer is formed is thinned to the thickness standard specified for each diameter by processing such as grinding and polishing, thereby enabling the silicon single crystal substrate to be incorporated into existing device processes. This makes it possible to manufacture heteroepitaxial substrates, including diamond, that are compatible with existing silicon processes while suppressing warping and cracking, and even if the thickness of the silicon single crystal substrate is made thicker than the standard to form a heteroepitaxial layer, it will be possible to incorporate it into existing device processes.
[0010] The epitaxial step may be a step of growing a heteroepitaxial layer of any one of GaN, AlN, and diamond. By using GaN as the material for the heteroepitaxial layer, the resulting semiconductor device will have a higher breakdown voltage and a faster electron saturation velocity than silicon semiconductor devices.By using AlN or diamond as the material for the heteroepitaxial layer, the resulting semiconductor device will have an extremely higher breakdown voltage than silicon semiconductor devices.
[0011] Before carrying out the substrate manufacturing process, a thickness determination process may be carried out in which a relationship between the thickness of the silicon single crystal substrate and the thickness of the heteroepitaxial layer at which the epitaxial substrate will not crack after the epitaxial process is determined in advance, and the thickness of the silicon single crystal substrate to be manufactured in the substrate manufacturing process and the thickness of the heteroepitaxial layer to be grown in the epitaxial process are determined from the determined relationship. In this configuration, the thickness of the silicon single crystal substrate and the thickness of the heteroepitaxial layer are determined in advance based on the relationship between the thickness of the silicon single crystal substrate and the thickness of the heteroepitaxial layer at which the epitaxial substrate can grow without cracking, so that the thicknesses of the silicon single crystal substrate and the heteroepitaxial layer can be set to thicknesses that are necessary and sufficient to prevent the epitaxial substrate from cracking. [Effects of the Invention]
[0012] The configuration of the present invention enables heteroepitaxial growth without cracking the epitaxial substrate, even when growing a heteroepitaxial layer on a large-diameter silicon single crystal substrate, and also makes the substrate adaptable to manufacturing processes for semiconductor devices of existing standards. More specifically, even if a heteroepitaxial layer is formed on a silicon single crystal substrate with a thickness greater than the standard, the substrate can be subsequently introduced into existing device processes. [Brief explanation of the drawings]
[0013] [Figure 1] 1 shows a schematic diagram of an epitaxial substrate manufactured by the heteroepitaxial substrate manufacturing method of the present invention. [Figure 2]1 shows an outline of the flow of a method for producing a heteroepitaxial substrate according to the present invention. DETAILED DESCRIPTION OF THE INVENTION
[0014] As described above, there has been a demand for a method for manufacturing a heteroepitaxial substrate that can be used in existing device processes even when a heteroepitaxial layer is formed on a silicon single crystal substrate with a thickness greater than the thickness specification.
[0015] As a result of extensive research into the above-mentioned problems, the present inventors have found that a method for manufacturing a heteroepitaxial substrate, comprising: a substrate manufacturing step of manufacturing a silicon single crystal substrate to a thickness of 2 mm or less, exceeding the upper limit of the thickness standard established for the diameter of the silicon single crystal substrate; an epitaxial step of growing a heteroepitaxial layer on the silicon single crystal substrate obtained in the substrate manufacturing step to obtain an epitaxial substrate; and a thinning step of grinding the surface of the silicon single crystal substrate after the epitaxial step opposite to the surface on which the heteroepitaxial layer is formed, to thin the silicon single crystal substrate to within the thickness standard, thereby making it possible to incorporate the silicon single crystal substrate into existing device processes, and have completed the present invention.
[0016] Hereinafter, embodiments of the present invention will be described with reference to the drawings, but the present invention is not limited to these. First, with reference to FIG. 1, a brief description will be given of the configuration of an epitaxial substrate 5 manufactured by a heteroepitaxial substrate manufacturing method according to an embodiment of the present invention.
[0017] As shown in FIG. 1, the heteroepitaxial substrate 5 includes a silicon single crystal substrate 1 and a heteroepitaxial layer 3 formed on one surface of the silicon single crystal substrate 1. The silicon single crystal substrate 1 is a silicon single crystal that serves as a support substrate when the heteroepitaxial layer 3 is grown, and its dimensions and shape can be selected appropriately depending on the material, dimensions, and shape of the heteroepitaxial layer 3 to be grown, but an example is a disk-shaped wafer.
[0018] The thickness t1 of this wafer, which corresponds to the diameter D1 (also called the aperture) in Figure 1, is defined by standards such as SEMI Standard M1. Therefore, semiconductor device manufacturing equipment used in post-processing after the formation of the heteroepitaxial layer 3 is also designed to be able to input only epitaxial substrates 5 with dimensions defined by the SEMI Standard. The diameters defined by the SEMI standard and the thickness standards defined corresponding to those diameters are, for example, as shown in Table 1 below.
[0019] [Table 1]
[0020] The heteroepitaxial layer 3 is the layer in which the semiconductor device is formed and is made of a heteroepitaxial material, ie a material other than silicon. The above is a brief description of the configuration of epitaxial substrate 5.
[0021] Next, a method for manufacturing a heteroepitaxial substrate according to an embodiment of the present invention will be described with reference to FIGS. First, a silicon single crystal substrate 1' is manufactured to a thickness exceeding the upper limit of the thickness standard established for its diameter, but equal to or less than 2 mm (S1 in Fig. 2, substrate manufacturing step). To manufacture a silicon single crystal substrate 1' that satisfies such a thickness condition, a silicon single crystal ingot can be sliced to cut out the silicon single crystal substrate 1' thick. This thickness condition is indicated as thickness t2 in FIG.
[0022] By setting the thickness condition to a thickness exceeding the upper limit of the thickness standard, the rigidity of the silicon single crystal substrate 1' becomes higher than when the thickness t2 of the silicon single crystal substrate 1' is within the thickness standard, thereby suppressing warping and cracking during growth of the heteroepitaxial layer 3. This point will be explained in detail.
[0023] For example, if the material of the heteroepitaxial layer 3 is diamond, as shown in Table 2, diamond has a different lattice constant and linear expansion coefficient from silicon single crystal, and therefore stress may be generated in the epitaxial substrate 5 after epitaxial growth, causing warping or, in the worst case, cracking.
[0024] [Table 2]
[0025] Warping and cracking also have adverse effects during epitaxial growth of diamond using CVD or the like. For example, warping of the epitaxial substrate 5 during epitaxial growth can easily change the temperature distribution of the epitaxial substrate 5 during growth, resulting in poor uniformity in film thickness and other factors. Furthermore, from the perspective of reactor management, it is not desirable to place a substrate that is likely to crack into a reactor and perform the epitaxial growth process. Therefore, by setting the thickness condition to thickness t2 exceeding the upper limit of the thickness standard, the rigidity of silicon single crystal substrate 1' becomes higher than when the thickness of silicon single crystal substrate 1' is thickness t1 within the thickness standard, and warping and cracking of epitaxial substrate 5 after growth and uneven film thickness during epitaxial growth can be suppressed. Furthermore, suppressing warping and cracking of epitaxial substrate 5 also makes it easier to manage the reactor. As long as the epitaxial substrate 5 after the epitaxial process does not crack, the thickness t2 of the silicon single crystal substrate 1' can be thinner than the thickness exceeding the upper limit of the thickness standard. However, in consideration of the flatness and rigidity of the silicon single crystal substrate 1', it is preferable that the thickness t2 exceed the upper limit of the thickness standard.
[0026] The reason for the thickness requirement of 2 mm or less is as follows. In the present invention, the thickness of the silicon single crystal substrate 1' is made thicker than the upper limit of the thickness standard to increase rigidity, thereby suppressing warping and cracking when the heteroepitaxial layer 3 is grown. Therefore, if one is simply concerned with growth while suppressing warping and cracking, the thicker the thickness t2 of the silicon single crystal substrate 1', the better. However, considering that the thicker the thickness t2, the more time and cost are required for processing to achieve the desired flatness of the silicon single crystal substrate 1' within the desired range, processing the edges, and subsequent thinning, it is easy to imagine that there is a limit to the upper limit of thickness t2.
[0027] Specifically, taking a 300mm diameter silicon single crystal substrate 1' as an example, the upper limit of thickness t2 is 2mm, taking into account the groove width of the storage box and the clearance of the equipment. This 2mm upper limit is the same for wafers of diameters other than 300mm. In the days of small diameters, when the diameter of silicon single crystal substrates 1' that could be produced was smaller than it is today, there were issues with the precision of the equipment, and the wafer thickness was certainly thinner than for a 300mm diameter, but a 2mm clearance was ensured in the storage box equipment. Therefore, it is preferable that the thickness t2 be set to 2 mm or less.
[0028] Next, a heteroepitaxial layer 3 is grown on the silicon single crystal substrate 1' obtained in the substrate manufacturing step to obtain an epitaxial substrate 5 (S2 in FIG. 2, epitaxial step). In the epitaxial step, a heteroepitaxial layer 3 is formed of a material different from silicon and capable of forming a desired device. For example, the epitaxial step is a step of growing a heteroepitaxial layer 3 made of any one of GaN, AlN, and diamond.
[0029] By growing GaN as the heteroepitaxial layer 3, a semiconductor device formed on the heteroepitaxial layer 3 will have a higher breakdown voltage and a faster electron saturation velocity than a silicon semiconductor device. By growing AlN or diamond as the heteroepitaxial layer 3, a semiconductor device formed on the heteroepitaxial layer 3 will have a much higher breakdown voltage than a silicon semiconductor device.
[0030] There are no particular restrictions on the method for growing the heteroepitaxial layer 3, and any method may be used as long as it can form the desired heteroepitaxial layer 3. For example, a known growth method such as CVD may be used. Figure 2 shows an example in which a process called seeding is performed, in which seed particles such as diamond are implanted in the substrate, and then the diamond heteroepitaxial layer 3 is grown by CVD. However, the heteroepitaxial layer 3 may also be grown by CVD after a process called scratching is performed, in which the substrate surface is roughened and damage is introduced to form growth nuclei.
[0031] Furthermore, the thickness of the heteroepitaxial layer 3 increases with increasing growth temperature and increasing growth time, and can therefore be adjusted by adjusting the growth temperature and growth time. The upper limit of the layer thickness is a thickness that will not cause the epitaxial substrate 5 to warp or crack due to stress caused by differences in the lattice constants and linear expansion coefficients of the silicon single crystal substrate 1' and the heteroepitaxial layer 3. The lower limit of the layer thickness may be a thickness that will allow the heteroepitaxial layer 3 to maintain its shape as a layer, enable device formation, and will not be lost during etching, polishing, etc.
[0032] After the epitaxial process is completed, the surface (back surface) of the silicon single crystal substrate 1' after the epitaxial process opposite to the surface on which the heteroepitaxial layer 3 is formed is ground to thin the silicon single crystal substrate 1' to within the thickness standard range, thereby obtaining the silicon single crystal substrate 1 (S3 in FIG. 2, thinning process).
[0033] Since the thickness t2 of the silicon single crystal substrate 1' of the epitaxial substrate 5 after the epitaxial process exceeds the upper limit of the thickness standard, it cannot be used in a semiconductor process as is. Therefore, by thinning the silicon single crystal substrate 1' to within the thickness standard determined for each diameter in the thinning process, the thickness of the epitaxial substrate 5 after the thinning process will be within the thickness standard, even if the heteroepitaxial layer 3 is formed with the silicon single crystal substrate 1' thicker than the standard. Therefore, the epitaxial substrate 5 can be used in existing device processes such as semiconductor processes.
[0034] The thickness t1 of the silicon single crystal substrate 1 after the thinning process shown in Fig. 1 is within the range of thickness standards such as SEMI standards. Considering the flatness of the silicon single crystal substrate 1, it is advantageous to set the lower limit of the thickness to the lower limit of the thickness standard corresponding to each current diameter. Furthermore, in order to enable application to existing device processes, the upper limit of the thickness t1 of the silicon single crystal substrate 1 after the thinning process is equal to or less than the upper limit of the thickness standard of the SEMI standard.
[0035] The methods for thinning are grinding, polishing, H + There are various techniques, including exfoliation by ion implantation, but they are not particularly limited. The quality of the silicon single crystal substrate 1, such as the glossiness of the surface opposite to the surface on which the heteroepitaxial layer 3 is formed, can be optimized by each process. Furthermore, the thickness of the epitaxial substrate 5 after thinning may be defined as the thickness t3 including the heteroepitaxial layer 3 grown on the surface, or may be defined as the thickness t1 of the silicon single crystal substrate 1. These definitions can be optimized by each process. In the following explanation, unless otherwise specified, an example will be given in which the thickness of the silicon single crystal substrate 1 in the epitaxial substrate 5 after thinning is defined as t1.
[0036] There is a relationship between the thickness of the silicon single crystal substrate 1' manufactured in the substrate manufacturing process and the thickness of the heteroepitaxial layer 3 that will not crack the epitaxial substrate 5 after the epitaxial process. Specifically, the thicker the silicon single crystal substrate 1', the thicker the heteroepitaxial layer 3 that will not crack the epitaxial substrate 5 after the epitaxial process.
[0037] Therefore, before carrying out the substrate manufacturing process, it is preferable to determine the relationship between the thickness of the silicon single crystal substrate 1' and the thickness of the heteroepitaxial layer 3 at which the epitaxial substrate 5 will not crack after the epitaxial process, and to determine the thickness of the silicon single crystal substrate 1' to be manufactured in the substrate manufacturing process and the thickness of the heteroepitaxial layer 3 to be grown in the epitaxial process from the determined relationship (S0 in Figure 2, thickness determination process).
[0038] In this configuration, the thickness of the silicon single crystal substrate 1' and the thickness of the heteroepitaxial layer 3 are determined in advance based on the relationship between the thickness of the silicon single crystal substrate 1' and the thickness of the heteroepitaxial layer 3 that will prevent the epitaxial substrate 5 from cracking after the epitaxial process. Therefore, the thickness of the silicon single crystal substrate 1' and the heteroepitaxial layer 3 can be set to an appropriate thickness that is necessary and sufficient to prevent the epitaxial substrate 5 from cracking. The above is the description of the method for producing a heteroepitaxial substrate according to the present invention.
[0039] Thus, according to the present invention, diamond of Warping and cracking are suppressed by preparing a thick substrate exceeding the upper limit of the thickness standard as the silicon single crystal substrate 1' for heteroepitaxial growth, including the above, and growing the heteroepitaxial layer 3. Furthermore, after growing the heteroepitaxial layer 3, the silicon single crystal substrate 1' is thinned to the thickness standard determined for each diameter, thereby enabling it to be used in existing device processes. Therefore, heteroepitaxial growth of diamond and other materials that is compatible with existing silicon processes becomes possible while suppressing warping and cracking, and even if the heteroepitaxial layer 3 is formed by making the silicon single crystal substrate 1' thicker than the standard, it can be used in existing device processes. [Example]
[0040] The present invention will be specifically explained below with reference to examples, but the present invention is not limited to these examples. The thickness of the silicon single crystal substrate 1' was increased beyond the standard thickness, a heteroepitaxial layer 3 was formed on the substrate, and the substrate was then thinned to produce an epitaxial substrate 5. The presence or absence of cracks was compared with the case where a heteroepitaxial layer 3 was formed on a silicon single crystal substrate 1' within the standard thickness range. The specific procedure was as follows.
[0041] First, in the substrate manufacturing process, a boron-doped high-resistivity silicon single crystal substrate (resistivity 100 Ω·cm) with a diameter of 300 mm and a surface orientation of (111) was prepared as silicon single crystal substrate 1'. The surface was ground with an #8000 grinding stone to roughen the silicon surface and introduce damage, which served as nuclei for diamond growth. Four different thicknesses of high-resistivity silicon single crystal substrates were prepared for silicon single crystal substrate 1': a substrate of 0.775 mm (comparison example), which is the normal thickness according to the SEMI standard for a 300 mm diameter, and substrates of 1 mm, 1.5 mm, and 2 mm (examples), which are thicker than the SEMI standard.
[0042] Next, for the epitaxial process, these substrates were placed in a hot filament CVD apparatus, and diamond epitaxial growth was carried out under the following conditions: filament temperature: 2200°C, H2 flow rate: 10 SLM, CH4 concentration: 3%, substrate temperature: 850°C, and pressure inside the apparatus: 5 Torr (666.612 Pa) for three deposition times of 2, 4, and 8 hours, in an attempt to manufacture epitaxial substrates 5. As a result, as shown in Table 3, when the growth time was long and the diamond heteroepitaxial layer 3 became thicker, some substrates cracked after the epitaxial process.
[0043] [Table 3]
[0044] Finally, in the thinning process, the silicon single crystal substrate 1' of the epitaxial substrate 5 that did not crack during the epitaxial process was thinned by grinding to 0.775±20 mm (775±20 μm), which is within the range of the SEMI standard, and no cracks occurred in the thinned epitaxial substrate 5.
[0045] From the above results, it was found that even for a silicon single crystal substrate 1' that would crack if a heteroepitaxial layer 3 were formed within the thickness standard, by growing the heteroepitaxial layer 3 to a thickness greater than the thickness standard and then thinning it to within the thickness standard, it is possible to suppress cracking and achieve a thickness that allows it to be used in existing device processes.
[0046] The present invention is not limited to the above-described embodiments, which are merely examples, and anything that has substantially the same configuration as the technical idea described in the claims of the present invention and that provides similar effects is included within the technical scope of the present invention. [Explanation of symbols]
[0047] 1...silicon single crystal substrate, 1'...silicon single crystal substrate, 3...heteroepitaxial layer, 5...epitaxial substrate.
Claims
1. a substrate manufacturing process for manufacturing a silicon single crystal substrate under a thickness condition that exceeds the upper limit of a thickness standard established corresponding to the diameter of the substrate and is 2 mm or less; an epitaxial step of growing a heteroepitaxial layer on the silicon single crystal substrate obtained in the substrate manufacturing step to obtain an epitaxial substrate; a thinning step of grinding the surface of the silicon single crystal substrate opposite to the surface on which the heteroepitaxial layer is formed after the epitaxial step to thin the silicon single crystal substrate to within the thickness standard range; Including, Before performing the substrate manufacturing process, A method for manufacturing a heteroepitaxial substrate, characterized by: determining in advance the relationship between the thickness of the silicon single crystal substrate and the thickness of the heteroepitaxial layer at which the epitaxial substrate will not crack after the epitaxial process; and performing a thickness determination process to determine, from the determined relationship, the thickness of the silicon single crystal substrate to be manufactured in the substrate manufacturing process and the thickness of the heteroepitaxial layer to be grown in the epitaxial process.
2. The epitaxial process includes:
2. The method for producing a heteroepitaxial substrate according to claim 1, wherein the heteroepitaxial layer is made of any one of GaN, AlN, and diamond.
Citation Information
Patent Citations
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JP1995249573A
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