Power module substrate and method for manufacturing power module substrate

Abstract

To provide a substrate for a power module capable of reducing parasitic inductance while suppressing deformation due to generation of thermal stress.SOLUTION: A substrate for a power module comprises: an insulation plate; a plurality of front surface patterns formed on a front surface of the insulation plate to be arranged adjacent to each other with a gap in between in a spreading direction of the insulation plate; power semiconductor elements connected to the front surface patterns; a plurality of back surface patterns formed on a back surface of the insulation plate to be arranged adjacent to each other with a gap in between in a spreading direction of the insulation plate; and a connection pattern arranged on the gap so as to fill the back surface in the gap between the back surface patterns adjacent to each other to electrically connect the back surface patterns adjacent to each other. Each of the back surface patterns overlaps with at least one front surface pattern with the insulation plate in between in a direction perpendicular to the insulation plate. The plurality of back surface patterns are formed so as to balance a thermal stress that acts on the plurality of front surface patterns.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present disclosure relates to a power module substrate and a method for manufacturing a power module substrate. [Background technology]

[0002] For example, Patent Document 1 discloses a power module semiconductor device in which a second plate layer acting as a heat sink disposed on the rear surface of a ceramic substrate is divided by grooves and resin-sealed by transfer molding. By filling the grooves formed in the second plate layer with sealing resin, warpage (deformation) of the entire module caused by differences in thermal stress between the resin and the ceramic substrate is reduced. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-157550 Summary of the Invention [Problem to be solved by the invention]

[0004] However, as the current flowing through the first plate layer (changes in magnetic flux density) changes, a back electromotive force is generated in the second plate layer, causing eddy currents to flow. Because the second plate layer is divided by grooves, the path of the eddy currents flowing through the second plate layer is obstructed. This may prevent the magnetic flux of the current flowing through the first plate layer and the magnetic flux of the eddy currents flowing through the second plate layer from canceling out smoothly. This may result in an increase in parasitic inductance.

[0005] The present disclosure has been made to solve the above-described problems, and aims to provide a power module substrate that can reduce parasitic inductance while suppressing deformation due to the occurrence of thermal stress, and a method for manufacturing a power module substrate. [Means for solving the problem]

[0006] In order to solve the above-described problems, a power module substrate according to the present disclosure includes an insulating plate; a plurality of front surface patterns formed on a front surface of the insulating plate and arranged adjacent to each other with a gap therebetween in an expanding direction of the insulating plate; a power semiconductor element connected to the front surface patterns; a plurality of back surface patterns formed on a rear surface of the insulating plate and arranged adjacent to each other with a gap therebetween in an expanding direction of the insulating plate; and a connection pattern arranged in the gap between adjacent back surface patterns so as to fill the rear surface in the gap, and electrically connecting the adjacent back surface patterns to each other, wherein each of the back surface patterns overlaps at least one of the plurality of front surface patterns with the insulating plate sandwiched therebetween in a direction perpendicular to the insulating plate, and the plurality of back surface patterns are formed so that thermal stress balances thermal stress acting on the plurality of front surface patterns. The thickness of the connection pattern is 1 / 5 or less of the thickness of the back surface pattern, and the front surface pattern and the back surface pattern, which face each other with the insulating plate sandwiched therebetween in a direction perpendicular to the insulating plate, have the same shape. .

[0007] A method for manufacturing a power module substrate according to the present disclosure includes a surface pattern forming step of forming, on a surface of an insulating plate, a plurality of surface patterns arranged adjacent to each other with gaps interposed therebetween in a direction in which the insulating plate extends; a back surface pattern forming step of forming, on a back surface of the insulating plate, a plurality of back surface patterns arranged adjacent to each other with gaps interposed therebetween in a direction in which the insulating plate extends; a connection pattern forming step of forming a connection pattern arranged in the gaps between adjacent back surface patterns so as to fill the back surfaces of the gaps in the gaps and electrically connect the adjacent back surface patterns to each other; and a power semiconductor element connecting step of connecting a power semiconductor element to the surface pattern, wherein each of the back surface patterns overlaps at least one of the plurality of surface patterns with the insulating plate sandwiched therebetween in a direction perpendicular to the insulating plate, and the plurality of back surface patterns are formed so that thermal stress balances thermal stress acting on the plurality of surface patterns. The thickness of the connection pattern is 1 / 5 or less of the thickness of the back surface pattern, and the front surface pattern and the back surface pattern, which face each other with the insulating plate sandwiched therebetween in a direction perpendicular to the insulating plate, have the same shape. . [Effects of the Invention]

[0008] According to the present disclosure, it is possible to provide a power module substrate that can reduce parasitic inductance while suppressing deformation due to the occurrence of thermal stress, and a method for manufacturing a power module substrate. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a perspective view showing a schematic configuration of a power conversion device according to an embodiment of the present disclosure. [Figure 2] FIG. 1 is a perspective view of a power module according to an embodiment of the present disclosure. [Figure 3] 2A and 2B are perspective views showing the front and back sides of an insulating plate in a power module substrate according to an embodiment of the present disclosure. [Figure 4] 4 is a partial cross-sectional view taken along line IV-IV in FIG. 3, showing the layout relationship between the front surface pattern, the back surface pattern, and the connection pattern. FIG. [Figure 5] 1 is a flowchart illustrating a method for manufacturing a power module substrate according to an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, the power conversion device according to this embodiment will be described with reference to the drawings.

[0011] (power conversion device) A power conversion device is a device that converts DC power into three-phase AC power or the like. Examples of the power conversion device of this embodiment include inverters used in systems such as power plants and inverters used to drive electric motors in electric vehicles and the like. In this embodiment, an inverter for controlling an electric motor will be described as an example of the power conversion device.

[0012] As shown in FIG. 1, the power converter 100 includes a casing 1, an external input conductor 2, a capacitor 3, a power converter 4, a connecting conductor 5, and a cooling device 6.

[0013] (Casing) The casing 1 forms the outer shell of the power conversion device 100. In this embodiment, the casing 1 is made of a metal such as aluminum or a synthetic resin, and has a rectangular parallelepiped shape. The casing 1 has two side surfaces arranged back to back. Hereinafter, these two side surfaces will be referred to as the input side surface 1a and the output side surface 1b. An external input conductor 2 for inputting DC power extends from the input side surface 1a.

[0014] (external input conductor) The external input conductors 2 are a pair of electric conductors (bus bars) that supply DC power supplied from a DC power source provided outside the power conversion device 100 to the capacitor 3. In this embodiment, the external input conductors 2 are formed from a metal containing copper or the like. One end of the external input conductor 2 is connected to the capacitor 3, and the other end of the external input conductor 2 extends in a direction intersecting with the input side surface 1a of the casing 1.

[0015] (Capacitor) The capacitor 3 is a smoothing capacitor that stores the charge input from the external input conductor 2 and suppresses voltage fluctuations that accompany power conversion. The DC voltage that has been smoothed and has ripples suppressed by the capacitor 3 is supplied to the power conversion unit 4.

[0016] (Power conversion section) The power conversion unit 4 converts the voltage input from the capacitor 3. In this embodiment, the power conversion unit 4 includes three power modules 40 that are responsible for outputting the U phase, V phase, and W phase, respectively, in order to output three-phase AC power. The configuration of the power modules 40 in this embodiment will be described in detail later.

[0017] (connecting conductor) The connecting conductor 5 is an electric conductor (bus bar) for transmitting power from the capacitor 3 to the power conversion unit 4. One end of the connecting conductor 5 is connected to the capacitor 3 (detailed illustration of the connection between the connecting conductor 5 and the capacitor 3 is omitted). The other end of the connecting conductor 5 is connected to the power module 40.

[0018] The connecting conductor 5 includes a first conductor 51 and a second conductor 52. The first conductor 51 is a current path that connects a positive electrode (not shown) of the capacitor 3 and a positive electrode of the power module 40. The second conductor 52 is a current path that connects a negative electrode (not shown) of the capacitor 3 and a negative electrode of the power module 40. The first conductor 51 and the second conductor 52 are arranged side by side with a gap between them.

[0019] (cooling device) The cooling device 6 is a device that mainly cools the power modules 40 of the power conversion unit 4. The cooling device 6 is provided so as to be stacked on the casing 1, and is fixed and integrated with the casing 1. A liquid refrigerant such as water is introduced into the cooling device 6 from the outside. This liquid refrigerant exchanges heat with the power modules 40 and is heated, thereby cooling the power modules 40.

[0020] (power module) The power module 40 is a device that converts input power and outputs it. In this embodiment, the power module 40 constitutes a part of the power conversion unit 4. As shown in FIG. 2 , the power module 40 includes a base plate 41, a power module substrate 42, an external output conductor 43, and a reinforcing portion 44.

[0021] (base plate) The base plate 41 is a flat member. The base plate 41 has a first surface 41a and a second surface 41b facing the opposite side to the first surface 41a. That is, the first surface 41a and the second surface 41b of the base plate 41 are parallel to each other and are arranged back to back.

[0022] The second surface 41b of the base plate 41 is fixed to, for example, the cooling device 6 via a bonding material or the like (not shown). In this embodiment, the base plate 41 is made of, for example, copper. Note that the base plate 41 may also be made of a metal such as aluminum.

[0023] (Power module substrate) As shown in FIGS. 3 and 4, the power module substrate 42 includes an insulating plate 420, a front surface pattern 421, a power semiconductor element 422, a back surface pattern 423, and a connection pattern 424.

[0024] (insulating plate) Insulating plate 420 has a flat plate shape. Insulating plate 420 has front surface 420a and back surface 420b facing the opposite side to front surface 420a. In other words, front surface 420a and back surface 420b of insulating plate 420 are parallel to each other and are back-to-back.

[0025] The insulating plate 420 in this embodiment is made of an insulating material such as ceramic. Note that, in addition to ceramic, the insulating material for the insulating plate 420 may also be paper phenol, paper epoxy, glass composite, glass epoxy, glass polyimide, fluororesin, or the like.

[0026] (surface pattern) Surface pattern 421 is a pattern of copper foil or the like that is formed on surface 420a of insulating plate 420 and spreads in a planar shape. Surface pattern 421 is formed, for example, by being fixed to surface 420a of insulating plate 420 by adhesive or the like, and then being subjected to etching or the like. In this embodiment, surface pattern 421 has a thickness of 200 to 800 μm.

[0027] A plurality of surface patterns 421 are arranged on the surface 420a of the insulating plate 420. These surface patterns 421 are arranged adjacent to one another with a gap R in between in the direction in which the insulating plate 420 extends. In this embodiment, a case in which three surface patterns 421 are arranged on the surface 420a will be described as an example. These three surface patterns 421 are each formed to the same thickness.

[0028] For convenience of explanation, these three surface patterns 421 will be referred to as a first surface pattern 421a, a second surface pattern 421b, and a third surface pattern 421c hereinafter.

[0029] The first surface pattern 421a is connected to the first conductor 51 as a positive electrode for inputting DC current. The second surface pattern 421b is connected to the second conductor 52 as a negative electrode for outputting DC current. The third surface pattern 421c is connected to an external output conductor 43 for outputting AC current converted by the power semiconductor element 422 to a load such as a motor (not shown) provided outside the power conversion device 100.

[0030] (power semiconductor element) The power semiconductor elements 422 are circuit elements that convert power by switching on and off voltage and current. The power semiconductor elements 422 are, for example, switching elements such as IGBTs and MOSFETs. In this embodiment, six power semiconductor elements 422 are connected to the surface pattern 421 of the power module substrate 42.

[0031] The six power semiconductor elements 422 in this embodiment are composed of three first power semiconductor elements 422a and three second power semiconductor elements 422b. The first power semiconductor elements 422a are connected to the first surface pattern 421a. The second power semiconductor elements 422b are connected to the third surface pattern 421c.

[0032] When the power semiconductor element 422 is an IGBT, the power semiconductor element 422 has an input surface on which an input terminal corresponding to a collector is formed, an output surface on which an output terminal corresponding to an emitter is formed, and a gate corresponding to a terminal for inputting a control signal for controlling the switching of the power semiconductor element 422.

[0033] The input surface of the power semiconductor element 422 is electrically connected to the surface pattern 421 via a bonding material S or the like. To the output surface of the power semiconductor element 422, for example, one end of a bonding wire (not shown) serving as a conductor is electrically connected.

[0034] The input surface of the first power semiconductor element 422a is connected to the first surface pattern 421a. The other end of the bonding wire connected to the output surface of the first power semiconductor element 422a is connected to the third surface pattern 421c. The input surface of the second power semiconductor element 422b is connected to the third surface pattern 421c. The other end of the bonding wire connected to the output surface of the second power semiconductor element 422b is connected to the second surface pattern 421b.

[0035] DC power is input to an input terminal of the first power semiconductor element 422a through the first surface pattern 421a, and the input DC power is converted into AC power by the first power semiconductor element 422a. The converted AC power is output from an output terminal (not shown) of the first power semiconductor element 422a to the third surface pattern 421c through a bonding wire.

[0036] AC power is input to an input terminal of the second power semiconductor element 422b via the third surface pattern 421c, and the input AC power is converted into DC power by the second power semiconductor element 422b. The converted DC power is output from an output terminal (not shown) of the second power semiconductor element 422b to the second surface pattern 421b via a bonding wire.

[0037] A control signal generated by a control unit (not shown) provided outside the power module substrate 42 is input to the power semiconductor element 422. The power semiconductor element 422 performs switching in accordance with this control signal. If the power semiconductor element 422 is a MOSFET, the power semiconductor element 422 has an input surface corresponding to the drain, an output surface corresponding to the source, and a gate corresponding to a control signal input terminal.

[0038] (Back pattern) The rear surface pattern 423 is a pattern of copper foil or the like that is formed on the rear surface 420b of the insulating plate 420 and spreads in a plane. The rear surface pattern 423 is formed, for example, by being fixed to the rear surface 420b of the insulating plate 420 by adhesive or the like, and then being subjected to etching or the like. A plurality of rear surface patterns 423 are arranged on the rear surface 420b of the insulating plate 420. In this embodiment, the thickness of the rear surface pattern 423 is the same as the thickness of the front surface pattern 421.

[0039] These multiple back surface patterns 423 are arranged adjacent to one another with gaps R interposed therebetween in the direction in which the insulating plate 420 extends. In this embodiment, a case in which three back surface patterns 423 are arranged on the front surface 420a will be described as an example. For convenience of explanation, these three back surface patterns 423 will be referred to as a first back surface pattern 423a, a second back surface pattern 423b, and a third back surface pattern 423c below.

[0040] In this embodiment, the first back surface pattern 423a faces the first front surface pattern 421a in a direction perpendicular to the insulating plate 420, with the insulating plate 420 sandwiched therebetween. The first back surface pattern 423a and the first front surface pattern 421a have the same shape. Here, "the same shape" refers to substantially the same shape, and slight manufacturing errors and design tolerances are allowed.

[0041] The second back surface pattern 423b in this embodiment faces the second front surface pattern 421b in a direction perpendicular to the insulating plate 420, with the insulating plate 420 sandwiched therebetween. The second back surface pattern 423b and the second front surface pattern 421b have the same shape. The third back surface pattern 423c in this embodiment faces the third front surface pattern 421c in a direction perpendicular to the insulating plate 420, with the insulating plate 420 sandwiched therebetween. The third back surface pattern 423c and the third front surface pattern 421c have the same shape.

[0042] Therefore, the front surface pattern 421 and the back surface pattern 423, which face each other across the insulating plate 420 in a direction perpendicular to the insulating plate 420, have the same shape. In other words, the multiple back surface patterns 423 are formed so that the thermal stress acting on the multiple front surface patterns 421 balances with the thermal stress acting on the multiple back surface patterns 423.

[0043] Here, "balance" of thermal stresses means that when heat is distributed over the entire power module substrate 42 due to the current flowing through the front surface pattern 421 or the heat generated by switching of the power semiconductor element 422 as a heat source, the magnitude of the thermal stress acting on the front surface pattern 421 and the rear surface pattern 423 is substantially the same. Therefore, the thermal stresses are considered to be balanced in a state where the difference in thermal stress caused by the temperature difference between the front surface pattern 421 and the rear surface pattern 423 due to the position of the heat source or the like is allowed.

[0044] The back surface pattern 423 is fixed to the center of the first surface 41a of the base plate 41 via a bonding material S or the like. The bonding material S used to bond the base plate 41 to the back surface pattern 423, the power semiconductor element 422 to the front surface pattern 421, and the base plate 41 to the cooling device 6 can be, for example, solder or a sintered material (powder of metal or the like).

[0045] (Connection pattern) The connection pattern 424 is a pattern of copper foil or the like arranged in the gap R so as to fill the back surface 420b in the gap R between adjacent back surface patterns 423. The connection pattern 424 electrically connects the adjacent back surface patterns 423 to each other.

[0046] The back surface pattern 423 is formed, for example, by being fixed to the back surface 420b of the insulating plate 420 by adhesive or the like, and then being etched or the like. The thickness of the connection pattern 424 is thinner than the thicknesses of the front surface pattern 421 and the back surface pattern 423. In this embodiment, the thickness of the connection pattern 424 is set to 50 μm or less.

[0047] (external output conductor) 2 and 3, the external output conductor 43 is an electric conductor (bus bar) for outputting AC power converted by the power semiconductor element 422 to the outside of the power conversion device 100. One end of the external output conductor 43 is connected to the third surface pattern 421c of the power module substrate 42.

[0048] 1, the other end of the external output conductor 43 extends outward beyond the output-side side surface 1b of the casing 1. The other end of the external output conductor 43 is connected to a current output wiring (not shown) that is connected to a load such as a motor.

[0049] (reinforcement part) The reinforcing portion 44 is a member fixed to the first surface 41a of the base plate 41 and mechanically reinforces the connection conductor 5 and the external output conductor 43. The reinforcing portion 44 is formed from a synthetic resin material or the like. The reinforcing portion 44 covers a part of the connection portion and the external output conductor 43 from the outside, and also surrounds the power module substrate 42 from the outside. That is, as shown in FIG. 2 , the reinforcing portion 44 forms a case that surrounds the periphery of the power module substrate 42 in a direction along the power module substrate 42.

[0050] The reinforcing portion 44 is fixed to the first surface 41a of the base plate 41 via an adhesive or the like. In this embodiment, an insulating material such as PPS (polyphenylene sulfide) as a synthetic resin material can be used for the reinforcing portion 44. Note that an insulating material other than PPS may also be used for the reinforcing portion 44.

[0051] The reinforcing portion 44 defines a space together with the power module substrate 42. Hereinafter, in this embodiment, the space defined by the reinforcing portion 44 and the power module substrate 42 is referred to as a potting space P. A liquid potting material is poured into the potting space P from the outside (potting), and the surface pattern 421 of the insulating plate 420 and the power semiconductor element 422 exposed in the potting space P are sealed.

[0052] The potting material poured into the potting space P hardens over a predetermined time period, electrically insulating the surface pattern 421 and power semiconductor elements 422 of the power module substrate 42 from the space outside the power module 40. For example, silicon gel or epoxy resin is used as the potting material in this embodiment. Note that synthetic resins other than silicon gel and epoxy resin may also be used as the potting material.

[0053] (Manufacturing method for power module substrate) Next, a method for manufacturing the power module substrate 42 in this embodiment will be described with reference to Fig. 5. The manufacturing method includes a front surface pattern forming step S1, a back surface pattern forming step S2, a connection pattern forming step S3, and a power semiconductor element connecting step S4.

[0054] (Surface pattern forming process) The surface pattern forming step S1 is a step of forming a plurality of surface patterns 421 on the surface 420a of the insulating plate 420. In the surface pattern forming step S1, a metal pattern such as copper foil is fixed to the back surface 420b of the insulating plate 420 by adhesion or the like, and then a process such as etching is performed. As a result, the surface patterns 421 are formed on the surface 420a of the insulating plate 420.

[0055] (Backside pattern forming process) The rear surface pattern forming step S2 is a step performed after the front surface pattern forming step S1. In the rear surface pattern forming step S2, a plurality of rear surface patterns 423 are formed on the rear surface 420b of the insulating plate 420. In the rear surface pattern forming step S2, a metal pattern such as copper foil is fixed to the rear surface 420b of the insulating plate 420 by adhesion or the like, and then a process such as etching is performed. As a result, the rear surface patterns 423 are formed on the rear surface 420b of the insulating plate 420.

[0056] (Connection pattern forming process) The connection pattern forming step S3 is a step performed after the rear surface pattern forming step S2. In the connection pattern forming step S3, a connection pattern 424 is formed to fill the rear surface 420b of the insulating plate 420 in the gap R between adjacent rear surface patterns 423.

[0057] In the connection pattern forming process S3, a metal pattern such as copper foil is fixed by adhesive or the like to the back surface 420b of the insulating plate 420 in the gaps R between adjacent back surface patterns 423, and then etching or other processing is performed. As a result, a connection pattern 424 is formed on the back surface 420b of the insulating plate 420, and adjacent back surface patterns 423 are electrically connected to each other.

[0058] (Power semiconductor element connection process) The power semiconductor element connecting step S4 is a step performed after the connection pattern forming step S3. In the power semiconductor element connecting step S4, the power semiconductor element 422 is connected to the surface pattern 421. In the power semiconductor element connecting step S4, a bonding material S is applied to a predetermined mounting location on the surface pattern 421.

[0059] Next, the power semiconductor element 422 is mounted on the surface pattern 421 so that the input surface of the power semiconductor element 422 contacts the bonding material S applied to the mounting location of the surface pattern 421. Then, these are placed inside a furnace heated to a predetermined temperature for a predetermined time. This melts the bonding material S between the input surface of the power semiconductor element 422 and the surface pattern 421, completing the soldering (mounting of the power semiconductor element 422).

[0060] Through the above series of steps, the power module substrate 42 is manufactured.

[0061] (Action and effect) The current input to the surface pattern 421 through the first conductor 51 as a positive electrode is converted by the first power semiconductor element 422a and then used to rotate a motor or the like provided outside the power conversion device 100 through the external output conductor 43. The current used to rotate the motor or the like flows back into the surface pattern 421 through the external output conductor 43, is converted by the second power semiconductor element 422b, and then returns to the capacitor 3 through the second conductor 52 as a negative electrode. When the voltage input to the surface pattern 421 is converted by the power semiconductor element 422, heat is generated.

[0062] Furthermore, the magnitude of the current flowing through the front surface pattern 421 changes suddenly due to the switching of the power semiconductor element 422, and this change also causes a sudden change in the magnetic flux density. At this time, a back electromotive force (eddy current) that generates a magnetic flux that cancels out the change in the magnetic flux density is generated in the back surface pattern 423 formed on the back surface 420b of the insulating plate 420.

[0063] According to the above configuration, there is no difference between the thermal stress acting on the front surface pattern 421 and the thermal stress acting on the back surface pattern 423, so the front surface pattern 421 and the back surface pattern 423 thermally expand in the same manner. Furthermore, because the thickness of the connection pattern 424 is thinner than the thickness of the back surface pattern 423, it is possible to prevent a difference in thermal stress from occurring between the front surface 420a side and the back surface 420b side, compared to a configuration in which the back surface pattern 423 is a single metal pattern with a uniform thickness. Therefore, it is possible to prevent the power module substrate 42 from being damaged.

[0064] Furthermore, eddy currents generated in the back surface patterns 423 due to changes in the magnetic flux density of the current flowing through the front surface patterns 421 flow through the back surface patterns 423 via the connection patterns 424. In other words, compared to a configuration in which the back surface patterns 423 are not electrically connected to each other, the path of the eddy currents flowing through the back surface patterns 423 is not obstructed. Therefore, it is possible to effectively reduce parasitic inductance while suppressing deformation of the entire power module substrate 42. In other words, it is possible to suppress damage to the power module substrate 42 and improve the power conversion efficiency of the power module substrate 42.

[0065] (Other embodiments) The above describes in detail the embodiments of the present disclosure with reference to the drawings, but the specific configuration is not limited to the configuration of the embodiment, and additions, omissions, substitutions, and other modifications to the configuration are possible within the scope that does not deviate from the gist of the present disclosure.

[0066] In the embodiment, the configuration has been described in which the front surface pattern 421 and the back surface pattern 423, which face each other in a direction perpendicular to the insulating plate 420 with the insulating plate 420 sandwiched therebetween, have the same shape, but the present invention is not limited to this configuration. That is, the shape of the front surface pattern 421 and the shape of the back surface pattern 423 may be different from each other. In this case, it is sufficient that each back surface pattern 423 overlaps with at least one of the plurality of front surface patterns 421 with the insulating plate 420 sandwiched therebetween, and that the thermal stress acting on the plurality of back surface patterns 423 balances with the thermal stress acting on the plurality of front surface patterns 421.

[0067] Furthermore, in the embodiment, a configuration has been described in which the number of back surface patterns 423 formed on the back surface 420b of the insulating plate 420 is the same as the number of front surface patterns 421 formed on the front surface 420a of the insulating plate 420, and the thickness of the back surface patterns 423 is the same as the thickness of the front surface patterns 421. However, this configuration is not limited to this. For example, the number of back surface patterns 423 may be greater than the number of front surface patterns 421, and the thickness of the back surface patterns 423 may be smaller than the thickness of the front surface patterns 421. Alternatively, the number of back surface patterns 423 may be fewer than the number of front surface patterns 421, and the thickness of the back surface patterns 423 may be greater than the thickness of the front surface patterns 421. In these cases, it is sufficient that each back surface pattern 423 overlaps at least one of the multiple front surface patterns 421 with the insulating plate 420 sandwiched therebetween, and that the thermal stress acting on the multiple back surface patterns 423 balances the thermal stress acting on the multiple front surface patterns 421.

[0068] In the embodiment, the thickness of the connection pattern 424 is 50 μm or less, but this is not limiting. The thickness of the connection pattern 424 may be, for example, 1 / 5 or less of the thickness of the back pattern 423 (front pattern 421).

[0069] In addition, in the embodiment, a configuration has been described in which the thickness of the connection pattern 424 is thinner than the thicknesses of the front pattern 421 and the back pattern 423, but the present invention is not limited to this configuration. For example, as long as the connection pattern 424 electrically connects the back patterns 423 to each other so that the thermal stress acting on the front pattern 421 and the thermal stress acting on the back pattern 423 are balanced and so as not to inhibit the thermal expansion of the back pattern 423, the thickness of the connection pattern 424 may be equal to or greater than the thickness of the back pattern 423.

[0070] In the embodiment, the configuration has been described in which the connection pattern 424 is a metal pattern arranged in the gap R between adjacent back surface patterns 423 so as to fill the back surface 420b in the gap R, but the present invention is not limited to this configuration. For example, the connection pattern 424 may be arranged at intervals between the back surface patterns 423 in the gap R between the back surface patterns 423 so as to bridge the back surface patterns 423, and electrically connect the adjacent back surface patterns 423 to each other.

[0071] In the embodiment, the configuration in which the front surface pattern 421, the back surface pattern 423, and the connection pattern 424 are each a copper pattern has been described, but the present invention is not limited to this configuration. The front surface pattern 421, the back surface pattern 423, and the connection pattern 424 may be formed of aluminum, an alloy, or the like. In this case, the metal patterns used in the front surface pattern forming step S1, the back surface pattern forming step S2, and the connection pattern forming step S3 in the manufacturing method for the power module substrate 42 are aluminum, an alloy, or the like. The connection pattern 424 may also be formed of solder, or the like.

[0072] Furthermore, the front surface pattern 421 may be made of copper, and the back surface pattern 423 may be made of aluminum. Alternatively, the front surface pattern 421 may be made of aluminum, and the back surface pattern 423 may be made of copper. Therefore, the front surface pattern 421 and the back surface pattern 423 may be made of different metal materials.

[0073] In addition, in the embodiment, a configuration has been described in which the first surface 41a and the second surface 41b of the base plate 41 and the front surface 420a and the back surface 420b of the insulating plate 420 are parallel to each other and are in a back-to-back relationship, but this configuration is not limited to this and they may be slightly inclined.

[0074] Furthermore, in the embodiment, an inverter has been described as an example of the power conversion device 100, but the power conversion device 100 is not limited to an inverter. The power conversion device 100 may be, for example, a converter, or a combination of an inverter and a converter, or another device that performs power conversion using a power semiconductor element 422. When the power conversion device 100 is a converter, it may be configured such that an AC voltage is input from an external input power source (not shown) to the external output conductor 43, the power semiconductor element 422 converts this AC voltage into a DC voltage, and the DC voltage from the power semiconductor element 422 is output from the input section.

[0075] In addition, in the manufacturing method of the power module substrate 42 described in the embodiment, the connection pattern forming step S3 is performed after the rear surface pattern forming step S2, but this is not limiting. The connection pattern forming step S3 may be omitted, and in the rear surface pattern forming step S2, the rear surface pattern 423 and the connection pattern 424 may be integrally formed on the rear surface 420b of the insulating plate 420 from the beginning using an additive manufacturing device such as a metal 3D printer.

[0076] In addition, in the manufacturing method of the power module substrate 42 described in the embodiment, the back surface pattern forming step S2 is performed after the front surface pattern forming step S1, but this is not limited to this. The front surface pattern forming step S1 may be performed after the connection pattern forming step S3. In this case, the power semiconductor element connection step S3 is performed after the front surface pattern forming step S1.

[0077] <Additional Notes> The power module substrate and the method for manufacturing the power module substrate described in the embodiment can be understood, for example, as follows.

[0078] (1) A power module substrate 42 according to a first aspect includes an insulating plate 420, a plurality of front surface patterns 421 formed on a front surface 420a of the insulating plate 420 and arranged adjacent to each other with a gap R in the direction in which the insulating plate 420 extends, a power semiconductor element 422 connected to the front surface patterns 421, a plurality of rear surface patterns 423 formed on a rear surface 420b of the insulating plate 420 and arranged adjacent to each other with a gap R in the direction in which the insulating plate 420 extends, and a gap R between adjacent rear surface patterns 423. and a connection pattern 424 that is arranged in the gap R so as to fill the back surface 420b in the gap R and electrically connects adjacent back surface patterns 423 to each other, each back surface pattern 423 overlapping at least one of the plurality of surface patterns 421 in a direction perpendicular to the insulating plate 420, with the insulating plate 420 sandwiched therebetween, and the plurality of back surface patterns 423 are formed so that thermal stress balances with the thermal stress acting on the plurality of surface patterns 421.

[0079] This causes the front surface pattern 421 and the back surface pattern 423 to thermally expand in the same manner. Furthermore, because the thickness of the connection pattern 424 is thinner than the thickness of the back surface pattern 423, it is possible to suppress the occurrence of a difference in thermal stress between the front surface 420a side and the back surface 420b side, compared to a configuration in which the back surface pattern 423 is a single metal pattern. In addition, because the connection pattern 424 electrically connects adjacent back surface patterns 423, the path of eddy current flowing through the back surface pattern 423 is not obstructed.

[0080] (2) The power module substrate 42 according to the second aspect is the power module substrate 42 of (1), in which the thickness of the connection pattern 424 may be thinner than the thickness of the back surface pattern 423.

[0081] This makes it possible to realize the above-mentioned effects with a more specific configuration, and also to further suppress deformation of the power module substrate 42.

[0082] (3) The power module substrate 42 according to a third aspect is the power module substrate 42 of (1) or (2), and the number of the back patterns 423 may be the same as the number of the front patterns 421.

[0083] This makes it possible to realize the above-mentioned effects with a more specific configuration, and also to further suppress deformation of the power module substrate 42.

[0084] (4) The power module substrate 42 according to the fourth aspect is the power module substrate 42 of any one of (1) to (3), and the front surface pattern 421 and the back surface pattern 423, which face each other across the insulating plate 420 in a direction perpendicular to the insulating plate 420, may have the same shape.

[0085] This makes it possible to realize the above-mentioned effects with a more specific configuration, and also to further suppress deformation of the power module substrate 42.

[0086] (5) A method for manufacturing a power module substrate 42 according to a fifth aspect includes a front surface pattern forming step S1 of forming, on a front surface 420a of an insulating plate 420, a plurality of front surface patterns 421 arranged adjacent to each other with a gap R therebetween in the direction in which the insulating plate 420 extends, a back surface pattern forming step S2 of forming, on a back surface 420b of the insulating plate 420, a plurality of back surface patterns 423 arranged adjacent to each other with a gap R therebetween in the direction in which the insulating plate 420 extends, and a back surface pattern forming step S3 of forming, on a back surface 420b of the insulating plate 420, a plurality of back surface patterns 423 arranged adjacent to each other with a gap R therebetween in the direction in which the insulating plate 420 extends, a back surface pattern forming step S4 of forming, on a back surface 420b of the insulating plate 420, a plurality of back surface patterns 423 arranged adjacent to each other with a gap R therebetween in the direction in which the insulating plate 420 extends, a back surface pattern forming step S5 of forming, on a back surface 420b of the insulating plate 420, a plurality of back surface patterns 423 arranged adjacent to each other with a gap R therebetween in the direction in which the insulating plate 420 extends, a back surface pattern forming step S6 of forming, on a back surface 420b of the insulating plate 420, a plurality of back surface patterns 423 arranged in the gap R so as to fill the back surface 420b in the gap R between adjacent back surface patterns 423, The method includes a connection pattern forming process S3 for forming connection patterns 424 that electrically connect the matching back patterns 423 to each other, and a power semiconductor element connection process S4 for connecting a power semiconductor element 422 to the front pattern 421, wherein each back pattern 423 overlaps with at least one of the plurality of front patterns 421 in a direction perpendicular to the insulating plate 420, with the insulating plate 420 sandwiched therebetween, and the plurality of back patterns 423 are formed so that thermal stress balances with the thermal stress acting on the plurality of front patterns 421.

[0087] This makes it possible to manufacture a power module substrate 42 that can reduce parasitic inductance while suppressing deformation due to the occurrence of thermal stress. [Explanation of symbols]

[0088] DESCRIPTION OF SYMBOLS 1...Casing 1a...Input side surface 1b...Output side surface 2...External input conductor 3...Capacitor 4...Power conversion section 5...Connection conductor 6...Cooling device 40...Power module 41...Base plate 41a...First surface 41b...Second surface 42...Power module substrate 43...External output conductor 44...Reinforcing section 51...First conductor 52...Second conductor 100...Power conversion device 420...Insulating plate 420a...Front surface 420b...Back surface 421...Front pattern 421a...First surface pattern 421b...Second surface pattern 421c...Third surface pattern 422...Power semiconductor element 422a...First power semiconductor element 422b...Second power semiconductor element 423...Back pattern 423a...First back pattern 423b...Second back pattern 423c...Third back pattern 424...Connection pattern P...Potting space R...Gap S... Bonding material S1... Surface pattern forming process S2... Back surface pattern forming process S3... Connection pattern forming process S4... Power semiconductor element connection process

Claims

1. An insulating plate; a plurality of surface patterns formed on a surface of the insulating plate and arranged adjacent to each other with gaps interposed therebetween in the direction in which the insulating plate extends; a power semiconductor element connected to the surface pattern; a plurality of rear surface patterns formed on the rear surface of the insulating plate and arranged adjacent to each other with gaps interposed therebetween in the direction in which the insulating plate extends; a connection pattern disposed in the gap between adjacent rear surface patterns so as to fill the gap on the rear surface, and electrically connecting the adjacent rear surface patterns to each other; Equipped with each of the rear surface patterns overlaps at least one of the plurality of front surface patterns in a direction perpendicular to the insulating plate, with the insulating plate sandwiched therebetween; the plurality of rear surface patterns are formed so that thermal stress is balanced with thermal stress acting on the plurality of front surface patterns; the thickness of the connection pattern is 1 / 5 or less of the thickness of the rear surface pattern, The power module substrate, wherein the front surface pattern and the back surface pattern, which face each other across the insulating plate in a direction perpendicular to the insulating plate, have the same shape.

2. The power module substrate according to claim 1 , wherein the number of the rear surface patterns is the same as the number of the front surface patterns.

3. a surface pattern forming step of forming a plurality of surface patterns on the surface of an insulating plate, the surface patterns being arranged adjacent to each other with gaps interposed therebetween in the direction in which the insulating plate extends; a rear surface pattern forming step of forming a plurality of rear surface patterns on the rear surface of the insulating plate, the rear surface patterns being arranged adjacent to each other with gaps interposed therebetween in the direction in which the insulating plate extends; a connection pattern forming step of forming a connection pattern that is disposed in the gap between adjacent rear surface patterns so as to fill the gap on the rear surface and electrically connects the adjacent rear surface patterns to each other; a power semiconductor element connecting step of connecting a power semiconductor element to the surface pattern; and each of the rear surface patterns overlaps at least one of the plurality of front surface patterns in a direction perpendicular to the insulating plate, with the insulating plate sandwiched therebetween; the plurality of rear surface patterns are formed so that thermal stress is balanced with thermal stress acting on the plurality of front surface patterns; the thickness of the connection pattern is 1 / 5 or less of the thickness of the rear surface pattern, A method for manufacturing a power module substrate, wherein the front surface pattern and the back surface pattern, which face each other across the insulating plate in a direction perpendicular to the insulating plate, have the same shape.

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