Power Conversion Device

Abstract

The power conversion device (100) includes a power converter (6) and a control device (5). The control device (5) generates, for each of a plurality of phases, a positive arm modulation command value for a positive arm (13u, 13v, 13w) and a negative arm modulation command value for a negative arm (14u, 14v, 14w), generates an average value of the maximum and minimum values ​​of each positive arm modulation command value as a first zero-phase modulation command value, generates an average value of the maximum and minimum values ​​of each negative arm modulation command value as a second zero-phase modulation command value, generates a composite zero-phase modulation command value by executing a synthesis process based on the first zero-phase modulation command value and the second zero-phase modulation command value, extracts a third-order harmonic component of the composite zero-phase modulation command value, and generates, for each of the plurality of phases, a positive side modulation command value based on the positive side arm modulation command value and the third-order harmonic component, and generates a negative side modulation command value based on the negative arm modulation command value and the third-order harmonic component.

Description

[Technical Field]

[0001] The present disclosure relates to a power conversion device. [Background technology]

[0002] In recent years, modular multilevel converters (MMCs) have become known as high-voltage, large-capacity power conversion devices applied to high-voltage systems such as electric power grids. MMCs are composed of arms in which multiple unit converters called converter cells are cascaded. Each converter cell includes multiple switching elements and storage elements (e.g., capacitors).

[0003] The control device for an MMC power converter according to International Publication No. 2022 / 024218 (Patent Document 1) includes a voltage command generation unit that generates output voltage commands for multiple converter cells for each arm of the power converter. A zero-phase sequence voltage command having a frequency component three times the fundamental frequency of the AC is superimposed on the arm voltage command. The zero-phase sequence voltage command is phase-adjusted based on the voltage of a DC capacitor in the converter cell and the arm voltage command. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] International Publication No. 2022 / 024218 Summary of the Invention [Problem to be solved by the invention]

[0005] In Patent Document 1, it is considered that adjusting the phase of the zero-phase sequence voltage command increases the margin of the arm voltage command relative to the output voltage range, thereby improving the utilization rate of the DC voltage. However, in Patent Document 1, it is considered difficult to appropriately respond to transient changes because the optimal phase of the zero-phase sequence voltage command changes when the operating point of the power converter (for example, output voltage, output current, etc.) changes.

[0006] An object of one aspect of the present disclosure is to provide an MMC power conversion device that can appropriately improve the voltage utilization rate even when the operating point changes. [Means for solving the problem]

[0007] According to one embodiment, there is provided a power conversion device that performs power conversion between an AC system and a DC circuit. The power conversion device includes a power converter including a plurality of leg circuits corresponding to a plurality of phases of the AC system, respectively, and a control device that controls the power converter. The leg circuits include a positive arm and a negative arm connected in series. A connection point of the positive arm and the negative arm is connected to an AC line of a corresponding phase of the AC system, and both ends of the series-connected positive arm and negative arm are connected to the DC circuit. Each of the positive arm and the negative arm includes a plurality of converter cells connected in series. Each of the plurality of converter cells includes a plurality of switching elements and an energy storage element. The control device includes: an arm modulation command generation unit that generates, for each of a plurality of phases, a positive arm modulation command value for the positive arm and a negative arm modulation command value for the negative arm; a zero-phase modulation command generation unit that generates an average value of maximum and minimum values ​​of each positive arm modulation command value as a first zero-phase modulation command value and generates an average value of maximum and minimum values ​​of each negative arm modulation command value as a second zero-phase modulation command value; a synthesis processing unit that generates a synthesized zero-phase modulation command value by executing synthesis processing based on the first zero-phase modulation command value and the second zero-phase modulation command value; an extraction unit that extracts a third harmonic component of the synthesized zero-phase modulation command value; and a modulation command generation unit that generates, for each of the plurality of phases, a positive side modulation command value based on the positive side arm modulation command value and the third harmonic component and generates a negative side modulation command value based on the negative side arm modulation command value and the third harmonic component. [Effects of the Invention]

[0008] According to the MMC power conversion device of the present disclosure, it is possible to appropriately improve the voltage utilization rate even when the operating point changes. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a diagram illustrating a configuration example of a power conversion device. [Figure 2] FIG. 2 is a circuit diagram illustrating an example of a converter cell. [Figure 3] FIG. 2 is a block diagram illustrating an example of a hardware configuration of a control device. [Figure 4] FIG. 2 is a block diagram showing an example of a functional configuration of a control device. [Figure 5] FIG. 2 is a block diagram showing an example of a functional configuration of a modulation command control unit. [Figure 6] 10A and 10B are diagrams illustrating time variations of a zero-phase modulation command value, a positive-side modulation command value, and a negative-side modulation command value according to a comparative example. [Figure 7] 5A and 5B are diagrams illustrating time variations of a zero-phase modulation command value, a positive-side modulation command value, and a negative-side modulation command value according to the present embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, the present embodiment will be described with reference to the drawings. In the following description, the same components are denoted by the same reference numerals. The names and functions of these components are also the same. Therefore, detailed description thereof will not be repeated.

[0011] <Overall structure> FIG. 1 is a diagram showing an example of the configuration of a power conversion device 100. Referring to FIG. 1, the power conversion device 100 is connected between an AC system 2 and a DC circuit 4. The DC circuit 4 is, for example, a DC power system including a DC transmission network or the like. Alternatively, the DC circuit 4 may include a power storage element connected to a DC terminal of a power converter 6. The power storage element is, for example, a power storage device including an electric double layer capacitor or a storage battery such as a lithium ion battery. Alternatively, the DC circuit 4 may include a DC terminal of another power converter connected to the DC terminal of the power converter 6. In this case, by linking the two power converters, a BTB (Back To Back) system is configured for connecting AC power systems with different rated frequencies, etc.

[0012] The power conversion device 100 includes a self-excited power converter 6 and a control device 5 that controls the power converter 6. Typically, the power converter 6 is configured by a double-star modular multilevel converter (MMC) that includes a plurality of converter cells 1 (corresponding to the "cells" in FIG. 1) connected in series with each other. Note that a "converter cell" is also called a "sub-module" or "unit converter."

[0013] The power converter 6 is connected to the DC circuit 4 and performs power conversion between the DC circuit 4 and the AC system 2. Specifically, the power converter 6 converts the DC power output from the DC circuit 4 into AC power and outputs the AC power to the AC system 2 via the transformer 3. The power converter 6 also converts the AC power from the AC system 2 into DC power and outputs the DC power to the DC circuit 4.

[0014] 1, the power converter 6 includes a plurality of leg circuits 8u, 8v, and 8w corresponding to the U-phase, V-phase, and W-phase, respectively, of the AC system 2. Specifically, the power converter 6 includes a plurality of leg circuits 8u, 8v, and 8w (hereinafter, collectively referred to as "leg circuits 8") connected in parallel with each other between a positive-side DC terminal (i.e., a high-potential side DC terminal) Np and a negative-side DC terminal (i.e., a low-potential side DC terminal) Nn.

[0015] The AC terminals Nu, Nv, and Nw provided in the leg circuits 8u, 8v, and 8w, respectively, are connected to an AC system 2 via a transformer 3. The AC system 2 is, for example, a three-phase AC power system including an AC power source. For ease of illustration, FIG. 1 does not show the connection between the AC terminals Nv and Nw and the transformer 3. The DC terminals provided in common to each leg circuit 8 (i.e., a positive side DC terminal Np and a negative side DC terminal Nn) are connected to a DC circuit 4.

[0016] Instead of using the transformer 3 of FIG. 1 , the leg circuits 8u, 8v, 8w may be configured to be connected to the AC system 2 via an interconnection reactor. Furthermore, instead of the AC terminals Nu, Nv, Nw, primary windings may be provided in the leg circuits 8u, 8v, 8w, respectively, and the leg circuits 8u, 8v, 8w may be AC-connected to the transformer 3 or the interconnection reactor via secondary windings magnetically coupled to the primary windings. In this case, the primary windings may be reactors 7a, 7b described below. That is, the leg circuit 8 is electrically (i.e., DC- or AC-connected) to the AC system 2 via connection parts provided in each of the leg circuits 8u, 8v, 8w, such as the AC terminals Nu, Nv, Nw or the above-mentioned primary windings.

[0017] The leg circuit 8u includes a positive arm 13u extending from the positive DC terminal Np to the AC terminal Nu, and a negative arm 14u extending from the negative DC terminal Nn to the AC terminal Nu. A connection point between the positive arm 13u and the negative arm 14u is connected to the transformer 3 as the AC terminal Nu. The positive DC terminal Np and the negative DC terminal Nn are connected to the DC circuit 4. The leg circuit 8v includes a positive arm 13v and a negative arm 14v, and the leg circuit 8w includes a positive arm 13w and a negative arm 14w. The positive arms 13u, 13v, and 13w are also collectively referred to as "positive arms 13," and the negative arms 14u, 14v, and 14w are also collectively referred to as "negative arms 14."

[0018] As described above, the leg circuit 8 is configured by the positive side arm 13 and the negative side arm 14 connected in series. Connection points (e.g., AC terminals Nu, Nv, Nw) of the positive side arm 13 and the negative side arm 14 are connected to AC lines of corresponding phases of the AC system 2. Both ends (i.e., the positive side DC terminal Np and the negative side DC terminal Nn) of the series-connected positive side arm 13 and negative side arm 14 are connected to the DC circuit 4. Since the leg circuits 8v and 8w have the same configuration as the leg circuit 8u, the leg circuit 8u will be described below as a representative example.

[0019] In leg circuit 8u, positive arm 13u includes a plurality of converter cells 1 cascaded together and reactor 7a. The plurality of converter cells 1 and reactor 7a are connected in series to each other. Negative arm 14u includes a plurality of converter cells 1 cascaded together and reactor 7b. The plurality of converter cells 1 and reactor 7b are connected in series to each other.

[0020] The reactor 7a may be inserted at any position in the positive arm 13u, and the reactor 7b may be inserted at any position in the negative arm 14u. There may be a plurality of reactors 7a and a plurality of reactors 7b. The inductance values ​​of the reactors may be different from each other. Furthermore, only the reactor 7a in the positive arm 13u or only the reactor 7b in the negative arm 14u may be provided.

[0021] The power conversion device 100 further includes an AC voltage detector 10, an AC current detector 15, DC voltage detectors 11a and 11b, and arm current detectors 9a and 9b provided in each leg circuit 8. These detectors measure electrical quantities (e.g., current, voltage) used to control the power conversion device 100. Signals detected by these detectors are input to the control device 5.

[0022] The AC voltage detector 10 detects three-phase AC voltages Vacu, Vacv, and Vacw (hereinafter also collectively referred to as "AC voltages Vac") of the AC system 2. The AC current detector 15 detects three-phase AC currents Iacu, Iacv, and Iacw (hereinafter also collectively referred to as "AC currents Iac") of the AC system 2. The DC voltage detector 11a detects a DC voltage Vdcp at a positive-side DC terminal Np connected to the DC circuit 4. The DC voltage detector 11b detects a DC voltage Vdcn at a negative-side DC terminal Nn connected to the DC circuit 4.

[0023] The arm current detectors 9a and 9b provided in the U-phase leg circuit 8u detect the positive arm current Ipu flowing in the positive arm 13u and the negative arm current Inu flowing in the negative arm 14u, respectively. The arm current detectors 9a and 9b provided in the V-phase leg circuit 8v detect the positive arm current Ipv and the negative arm current Inv, respectively. The arm current detectors 9a and 9b provided in the W-phase leg circuit 8w detect the positive arm current Ipw and the negative arm current Inw, respectively.

[0024] The DC current Idc output from the power converter 6 is detected using a DC current detector (not shown). The DC current Idc corresponds to the value of a DC current flowing between the power converter 6 and the DC circuit 4. The DC current Idc may be calculated as follows: "Idc=(Ipu+Ipv+Ipw+Inu+Inv+Inw) / 2".

[0025] <Example of converter cell configuration> FIG. 2 is a circuit diagram showing an example of a converter cell 1. The converter cell 1 shown in FIG. 2(a) has a circuit configuration called a half-bridge configuration. The converter cell 1 includes a series body formed by connecting two switching elements 31p and 31n in series, a capacitor 32 as an energy storage element, and a voltage detector 33. The series body and capacitor 32 are connected in parallel. The voltage detector 33 detects the capacitor voltage Vc, which is the voltage across the capacitor 32.

[0026] The converter cell 1 shown in FIG. 2(b) has a circuit configuration called a full-bridge configuration. This converter cell 1 includes a first series body formed by connecting two switching elements 31p1 and 31n1 in series, a second series body formed by connecting two switching elements 31p2 and 31n2 in series, a capacitor 32, and a voltage detector 33. The first series body, the second series body, and the capacitor 32 are connected in parallel. The voltage detector 33 detects a capacitor voltage Vc. The capacitor voltage Vc is input to the control device 5.

[0027] The two switching elements 31p and 31n in Fig. 2(a) and the four switching elements 31p1, 31n1, 31p2, and 31n2 in Fig. 2(b) are configured by connecting a free wheel diode in anti-parallel to a semiconductor switching element such as an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal Oxide Semiconductor Field-Effect Transistor). Also, in Fig. 2(a) and Fig. 2(b), a film capacitor or the like is mainly used as the capacitor 32.

[0028] In the following description, switching elements 31p, 31n, 31p1, 31n1, 31p2, and 31n2 are also collectively referred to as switching element 31. Furthermore, turning on and off the semiconductor switching elements in switching element 31 is simply referred to as "on and off of switching element 31."

[0029] 2(a), both terminals of switching element 31n are defined as input / output terminals G1 and G2. The voltage across capacitor 32 and zero voltage are output by the switching operations of switching elements 31p and 31n. For example, when switching element 31p is on and switching element 31n is off, the voltage across capacitor 32 is output. When switching element 31p is off and switching element 31n is on, zero voltage is output.

[0030] Referring to FIG. 2(b), the midpoint between switching elements 31p1 and 31n1 and the midpoint between switching elements 31p2 and 31n2 are defined as input / output terminals G1 and G2 of converter cell 1, respectively. Converter cell 1 shown in FIG. 2(b) outputs a positive voltage or zero voltage by turning on switching element 31n2, turning off switching element 31p2, and alternately turning on switching elements 31p1 and 31n1. Converter cell 1 shown in FIG. 2(b) can also output a zero voltage or negative voltage by turning off switching element 31n2, turning on switching element 31p2, and alternately turning on switching elements 31p1 and 31n1.

[0031] In this embodiment, the converter cell 1 may have the half-bridge cell configuration shown in Fig. 2(a) or the full-bridge configuration shown in Fig. 2(b). Also, a converter cell other than the configuration shown above, for example, a converter cell employing a circuit configuration also called a 1.5 half-bridge configuration in which the switching element 31p2 in Fig. 2(b) is replaced with only a diode, may be used, and the switching elements and energy storage elements are not limited to those described above.

[0032] <Example of control device hardware configuration> FIG. 3 is a block diagram showing an example of a hardware configuration of the control device 5. The control device 5 shown in FIG. 3 is configured based on a computer. Referring to FIG. 3, the control device 5 includes one or more input converters 70, one or more sample-and-hold (S / H) circuits 71, a multiplexer (MUX) 72, and an A / D converter 73. The control device 5 further includes one or more central processing units (CPUs) 74, random access memories (RAMs) 75, and read-only memories (ROMs) 76. The control device 5 further includes one or more input / output interfaces 77, an auxiliary storage device 78, and a bus 79 that interconnects the above components.

[0033] The input converter 70 is provided with an auxiliary transformer for each input channel. Each auxiliary transformer converts the detection signal from each electrical quantity detector in Figure 1 into a signal with a voltage level suitable for subsequent signal processing. A sample-and-hold circuit 71 is provided for each input converter 70. The sample-and-hold circuit 71 samples and holds the signal representing the electrical quantity received from the corresponding input converter 70 at a specified sampling frequency.

[0034] The multiplexer 72 sequentially selects the signals held in the multiple sample-and-hold circuits 71. The A / D converter 73 converts the signal selected by the multiplexer 72 into a digital value. Note that by providing multiple A / D converters 73, A / D conversion may be performed in parallel on detection signals of multiple input channels.

[0035] The CPU 74 controls the entire control device 5 and executes arithmetic processing according to a program. The RAM 75 as a volatile memory and the ROM 76 as a nonvolatile memory are used as the main memory of the CPU 74. The ROM 76 stores programs, setting values ​​for signal processing, and the like. The auxiliary storage device 78 is a nonvolatile memory with a larger capacity than the ROM 76, and stores programs, data on detected values ​​of electrical quantity, and the like. The input / output interface 77 is an interface circuit for communication between the CPU 74 and an external device.

[0036] At least a part of the control device 5 may be configured using circuits such as an FPGA (Field Programmable Gate Array) and an ASIC (Application Specific Integrated Circuit), or at least a part of the control device 5 may be configured using analog circuits.

[0037] <Controller functional configuration> Because power converter 6 outputs DC and AC, control device 5 needs to control both the DC and AC sides. Furthermore, a circulating current that circulates between positive side arm 13 and negative side arm 14 without contributing to either the AC or DC side output flows within power converter 6. Therefore, control device 5 controls the circulating current in addition to DC control and AC control.

[0038] 4 is a block diagram showing an example of the functional configuration of the control device 5. Referring to FIG. 4, the control device 5 includes a command generating unit 300 and a PWM (Pulse Width Modulation) control unit 320. The command generating unit 300 and the PWM control unit 320 are configured by, for example, a processing circuit. The processing circuit may be dedicated hardware, or may be the CPU 74 that executes a program stored in an internal memory (for example, the RAM 75, the ROM 76, the auxiliary storage device 78) of the control device 5. When the processing circuit is dedicated hardware, the processing circuit is configured by, for example, an FPGA, an ASIC, or a combination thereof.

[0039] Command generating unit 300 generates a positive side modulation command value Kzpref for positive side arm 13 of each phase and a negative side modulation command value Kznref for negative side arm 14 of each phase based on the input information of various voltages and currents.

[0040] The PWM control unit 320 executes PWM control based on the positive-side modulation command value Kzpref and the negative-side modulation command value Kznref, and generates a gate signal GP that controls the on / off driving of the switching element 31 in each converter cell 1 of each phase. The gate signal GP controls the driving of the switching element 31 in each converter cell 1, and the output voltage of the power converter 6 is controlled to a desired value.

[0041] The following describes in detail the functions of the command generator 300. The command generator 300 includes an AC controller 302, a DC controller 304, a circulating current controller 306, an arm modulation command generator 308, and a modulation command controller 310.

[0042] The AC control unit 302 receives inputs of the AC voltage Vac of each phase (i.e., the AC voltages Vacu, Vacv, and Vacw) and the AC current Iac of each phase (i.e., the AC currents Iacu, Iacv, and Iacw). In one aspect, the AC control unit 302 executes feedback control for each phase to make the AC voltage Vac follow a specified AC voltage set value (e.g., to make the deviation between the AC voltage Vac and the AC voltage set value zero). This generates AC voltage command values ​​Vacuref, Vacvref, and Vacwref (hereinafter also collectively referred to as "Vacref") for the U phase, V phase, and W phase. In another aspect, the AC control unit 302 may generate the AC voltage command value Vacref by executing feedback control to make the AC current Iac follow a specified AC current set value (e.g., to make the deviation between the AC current Iac and the AC current set value zero). This performs AC-side tracking control.

[0043] The DC control unit 304 receives inputs of a DC voltage Vdc and a DC current Idc. The DC voltage Vdc is the difference between the DC voltage Vdcp and the DC voltage Vdcn (i.e., Vdcp-Vdcn). The DC control unit 304 generates a DC voltage command value Vdcref by performing feedback control to make the DC current Idc follow a specified DC current command value (for example, to make the deviation between the DC current Idc and the DC current command value zero) and feedforward control of the DC voltage Vdc. This allows DC-side tracking control to be performed.

[0044] The circulating current control unit 306 receives inputs of circulating currents Iccu, Iccv, and Iccw (hereinafter collectively referred to as "circulating current Icc") for the U, V, and W phases. For example, the circulating current Iccu for the U phase is expressed as "Iccu = (Ipu + Inu) / 2 - Idc / 3." Similarly, the circulating current Iccv for the V phase is expressed as "Iccv = (Ipv + Inv) / 2 - Idc / 3," and the circulating current Iccw for the W phase is expressed as "Iccw = (Ipw + Inw) / 2 - Idc / 3." The circulating current control unit 306 generates a circulating control command value Vccref for each phase so that the circulating current Icc follows a specified circulating current command value (e.g., 0). This allows circulating current tracking control to be performed.

[0045] The AC control unit 302, DC control unit 304, and circulating current control unit 306 described above may be configured as, for example, a proportional controller, a PI controller, a PID controller, or other controllers used for feedback control.

[0046] The arm modulation command generator 308 receives as inputs an AC voltage command value Vacref, a DC voltage command value Vdcref, and a circulation control command value Vccref. The arm modulation command generator 308 also receives as inputs capacitor voltage average values ​​Vcpu, Vcpv, Vcpw (hereinafter also collectively referred to as "capacitor voltage average value Vcp") of the positive side arms 13u, 13v, 13w of each phase, and capacitor voltage average values ​​Vcnu, Vcnv, Vcnw (hereinafter also collectively referred to as "capacitor voltage average value Vcn") of the negative side arms 14u, 14v, 14w of each phase.

[0047] The capacitor voltage average value Vcpu of the U-phase positive-side arm 13u is the sum of the capacitor voltages Vc of all the capacitors 32 included in the positive-side arm 13u divided by the number of converter cells 1 (i.e., the number of cells) included in the positive-side arm 13u. The same applies to the V-phase and W-phase capacitor voltage average values ​​Vcpv and Vcpw. The capacitor voltage average value Vcnu of the U-phase negative-side arm 14u is the sum of the capacitor voltages Vc of all the capacitors 32 included in the negative-side arm 14u divided by the number of cells in the negative-side arm 14u. The same applies to the V-phase and W-phase capacitor voltage average values ​​Vcnv and Vcnw.

[0048] Based on the AC voltage command value Vacref, the DC voltage command value Vdcref, and the circulation control command value Vccref, the arm modulation command generator 308 distributes the voltage components by subtracting the voltage drops due to the inductance components in the positive side arm 13 and the negative side arm 14 from the voltages shared for output by the positive side arm 13 and the negative side arm 14. In this way, the arm modulation command generator 308 generates positive side arm voltage command values ​​Vpuref, Vpvref, Vpwref (hereinafter also collectively referred to as "positive side arm voltage command value Vpref") for the positive side arms 13u, 13v, 13w, and negative side arm voltage command values ​​Vnuref, Vnvref, Vnwref (hereinafter also collectively referred to as "negative side arm voltage command value Vnref") for the negative side arms 14u, 14v, 14w. For example, the positive arm voltage command value Vpref is expressed as "Vdcref-Vacref+Vzref", and the negative arm voltage command value Vnref is expressed as "Vdcref+Vacref+Vzref".

[0049] Next, arm modulation command generator 308 generates positive-side arm modulation command values ​​Kpuref, Kpvref, Kpwref (hereinafter also collectively referred to as "positive-side arm modulation command value Kpref") for positive-side arms 13u, 13v, 13w. Specifically, arm modulation command generator 308 generates positive-side arm modulation command value Kpref for each phase based on positive-side arm voltage command value Vpref and the voltage of each capacitor 32 included in positive-side arm 13. For example, positive-side arm modulation command value Kpuref for the U phase is a value obtained by dividing positive-side arm voltage command value Vpuref by capacitor voltage average value Vcpu of positive-side arm 13u (i.e., Kpuref=Vpuref / Vcpu). The same applies to positive-side arm modulation command values ​​Kpvref, Kpwref.

[0050] The arm modulation command generator 308 generates negative arm modulation command values ​​Knuref, Knvref, and Knwref (hereinafter also collectively referred to as "negative arm modulation command value Knref") for the negative arms 14u, 14v, and 14w. Specifically, the arm modulation command generator 308 generates the negative arm modulation command value Knref for each phase based on the negative arm voltage command value Vnref and the voltage of each capacitor 32 included in the negative arm 14. For example, the negative arm modulation command value Knuref for the U phase is a value obtained by dividing the negative arm voltage command value Vnuref by the capacitor voltage average value Vcnu of the negative arm 14u (i.e., Knuref=Vnuref / Vcnu). The same applies to the negative arm modulation command values ​​Knvref and Knwref.

[0051] The modulation command control unit 310 corrects the positive arm modulation command value Kpref and negative arm modulation command value Knref (hereinafter also collectively referred to as "arm modulation command values") for each phase generated as described above, to generate a positive arm modulation command value Kzpref and a negative arm modulation command value Kznref (hereinafter also collectively referred to as "modulation command value Kzref") for each phase. The role of the modulation command control unit 310 is to generate a modulation signal (i.e., modulation command value Kzref) suitable for a double star MMC type power conversion device. The reason for providing the modulation command control unit 310 will be explained.

[0052] The capacitor voltage of the converter cell 1 includes a DC component and a fundamental AC component, and the output current of the converter cell 1 includes a DC component and a fundamental AC component. Therefore, the instantaneous power obtained by multiplying the capacitor voltage and the output current includes multiple components such as the DC component, the fundamental AC component, and the double frequency component, and the capacitor voltage of the converter cell 1 fluctuates with these frequency components.

[0053] Since the arm modulation command value is a value calculated using the arm voltage command value and the corresponding arm capacitor voltage average value, when the capacitor voltage fluctuates, the arm modulation command value also fluctuates. For example, even if the arm voltage command value does not contain distortion components other than the DC component and the fundamental AC component, when the capacitor voltage contains distortion components, the arm modulation command value will have a distorted waveform.

[0054] A technique for improving the voltage utilization rate of a power converter is known, in which a third-order harmonic component is superimposed as a zero-phase sequence signal on a modulation signal such as an arm modulation command value. However, in an MMC power converter, in which each arm has an independent capacitor in each of multiple series-connected converter cells, the capacitor voltage fluctuates significantly. Therefore, simply superimposing a frequency component three times the fundamental frequency of the AC voltage (i.e., a third-order harmonic component) on the modulation signal may not achieve a sufficient voltage utilization rate. In addition, the appropriate zero-phase sequence signal to be superimposed varies depending on the operating point of the power converter (e.g., output voltage, output current, output frequency). The following describes in detail the functions and processing of the modulation command control unit 310 for improving the voltage utilization rate.

[0055] Fig. 5 is a block diagram showing an example of a functional configuration of the modulation command control unit 310. Referring to Fig. 5, the modulation command control unit 310 includes a zero-phase modulation command generation unit 400, a synthesis processing unit 410, an extraction unit 420, and a modulation command generation unit 430.

[0056] The zero-phase modulation command generator 400 receives the positive-side arm modulation command value Kpref and the negative-side arm modulation command value Knref for each phase, and generates a positive-side zero-phase modulation command value Kspref and a negative-side zero-phase modulation command value Ksnref based on these values. Specifically, the zero-phase modulation command generator 400 includes a positive-side zero-phase modulation command generator 401 and a negative-side zero-phase modulation command generator 402.

[0057] The positive-side zero-phase modulation command generator 401 generates the average value of the maximum and minimum values ​​of the positive-side arm modulation command values ​​Kpuref, Kpvref, and Kpwref as the positive-side zero-phase modulation command value Kspref. For example, when the positive-side arm modulation command value Kpuref is the maximum value and the positive-side arm modulation command value Kpwref is the minimum value, the positive-side zero-phase modulation command value Kspref is calculated as "Kspref = (Kpuref + Kpwref) / 2." The positive-side zero-phase modulation command value Kspref calculated in this manner is a signal in which the maximum positive absolute value with respect to the average value of the instantaneous positive-side arm modulation command value Kpref of each phase (i.e., U phase, V phase, W phase) is equal to the maximum negative absolute value with respect to the average value. As a result, even if the positive-side arm modulation command value Kpref has a distorted waveform, the positive-side zero-phase modulation command value Kspref has a waveform with symmetrical positive and negative sides.

[0058] The negative-side zero-phase modulation command generator 402 generates the average value of the maximum and minimum values ​​of the negative-side arm modulation command values ​​Knuref, Knvref, and Knwref as the negative-side zero-phase modulation command value Ksnref. For example, when the negative-side arm modulation command value Knuref is the maximum value and the negative-side arm modulation command value Knwref is the minimum value, the calculation is "Ksnref = (Knuref + Knwref) / 2." The negative-side zero-phase modulation command value Ksnref also becomes a signal in which the maximum positive absolute value with respect to the average value of the instantaneous negative-side arm modulation command value Knref of each phase is equal to the maximum negative absolute value with respect to the average value. Therefore, even if the negative-side arm modulation command value Knref has a distorted waveform, the negative-side zero-phase modulation command value Ksnref has a waveform with symmetrical positive and negative sides.

[0059] The positive-side zero-phase modulation command value Kspref and the negative-side zero-phase modulation command value Ksnref obtained by the above method are signals containing integer-order components three times the fundamental frequency.

[0060] The synthesis processing unit 410 generates a synthetic zero-phase modulation command value Ksyref by executing synthesis processing based on the positive-side zero-phase modulation command value Kspref and the negative-side zero-phase modulation command value Ksnref. There are several possible patterns for the synthesis processing.

[0061] In one aspect, synthesis processing unit 410 generates an average value of positive-side zero-phase modulation command value Kspref and negative-side zero-phase modulation command value Ksnref as synthesis zero-phase modulation command value Ksyref.

[0062] In another aspect, synthesis processing unit 410 selects one of the command values ​​of the positive-side zero-phase modulation command value Kspref and the negative-side zero-phase modulation command value Ksnref, and generates the selected command value as the synthesized zero-phase modulation command value Ksyref. For example, synthesis processing unit 410 multiplies the positive-side zero-phase modulation command value Kspref by a gain of "1" and multiplies the negative-side zero-phase modulation command value Ksnref by a gain of "0" to generate the selected positive-side zero-phase modulation command value Kspref as the synthesized zero-phase modulation command value Ksyref.

[0063] In yet another aspect, synthesis processing unit 410 generates, as the synthetic zero-phase modulation command value Ksyref, one of the positive-side zero-phase modulation command value Kspref and the negative-side zero-phase modulation command value Ksnref, whichever has a larger absolute value. For example, when "|Kspref| > |Ksnref|" holds, the positive-side zero-phase modulation command value Kspref is generated as the synthetic zero-phase modulation command value Ksyref. || indicates an absolute value symbol. Alternatively, synthesis processing unit 410 generates, as the synthetic zero-phase modulation command value Ksyref, one of the positive-side zero-phase modulation command value Kspref and the negative-side zero-phase modulation command value Ksnref, whichever has a smaller absolute value. For example, when "|Kspref| > |Ksnref|" holds, the negative-side zero-phase modulation command value Ksnref is generated as the synthetic zero-phase modulation command value Ksyref.

[0064] In yet another aspect, synthesis processing unit 410 generates the maximum value of the positive-side zero-phase modulation command value Kspref and the negative-side zero-phase modulation command value Ksnref as the synthesized zero-phase modulation command value Ksyref. For example, when "Kspref > Ksnref" is satisfied, such as when Kspref = 0.17 and Ksnref = -0.1, synthesis processing unit 410 generates the positive-side zero-phase modulation command value Kspref as the synthesized zero-phase modulation command value Ksyref. Alternatively, synthesis processing unit 410 generates the minimum value of the positive-side zero-phase modulation command value Kspref and the negative-side zero-phase modulation command value Ksnref as the synthesized zero-phase modulation command value Ksyref. For example, when "Kspref > Ksnref" is satisfied, such as when Kspref = 0.17 and Ksnref = -0.1, synthesis processing unit 410 generates the negative-side zero-phase modulation command value Ksnref as the synthesized zero-phase modulation command value Ksyref.

[0065] Which of the above synthesis processes is to be adopted is determined arbitrarily by the system operator.

[0066] The extraction unit 420 extracts the third harmonic component of the composite zero-phase modulation command value Ksyref. For example, the extraction unit 420 extracts the third harmonic component by performing filtering using a band-pass filter, a high-pass filter, or the like, or Fourier transform processing on the composite zero-phase modulation command value Ksyref. The extraction unit 420 outputs the extracted third harmonic component as the zero-phase modulation command value Kexref. In this way, by removing (or reducing) frequency components other than the third harmonic component of the composite zero-phase modulation command value Ksyref and avoiding discontinuities, a zero-phase modulation command value Kexref suitable for the power converter 6 can be obtained.

[0067] The modulation command generation unit 430 generates a positive-side modulation command value Kzpref for each phase based on the positive-side arm modulation command value Kpref and the zero-phase-phase modulation command value Kexref, and generates a negative-side modulation command value Kznref based on the negative-side arm modulation command value Knref and the zero-phase-phase modulation command value Kexref. Specifically, the modulation command generation unit 430 includes a subtractor 431 and an adder 432.

[0068] Subtractor 431 generates a positive-side modulation command value Kzpref for each phase by subtracting the zero-phase modulation command value Kexref from the positive-side arm modulation command value Kpref. For example, a subtraction value (i.e., Kpuref-Kexref) obtained by subtracting the zero-phase modulation command value Kexref from the positive-side arm modulation command value Kpuref for the U phase is generated as the positive-side modulation command value Kzpuref for the U phase. The same applies to the positive-side modulation command values ​​Kzpvref and Kzpwref for the V and W phases.

[0069] Adder 432 generates a negative-side modulation command value Kznref by adding the zero-phase modulation command value Kexref to the negative-side arm modulation command value Knref for each phase. For example, adder 432 generates a sum (i.e., Knuref+Kexref) by adding the zero-phase modulation command value Kexref to the negative-side arm modulation command value Knuref of the U phase as the negative-side modulation command value Kznuref of the U phase. The same applies to the negative-side modulation command values ​​Kznvref and Kznwref of the V phase and W phase.

[0070] <Advantages> The advantages of this embodiment will be explained by comparing the positive side modulation command value and negative side modulation command value generated by a conventional method with the positive side modulation command value Kzpref and negative side modulation command value Kznref generated as described above.

[0071] FIG. 6 is a diagram showing time variations of a zero-phase modulation command value, a positive-side modulation command value, and a negative-side modulation command value according to a comparative example. FIGS. 6(a), 6(b), and 6(c) respectively show time variations of the zero-phase modulation command value, the positive-side modulation command value, and the zero-phase modulation command value for each phase according to a comparative example. Specifically, the zero-phase modulation command value according to the comparative example is a third-order harmonic component having an amplitude 1 / 6 of the fundamental wave component of the AC voltage command value and a frequency three times the fundamental frequency. The positive-side modulation command value according to the comparative example is a value obtained by subtracting the third-order harmonic component from the positive-side arm modulation command value Kpref. The negative-side modulation command value according to the comparative example is a value obtained by adding the third-order harmonic component to the negative-side arm modulation command value Knref.

[0072] 7A to 7C are diagrams showing time variations of the zero-phase modulation command value, the positive-side modulation command value, and the negative-side modulation command value according to this embodiment. Figures 7A, 7B, and 7C respectively show time variations of the zero-phase modulation command value Kexref, the positive-side modulation command value Kzpref, and the negative-side modulation command value Kznref for each phase according to this embodiment. The zero-phase modulation command value Kexref shown in Figure 7A is generated based on a synthesis process in which the positive-side zero-phase modulation command value Kspref or the negative-side zero-phase modulation command value Ksnref, whichever has a larger absolute value, is used as the synthesized zero-phase modulation command value Ksyref.

[0073] 6(b) and 7(b), the maximum value of the positive-side modulation command value according to the comparative example is 0.851 pu, while the maximum value of the positive-side modulation command value Kzpref according to this embodiment is 0.846 pu. Therefore, this embodiment is improved by -0.005 pu compared to the comparative example. Furthermore, the minimum value of the positive-side modulation command value according to the comparative example is 0.145 pu, while the minimum value of the positive-side modulation command value Kzpref is 0.141 pu. Therefore, this embodiment is improved by -0.004 pu compared to the comparative example.

[0074] 6(c) and 7(c), the maximum value of the negative side modulation command value according to the comparative example is 0.852 pu, while the maximum value of the negative side modulation command value Kznref according to this embodiment is 0.846 pu. Therefore, this embodiment is improved by -0.006 pu compared to the comparative example. Furthermore, the minimum value of the negative side modulation command value according to the comparative example is 0.145 pu, while the minimum value of the negative side modulation command value Kznref is 0.141 pu. Therefore, this embodiment is improved by -0.004 pu compared to the comparative example.

[0075] In the present embodiment, improvements are confirmed in both the positive-side modulation command value and the negative-side modulation command value compared to the comparative example. Therefore, the output voltage range of the power converter 6 can be expanded, and the voltage utilization rate can be improved.

[0076] 6(a) and 7(a), the amplitude of the zero-phase modulation command value according to the comparative example is 0.17 pu, while the amplitude of the zero-phase modulation command value Kexref according to this embodiment is 0.057 pu. The amplitude of the zero-phase modulation command value Kexref is approximately one-third of the amplitude of the zero-phase modulation command value according to the comparative example. This means that the third-order harmonic components superimposed on the positive-side arm modulation command value and the negative-side arm modulation command value are small, and therefore the harmonic components output from power converter 6 are also suppressed.

[0077] 7, an example has been described in which the zero-phase modulation command value Kexref is generated based on a synthesis process in which the command value with the larger absolute value between the positive-side zero-phase modulation command value Kspref and the negative-side zero-phase modulation command value Ksnref is used as the synthesized zero-phase modulation command value Ksyref. In this case, as described above, an improvement effect is expected in the maximum and minimum values ​​of each of the positive-side modulation command value Kzpref and the negative-side modulation command value Kznref. However, other synthesis processes may also be adopted.

[0078] For example, when a configuration is adopted in which the positive-side zero-phase modulation command value Kspref is the composite zero-phase modulation command value Ksyref, priority is expected to be given to improving the maximum and minimum values ​​of the positive-side modulation command value Kzpref. On the other hand, when a configuration is adopted in which the negative-side zero-phase modulation command value Ksnref is the composite zero-phase modulation command value Ksyref, priority is expected to be given to improving the maximum and minimum values ​​of the negative-side modulation command value Kznref.

[0079] Furthermore, when a configuration is adopted in which the average value of the positive-side zero-phase modulation command value Kspref and the negative-side zero-phase modulation command value Ksnref is set as the composite zero-phase modulation command value Ksyref, a well-balanced improvement in the maximum and minimum values ​​of each of the positive-side modulation command value Kzpref and the negative-side modulation command value Kznref is expected.

[0080] When a configuration is adopted in which the command value with the smaller absolute value of the positive-side zero-phase modulation command value Kspref and the negative-side zero-phase modulation command value Ksnref is used as the composite zero-phase modulation command value Ksyref, the improvement effect on the maximum and minimum values ​​of the positive-side modulation command value Kzpref and the negative-side modulation command value Kznref may be slightly reduced, but it is expected that the effect of suppressing the harmonic components output from the power converter 6 will be further improved.

[0081] When a configuration is adopted in which the maximum value of the positive-side zero-phase modulation command value Kspref and the negative-side zero-phase modulation command value Ksnref is set as the composite zero-phase modulation command value Ksyref, it is expected that the maximum values ​​of the positive-side modulation command value Kzpref and the negative-side modulation command value Kznref will be improved preferentially. On the other hand, when a configuration is adopted in which the minimum value of the positive-side zero-phase modulation command value Kspref and the negative-side zero-phase modulation command value Ksnref is set as the composite zero-phase modulation command value Ksyref, it is expected that the minimum values ​​of the positive-side modulation command value Kzpref and the negative-side modulation command value Kznref will be improved preferentially. Furthermore, when a configuration is adopted in which the maximum or minimum value is set as the composite zero-phase modulation command value Ksyref, it is expected that the harmonic components output from the power converter 6 will be more effectively suppressed than when a configuration is adopted in which the command value with the larger absolute value of the positive-side zero-phase modulation command value Kspref and the negative-side zero-phase modulation command value Ksnref is set as the composite zero-phase modulation command value Ksyref.

[0082] Furthermore, according to this embodiment, the zero-phase modulation command value Kexref superimposed on the positive arm modulation command value Kpref and the negative arm modulation command value Knref is generated in real time during operation of the power converter 6. This means that even if the operating point of the power converter 6 changes, an appropriate zero-phase modulation command value Kexref is generated in accordance with the change. Therefore, even if the operating point of the power converter 6 changes, the voltage utilization rate can be appropriately improved.

[0083] Other embodiments. The configurations exemplified as the above-described embodiments are examples of the configurations of the present disclosure, and may be combined with other known technologies, or may be modified, such as by omitting some parts, within the scope of the gist of the present disclosure. Furthermore, the above-described embodiments may be implemented by appropriately adopting the processes and configurations described in other embodiments.

[0084] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present disclosure is defined by the claims, not by the above description, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0085] 1 converter cell, 2 AC system, 3 transformer, 4 DC circuit, 5 control device, 6 power converter, 7a, 7b reactor, 8u to 8w leg circuit, 9a, 9b arm current detector, 10 AC voltage detector, 11a, 11b DC voltage detector, 13u to 13w positive arm, 14u to 14w negative arm, 15 AC current detector, 31n, 31p switching element, 32 capacitor, 33 voltage detector, 70 input converter, 71 sample and hold circuit, 72 multiplexer, 73 A / D converter, 75 RAM, 76 ROM, 77 input / output interface, 78 auxiliary storage device, 79 bus, 100 power conversion device, 300 command generation unit, 302 AC control unit, 304 DC control unit, 306 circulating current control unit, 308 arm modulation command generation unit, 310 Modulation command control section, 320 PWM control section, 400 zero-phase modulation command generation section, 401 positive-side zero-phase modulation command generation section, 402 negative-side zero-phase modulation command generation section, 410 synthesis processing section, 420 extraction section, 430 modulation command generation section, 431 subtractor, 432 adder.

Claims

1. A power conversion device that performs power conversion between an AC system and a DC circuit, a power converter including a plurality of leg circuits respectively corresponding to a plurality of phases of the AC system; a control device for controlling the power converter, the leg circuit includes a positive arm and a negative arm connected in series, a connection point of the positive arm and the negative arm is connected to an AC line of a corresponding phase of the AC system, and both ends of the positive arm and the negative arm connected in series are connected to the DC circuit; each of the positive arm and the negative arm includes a plurality of converter cells connected in series, each of the plurality of converter cells including a plurality of switching elements and an energy storage element; The control device an arm modulation command generator that generates, for each of the plurality of phases, a positive arm modulation command value for the positive arm and a negative arm modulation command value for the negative arm; a zero-phase modulation command generating unit that generates an average value of a maximum value and a minimum value of each of the positive side arm modulation command values ​​as a first zero-phase modulation command value, and generates an average value of a maximum value and a minimum value of each of the negative side arm modulation command values ​​as a second zero-phase modulation command value; a synthesis processing unit that generates a synthesized zero-phase modulation command value by executing synthesis processing based on the first zero-phase modulation command value and the second zero-phase modulation command value; an extractor that extracts a third harmonic component of the composite zero-phase modulation command value; a modulation command generation unit that generates, for each of the plurality of phases, a positive-side modulation command value based on the positive-side arm modulation command value and the third-order harmonic component, and generates a negative-side modulation command value based on the negative-side arm modulation command value and the third-order harmonic component.

2. The power conversion device according to claim 1 , wherein the synthesis processing unit generates an average value of the first zero-phase modulation command value and the second zero-phase modulation command value as the synthetic zero-phase modulation command value.

3. 2. The power conversion device according to claim 1, wherein the synthesis processing unit selects one of the first zero-phase modulation command value and the second zero-phase modulation command value, and generates the selected command value as the synthesized zero-phase modulation command value.

4. The power conversion device according to claim 1 , wherein the synthesis processing unit generates, as the synthetic zero-phase modulation command value, one of the first zero-phase modulation command value and the second zero-phase modulation command value, whichever has a larger absolute value.

5. The power conversion device according to claim 1 , wherein the synthesis processor generates, as the synthetic zero-phase modulation command value, one of the first zero-phase modulation command value and the second zero-phase modulation command value, whichever has a smaller absolute value.

6. The power conversion device according to claim 1 , wherein the synthesis processing unit generates the maximum value of the first zero-phase modulation command value and the second zero-phase modulation command value as the synthetic zero-phase modulation command value.

7. The power conversion device according to claim 1 , wherein the synthesis processing unit generates a minimum value of the first zero-phase modulation command value and the second zero-phase modulation command value as the synthetic zero-phase modulation command value.

8. The power conversion device according to any one of claims 1 to 7, wherein the modulation command generation unit generates the positive side modulation command value by subtracting the third harmonic component from the positive side arm modulation command value, and generates the negative side modulation command value by adding the third harmonic component to the negative side arm modulation command value.

9. The arm modulation command generation unit generating the positive-side arm modulation command value based on an arm voltage command value of the positive-side arm and a voltage of each of the energy storage elements included in the positive-side arm; The power conversion device according to any one of claims 1 to 7, wherein the negative side arm modulation command value is generated based on an arm voltage command value of the negative side arm and a voltage of each of the energy storage elements included in the negative side arm.

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