Exposure equipment and measurement system

Abstract

In order to improve the throughput in wiring pattern formation for FO-WLP, this exposure device is equipped with: a substrate stage on which a plurality of substrates are placed; and a plurality of first projection modules that each have a spatial light modulator and project, onto the plurality of substrates, a wiring pattern for connecting a plurality of semiconductor chips arranged on each of the plurality of substrates. The plurality of first projection modules project individual wiring patterns onto different substrates at approximately the same time.　

Description

[Technical Field]

[0001] The present invention relates to an exposure apparatus and a measurement system. [Background technology]

[0002] In recent years, semiconductor device packages called Fan Out Wafer Level Packages (FO-WLPs) and Fan Out Plate Level Packages (FO-PLPs) have become known.

[0003] For example, in the manufacture of FO-WLP, multiple semiconductor chips are arranged on a wafer-shaped support substrate and solidified with a molding material such as resin to form a pseudo-wafer, and an exposure device is used to form a rewiring layer that connects the pads of the semiconductor chips.

[0004] There is a demand for an improvement in throughput in forming the rewiring layer of FO-WLP and FO-PLP (for example, Patent Document 1). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Publication No. 2018-081281 Summary of the Invention

[0006] According to an aspect of the disclosure, a plurality of substrates Line up in the first direction The substrate stage on which the light source is placed has a spatial light modulator. do a substrate mounting device that mounts the plurality of substrates on the substrate stage, Each of our multiple first modules First projection area are aligned in the first direction, and the centers of the adjacent first projection areas are aligned at a first interval in the first direction, the substrate mounting device, a value obtained by dividing the size of one of the plurality of substrates by an integer, or a value obtained by dividing the distance between the centers of the plurality of substrates adjacent to each other in the first direction by an integer, is equal to the first distance the plurality of substrates are placed on the substrate stage so that the distances between the substrates are approximately equal to the spatial light modulator includes a plurality of elements each capable of assuming a plurality of states to form patterned light; The plurality of first projection modules include: handle On the board, and arranged to project the corresponding patterned light. , an exposure apparatus is provided.

[0007] The configurations of the embodiments described below may be modified as appropriate, and at least a portion of the configuration may be replaced with other components. Furthermore, components that are not particularly limited in terms of their placement may be placed in any position that can achieve their function, not limited to the placement disclosed in the embodiments. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a top view showing an outline of a FO-WLP wiring pattern forming system including an exposure apparatus according to the first embodiment. [Figure 2] FIG. 2 is a perspective view that schematically shows the configuration of the exposure apparatus according to the first embodiment. [Figure 3] 3A and 3B are diagrams for explaining the wiring pattern formed by the wiring pattern forming system. [Figure 4] FIG. 4 is a diagram for explaining the module arranged on the optical surface plate. [Figure 5] Figure 5(A) is a diagram showing the optical system of the illumination and projection module, Figure 5(B) is a diagram showing the DMD in outline, Figure 5(C) is a diagram showing the DMD when the power is OFF, Figure 5(D) is a diagram explaining the mirror in the ON state, and Figure 5(E) is a diagram explaining the mirror in the OFF state. [Figure 6] FIG. 6 is an enlarged view of the vicinity of the projection system. [Figure 7] FIG. 7(A) is a schematic diagram showing a wafer WF in which all chips are arranged in their designed positions, and FIG. 7(B) is a schematic diagram showing a wafer WF in which chips are arranged shifted from their designed positions. [Figure 8] FIG. 8 is a diagram showing an example of the arrangement of a measurement microscope that measures the position of the chip. [Figure 9] FIG. 9 shows an example of the arrangement of a measurement microscope that measures the position of a substrate. [Figure 10] FIG. 10 is a block diagram showing the control system of the exposure apparatus according to this embodiment. [Figure 11] Figure 11(A) is a diagram showing example 1 of the arrangement of the projection area onto which the projection module projects the wiring pattern, and Figure 11(B) is a diagram explaining the formation of the wiring pattern when the projection area is arranged as in Figure 11(A). [Figure 12] FIG. 12(A) is a diagram showing a second example of the arrangement of the projection area of ​​the projection module, and FIG. 12(B) is a diagram explaining the formation of a wiring pattern when the projection area is arranged as in FIG. 12(A). [Figure 13] Figure 13(A) is a diagram showing example 3 of the arrangement of the projection areas of multiple projection modules, and Figure 13(B) is a diagram explaining the formation of wiring patterns when the projection areas are arranged as in Figure 13(A). [Figure 14] Figure 14(A) is a diagram showing example 4 of the arrangement of the projection areas of multiple projection modules, and Figure 14(B) is a diagram explaining the formation of wiring patterns when the projection areas are arranged as in Figure 14(A). [Figure 15] Figure 15(A) is a diagram showing example 5 of the arrangement of the projection area of ​​the projection module, Figure 15(B) is a diagram for explaining the arrangement of the first projection module and the second projection module included in the projection module, and Figure 15(C) is a diagram for explaining the formation of a wiring pattern when the projection area is arranged as in Figure 15(A). [Figure 16] Figure 16(A) is a diagram showing example 6 of the arrangement of the projection area of ​​the projection module, Figure 16(B) is a diagram for explaining the arrangement of the first projection module and the second projection module included in the projection module, and Figure 16(C) is a diagram for explaining the formation of a wiring pattern when the projection area is arranged as in Figure 16(A). [Figure 17] FIG. 17 is a top view showing an overview of a wiring pattern forming system according to the second embodiment. [Figure 18] FIG. 18(A) is a diagram showing an arrangement example 1 of the measuring microscopes in the tip measurement station according to the second embodiment, and FIG. 18(B) is a diagram showing an arrangement example 2 of the measuring microscopes. [Figure 19]FIG. 19 is a top view showing an overview of a wiring pattern forming system according to the third embodiment. [Figure 20] FIG. 11 is a diagram showing an example of the arrangement of measurement microscopes in a tip measurement station according to the third embodiment. [Figure 21] 21(A) to 21(C) are diagrams illustrating the arrangement of the first projection module and the second projection module. [Figure 22] 22(A) and 22(B) are diagrams for explaining the arrangement of wafers. DETAILED DESCRIPTION OF THE INVENTION

[0009] First Embodiment An exposure apparatus according to a first embodiment will be described with reference to FIGS. 1 to 16. In the following description, when simply referred to as a substrate P, a rectangular substrate is referred to, and a wafer-shaped substrate is referred to as a wafer WF. The normal direction of the substrate P or wafer WF placed on a substrate stage 30 (described later) is referred to as the Z-axis direction, the direction in which the substrate P or wafer WF is scanned relative to a spatial light modulator (SLM) in a plane perpendicular to the Z-axis direction is referred to as the X-axis direction, the direction perpendicular to the Z-axis and the X-axis is referred to as the Y-axis direction, and the directions of rotation (tilt) around the X-axis, Y-axis, and Z-axis are referred to as the θx, θy, and θz directions, respectively. Examples of spatial light modulators include liquid crystal elements, digital mirror devices (digital micromirror devices, DMDs), and magneto-optic spatial light modulators (MOSLMs). The exposure apparatus EX according to the first embodiment includes a DMD 204 as a spatial light modulator, but may also include other spatial light modulators.

[0010] 1 is a top view showing an overview of a wiring pattern forming system 500 for FO-WLP and FO-PLP, including an exposure apparatus EX according to an embodiment. FIG. 2 is a perspective view showing a schematic configuration of the exposure apparatus EX.

[0011] The wiring pattern forming system 500 is a system for forming wiring patterns that connect between semiconductor chips (hereinafter referred to as chips) arranged on a wafer WF, as shown in Figure 3(A), or between chips arranged on a substrate P, as shown in Figure 3(B).

[0012] In this embodiment, a wiring pattern is formed that connects between chips C1 and C2 included in each set (indicated by two-dot chain lines) of chips arranged on the wafer WF or substrate P. Note that in this embodiment, the number of chips included in each set is two, but this is not limited to this and may be three or more.

[0013] The following describes the case where a wiring pattern for connecting chips arranged on a wafer WF is formed.

[0014] As shown in FIG. 1, the wiring pattern forming system 500 includes a coater developer apparatus CD and an exposure apparatus EX.

[0015] The coater developer device CD applies a photosensitive resist to the wafer WF. The wafer WF coated with the resist is then carried into a buffer unit PB, which can store multiple wafers WF. The buffer unit PB also serves as a transfer port for the wafer WF.

[0016] More specifically, the buffer unit PB is composed of an inlet and an outlet. Wafers WF coated with resist are loaded one by one into the inlet from the coater-developer device CD. The resist-coated wafers WF are loaded one by one from the coater-developer device CD into the inlet at predetermined intervals, but since multiple wafers are loaded together on a tray TR (described later), the inlet functions as a buffer for storing the wafers WF.

[0017] The unloading section also functions as a buffer when unloading the exposed wafers WF to the coater-developer device CD. The coater-developer device CD can only unload exposed wafers WF one at a time. Therefore, a tray TR carrying multiple exposed wafers WF is placed in the unloading section. This allows the coater-developer device CD to unload the exposed wafers WF one at a time from the tray TR.

[0018] The exposure apparatus EX includes a main body 1 and a substrate exchange unit 2. As shown in Fig. 1, a robot RB is installed in the substrate exchange unit 2. The robot RB arranges multiple wafers WF placed in a buffer unit PB on a single tray TR.

[0019] 1 and 2, in the first embodiment, wafers WF can be placed in three rows of four on the substrate stages 30R and 30L, which will be described later. The tray TR according to the first embodiment is a lattice-shaped tray that can sequentially place wafers WF in one row of four on the substrate stages 30R and 30L. The tray TR may also be a tray that can simultaneously place wafers WF over the entire surface of the substrate stages 30R and 30L (i.e., a tray that can accommodate wafers WF in three rows of four).

[0020] 2, the substrate exchange unit 2 includes exchange arms 20R and 20L. The exchange arm 20R loads and unloads wafers WF (more specifically, a tray TR on which a plurality of wafers WF are placed) onto and from the substrate holder PH of the substrate stage 30R, and the exchange arm 20L loads and unloads wafers WF onto and from the substrate holder PH of the substrate stage 30L. In the following description, when there is no need to particularly distinguish between the exchange arms 20R and 20L, they will be referred to as exchange arm 20. In addition, the substrate holder PH is not shown in any drawings other than FIG. 2.

[0021] Generally, the exchange arms 20R, 20L are each provided with two arms: a load arm for loading the tray TR and a load arm for unloading the tray TR. This allows for high-speed exchange of the tray TR. When loading the wafer WF, the lattice-shaped tray TR is supported by substrate exchange pins 10. When the substrate exchange pins 10 descend, the tray TR sinks into grooves (not shown) formed in the substrate stage 30, and the wafer WF is attracted and held by the substrate holder PH on the substrate stage 30. When a row of substrates is placed on the tray TR as shown in FIG. 2, the positions of the substrate stages 30R, 30L or the positions of the exchange arms 20R, 20L are changed to match the positions on the substrate stages 30R, 30L where each tray TR is placed.

[0022] Next, we will explain the main body 1. Fig. 4 is a diagram for explaining modules arranged on an optical base 110 provided in the main body 1. As shown in Fig. 4, a plurality of projection systems 210, an autofocus system AF, and alignment systems ALG_R, ALG_L, and ALG_C are arranged on the optical base 110, which is kinematically supported on a column 100.

[0023] 5A is a diagram showing the optical system of the projection system 210. The projection system 210 includes an illumination module 220 and a projection module 200. The illumination module 220 includes a collimator lens 201, a fly's eye lens 202, a main condenser lens 203, a DMD 204, and the like.

[0024] Laser light emitted from a light source LS (see FIG. 2) is taken in by a delivery fiber FB into a projection module 200. The laser light passes through a collimator lens 201, a fly-eye lens 202, and a main condenser lens 203, and illuminates a DMD 204 almost uniformly.

[0025] Fig. 5(B) is a diagram showing a schematic view of the DMD 204, and Fig. 5(C) shows the DMD 204 when the power is OFF. Note that in Fig. 5(B) to Fig. 5(E), mirrors that are in the ON state are indicated by hatching.

[0026] The DMD 204 has multiple micromirrors 204a whose reflection angles can be controlled. Each micromirror 204a is turned on by tilting around the Y axis. FIG. 5(D) shows a case where only the central micromirror 204a is turned on, while the other micromirrors 204a are in a neutral state (neither on nor off). Each micromirror 204a is turned off by tilting around the X axis. FIG. 5(E) shows a case where only the central micromirror 204a is turned off, while the other micromirrors 204a are in a neutral state. The DMD 204 generates an exposure pattern of wiring (hereinafter referred to as wiring pattern) that connects chips by switching the on and off states of each micromirror 204a.

[0027] As shown in Figure 5(A), illumination light reflected by a mirror in the OFF state is absorbed by an OFF light absorbing plate 205. The projection module 200 has a magnification for projecting one pixel of the DMD 204 at a predetermined size, and the magnification can be slightly corrected by focusing by driving the lens along the Z axis and by driving some of the lenses. In addition, the DMD 204 itself can be driven in the X-axis direction, Y-axis direction, and θz direction by controlling the X, Y, and θ stage (not shown) on which the DMD 204 is mounted, and deviations from a target value of the substrate stage 30, for example, are corrected.

[0028] Although the DMD 204 has been described as an example of a spatial light modulator and is therefore a reflective type that reflects laser light, the spatial light modulator may be a transmissive type that transmits laser light or a diffractive type that diffracts laser light. The spatial light modulator can modulate laser light spatially and temporally.

[0029] 4, the autofocus system AF is arranged to sandwich the projection system 210. This allows measurements to be performed by the autofocus system AF before the exposure operation that forms the wiring pattern that connects the chips arranged on the wafer WF, regardless of the scanning direction of the wafer WF.

[0030] 6 is an enlarged view of the vicinity of the projection system 210. As shown in FIG. 6, a fixed mirror 54 for measuring the position of the substrate stage 30 is provided near the projection module 200.

[0031] 6, the substrate stage 30 is provided with an alignment device 60. The alignment device 60 includes a reference mark 60a and a two-dimensional image sensor 60e. The alignment device 60 is used to measure and calibrate the positions of various modules, and is also used to calibrate the alignment systems ALG_R, ALG_L, and ALG_C arranged on the optical surface plate 110.

[0032] The position of each module is measured and calibrated by projecting a calibration DMD pattern onto the reference mark 60a of the alignment device 60 using the projection module 200 and measuring the relative position of the reference mark 60a and the DMD pattern.

[0033] Furthermore, alignment systems ALG_R, ALG_L, and ALG_C can be calibrated by measuring reference mark 60a of alignment device 60 with alignment systems ALG_R, ALG_L, and ALG_C. That is, by measuring reference mark 60a of alignment device 60 with alignment systems ALG_R, ALG_L, and ALG_C, the positions of alignment systems ALG_R, ALG_L, and ALG_C can be determined. Furthermore, using reference mark 60a, it is possible to determine the relative position with respect to the position of the module.

[0034] The substrate stage 30 is also provided with a moving mirror MR, a DM monitor 70, and the like, which are used to measure the position of the substrate stage 30.

[0035] Alignment systems ALG-R and ALG-L each measure the position of a chip on each wafer WF held by the substrate holder PH or the position of the pads of the chip to be wired, using fiducial marks 60a of alignment device 60 as a reference. More specifically, alignment systems ALG_R and ALG_L measure the position of each chip based on the design position of each chip, using fiducial marks 60a as a reference. The measurement results are output to data creation device 300, which will be described later.

[0036] Here, the measurement of the position of each chip will be described.

[0037] FIG. 7A is a schematic diagram showing a wafer WF with all chips arranged in their designed positions (hereinafter referred to as the "design positions"). As shown in FIG. 7A, a wiring pattern WL connecting chip C1 and chip C2 is exposed (formed) using an exposure tool EX. In the FO-WLP system, the chips are solidified on the wafer WF with a molding material such as resin, and as shown in FIG. 7B, the positions of individual chips may be shifted from their designed positions. In this case, if the DMD 204 is controlled to expose the wiring pattern using data indicating the wiring pattern connecting chips located in their designed positions (hereinafter referred to as the "design value data"), the wiring pattern may be shifted from the pad positions, resulting in poor connection or short circuits.

[0038] Therefore, in this embodiment, the positions of the chips included in each set of chips arranged on the wafer WF are measured by the alignment system ALG_R or ALG_L. The data creating device 300 creates wiring pattern data in which part of the design value data is corrected based on the measurement results obtained from the alignment system ALG_R or ALG_L.

[0039] Alignment systems ALG_R and ALG_L include a plurality of measurement microscopes 61a and 61b.

[0040] (Example of arrangement of measuring microscopes 61a and 61b) Here, the arrangement of the multiple measurement microscopes 61a and 61b provided in the alignment systems ALG_R and ALG_L will be described. Fig. 8 is a diagram showing an example of the arrangement of the measurement microscopes 61a and 61b. In Fig. 8, the lenses of the measurement microscopes 61a and 61b are illustrated as measurement microscopes 61a and 61b. As shown in Fig. 8, a case will be described in which wafers WF are arranged in 4 columns and 3 rows on the substrate stage 30. The wafers WF are arranged at intervals L1 in the Y-axis direction, and at intervals L2 in the X-axis direction.

[0041] Of the multiple measuring microscopes, the first measuring microscope 61a is arranged so that it can measure the positions of chips on different wafers WF substantially simultaneously.

[0042] The multiple first measuring microscopes 61a are arranged so that they can measure the positions of semiconductor chips on different wafers WF approximately simultaneously. In this embodiment, the multiple first measuring microscopes 61a are provided corresponding to the multiple wafers WF, respectively. Specifically, the first measuring microscopes 61a are arranged in a matrix of 4 columns x 3 rows.

[0043] The distance D5a between adjacent first measuring microscopes 61a in the Y-axis direction is approximately equal to the distance L1 at which the wafers WF are lined up in the Y-axis direction, and the distance D6a between adjacent first measuring microscopes 61a in the X-axis direction is approximately equal to the distance L2 at which the wafers WF are lined up in the X-axis direction. By arranging the first measuring microscopes 61a in this way, the positions of the chips lined up on each of the 12 wafers WF can be measured approximately simultaneously.

[0044] In this embodiment, the alignment systems ALG_R and ALG_L further include a plurality of second measurement microscopes 61b provided corresponding to the respective first measurement microscopes 61a. Each of the second measurement microscopes 61b measures an area on the same wafer WF as the corresponding first measurement microscope 61a, but different from the area measured by the corresponding first measurement microscope 61a, approximately simultaneously with the corresponding first measurement microscope 61a.

[0045] 8, four second measuring microscopes 61b are provided for each of the plurality of first measuring microscopes 61a. Each second measuring microscope 61b is located within the width W in the Y-axis direction of the measurement region MR1a from the corresponding first measuring microscope 61a. MR 8, the distance Dmab1 between the first measuring microscope 61a and the second measuring microscope 61b that is closest to the first measuring microscope 61a among the second measuring microscopes 61b provided corresponding to the first measuring microscope 61a is W MR (W MR The distance Dmab2 between the first measuring microscope 61a and the second measuring microscope 61b that is the second closest to the first measuring microscope 61a is approximately equal to W MR The width W of the measurement region MR1a in the Y-axis direction is approximately equal to twice the width W of the measurement region MR1a. MR is approximately equal to one integer division of the diameter d1 of the wafer WF (one fifth in FIG. 8).

[0046] In the example of FIG. 8, the positions of chips on 12 wafers WF can be measured in one scan, and therefore the time required to measure the positions of chips can be reduced compared to, for example, measuring the positions of chips on 12 wafers WF using a single measurement microscope 61. More specifically, in the example of FIG. 8, the positions of chips on 12 wafers WF can be measured in 1 / 60 of the time required to measure the positions of chips on 12 wafers WF using a single measurement microscope 61. Therefore, the throughput in forming the wiring pattern can be improved. Note that the throughput in forming the wiring pattern refers to the throughput in the process related to the formation of the wiring pattern, and the process related to the formation of the wiring pattern includes the process of measuring the chip positions, the process of measuring the positions of the wafers WF, and the process of forming the wiring pattern.

[0047] Before the start of exposure, alignment system ALG_C measures the position of wafer WF placed on the substrate holder of substrate stage 30, using reference mark 60a of alignment device 60 as a reference. Based on the measurement result of alignment system ALG_C, positional deviation of wafer WF relative to substrate stage 30 is detected, and the exposure start position, etc. are changed.

[0048] Before exposure begins, alignment system ALG_C measures the position of wafer WF placed on substrate holder PH of substrate stage 30 using fiducial mark 60a (see FIG. 8) of alignment device 60 as a reference. However, if the positional relationship between substrate stage 30 and wafer WF remains unchanged, measurement by alignment system ALG_C may be omitted. Furthermore, if slight deviations occur in the X, Y, θ, and magnification of each wafer WF placed on substrate holder PH, alignment system ALG_C measures the current state of wafer WF, and the difference between this and the state of wafer WF measured by alignment systems ALG_R and ALG_L (the state of wafer WF used to create the wiring pattern data) can be corrected by changing the state of the X, Y, and θ stage on which DMD 204 is mounted and the lens magnification. This eliminates the need to rewrite the wiring pattern data, allowing for a smooth transition to exposure.

[0049] In this embodiment, alignment system ALG_C includes a plurality of measurement microscopes 65. Each of the plurality of measurement microscopes 65 measures the position of a different substrate approximately simultaneously.

[0050] (Arrangement of measuring microscope 65) 9 shows an example of the arrangement of multiple measurement microscopes 65 provided in alignment system ALG_C. As shown in Fig. 9, in this embodiment, the multiple measurement microscopes 65 are provided to correspond to the multiple wafers WF, respectively. That is, the multiple measurement microscopes 65 are arranged in a matrix of 4 columns and 3 rows. The distance D3 between adjacent measurement microscopes 65 in the Y-axis direction is approximately equal to the distance L1 at which the wafers WF are arranged in the Y-axis direction, and the distance D4 between adjacent measurement microscopes 65 in the X-axis direction is approximately equal to the distance L2 at which the wafers WF are arranged in the X-axis direction.

[0051] Each of the multiple measurement microscopes 65 arranged in this manner moves relative to the wafer WF as indicated by the dashed arrows by movement of the substrate stage 30, and measures four locations on the corresponding wafer WF. This makes it possible to calculate six parameters of the wafer WF placed on the substrate holder PH: X-axis shift (X), Y-axis shift (Y), rotation (Rot), X-axis magnification (X_Mag), Y-axis magnification (Y_Mag), and orthogonality (Oth).

[0052] In the alignment system ALG_C, multiple measurement microscopes 65 are provided to correspond to each of the multiple wafers WF, so that the positions of all the wafers WF can be measured in a shorter time than when measuring the position of the wafer WF with, for example, a single measurement microscope 65.

[0053] 10 is a block diagram showing a control system 600 of the exposure apparatus EX according to the present embodiment. As shown in FIG. 10, the control system 600 includes a data creating device 300, a first storage device 310R, a second storage device 310L, and an exposure control device 400.

[0054] The data creating device 300 receives measurement results of the position of each chip or the position of each chip's pads on the wafer WF placed on the substrate holder of the substrate stage 30 from the alignment systems ALG_R and ALG_L. Based on the measurement results of the position of each chip, the data creating device 300 determines a wiring pattern connecting the chips and creates control data to be used for controlling the DMD 204 when generating the determined wiring pattern. In this embodiment, the alignment system ALG_R or ALG_L measures the position of each chip included in a set of multiple chips arranged on the wafer WF. The data creating device 300 creates wiring pattern data in which part of the design value data has been corrected based on the measurement results obtained from the alignment system ALG_R or ALG_L.

[0055] The created wiring pattern data is stored in the first storage device 310R or the second storage device 310L. The first storage device 310R and the second storage device 310L are, for example, SSDs (Solid State Drives).

[0056] The first storage device 310R stores wiring pattern data used to control the DMD 204 when exposing the wafer WF placed on the substrate stage 30R. The second storage device 310L stores wiring pattern data used to control the DMD 204 when exposing the wafer WF placed on the substrate stage 30L. The wiring pattern data stored in the first storage device 310R or the second storage device 310L is transferred to the exposure control device 400.

[0057] The exposure control device 400 controls the projection modules 200 to expose the wiring patterns onto the wafer WF. More specifically, the exposure control device 400 causes the multiple projection modules 200 to expose the respective wiring patterns onto different wafers WF approximately simultaneously.

[0058] For this reason, in this embodiment, the multiple projection modules 200 are arranged so that the projection areas of the multiple projection modules 200 are located on different wafers WF. Below, an example of the arrangement of the projection areas and the arrangement of the projection modules 200 to achieve this will be described.

[0059] (Layout example 1) FIG. 11A shows an arrangement example 1 of the projection area onto which the projection module 200 projects the wiring pattern. In FIG. 11A, the projection module 200 is indicated by a dotted line, and the projection area PR1 onto which the projection module 200 projects the wiring pattern onto the wafer WF is indicated by a solid line. Also, in FIG. 11A, the area R1 onto which the wiring pattern is exposed in one scan of the substrate stage 30 is indicated by a two-dot chain line. This also applies to the subsequent figures. Note that one scan refers to moving the substrate stage 30 a predetermined distance from the +X side to the -X side, or from the -X side to the +X side. Hereinafter, the distance moved by the substrate stage 30 in one scan will be referred to as the scanning distance.

[0060] 11(A), the wafers WF are arranged at an interval L1 in the Y-axis direction (non-scanning direction) and at an interval L2 in the X-axis direction (scanning direction). The diameter of the wafers WF is d1.

[0061] 11(A), in Arrangement Example 1, the projection regions PR1 are arranged so that the distance D1 between adjacent projection regions PR1 in the Y-axis direction is approximately equal to the distance L1 at which the wafers WF are arranged in the Y-axis direction (D1=L1). The arrangement of the projection regions PR1 shown in FIG. 11(A) can be achieved, for example, by arranging the projection modules 200 at a distance D1 that is approximately equal to the distance L1 in the Y-axis direction.

[0062] Fig. 11(B) is a diagram for explaining the formation (exposure) of a wiring pattern when the projection area PR1 is positioned as in Fig. 11(A). In Fig. 11(B), the relative movement of the projection area PR1 with respect to the wafer WF is indicated by dashed arrows. Also, the number of scans of the substrate stage 30 is written on the right edge.

[0063] In Arrangement Example 1, each projection module 200 projects and exposes wiring patterns onto four wafers WF in one scan.

[0064] 11(A), the width in the Y-axis direction (non-scanning direction) of the region R1 exposed by each projection module 200 in one scan is W1, and the diameter d1 of the wafer WF is eight times W1. In this case, wiring patterns can be formed on all of the wafers WF with eight scans.

[0065] 11(A) and 11(B), if only one projection module 200 is provided, 24 scans are required to form wiring patterns on all wafers WF. On the other hand, according to Arrangement Example 1 as described above, wiring patterns can be exposed onto all wafers WF with eight scans, thereby reducing the time required to form wiring patterns.

[0066] (Layout example 2) FIG. 12A is a diagram illustrating a second example of the arrangement of the projection areas of the projection module 200. In FIG.

[0067] In Arrangement Example 2 shown in FIG. 12A, the projection regions PR1 of the multiple projection modules 200 are arranged in a matrix of 2 rows and 3 columns. The distance between adjacent projection regions PR1 in the Y-axis direction is D1, and the distance between adjacent projection regions PR1 in the X-axis direction is D2. The distance D1 in the Y-axis direction is approximately equal to the distance L1 at which the wafers WF are arranged in the Y-axis direction (D1=L1), and the distance D2 in the X-axis direction is approximately equal to twice the distance L2 at which the wafers WF are arranged in the X-axis direction (D2=2×L2). The arrangement of the projection regions PR1 shown in FIG. 12A can be realized, for example, by arranging the projection modules 200 at a distance D1 approximately equal to the distance L1 in the Y-axis direction and arranging the projection modules 200 at a distance D2 approximately equal to twice the distance L2 in the X-axis direction.

[0068] Fig. 12(B) is a diagram for explaining the formation of wiring patterns when the projection region PR1 is arranged as in Fig. 12(A). As shown in Fig. 12(A), consider the case where the width in the Y-axis direction (non-scanning direction) of the region R1 exposed by each projection module 200 in one scan is W1, and the diameter d1 of the wafer WF is approximately equal to eight times W1. In this case, wiring patterns can be formed on all of the wafers WF in eight scans.

[0069] In Arrangement Example 2, multiple projection modules 200 are also arranged in the X-axis direction, so the scanning distance of the substrate stage 30 is shorter than in Arrangement Example 1 (half the scanning distance in Arrangement Example 1). Therefore, the time required to form the wiring pattern can be shorter than in Arrangement Example 1.

[0070] (Layout example 3) FIG. 13A shows a third example of the arrangement of the projection areas of the multiple projection modules 200. In FIG.

[0071] In Arrangement Example 3 shown in Figure 13(A), multiple projection modules 200 are arranged in a matrix of 4 columns x 3 rows to correspond to each wafer WF. The distance between adjacent projection regions PR1 in the Y-axis direction is D1, and the distance between adjacent projection regions PR1 in the X-axis direction is D2. The distance D1 in the Y-axis direction is approximately equal to the distance L1 at which the wafers WF are arranged in the Y-axis direction, and the distance D2 in the X-axis direction is approximately equal to the distance L2 at which the wafers WF are arranged in the X-axis direction. The arrangement of the projection regions PR1 shown in Figure 13(A) can be achieved by arranging the projection modules 200 in the Y-axis direction at a distance D1 that is approximately equal to the distance L1, and by arranging the projection modules 200 in the X-axis direction at a distance D2 that is approximately equal to the distance L2.

[0072] Figure 13(B) is a diagram for explaining the formation of wiring patterns when the projection region PR1 is arranged as in Figure 13(A). As shown in Figure 13(A), the width in the Y-axis direction (non-scanning direction) of the region R1 exposed by each projection module 200 in one scan is W1, and the diameter d1 of the wafer WF is approximately equal to eight times W1. In this case, wiring patterns can be formed on all of the wafers WF with eight scans.

[0073] In Arrangement Example 3, the projection areas PR1 are arranged in the X-axis direction at an interval D2 that is approximately equal to the arrangement interval L1 of the wafers WF. This makes it possible to make the scanning distance of the substrate stage 30 even shorter than in Arrangement Example 2 (half the scanning distance in Arrangement Example 2), and therefore it is possible to form wiring patterns on all of the wafers WF in a shorter time than in Arrangement Example 2 shown in Figure 12(A). In other words, since each of the multiple projection modules 200 exposes a corresponding wafer WF, it is possible to expose 12 wafers WF in the same time as it takes to expose one wafer WF.

[0074] In addition, in Arrangement Example 3, compared with the arrangement examples shown in FIG. 11(A) and FIG. 12(A), the exposure apparatus EX The reason for this will be explained below.

[0075] As shown in Fig. 9, the position of the wafer WF is measured before the start of exposure, and a correction value for correcting the positional deviation of each wafer WF is determined. A), when each projection module 200 exposes multiple wafers WF in one scanning exposure, optical correction must be performed based on a correction value corresponding to the wafer WF when exposing a different wafer WF. Therefore, for example, every time the wafer WF to be exposed changes, the state of the X, Y, θ stage on which the DMD 204 is mounted and the lens magnification must be changed based on the correction value. On the other hand, as shown in FIG. 13(A), if the wafer WF that each projection module 200 is responsible for exposure is determined, the correction value does not change, so there is no need to change the state of the X, Y, θ stage on which the DMD 204 is mounted and the lens magnification. Therefore, it is no longer necessary to set the interval between the wafers WF taking into account the drive time of the X, Y, θ stage of the DMD 204 and the change time of the lens magnification due to switching of the correction value, and this improves the accuracy of the exposure apparatus. EX This leads to smaller size and improved throughput.

[0076] (Layout example 4) Fig. 14(A) shows an arrangement example 4 of the projection areas of the multiple projection modules 200. In the arrangement example 4 shown in Fig. 14(A), the multiple projection modules 200 include a multiple number of first projection modules 200a and a multiple number of second projection modules 200b provided corresponding to the multiple first projection modules 200a, respectively.

[0077] The projection areas PR1a of the multiple first projection modules 200a project their respective wiring patterns onto different substrates at approximately the same time. The distance between adjacent projection areas PR1a in the Y-axis direction among the projection areas PR1a of the first projection module 200a is D1a, and this distance D1a is approximately equal to the distance L1 at which the wafers WF are arranged in the Y-axis direction. The arrangement of the projection areas PR1a shown in FIG. 14(A) is 、 For example, this can be achieved by arranging the first projection modules 200a at intervals D1a in the Y-axis direction, which are approximately equal to the interval L1.

[0078] The plurality of second projection modules 200b project their respective wiring patterns onto the same wafer WF as the corresponding first projection module 200a, at approximately the same time as the corresponding first projection module 200a.

[0079] The projection region PR1b of each second projection module 200b is disposed at a position offset by an integer fraction of the diameter d1 of the wafer WF from the projection region PR1a of the corresponding first projection module 200a. In the example of FIG. 14A, the projection region PR1b of the second projection module 200b is disposed at a position offset by approximately d1 / 2 from the projection region PR1a of the corresponding first projection module 200a. In other words, the distance Dab between the projection region PR1a and the projection region PR1b is approximately equal to an integer fraction of the diameter d1 of the wafer WF (half in FIG. 14A). The arrangement of the projection regions PR1b shown in FIG. 14A can be realized, for example, by disposing each second projection module 200b at a position offset by an integer fraction of the diameter d1 of the wafer WF from the corresponding first projection module 200a in the Y-axis direction.

[0080] Fig. 14(B) is a diagram illustrating the formation of a wiring pattern when the projection regions PR1a and PR1b are arranged as in Fig. 14(A). As shown in Fig. 14(B), the width in the Y-axis direction (non-scanning direction) of the region R1a exposed by the first projection module 200a and the region R1b exposed by the second projection module 200b in one scan is W1, and the diameter d1 of the wafer WF is approximately equal to eight times W1. In this case, wiring patterns can be formed on all of the wafer WF in four scans.

[0081] In this way, in Arrangement Example 4, wiring patterns can be formed on all wafers WF in four scans, so that wiring patterns can be formed on all wafers WF in a shorter time than in Arrangement Example 1 shown in Figure 11(A).

[0082] (Layout example 5) FIG. 15(A) is a diagram illustrating arrangement example 5 of the projection areas of the projection module 200, and FIG. 15(B) is a diagram illustrating the arrangement of the first projection module 200a and the second projection module 200b.

[0083] In arrangement example 5 shown in Figure 15(A), similar to arrangement example 4, the multiple projection modules 200 include multiple first projection modules 200a and second projection modules 200b provided corresponding to each of the multiple first projection modules 200a.

[0084] 15(A), among the projection regions PR1a of the first projection module 200a, the interval between adjacent projection regions PR1a in the Y-axis direction is D1a, which is approximately equal to the interval L1 at which the wafers WF are arranged in the Y-axis direction. The arrangement of the projection regions PR1a shown in FIG. 15(A) can be realized, for example, by arranging the first projection modules 200a at intervals D1a in the Y-axis direction that are approximately equal to the interval L1.

[0085] The second projection modules 200b project wiring patterns onto the same wafer WF as the corresponding first projection module 200a, at approximately the same time as the first projection module 200a. The projection region PR1b of each second projection module 200b is disposed at a position offset in the Y-axis direction from the projection region PR1a of the corresponding first projection module 200a by an integer fraction of the diameter of the wafer WF (one-eighth in FIG. 15(A)). In other words, the distance Dab between the projection regions PR1a and PR1b (see FIG. 15(B)) is approximately equal to an integer fraction of the diameter d1 of the wafer WF (Dab=d1 / 8 in FIG. 15(B)). 15(A) can be realized by, for example, disposing each second projection module 200b at a position shifted by 1 / 8 of the diameter d1 of the wafer WF from the corresponding first projection module 200a in the Y-axis direction. In this case, if the first projection module 200a and the second projection module 200b cannot be disposed so as to overlap in the Y-axis direction, the first projection module 200a and the second projection module 200b can be disposed so as to overlap in the X-axis direction, as shown in FIG.

[0086] Fig. 15(C) is a diagram illustrating the formation of wiring patterns when projection regions PR1a and PR1b are arranged as in Fig. 15(A). As shown in Fig. 15(A), the width in the Y-axis direction (non-scanning direction) of regions R1a and R1b exposed by first projection module 200a and second projection module 200b, respectively, in one scan is W1, and the diameter d1 of wafer WF is eight times W1. In this case, in Arrangement Example 5, wiring patterns can be formed on all wafers WF in four scans.

[0087] In this way, even if the projection areas PR1a and PR1b are arranged as in Arrangement Example 5, like Arrangement Example 4, wiring patterns can be formed on all wafers WF in a shorter time than in Arrangement Example 1.

[0088] (Layout example 6) FIG. 16(A) is a diagram showing an arrangement example 6 of the projection areas of the projection modules 200, and FIG. 16(B) is a diagram for explaining the arrangement of the first projection module 200a and the second projection module 200b.

[0089] 16(B), a plurality of first projection modules 200a and a plurality of second projection modules 200b are provided not only in the Y-axis direction but also in the X-axis direction. That is, the plurality of first projection modules 200a are provided in a matrix of 2 columns by 3 rows, and the plurality of second projection modules 200b are provided in a matrix of 2 columns by 3 rows.

[0090] As shown in Figure 16(A), the projection areas PR1a of the multiple first projection modules 200a are arranged so that the interval D1a between adjacent projection areas PR1a in the Y-axis direction is the same as the interval L1 at which the wafers WF are arranged. Also, the projection areas PR1a are arranged so that the interval D2a between adjacent projection areas PR1a in the X-axis direction is twice the interval L2. The projection areas shown in Figure 16(A) PR1a The placement of No. 1 Projection module 200a This can be achieved by arranging them at intervals D1a in the Y-axis direction, which is approximately equal to the interval L1, and at intervals D2a in the X-axis direction, which is approximately equal to the interval L2.

[0091] The projection region PR1b of each second projection module 200b is arranged so as to be shifted in the Y-axis direction from the projection region PR1a of the corresponding first projection module 200a by an integer fraction of the diameter d1 of the wafer WF. In the example of FIG. 16(A), the projection region PR1b is arranged at a position shifted approximately d1 / 8 from the projection region PR1a of the corresponding first projection module 200a. The arrangement of the projection region PR1b shown in FIG. 16(A) can be realized, for example, by arranging each second projection module 200b at a position shifted 1 / 8 of the diameter d1 of the wafer WF from the corresponding first projection module 200a in the Y-axis direction, as in Arrangement Example 5. In this case, if the first projection module 200a and the second projection module 200b cannot be arranged to overlap in the Y-axis direction, the first projection module 200a and the second projection module 200b may be arranged so as to overlap in the X-axis direction, as shown in FIG. 16(B).

[0092] Fig. 16(C) is a diagram for explaining the formation of a wiring pattern when the projection regions PR1a and PR1b are arranged as in Fig. 16(A). As shown in Fig. 16(A), the width in the Y-axis direction (non-scanning direction) of the regions R1a and R1b exposed by the first projection module 200a and the second projection module 200b in one scan is W1, and the diameter d1 of the wafer WF is approximately equal to eight times W1. In this case, wiring patterns can be formed on all of the wafers WF with four scans.

[0093] Furthermore, in Arrangement Example 6, multiple first projection modules 200a and second projection modules 200b are also arranged in the X-axis direction, so the scanning distance in one scan is shorter than in Arrangement Example 5. Therefore, it is possible to form wiring patterns on all wafers WF in a shorter time than in Arrangement Example 5 shown in FIG.

[0094] As described above in detail, the exposure apparatus EX according to the first embodiment includes a substrate stage 30, a plurality of DMDs 204 that form wiring patterns that connect between the semiconductor chips (C1, C2) included in each set of semiconductor chips arranged on each of a plurality of wafers WF placed on the substrate stage 30, and a plurality of projection modules 200 or 200a that project the wiring patterns formed by the plurality of DMDs 204 onto the plurality of wafers WF, and the plurality of projection modules 200 or 200a project their respective wiring patterns onto different wafers WF approximately simultaneously. This makes it possible to reduce the time required to form the wiring patterns compared to forming wiring patterns using a single projection module.

[0095] Furthermore, in the above-described Arrangement Examples 4 to 6, a plurality of second projection modules 200b are further provided corresponding to each of the plurality of first projection modules 200a, and the plurality of second projection modules 200b project their respective wiring patterns onto the same wafer WF as the corresponding first projection module 200a, approximately simultaneously with the corresponding first projection module 200a. This makes it possible to reduce the time required to form the wiring patterns compared to when only a plurality of projection modules 200 or a plurality of first projection modules 200a are provided.

[0096] Furthermore, in the first embodiment, the multiple wafers WF are arranged at intervals L1 in a non-scanning direction (Y-axis direction) perpendicular to the scanning direction (X-axis direction) in which the substrate stage 30 is scanned, and in Arrangement Examples 1 to 3, the interval D2 between adjacent projection regions PR1 in the non-scanning direction among the projection regions PR1 of the projection module 200 or 200a is approximately equal to an integer multiple of the interval L1 (1 in Arrangement Examples 1 to 3). Furthermore, in Arrangement Examples 4 to 6, the interval D1a between adjacent projection regions PR1a in the non-scanning direction among the projection regions PR1a of the first projection module 200a is approximately equal to an integer multiple of the interval L1 (1 in Arrangement Examples 4 to 6). This makes it possible to reduce the time required to form a wiring pattern compared to forming a wiring pattern using a single projection module 200.

[0097] Furthermore, in the first embodiment, the multiple wafers WF are arranged at intervals L2 in the scanning direction (X-axis direction) in which the substrate stage 30 is scanned, and in Arrangement Examples 2 and 4, the interval D2 between the projection regions PR1 of the projection modules 200 in the scanning direction is approximately equal to an integer multiple of the interval L2 (twice in Arrangement Example 2, and once in Arrangement Example 4). This allows the scanning distance of the substrate stage 30 to be shorter than when multiple projection modules 200 are not arranged in the X-axis direction, thereby further reducing the time required to form the wiring pattern. Furthermore, in Arrangement Example 6, the interval D2a between the projection regions PR1a in the scanning direction is approximately equal to an integer multiple of the interval L2 (twice in Arrangement Example 6). This allows the scanning distance of the substrate stage 30 to be shorter than when multiple first projection modules 200a are not arranged in the X-axis direction, thereby further reducing the time required to form the wiring pattern.

[0098] Furthermore, in Arrangement Examples 4 to 6 of the first embodiment, the projection region PR1b of the second projection module 200b is disposed at a position offset in the non-scanning direction from the corresponding projection region PR1a of the first projection module 200a by an integral fraction of the interval L1 (half in Arrangement Example 4, and one-eighth in Arrangement Examples 5 and 6). This allows wiring patterns to be formed efficiently on each wafer WF.

[0099] Furthermore, in the first embodiment, the exposure apparatus EX is equipped with multiple measurement microscopes 65 that measure the position of each of the multiple wafers WF, and the multiple measurement microscopes 65 each measure the position of a different wafer WF approximately simultaneously. This makes it possible to reduce the time required to measure the position of the wafer WF compared to measuring the position of the wafer WF using a single measurement microscope 65.

[0100] Furthermore, in the first embodiment, the distance D3 between adjacent measuring microscopes 65 in the non-scanning direction is approximately equal to the distance L1 at which the wafers WF are arranged in the non-scanning direction, and the distance D4 between adjacent measuring microscopes 65 in the scanning direction is approximately equal to the distance L2 at which the wafers WF are arranged in the scanning direction. This allows the multiple measuring microscopes 65 to measure predetermined measurement points on each wafer WF approximately simultaneously, thereby enabling the position of each wafer WF to be measured efficiently.

[0101] Furthermore, in the first embodiment, the exposure apparatus EX is equipped with a plurality of first measurement microscopes 61a that measure the positions of chips included in each set of semiconductor chips, and the plurality of first measurement microscopes 61a measure the positions of chips on different wafers approximately simultaneously. Furthermore, the exposure apparatus EX is equipped with a plurality of second measurement microscopes 61b that are provided corresponding to the plurality of first measurement microscopes 61a, respectively, and the plurality of second measurement microscopes 61b measure, approximately simultaneously with the corresponding first measurement microscope 61a, areas of the same wafer WF that are measured by the corresponding first measurement microscope 61a, that are different from the area measured by the corresponding first measurement microscope 61a. This makes it possible to reduce the time required to measure the position of the chip compared to measuring the position of the chip using a single measurement microscope.

[0102] Furthermore, in this first embodiment, the interval between adjacent first measuring microscopes 61a in the scanning direction is approximately equal to the interval L1 at which multiple wafers WF are arranged in the scanning direction, and the interval between adjacent first measuring microscopes 61a in the non-scanning direction is approximately equal to the interval L2 at which multiple wafers WF are arranged in the non-scanning direction. This makes it possible to efficiently measure the position of the chip.

[0103] In the first embodiment, the width W of the measurement region MR1a of the first measuring microscope 61a and the measurement region MR1b of the second measuring microscope 61b in the non-scanning direction is MRis approximately equal to an integer division of the length (diameter d1) of the wafer WF in the non-scanning direction. This makes it possible to measure the position of the chip efficiently.

[0104] In the first embodiment, the projection region PR1b of the second projection module 200b is positioned at a position offset from the projection region PR1a of the corresponding first projection module 200a in the non-scanning direction, but this is not limiting. For example, the projection region PR1b of the second projection module 200b may be positioned at a position offset from the projection region PR1a of the corresponding first projection module 200a in the scanning direction. In this case, it is preferable to position the projection region PR1b of the second projection module 200b at a position offset by an integer fraction of the interval L2 at which the wafers WF are arranged in the X-axis direction. This allows for efficient formation of wiring patterns on each wafer WF.

[0105] Furthermore, in the first embodiment, four second measuring microscopes 61b are arranged for one first measuring microscope 61a, but this is not limited to this, and the number of second measuring microscopes 61b provided corresponding to one first measuring microscope 61a may be 1 to 3, or may be 5 or more. Furthermore, the second measuring microscopes 61b may be omitted.

[0106] (Variation) The data generating device 300 may generate drive data that defines the drive amount of the DMD 204 and the drive amount of the lens actuator, instead of wiring pattern data. That is, the DMD 204 may generate a wiring pattern using design value data, and by changing the drive amount of the DMD 204 and the drive amount of the lens actuator, the position of the projected image of the wiring pattern projected onto the wafer WF may be changed, thereby changing the shape of the wiring pattern formed on the wafer WF. The shape of the wiring pattern may also be changed by optically correcting the image of the wiring pattern.

[0107] In the first embodiment and the modified examples, the measuring microscope 61, the first measuring microscope 61a, and the second measuring microscope 61b may be movable in the Y-axis direction. This makes it possible to simultaneously measure the positions of the chips even when the chips are different sizes or when the intervals between sets of multiple chips are different.

[0108] Furthermore, in the first embodiment and its modifications, the multiple projection modules 200, 200a, and 200b may be movable in the Y-axis direction, which makes it possible to accommodate large placement errors that cannot be corrected by shifting or rotating the optical system or DMD 204.

[0109] In the above embodiment, the positions of the projection regions PR1, PR1a, and PR1b are adjusted by adjusting the physical positions of the projection modules 200, 200a, and 200b, but this is not limiting. For example, the positions of the projection regions PR1, PR1a, and PR1b may be adjusted optically.

[0110] Second Embodiment Since the process of attaching chips to the wafer WF is performed before the formation of the wiring pattern in the exposure apparatus EX, the data creation device 300 may create wiring pattern data or drive data using measurement data acquired in an inspection process that inspects the position of each chip relative to the wafer WF.

[0111] 17 is a top view showing an overview of a wiring pattern forming system 500A according to the second embodiment. The wiring pattern forming system 500A according to the second embodiment includes a chip measurement station CMS that measures the position of a chip on a wafer WF.

[0112] The chip measurement station CMS is equipped with a plurality of measurement microscopes, which measure the positions of semiconductor chips on different wafers WF substantially simultaneously.

[0113] (Measuring microscope arrangement example 1) Here, the arrangement of multiple measurement microscopes will be described. Fig. 18(A) is a diagram showing arrangement example 1 of measurement microscopes. In the arrangement example shown in Fig. 18(A), multiple measurement microscopes 68 are provided, and the measurement microscopes 68 are arranged at intervals D8 in the Y-axis direction. Here, when wafers WF are arranged at intervals L8 in the Y-axis direction in the chip measurement station CMS, by making the interval D8 approximately equal to the interval L8, the multiple measurement microscopes 68 can measure the positions of chips on different wafers WF approximately simultaneously.

[0114] (Measurement microscope arrangement example 2) Fig. 18(B) is a diagram showing a second arrangement example of measuring microscopes. In the arrangement example of Fig. 18(B), a plurality of first measuring microscopes 68a and a plurality of second measuring microscopes 68b are provided as measuring microscopes. The first measuring microscopes 68a are arranged in the Y-axis direction at intervals D8 that are approximately equal to the intervals L8 at which the wafers WF are arranged.

[0115] The second measuring microscopes 68b are provided corresponding to the first measuring microscopes 68a, respectively. Each second measuring microscope 68b measures an area of ​​the same wafer WF as the corresponding first measuring microscope 68a, but different from the area measured by the first measuring microscope 68a, approximately simultaneously with the first measuring microscope 68a.

[0116] 18(B), four second measuring microscopes 68b are provided for one first measuring microscope 68a. The width in the Y-axis direction of the measurement region MR1a of the first measuring microscope 68a and the measurement region MR1b of the second measuring microscope 68b is W MR Then, the distance between each second measuring microscope 68b and the corresponding first measuring microscope 68a is W MR For example, the distance Dmab1 between the first measuring microscope 68a and the second measuring microscope 68b closest to the first measuring microscope 68a is an integer multiple of W MR (W MR The distance Dmab2 between the first measuring microscope 68a and the second measuring microscope 68b that is second closest to the first measuring microscope 68a is equal to WMR is equal to twice the

[0117] 18(B), the time required to measure the position of a chip on one wafer WF can be reduced to 1 / N of the time required to measure one wafer WF with one measuring microscope 68. Note that N is the total number of first measuring microscopes 68a and second measuring microscopes 68b arranged for one wafer WF.

[0118] The number of measuring microscopes 68, the number of first measuring microscopes 68a, and the number of second measuring microscopes 68b, as well as the number of wafers measured at one time in the chip measurement station CMS, depend on the processing capacity of the chip measurement station CMS. For this reason, for example, if one processing device is provided for multiple measuring microscopes 68 and the processing capacity of that processing device is insufficient, one processing device may be provided for each measuring microscope 68, and multiple pairs of measuring microscopes 68 and processing devices may be provided. Alternatively, if one processing device is provided for multiple first measuring microscopes 68a and multiple second measuring microscopes 68b and the processing capacity of that processing device is insufficient, for example, one processing device may be provided for the set of first measuring microscopes 68a and second measuring microscopes 68b provided for one wafer WF, and multiple combinations of the set of first measuring microscopes 68a and second measuring microscopes 68b and processing devices may be provided. Furthermore, for example, when one processing device is provided for a set of a first measuring microscope 68a and a second measuring microscope 68b provided for one wafer WF, if the processing capacity of the processing device is insufficient, a processing device may be provided for each of the first measuring microscope 68a and the second measuring microscope 68b.

[0119] Returning to FIG. 17, the chip position measurement results are transmitted to the data generating device 300. The data generating device 300 generates wiring pattern data (or drive data) based on the chip position measurement results received from the chip measurement station CMS. The wiring pattern data generated by the data generating device 300 is stored in a storage device different from the storage device that stores the wiring pattern data used to control the exposure of the substrate currently being exposed. That is, if the wiring pattern data used to control the exposure of the wafer WF currently being exposed is stored in the first storage device 310R, the data generating device 300 stores (transfers) the generated wiring pattern data to the second storage device 310L. If it takes a long time to generate the wiring pattern data, the wiring pattern data can be generated and transferred while the resist is being applied by the coater developer device CD. Therefore, having two storage devices as in this embodiment is effective, and if necessary, the number of storage devices may be expanded to three or more.

[0120] In the exposure apparatus EX-A according to the second embodiment, the main body 1A is equipped with one substrate stage 30. In the second embodiment, the chip position is measured by the chip measurement station CMS, so alignment systems ALG_L and ALG_R can be omitted.

[0121] After the chip position measurement is completed, the wafer WF is coated with a photosensitive resist by a coater developer device CD and then carried into the buffer unit PB. The wafers WF placed in the buffer unit PB are arranged on a single tray TR (four wafers x three rows in the second embodiment) by a robot RB installed in the substrate exchange unit 2A, carried into the main body unit 1A, and placed on the substrate holder of the substrate stage 30.

[0122] Alignment system ALG_C measures the position of each wafer WF relative to the substrate holder and corrects the exposure start position, etc. The configuration of alignment system ALG_C is the same as that of alignment system ALG_C in the first embodiment, and therefore detailed description will be omitted.

[0123] Furthermore, if the wafer WF rotates around the Z axis when placed on the substrate holder, causing the position of the chip to deviate from the position of the wiring pattern data created by the data creation device 300, there is a risk that the chips will not be connected correctly when wiring is formed using that wiring pattern data.

[0124] In this case, the data generating device 300 generates drive data as described in the modified example of the first embodiment, thereby correcting the shape of the wiring pattern so that the chips are connected. For example, the data generating device 300 detects the positional deviation of each chip from the position of the wiring pattern data from the position of each wafer WF measured by the alignment system ALG_C based on the chip position relative to the position of each wafer WF measured by the chip measurement station CMS. The data generating device 300 generates drive data based on the deviation. This eliminates the need to rewrite the wiring pattern data, even if the wafer WF rotates around the Z axis when placed on the substrate holder, allowing for a smooth transition to exposure and the formation of wiring connecting the chips. Note that the wiring pattern image may also be optically corrected based on the positional deviation of each chip. In this case, too, the need to rewrite the wiring pattern data allows for a smooth transition to exposure and the formation of wiring connecting the chips.

[0125] Incidentally, alignment system ALG_C may use an alignment mark of the chip to measure the position of wafer WF.

[0126] In the second embodiment, the chip measurement station CMS is equipped with a plurality of measurement microscopes 68 or 68a that measure the position of each chip included in a set of semiconductor chips arranged on each wafer WF of a plurality of wafers WF arranged on the chip measurement station CMS. In Arrangement Example 1, the plurality of measurement microscopes 68 measure the positions of chips on different wafers WF approximately simultaneously. In Arrangement Example 2, a plurality of first measurement microscopes 68a measure the positions of chips on different wafers WF approximately simultaneously. This makes it possible to reduce the time required to measure the positions of chips compared to when the positions of chips are measured using a single measurement microscope 68.

[0127] Furthermore, in the second embodiment, in Arrangement Example 1, the distance D8 between adjacent measuring microscopes 68 in the non-scanning direction among the multiple measuring microscopes 68 is approximately equal to the distance L8 at which the multiple wafers WF are arranged in the non-scanning direction. Furthermore, in Arrangement Example 2, the distance between adjacent first measuring microscopes 68a in the non-scanning direction among the multiple first measuring microscopes 68a is approximately equal to the distance L8 at which the multiple wafers WF are arranged in the non-scanning direction. This allows the position of the chip to be measured efficiently.

[0128] Furthermore, in Arrangement Example 2 of the second embodiment, the chip measurement station CMS further includes a plurality of second measurement microscopes 68b provided corresponding to each of the plurality of first measurement microscopes 68a, and each of the plurality of second measurement microscopes 68b measures a measurement region MR1b that is different from the measurement region MR1a measured by the corresponding first measurement microscope 68a on the same wafer WF as the wafer WF measured by the corresponding first measurement microscope 68a, approximately simultaneously with the corresponding first measurement microscope 68a. This makes it possible to measure the position of the chip in a shorter time than when measuring the position of the chip using only the plurality of first measurement microscopes 68.

[0129] In the second embodiment, the width W of the measurement region MR1a of the first measuring microscope 61a and the measurement region MR1b of the second measuring microscope 61b in the non-scanning direction is MRis approximately equal to an integer division of the length (diameter d1) of the wafer WF in the non-scanning direction. This makes it possible to measure the position of the chip efficiently.

[0130] In the second embodiment, the plurality of measuring microscopes 68, the plurality of first measuring microscopes 68a, and the plurality of second measuring microscopes 68b may also be made movable in the Y-axis direction, which allows the positions of the chips to be measured simultaneously even when the sizes of the chips are different or when the intervals between sets of multiple chips are different.

[0131] In the first embodiment, the measurement microscopes 61 provided in the alignment systems ALG_R and ALG_L may be arranged in only one row, similar to the measurement microscope 68 in Fig. 18(A). Also, for example, the first measurement microscope 61a and the second measurement microscope 61b may be arranged in only one row, similar to the first measurement microscope 68a and the second measurement microscope 68b in Fig. 18(B).

[0132] Third Embodiment The wafer WF may be attached to a base substrate B, and the position of each chip relative to the base substrate B may be measured in a chip measurement station CMS.

[0133] 19 is a top view showing an overview of a wiring pattern formation system 500B according to the third embodiment. The wiring pattern formation system 500B according to the third embodiment includes a wafer alignment apparatus WA that attaches multiple wafers WF, each having a chip arranged thereon, to a base substrate B, a chip measurement station CMS, and an exposure apparatus EX-B. The wafer alignment apparatus WA prevents the position of the wafer WF relative to the base substrate B from being changed.

[0134] The base substrate B, to which a plurality of wafers WF have been attached by the wafer placement device WA, is carried into the chip measurement station CMS.

[0135] The chip measurement station CMS includes a plurality of first measurement microscopes 68a and a plurality of second measurement microscopes 68b provided corresponding to the plurality of first measurement microscopes 68a, respectively. The plurality of first measurement microscopes 68a measure the positions of chips on different wafers WF relative to the base substrate B at approximately the same time. Furthermore, each of the plurality of second measurement microscopes 68b measures a measurement region MR1b, which is different from the measurement region MR1a measured by the corresponding first measurement microscope 68a, on the same wafer WF as the wafer WF measured by the corresponding first measurement microscope 68a, at approximately the same time as the corresponding first measurement microscope 68a.

[0136] 20 is a diagram showing an example of the arrangement of a first measuring microscope 68a and a second measuring microscope 68b. The multiple first measuring microscopes 68a and the multiple second measuring microscopes 68b are arranged in the same manner as the first measuring microscopes 61a and the multiple second measuring microscopes 61b of the alignment systems ALG_L and ALG_R in the first embodiment, respectively (see FIG. 8).

[0137] To put it simply, the multiple first measuring microscopes 68a are arranged in a matrix of 4 columns x 3 rows so as to correspond to the multiple wafers WF, respectively. The distance D5a between adjacent first measuring microscopes 68a in the Y-axis direction is approximately equal to the distance L1 at which the wafers WF are arranged in the Y-axis direction, and the distance D6a between adjacent first measuring microscopes 68a in the X-axis direction is approximately equal to the distance L2 at which the wafers WF are arranged in the X-axis direction.

[0138] The plurality of second measuring microscopes 68b are provided in sets of four for each corresponding first measuring microscope 68a. Each second measuring microscope 68b is located within the width W MR 20, the distance Dmab1 between the first measuring microscope 68a and the second measuring microscope 68b that is closest to the first measuring microscope 68a among the second measuring microscopes 68b provided corresponding to the first measuring microscope 68a is W MR (W MRThe distance Dm ab2 between the first measuring microscope 68a and the second measuring microscope 68b that is second closest to the first measuring microscope 68a is approximately equal to 1 times the distance Dm ab2 teeth , W MR The width W of the measurement region MR1a in the Y-axis direction is approximately equal to twice the width W of the measurement region MR1a. MR is approximately equal to an integer division of the diameter d1 of the wafer WF.

[0139] This makes it possible to measure the chip positions for all of the plurality of wafers WF placed on the base substrate B in one scan, thereby reducing the time required to measure the chip positions.

[0140] The data creating device 300 creates wiring pattern data (or driving data) based on the measurement results of the chip position received from the chip measurement station CMS. The wiring pattern data created by the data creating device 300 is stored in a storage device different from the storage device that stores the wiring pattern data used for exposure control of the wafer WF on the base substrate B currently being exposed. In other words, when the wiring pattern data used for exposure control of the wafer WF on the base substrate B currently being exposed is stored in the first storage device 310R, the data creating device 300 stores (transfers) the created wiring pattern data in the second storage device 310L.

[0141] After the chip position measurement is completed, the wafer WF is loaded together with the base substrate B into the coater-developer device CD, where it is coated with a photosensitive resist and then loaded into the port PT of the substrate exchange unit 2B. The wafer WF is then placed together with the base substrate B on the substrate holder of the substrate stage 30.

[0142] Subsequent processing is the same as in the second embodiment, and detailed description thereof will be omitted. In the third embodiment, exposure can be performed by managing everything using the position of the base substrate B on which the wafer WF is placed and fixed. For example, alignment measurement and correction for the base substrate B can also be performed during alignment. In other words, because the wafer WF is placed and fixed on the base substrate B, alignment for each wafer WF / each chip is not required when the base substrate B is placed on the substrate holder of the substrate stage 30, and alignment of only the base substrate B needs to be performed. Note that although the wafer placement device WA attaches the wafer WF to the base substrate B, the wafer WF may also be placed and fixed directly on the tray TR.

[0143] According to the third embodiment, the chip measurement station CMS includes a plurality of first measurement microscopes 68a that measure the positions of chips included in each set of semiconductor chips, and the plurality of first measurement microscopes 68a measure the positions of chips on different wafers approximately simultaneously. The chip measurement station CMS also includes a plurality of second measurement microscopes 68b provided corresponding to the plurality of first measurement microscopes 68a, and each of the plurality of second measurement microscopes 68b measures a measurement region MR1b, which is different from the measurement region MR1a measured by the corresponding first measurement microscope 68a, approximately simultaneously with the corresponding first measurement microscope 68a, on the same wafer WF as the wafer WF measured by the corresponding first measurement microscope 68a. This reduces the time required to measure the chip position compared to measuring the chip position using a single measurement microscope or when only a plurality of first measurement microscopes 68a are provided.

[0144] Furthermore, in the third embodiment, the interval between adjacent first measuring microscopes 68a in the scanning direction is approximately equal to the interval L1 at which multiple wafers WF are arranged in the scanning direction, and the interval between adjacent first measuring microscopes 68a in the non-scanning direction is approximately equal to the interval L2 at which multiple wafers WF are arranged in the non-scanning direction. This allows the position of the chip to be measured efficiently.

[0145] In the third embodiment, the width W of the measurement region MR1a of the first measuring microscope 68a and the measurement region MR1b of the second measuring microscope 68b in the non-scanning direction is MR is approximately equal to an integer division of the length (diameter d1) of the wafer WF in the non-scanning direction. This makes it possible to measure the position of the chip efficiently.

[0146] In the third embodiment, the first measuring microscope 68a and the second measuring microscope 68b may also be movable in the Y-axis direction, which allows the positions of the chips to be measured simultaneously even when the chips are of different sizes or when the intervals between sets of multiple chips are different.

[0147] (Variation) In the third embodiment, the wafer placement device WA and the chip measurement station CMS are separate devices, but this configuration is not limited to this. The first measurement microscope 68a and the second measurement microscope 68b may start measuring the chip position from the wafer WF attached to the base substrate B in the wafer placement device WA. In other words, the first measurement microscope 68a and the second measurement microscope 68b perform measurement operations in parallel with the operation of attaching multiple wafers WF to the base substrate B. The first measurement microscope 68a and the second measurement microscope 68b may start measurement operations after one wafer WF is attached to the base substrate B, or may start measurement operations after multiple wafers WF are attached to the base substrate B. The first measurement microscope 68a and the second measurement microscope 68b may temporarily suspend measurement operations when the wafer WF is placed on the base substrate B. This is to prevent vibrations that occur when the wafer WF is placed on the base substrate B from affecting the measurement results of the first measuring microscope 68a and the second measuring microscope 68b.

[0148] In the third embodiment, the chip measurement station CMS may include only a plurality of measurement microscopes 68 that measure the positions of chips on different wafers substantially simultaneously, as shown in Fig. 18(A) of the second embodiment. Also, the first measurement microscope 68a and the second measurement microscope 68b do not have to be arranged in a matrix, and may be arranged in only one row, as shown in Fig. 18(B) of the second embodiment.

[0149] In the first to third embodiments, the projection areas PR1a of the plurality of first projection modules 200a are arranged at intervals in the Y axis direction that are approximately equal to the intervals L1 at which the wafers WF are arranged in the Y axis direction, and the projection areas PR1b of the plurality of second projection modules 200b are arranged at intervals L1 that are equal to the intervals L1 at which the wafers WF are arranged in the Y axis direction. a In the above example, the wafer WF is disposed at a position shifted by an integer multiple of the diameter of the wafer WF from the wafer WF, but the present invention is not limited to this.

[0150] 21(A) to 21(C) are diagrams illustrating the arrangement of the first projection module 200a and the second projection module 200b. For example, as shown in FIG. 21(A), when the width in the Y-axis direction of the projection regions PR1a and PR1b is W1, the projection region PR1b is a Alternatively, the projection area PR1a may be disposed at a position shifted by an integral multiple of the width W1 of the projection area PR1a (Dab=2×W1 in FIG. 21(A)).

[0151] Furthermore, for example, as shown in Figure 21(B), if the width in the Y-axis direction of the projection areas PR1a and PR1b is W1, the distance D1a between adjacent projection areas PR1a in the Y-axis direction may be an integer multiple of twice the width W1 (2W1) (in Figure 21(B), D1a = 2W1 x 2), and the projection area PR1b may be positioned at a position shifted by the width W1 from the projection area PR1b.

[0152] Furthermore, for example, as shown in Figure 21(C), if the width in the Y-axis direction of projection areas PR1a and PR1b is W1, the distance D1a between adjacent projection areas PR1a in the Y-axis direction may be set to an integer multiple of four times the width W1 (4W1) (in Figure 21(B), D1a = 4W1 x 2), and projection area PR1b may be positioned at a distance offset from projection area PR1b by an integer multiple of the width W1 (in Figure 21(B), Dab = W1 x 2).

[0153] The number and arrangement method of the multiple projection modules 200 are not limited to those described in the first to third embodiments and their modifications, and may be changed as appropriate so that wiring patterns can be formed on all wafers WF within a desired time.

[0154] In the above first to third embodiments and their modifications, a case has been described in which a plurality of wafer-shaped substrates are placed on the substrate stage 30, but a plurality of rectangular substrates may also be placed on the substrate stage 30.

[0155] Moreover, the first to third embodiments and their modifications can also be applied to the formation of wiring patterns that connect chips on the substrate P shown in FIG. 3(B).

[0156] In the first to third embodiments and their modified examples, as shown in FIG. 22(A), the multiple wafers WF are arranged so that the lines LN1 and LN2 connecting the centers of the most adjacent wafers WF are approximately parallel to the scanning direction (X-axis direction) of the substrate stage 30 and the non-scanning direction (Y-axis direction) perpendicular to the scanning direction, respectively, but this is not limited to this.

[0157] 22(B), the wafers WF may be arranged so that lines LN3 and LN4 connecting the centers of the most adjacent wafers WF among the multiple wafers WF intersect the scanning direction (X-axis direction) or non-scanning direction (Y-axis direction) of the substrate stage 30. In this case, for example, the first projection module 200a and the second projection module 200b may be arranged at a distance D1a that is approximately equal to an integer fraction of the maximum distance L3 between the +Y end and the -Y end of the multiple wafers WF arranged in the Y-axis direction (for example, L3 / 3 in FIG. 22(B)).

[0158] The multiple projection modules 200, 200a, 200b project wiring patterns onto the multiple substrates P (wafers WF) based on the measurement results from the multiple measurement microscopes 61a, 61b, 68, 68a, 68b and the corresponding relationships between the multiple measurement microscopes 61a, 61b, 68, 68a, 68b and the multiple projection modules 200, 200a, 200b. The corresponding relationships between the multiple measurement microscopes and the multiple projection modules are determined from the arrangement of the multiple measurement microscopes and the arrangement of the multiple projection modules, and the measurement results from the multiple measurement microscopes can be appropriately reflected in the wiring patterns projected by the multiple projection modules based on the determined corresponding relationships. For example, when measurements are performed using measuring microscopes 61a arranged in 4 columns x 3 rows as shown in Figure 8 and a wiring pattern is projected using projection modules 200 arranged one per three rows as shown in Figure 11(A), the four measuring microscopes 61a arranged in the first row from the top in Figure 8 correspond to one projection module 200 arranged in the first row from the top in Figure 11(A), the four measuring microscopes 61a arranged in the second row from the top in Figure 8 correspond to one projection module 200 arranged in the second row from the top in Figure 11(A), and the four measuring microscopes 61a arranged in the third row from the top in Figure 8 correspond to one projection module 200 arranged in the third row from the top in Figure 11(A). For example, when measurements are performed using measurement microscopes 61a, 61b arranged in 4 columns x 15 rows as shown in FIG. 8, and wiring patterns are projected using projection modules 200a, 200b arranged one per six rows as shown in FIG. 14(A), the 12 measurement microscopes 61a, 61b arranged in the first to third rows from the top in FIG. 8 correspond to one projection module 200a arranged in the first row from the top in FIG. 14(A), the 12 measurement microscopes 61a, 61b arranged in the third to fifth rows from the top in FIG. 8 correspond to one projection module 200b arranged in the second row from the top in FIG. 14(A), and the 12 measurement microscopes 61a, 61b arranged in the sixth to eighth rows from the top in FIG. In Figure 14(A), the twelve measuring microscopes 61a, 61b arranged in the eighth to tenth rows from the top correspond to the single projection module 200b arranged in the fourth row from the top in Figure 14(A), the twelve measuring microscopes 61a, 61b arranged in the eleventh to thirteenth rows from the top in Figure 8 correspond to the single projection module 200a arranged in the fifth row from the top in Figure 14(A), and the twelve measuring microscopes 61a, 61b arranged in the thirteenth to fifteenth rows from the top in Figure 8 correspond to the single projection module 200b arranged in the sixth row from the top in Figure 14(A). The correspondence between the multiple measurement microscopes and the multiple projection modules is determined appropriately, for example, by the arrangement of the multiple measurement microscopes and the arrangement of the multiple projection modules, as explained in the first to third embodiments and their modifications.

[0159] The above-described embodiment is a preferred example of the present invention, but the present invention is not limited to this and can be modified in various ways without departing from the spirit of the present invention. [Explanation of symbols]

[0160] EX, EX-A, EX-B exposure equipment 61 Measuring microscope 61a First Measuring Microscope 61b Second Measuring Microscope 65 Measuring microscope 68 Measuring microscope 68a First Measuring Microscope 68b Second Measuring Microscope 200 Projection Module 200a First Projection Module 200b Second Projection Module 204 DMD 204a Micromirror 300 Data Creation Device 310R 1st storage device 310L 2nd storage device 400 Exposure control device C1, C2 semiconductor chips WF wafer P board PR1, PR1a, PR1b projection area

Claims

1. a substrate stage on which a plurality of substrates are placed and arranged in a first direction; a plurality of first projection modules, each having a spatial light modulator; a substrate mounting device that mounts the plurality of substrates on the substrate stage; Equipped with the first projection areas of the first modules among the plurality of first projection modules are aligned in the first direction, and the centers of the first projection areas adjacent to each other are aligned at a first interval in the first direction; the substrate mounting device mounts the plurality of substrates on the substrate stage so that a value obtained by dividing a size of one of the plurality of substrates by an integer or a value obtained by dividing a distance between centers of the plurality of substrates adjacent to each other in the first direction by an integer is substantially equal to the first distance; the spatial light modulator includes a plurality of elements each capable of assuming a plurality of states to form patterned light; the plurality of first projection modules are arranged to project corresponding patterns of light onto corresponding substrates; Exposure equipment.

2. The substrate stage is movable in a scanning direction, the first direction is a non-scanning direction perpendicular to the scanning direction; 2. The exposure apparatus according to claim 1.

3. the second projection areas of the second modules among the plurality of first projection modules are aligned in a scanning direction, and the centers of the adjacent second projection areas are aligned at a second interval in the scanning direction; the substrate mounting device mounts the plurality of substrates on the substrate stage so that a value obtained by dividing a size of one of the plurality of substrates by an integer or a value obtained by dividing a distance between centers of the plurality of substrates adjacent to each other in the scanning direction by an integer is substantially equal to the second distance; 3. The exposure apparatus according to claim 1.

4. the plurality of first projection modules project, onto two or more substrates, wiring patterns that connect between a plurality of semiconductor chips arranged on each of the plurality of substrates during scanning exposure; 4. The exposure apparatus according to claim 3.

5. a plurality of substrate position measuring devices for measuring the positions of the plurality of substrates, the plurality of substrate position measuring devices measure the positions of different substrates substantially simultaneously; 3. The exposure apparatus according to claim 1.

6. an interval between the centers of adjacent substrate position measuring devices in a scanning direction in which the substrate stage is scanned, among the plurality of substrate position measuring devices, is approximately equal to an integer fraction of a second interval at which centers of second projection areas of each of a plurality of second modules among the plurality of first projection modules are arranged in the scanning direction; an interval between the centers of adjacent substrate position measuring devices in a non-scanning direction orthogonal to the scanning direction in which the substrate stage is scanned, among the plurality of substrate position measuring devices, is approximately equal to an integer fraction of the first interval at which centers of the first projection areas of each of the plurality of first modules among the plurality of first projection modules are arranged in the non-scanning direction; 6. The exposure apparatus according to claim 5.

7. A method for manufacturing a semiconductor device comprising: a plurality of first measuring devices for measuring the positions of a plurality of semiconductor chips arranged on each of the plurality of substrates; the plurality of first measurement devices measure the positions of the semiconductor chips on different substrates substantially simultaneously; 3. The exposure apparatus according to claim 1.

8. an interval between centers of adjacent first measurement devices in a scanning direction in which the plurality of substrates are scanned is approximately equal to a second interval at which centers of second projection areas of each of a plurality of second modules among the plurality of first projection modules are arranged in the scanning direction; an interval between centers of adjacent first measurement devices in a non-scanning direction orthogonal to the scanning direction, among the plurality of first measurement devices, is substantially equal to the first interval at which centers of the first projection areas of each of a plurality of first modules among the plurality of first projection modules are arranged in the non-scanning direction; 8. The exposure apparatus according to claim 7.

9. a plurality of second measurement devices; the plurality of second measurement devices measure the positions of the semiconductor chips on different substrates substantially simultaneously; different regions of each of the plurality of substrates are measured substantially simultaneously by one of the plurality of first measurement devices and one of the plurality of second measurement devices; 9. The exposure apparatus according to claim 8.

10. a width of the region measured by the first measuring device and the region measured by the second measuring device in a non-scanning direction perpendicular to a scanning direction in which the plurality of substrates are scanned is approximately equal to an integer fraction of a length of the substrate in the non-scanning direction; The exposure apparatus according to claim 9.

11. the substrate mounting device places the plurality of substrates on the substrate stage such that a line connecting the centers of the substrates that are most adjacent to each other among the plurality of substrates is substantially parallel to a scanning direction of the substrate stage or a non-scanning direction perpendicular to the scanning direction.

3. The exposure apparatus according to claim 1.

12. the substrate mounting device places the plurality of substrates on the substrate stage so that a line connecting the centers of the substrates that are most adjacent to each other among the plurality of substrates intersects with a scanning direction of the substrate stage or a non-scanning direction that is perpendicular to the scanning direction.

3. The exposure apparatus according to claim 1.

13. the plurality of first projection modules are capable of moving an exposure area in a non-scanning direction perpendicular to a scanning direction in which the substrate stage is scanned; 3. The exposure apparatus according to claim 1.

14. the plurality of first measurement devices are movable in a non-scanning direction perpendicular to a scanning direction in which the substrate stage is scanned; 8. The exposure apparatus according to claim 7.

15. a substrate mounting device that mounts a plurality of substrates on a substrate stage, a tray, or a base substrate; a plurality of first measurement devices that measure the positions of a plurality of semiconductor chips arranged on each of the plurality of substrates placed on the substrate stage, the tray, or the base substrate; Among the plurality of first measurement devices, first measurement devices adjacent to each other in a scanning direction in which the plurality of substrates are scanned are arranged with a first interval between their centers; the substrate mounting device arranges the plurality of substrates such that a distance between centers of adjacent substrates in the scanning direction is substantially equal to the first distance; the plurality of first measurement devices measure the positions of the semiconductor chips on different substrates substantially simultaneously; Measurement system.

16. Among the plurality of first measurement devices, adjacent first measurement devices in a non-scanning direction orthogonal to a scanning direction in which the plurality of substrates are scanned are disposed with a second interval between their centers, the substrate mounting device arranges the plurality of substrates such that a distance between centers of adjacent substrates in the non-scanning direction is approximately equal to the second distance; The measurement system of claim 15.

17. a plurality of second measurement devices; the plurality of second measurement devices measure the positions of the semiconductor chips on different substrates substantially simultaneously; different regions of each of the plurality of substrates are measured substantially simultaneously by one of the plurality of first measurement devices and one of the plurality of second measurement devices; 17. The measurement system according to claim 15 or 16.

18. a width of the region measured by the first measuring device and the region measured by the second measuring device in a non-scanning direction perpendicular to a scanning direction in which the plurality of substrates are scanned is an integer fraction of a length of the substrate in the non-scanning direction; 18. The measurement system of claim 17.

19. a substrate stage on which a plurality of substrates are placed and arranged in a first direction; a plurality of projection modules; a substrate mounting device that mounts the plurality of substrates on the substrate stage; and the first projection areas of the first modules among the plurality of projection modules are aligned in the first direction, and the centers of the first projection areas adjacent to each other are aligned at a first interval in the first direction; the substrate mounting device mounts the plurality of substrates on the substrate stage so that a value obtained by dividing a size of one of the plurality of substrates by an integer or a value obtained by dividing a distance between centers of the plurality of substrates adjacent to each other in the first direction by an integer is substantially equal to the first distance; the plurality of projection modules project, onto the plurality of substrates, wiring patterns that connect between the plurality of semiconductor chips arranged on each of the plurality of substrates, based on measurement results from a plurality of measurement devices that measure the plurality of substrates and a correspondence between the plurality of measurement devices and the plurality of projection modules; Exposure equipment.

20. The substrate stage is scanned in a scanning direction, the plurality of projection modules are arranged in i rows (i is an integer of 2 or greater) in a non-scanning direction perpendicular to the scanning direction, with one projection module per row; The plurality of measurement devices are arranged in i rows, with j devices per row (j is an integer of 2 or more), the correspondence relationship is a correspondence relationship in which j measurement devices arranged in an i-th row correspond to one projection module arranged in an i-th row.

20. The exposure apparatus according to claim 19.

21. a data creation device that creates pattern data corresponding to the wiring patterns of each of the plurality of boards; each of the plurality of projection modules includes a spatial light modulator that generates a wiring pattern for the respective substrate based on the pattern data; 21. The exposure apparatus according to claim 19 or 20.

22. An exposure apparatus for forming a wiring pattern for connecting a plurality of semiconductor chips provided on a substrate, a first measuring device that measures a plurality of first chips provided on a first substrate; a second measuring device that measures a plurality of second chips provided on a second substrate different from the first substrate; a substrate stage on which the first substrate and the second substrate are placed side by side; a first projection system that projects a first wiring pattern for connecting the plurality of first chips to each other onto the first substrate placed on the substrate stage; a second projection system that projects a second wiring pattern for connecting the plurality of second chips to each other onto the second substrate placed on the substrate stage; a substrate mounting device that mounts the first substrate and the second substrate on the substrate stage; Equipped with a center of a first projection area of ​​the first projection system and a center of a second projection area of ​​the second projection system are disposed at a first interval in a non-scanning direction orthogonal to a scanning direction in which the substrate stage is scanned; the substrate mounting device mounts the first substrate and the second substrate on the substrate stage so that a value obtained by dividing a size of one of the first substrate and the second substrate by an integer, or a value obtained by dividing a distance between a center of the first substrate and a center of the second substrate adjacent to each other in the non-scanning direction by an integer, is approximately equal to the first distance; the first projection system projects the first wiring pattern based on the measurement result of the first measurement device; the second projection system projects the second wiring pattern based on the measurement result of the second measurement device; Exposure equipment.

23. a data generating device that generates first pattern data corresponding to the first wiring pattern and second pattern data corresponding to the second wiring pattern; the first projection system includes a first spatial light modulator that generates the first wiring pattern based on the first pattern data; the second projection system includes a second spatial light modulator that generates the second wiring pattern based on the second pattern data; the data creation device creates the first pattern data based on the measurement results of the first measuring device, and creates the second pattern data based on the measurement results of the second measuring device.

23. The exposure apparatus according to claim 22.

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