Power converter

Abstract

This electric power conversion device having an arm pair (3) in which a first semiconductor switching element (M1) and a second semiconductor switching element (M2) are connected in series between a DC plus terminal and a DC minus terminal is configured to comprise: a third resistance group (6) that is connected in parallel with the first semiconductor switching element (M1); a second resistance group (5) that is connected in parallel with the second semiconductor switching element (M2); a reference-voltage-generating circuit (4) that generates a first reference voltage and a second reference voltage in which a voltage between the plus terminal and the minus terminal is divided; and an abnormality determination unit (11) that, after both semiconductor switching elements (M1, M2) have stopped operating, compares a detection voltage that is divided by the second resistance group (5) and the first and second reference voltages, and determines whether either of the semiconductor switching elements has undergone main breakdown voltage deterioration.

Description

Technical Field

[0001] This application relates to a power conversion device.

Background Art

[0002] In a power conversion device, the power conversion function is realized by an operation of turning on / off a plurality of semiconductor switching elements that constitute a power converter. Examples of the semiconductor switching elements include voltage-driven semiconductor switching elements typified by MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) and IGBT (Insulated-Gate-Bipolar-Transistor).

[0003] As a basic characteristic of this semiconductor switching element, it is required to maintain high insulation characteristics in a state where its gate is off. However, it is conceivable that the insulation characteristics are lost due to moisture absorption of the insulating material for sealing, potential defects in the semiconductor manufacturing process, and further an overvoltage surge outside the design during operation. Therefore, by grasping the deterioration state of the main breakdown voltage of the semiconductor switching element, it is expected to realize reduction of the downtime of the power conversion device by replacing the semiconductor switching element before breakdown. In particular, since it is considered that the time to reach breakdown is shorter for those with a larger leakage current, a technology for detecting with high accuracy at a stage where the leakage current is minute is required.

[0004] As a technology for detecting an abnormality in the main breakdown voltage of the semiconductor switching element in a power conversion device, for example, there are methods disclosed in Patent Document 1 or Patent Document 2. In the abnormality detection device shown in Patent Document 1, one or more parallel power conversion units are provided, and for one parallel power conversion unit, one high-select terminal voltage detection unit with a corresponding detection resistor, and one abnormality detection unit are provided. In each parallel power conversion unit, the abnormality detection unit detects an abnormality of each power converter included in the parallel power conversion unit based on the voltage at the convergence point.

[0005] The power supply device described in Patent Document 2 includes an inverter circuit composed of two switch elements connected in series, and is equipped with an abnormality detection circuit that sends an abnormality signal when the voltage at the connection point between the two switch elements exceeds a first reference voltage or falls below a second reference voltage when the inverter circuit stops operating. [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2019-110720 [Patent Document 2] Japanese Patent Publication No. 2013-243871 [Overview of the Initiative] [Problems that the invention aims to solve]

[0007] However, the technology proposed in Patent Document 1 determines a fault (detects an abnormality) when the detected voltage value changes compared to a predetermined threshold, and does not detect minute leakage currents due to the degradation of the main breakdown voltage of semiconductor switching elements. Alternatively, in the technology proposed in Patent Document 2, the connection point voltage of an inverter circuit configured with semiconductor switching elements in series is determined only by the balance between the voltage divider resistor connected to the connection point for voltage detection and the leakage current of the semiconductor switching elements. Considering the realistic condition that the leakage current of normal semiconductor switching elements is negligibly small, a situation occurs where the connection point voltage under normal conditions converges to near zero, dominated by the leakage current of the voltage divider resistor, and therefore it is not possible to distinguish between normal and abnormal with high accuracy. Furthermore, considering the reality that the leakage current of semiconductor switching elements changes nonlinearly in response to the applied voltage, in product fields where the fluctuation range of the main circuit voltage is large, it becomes difficult to secure a design margin for the reference voltage to distinguish between normal and abnormal, and as a result there is a problem in that high-precision leakage current detection cannot be achieved.

[0008] This invention was made to solve the above-mentioned problems and aims to provide a power conversion device that can accurately determine the main breakdown voltage degradation of semiconductor switching elements. [Means for solving the problem]

[0009] The power converter disclosed herein has a pair of arms in which one of the DC positive and negative terminals is a first pole terminal and the other is a second pole terminal, and a first semiconductor switching element is connected between the first pole terminal and the arm midpoint, and a second semiconductor switching element is connected between the arm midpoint and the second pole terminal, and the power converter has an abnormality detection unit and a gate control unit, and includes a semiconductor drive control unit that controls the driving of the first semiconductor switching element and the second semiconductor switching element, and the abnormality detection unit includes a third resistor group connected in parallel to the first semiconductor switching element and having at least one resistor, and the voltage applied to the second semiconductor switching element The power converter includes a second resistor group, which is connected in parallel with the second semiconductor switching element to divide the voltage, and includes a reference voltage generation circuit that generates a first reference voltage obtained by dividing the voltage between the first and second terminals, and a second reference voltage which is a different voltage from the first reference voltage obtained by dividing the voltage between the first and second terminals, and an abnormality determination unit that, after the power converter stops its power conversion operation, compares a detection voltage, which is the voltage divided by the second resistor group, with the first reference voltage and the second reference voltage to determine whether the first semiconductor switching element or the second semiconductor switching element has deteriorated in main breakdown voltage. Furthermore, the resistance value across the ends of the second resistor group is set such that the current flowing through the second resistor group is greater than the parasitic leakage current value between the main terminals of the second semiconductor switching element connected in parallel with the second resistor group in its initial state, and the resistance value across the ends of the third resistor group is set such that the current flowing through the third resistor group is greater than the parasitic leakage current value between the main terminals of the first semiconductor switching element connected in parallel with the third resistor group in its initial state. It is. [Effects of the Invention]

[0010] According to this invention, a power conversion device can be provided that can accurately determine the degradation of the main breakdown voltage of a semiconductor switching element. [Brief explanation of the drawing]

[0011] [Figure 1] This diagram shows the configuration of the power conversion device according to Embodiment 1. [Figure 2] This is a first timing chart for illustrating the operation of the power converter according to Embodiment 1. [Figure 3] This is a second timing chart illustrating the operation of the power converter according to Embodiment 1. [Figure 4] This is a third timing chart for illustrating the operation of the power converter according to Embodiment 1. [Figure 5] This figure shows another configuration of the power converter according to Embodiment 1. [Figure 6] This diagram shows the configuration of the power conversion device according to Embodiment 2. [Figure 7] This is a timing chart illustrating the operation of the power converter according to Embodiment 2. [Figure 8] This diagram shows the configuration of the power conversion device according to Embodiment 3. [Figure 9] This diagram shows the configuration of the power conversion device according to Embodiment 4. [Figure 10] This diagram shows the configuration of the power conversion device according to Embodiment 5. [Figure 11] This diagram shows the configuration of the power conversion device according to Embodiment 6. [Figure 12] This block diagram shows an example of the actual configuration of the gate signal generation unit, or the gate signal generation unit and the abnormality determination unit, in each embodiment. [Modes for carrying out the invention]

[0012] Embodiment 1. Hereinafter, embodiments will be described based on the drawings. In the following description, the same reference numerals are used to indicate the same or corresponding components. Further, in the following description, the state of an element where the device stops operating is referred to as "failure", and the case where the element operates but deteriorates and fails to satisfy the required specifications is referred to as "degradation". In the case of "degradation", when a test (screening) is performed before the element is shipped, the element that has been confirmed to satisfy the required specifications and quality and reliability targets of various tests is targeted.

[0013] FIG. 1 is a configuration diagram showing the configuration of a power conversion device according to Embodiment 1. The power conversion device includes an arm pair (leg circuit) 3 in which a first semiconductor switching element M1 constituting an upper arm and a second semiconductor switching element M2 constituting a lower arm are connected in series between a positive potential PA and a negative potential GA of a DC power supply (not shown). Here, an example of a single-phase inverter configured by a pair of arm pairs is shown for simplicity. The arm pair 3 includes a positive terminal P, a negative terminal N, and an arm midpoint C as a connection point between the first semiconductor switching element M1 and the second semiconductor switching element M2.

[0014] The first semiconductor switching element M1 and the second semiconductor switching element M2 are controlled to perform an on / off operation by applying a voltage between the gate and the source by gate drive units 2H and 2L based on respective on / off command signals SGH and SGL generated by a gate signal generation unit 2. Here, the part composed of the gate signal generation unit 2, the gate drive unit 2H, and the gate drive unit 2L will be referred to as a gate control unit 1. As a general configuration of the gate drive unit 2H and the gate drive unit 2L, there are an insulation communication unit such as a photocoupler, a level shifter, or a pulse transformer that insulates the on / off command signals SGH and SGL, a buffer that amplifies the insulated signal, a drive adjustment unit such as a gate resistor that adjusts switching characteristics, and a short-circuit protection unit that detects a short circuit of the first semiconductor switching element M1 and the second semiconductor switching element M2 and safely shuts off the circuit.

[0015] Between the positive-side potential PA and the negative-side potential GA of the DC power supply, there is provided a first resistor group 4 (also referred to as a reference voltage generation circuit 4) configured by connecting at least three or more resistors in series. Here, an example in which three resistors, R20, R21, and R22, are connected in series is shown.

[0016] In parallel with the second semiconductor switching element M2 in the lower arm, there is provided a second resistor group 5 configured by connecting two or more resistors in series. Here, an example in which two resistors, R1 and R2, are connected in series as the second resistor group 5 is shown. Similarly, in parallel with the first semiconductor switching element M1 in the upper arm, there is provided a third resistor group 6 including one or more resistors. Here, an example in which two resistors, R10 and R11, are connected in series as the third resistor group 6 is shown. The present application is not limited to the configurations of these illustrated resistor groups, and the number of resistors connected in series may be increased.

[0017] It is preferable to provide filter capacitors for stabilizing the reference potentials VrefH and VrefL generated by voltage division between the connection point of the resistors in the first resistor group 4 and the negative-side potential GA. Here, an example in which a filter capacitor C20 is provided between the connection point of R20 and R21 and the negative-side potential GA is shown. Also, between the connection point of the resistors in the second resistor group 5 and the negative-side potential GA, a filter capacitor for removing high-frequency noise superimposed on the detection voltage VdM generated by voltage division can be provided as needed. Here, an example in which a filter capacitor C1 is provided between the connection point of resistors R1 and R2 and the negative-side potential GA is shown.

[0018] The reference voltage of the voltage range comparator 7 is set to the voltage generated by voltage division using the resistors in the first resistor group 4. In this example, the comparator CP1 uses the first reference voltage VrefH, and the comparator CP2 uses a second reference voltage VrefL that is different from the first reference voltage VrefH as the reference voltage. And this voltage range comparator 7 generates a signal for determining that the detected voltage VdM generated by voltage division using the resistors in the second resistor group 5 is within the range of two different reference voltages (VrefL < VdM < VrefH). In this embodiment, when VdM < VrefH, the output SDH of the comparator CP1 becomes the Hi output, and when VrefL < VdM, the output SDL of the comparator CP2 becomes the Hi output. Therefore, when VdM ≥ VrefH, SDH becomes the Lo output, and when VrefL ≥ VdM, SDL becomes the Lo output.

[0019] After the semiconductor switching element stops its on / off operation, the abnormality determination unit 11 compares the detected voltage VdM with the first reference voltage VrefH and the second reference voltage VrefL based on the output result of the voltage range comparator 7. When VrefL ≥ VdM or VdM ≥ VrefH, it is determined that the first semiconductor switching element M1 or the second semiconductor switching element M2 has deteriorated in main breakdown voltage, and a main breakdown voltage abnormality signal FDL is output to the gate signal generation unit 2 and a warning is notified.

[0020] As described above, the abnormality detection unit 10 includes a first resistor group (reference voltage generation circuit) 4, a second resistor group 5, a third resistor group 6, a voltage range comparator 7, and an abnormality determination unit 11. Here, the part composed of the gate control unit 1 and the abnormality detection unit 10 is referred to as a semiconductor drive control unit 100.

[0021] FIG. 1 shows only the arm pair 3 in which the first semiconductor switching element M1 and the second semiconductor switching element M2 are connected in series for simplicity, but it can also be applied to a power conversion device having a plurality of arm pairs. For example, it may be an H-bridge circuit in which two arm pairs are connected in parallel or a three-phase inverter in which three arm pairs are connected in parallel.

[0022] (Method for detecting deterioration of main breakdown voltage) The method for detecting main breakdown voltage degradation will be specifically explained below with reference to the signal timing chart. Main breakdown voltage degradation refers to a state in which the leakage current, which is the current flowing between the main terminals of a semiconductor switching element when the semiconductor switching element is off, increases due to the degradation of the semiconductor switching element and no longer satisfies the required specifications. Even a semiconductor switching element in a state of main breakdown voltage degradation can perform on / off operations normally for a while, but in the near future, the leakage current will increase further, and normal on / off operations will become impossible. Figure 2 is a signal timing chart diagram during switching operation when the semiconductor switching element is in a healthy state. Based on the upper arm on command SGH and lower arm on command SGL generated by the gate signal generation unit 2, gate voltages VGH and VGL are applied to the gates of the first semiconductor switching element M1 of the upper arm and the second semiconductor switching element M2 of the lower arm, respectively. This causes the first semiconductor switching element M1 and the second semiconductor switching element M2 to switch on and off. The upper arm illustrates the state in which synchronous rectification occurs when current IsH flows through the diode connected in parallel with the first semiconductor switching element, while the lower arm illustrates the state in which the forward drain current IdL of the second semiconductor switching element is energized / cut off by this on / off operation. At this time, the voltage Vac at the arm midpoint C, which is the connection point between the first semiconductor switching element M1 and the second semiconductor switching element M2, is the voltage VB between the positive potential PA and the negative potential GA, plus the forward voltage Vf of the diode. Canada The calculated VB+Vf and the on-voltage Von, which is caused by the on-resistance of the semiconductor switching element, are used as upper and lower limits.

[0023] The detection voltage VdM generated by voltage division in the second resistor group 5 repeatedly becomes greater than the reference voltage VrefH designed according to the resistance value of the first resistor group 4 or smaller than the reference voltage VrefL, and the detection voltage VdM transitions when the second semiconductor switching element M2 turns on and off. Since the main breakdown voltage degradation of the semiconductor switching element cannot be detected from the voltage Vac at the arm midpoint C in such a switching state, the abnormality determination unit 11 holds the degradation diagnosis permission signal EDL in the Lo state to stop the detection of the main breakdown voltage degradation. As a result, the degradation detection signal FDL is held in the Lo state, preventing the Hi state indicating that the main breakdown voltage has degraded during the switching operation from being erroneously output.

[0024] FIG. 3 is a timing chart of signals from immediately before the on / off operation of the semiconductor switching element stops to after the stop when the semiconductor switching element is in a sound state, corresponding to the state where both the upper and lower arms have shifted from the switching operation state shown in FIG. 2 to the off state. When both the semiconductor switching elements of the upper and lower arms are off, the source current of the upper arm gradually decreases, reaches zero at time t31, and converges to a static zero state after resonance occurs due to the main circuit inductance and the parasitic capacitance of the semiconductor switching element. Correspondingly, the arm midpoint voltage Vac converges near VB / 2, and the converged value is determined according to the parasitic leakage current of the first semiconductor switching element M1 and the second semiconductor switching element M2. Correspondingly, the detection voltage VdM converges to a value between the reference voltages VrefL and VrefH. At time t32, which is sufficiently after the arm midpoint voltage Vac has settled to a steady state, the degradation diagnosis permission signal EDL is set to the Hi state in the abnormality determination unit 11 to enable the detection of the main breakdown voltage degradation. However, since the reference voltage is designed such that VrefL < VdM < VrefH when the semiconductor switching element is in a sound state, the degradation detection signal FDL is in the Lo state where no degradation is detected.

[0025] Figure 4 is a timing chart of the signals after the on / off operation of the semiconductor switching element has stopped when the main breakdown voltage of the first semiconductor switching element M1 has deteriorated. Compared to Figure 3, the detected voltage VdM after the on / off operation of the semiconductor switching element has stopped has exceeded the reference voltage VrefH, so the comparator CP1 in the voltage range comparator 7 has determined that the state is VdM≧VrefH, and at time t33, the abnormality determination unit 11 changes the deterioration detection signal FDL to a Hi output indicating that main breakdown voltage deterioration has been detected. The principle that the detected voltage VdM after the on / off operation has stopped exceeds the reference voltage VrefH is due to the fact that the combined resistance of the total resistance value of the third resistor group 6 and the parasitic resistance value calculated from the leakage current of the first semiconductor switching element M1 and its applied voltage is smaller than the combined resistance of the total resistance value of the second resistor group 5 and the parasitic resistance value calculated from the leakage current of the second semiconductor switching element M2 and its applied voltage. The reference voltages VrefH and VrefL can be designed from the range of the target leakage current value and the parasitic leakage current value of a healthy unit.

[0026] Here, the criterion for determining whether the main breakdown voltage has deteriorated can also be the time it takes for the detected voltage VdM to deviate from the voltage between the reference voltages VrefL and VrefH. That is, if the time it takes for the voltage to deviate from the voltage between the two reference voltages is long, it is not determined that the main breakdown voltage has deteriorated, and if the time is short, it is determined that the main breakdown voltage has deteriorated. Alternatively, the criterion can also be the amount of change per unit time of the detected voltage VdM when the detected voltage VdM deviates from the voltage between the reference voltages VrefL and VrefH. That is, if the amount of change is small, it is not determined that the main breakdown voltage has deteriorated, and if the amount of change is large, it is determined that the main breakdown voltage has deteriorated.

[0027] If the main breakdown voltage of the second semiconductor switching element M2 deteriorates, the combined resistance of the second resistor group 5 and the parasitic resistance calculated from the leakage current of the second semiconductor switching element M2 and its applied voltage becomes smaller than when the main breakdown voltage has not deteriorated. As a result, the detection voltage VdM after the on / off operation stops becomes smaller than the reference voltage VrefL. This allows for the detection of the deterioration of the main breakdown voltage of the second semiconductor switching element M2. Furthermore, by making the combined resistance value of the second resistor group 5 equal to the combined resistance value of the third resistor group 6, the detection accuracy of the main breakdown voltage deterioration of the first semiconductor switching element M1 and the second semiconductor switching element M2 can be made equivalent.

[0028] (Design method for the resistance values ​​of the second and third resistor groups) The design method for the resistance values ​​of the second resistor group 5 and the third resistor group 6 is to design the leakage current value that flows according to the combined resistance value of each resistor group to be greater than the leakage current value (current value that flows when each semiconductor switching element is off) that parasitizes between the main terminals (between the terminals through which the main current of each semiconductor switching element flows) when the first semiconductor switching element M1 and the second semiconductor switching element M2 are in a healthy state, for example, in the initial state at the time of shipment. For example, considering the leakage current set as the main breakdown voltage screening condition for semiconductor switching elements at the time of shipment, a target leakage current value for detection can be determined by adding a margin to prevent false detections, and the combined resistance value of each resistor group can be determined so that this can be detected with high accuracy.

[0029] If the leakage current in the second resistor group 5 and the third resistor group 6 is too large, the fluctuation range of the detection voltage VdM due to the increase in the leakage current of the first semiconductor switching element M1 and the second semiconductor switching element M2 becomes small, resulting in poor detection accuracy. Conversely, if the leakage current in the second resistor group 5 and the third resistor group 6 is too small, the detection voltage VdM will vary greatly with respect to the leakage current within the normal range of the semiconductor switching elements, leading to problems such as misidentifying normal conditions as abnormal or failing to detect abnormalities. For example, if the leakage current of the first semiconductor switching element M1 is at a negligible level and the leakage current of the second semiconductor switching element M2 is equivalent to the screening conditions at the time of shipment, the detection voltage VdM when both semiconductor switching elements are off will be biased towards the lower arm side while the main breakdown voltage is healthy. The resistance values ​​of the second resistor group 5 and the third resistor group 6 should be designed to prevent false detection.

[0030] (Timing for detecting main voltage degradation) The detection of the main breakdown voltage degradation of the first semiconductor switching element M1 and the second semiconductor switching element M2 is performed when both are turned off and the output voltage at the arm midpoint C, which is their series connection point, converges to a steady value. Specifically, this can be done when the device is started, stopped, or coasting. Since the main breakdown voltage leakage current increases with the junction temperature (temperature of the joint) of the element, detection immediately after the device has stopped operating, when the junction temperature of the semiconductor switching element is higher than the ambient temperature, allows for the most accurate determination of breakdown voltage degradation.

[0031] Furthermore, since the junction temperature of the switching element is not high when the device is started, the power converter is operated to raise the junction temperature, and by detecting the degradation of the main breakdown voltage at the time when the temperature is higher than the ambient temperature, it is possible to determine the degradation with high accuracy.

[0032] (Action taken after degradation is detected) If it is determined that the semiconductor switching element has deteriorated in its primary breakdown voltage, the abnormality detection unit 11 shown in Figure 1 or Figure 5 notifies the receiver of the abnormality. For example, an abnormality lamp may be provided in the device and illuminated when deterioration in primary breakdown voltage is determined. When the abnormality lamp illuminates, measures may be taken to immediately shut down the device. Alternatively, since the illumination of the abnormality lamp indicates that deterioration has occurred before the switching element has broken down, the device may continue to operate until the next opportunity to shut down arises, and the semiconductor switching element may be replaced when the device shuts down.

[0033] Furthermore, if it is determined that a semiconductor switching element has deteriorated in its main breakdown voltage, the operation of the power converter may be changed to temporarily extend the lifespan of the semiconductor switching element by reducing the load on that element. For example, if the original inverter modulation method was three-phase modulation, it may be changed to two-phase modulation, or the switching carrier frequency may be lowered, thus reducing the number of switching cycles. Alternatively, reducing the load current may also reduce stress. In this way, by detecting an abnormality in a semiconductor switching element and displaying a warning, the lifespan of the switching element can be extended by taking temporary measures, allowing the device to operate without stopping and enabling it to operate without downtime according to the planned operating schedule.

[0034] (Effects of a configuration where the reference voltage changes according to the main circuit voltage) In Embodiment 1, the first reference voltage VrefH and the second reference voltage VrefL of the voltage range comparator 7 are generated by voltage division using resistors in the first resistor group 4, which are installed between the positive side potential PA and the negative side potential GA of the main circuit. Therefore, when the main circuit voltage decreases, the range of reference voltages (VrefH-VrefL) that the abnormality determination unit 11 determines to be normal changes to a smaller size. Conversely, when the main circuit voltage increases, these reference voltages change to a larger size. This configuration takes into account that the main breakdown voltage leakage current increases nonlinearly with increasing voltage, and prevents the leakage current from decreasing nonlinearly when the main circuit voltage decreases, which would worsen detection accuracy, and prevents the leakage current from increasing nonlinearly when the main circuit voltage increases, which would cause a normal state to be mistakenly detected as abnormal. As a result, minute leakage currents can be detected with higher precision than before, and therefore the lifespan of the semiconductor switching element can be extended.

[0035] Figure 5 is a block diagram showing another configuration of the power converter according to Embodiment 1. In Figure 1, the voltage divided by the second resistor group 5, which is connected in parallel to the second semiconductor switching element M2 that constitutes the negative arm, is used as the detection voltage VdM. In the configuration of Figure 5, the semiconductor switching element that constitutes the negative arm is the first semiconductor switching element M1, and the semiconductor switching element that constitutes the positive arm is the second semiconductor switching element M2. The second resistor group 5 is connected in parallel to this second semiconductor switching element M2, and the voltage divided by this second resistor group 5 is used as the detection voltage VdM.

[0036] Furthermore, in the configuration shown in Figure 1, the first reference voltage VrefH and the second reference voltage VrefL are generated by a reference voltage generation circuit 4, which is a first resistor group consisting of three resistors connected in series. In the configuration shown in Figure 5, the first resistor group 4, which serves as the reference voltage generation circuit, is composed of two series resistors: a series resistor R23 and R24 connected between the positive potential PA and the negative potential GA, and a series resistor R25 and R26 connected between the positive potential PA and the negative potential GA. The first reference voltage VrefH is generated by voltage division using the series resistor R23 and R24, and the second reference voltage VrefL is generated by voltage division using the series resistor R25 and R26. In addition, a filter capacitor C22 is provided in parallel with resistor R24 ​​and a filter capacitor C21 is provided in parallel with resistor R26 to stabilize the reference voltage. Thus, the reference voltage generation circuit 4 can have any configuration as long as it is configured to divide the voltage between the positive potential PA and the negative potential GA to generate a first reference voltage VrefH and a second reference voltage VrefL which is a different voltage from the first reference voltage VrefH.

[0037] In the configuration shown in Figure 5, it is preferable to configure the first reference voltage VrefH, the second reference voltage VrefL, and the detection voltage VdM using a circuit that references the positive side potential PA. Even with the configuration in Figure 5, as with the configuration in Figure 1, it is possible to determine whether the first semiconductor switching element M1 or the second semiconductor switching element M2 has deteriorated in main breakdown voltage by comparing the detection voltage VdM with the first reference voltage VrefH and the second reference voltage VrefL.

[0038] As described above, the power conversion device according to Embodiment 1 is a power conversion device having an arm pair in which one of the DC positive terminal PA and negative terminal GA is a first pole terminal and the other is a second pole terminal, a first semiconductor switching element M1 is connected between the first pole terminal and the arm midpoint C, and a second semiconductor switching element M2 is connected between the arm midpoint and the second pole terminal, and a third resistor group 6 having at least one resistor connected in parallel to the first semiconductor switching element M1, and a second resistor group being a series of multiple resistors connected in parallel with the second semiconductor switching element M2 to divide the voltage applied to the second semiconductor switching element M2. A reference voltage generation circuit 4 generates a first reference voltage VrefH, which is a voltage obtained by dividing the voltage between the first and second terminals, and a second reference voltage VrefL, which is a voltage different from the first reference voltage VrefH, obtained by dividing the voltage between the first and second terminals. When the detection voltage VdM, which is divided by the second resistor group 5 after the first semiconductor switching element M1 and the second semiconductor switching element M2 have stopped on / off operation, is a voltage that is outside the range between the first reference voltage VrefH and the second reference voltage VrefL, then the first semiconductor switching element M1 or the second semiconductor switching element M2 has undergone major breakdown voltage degradation. and It is configured to include an abnormality determination unit 11 that makes a determination.

[0039] Therefore, the first semiconductor switching element M1 or second This technology can accurately detect when the semiconductor switching element M2 has deteriorated in its primary breakdown voltage.

[0040] Embodiment 2. Figure 6 is a configuration diagram showing the configuration of the power conversion device according to Embodiment 2. In Figure 6, the semiconductor drive control unit 200 is composed of the abnormality detection unit 20 and the gate control unit 1. Below, only the differences between the abnormality detection unit 20 and the abnormality detection unit 10 in Figure 1 will be explained.

[0041] The abnormality detection unit 20 differs from the abnormality detection unit 10 in Figure 1 in that, in the abnormality determination unit 12, it also performs short-circuit detection or dead time detection using the voltage range comparator 7 used for detecting main breakdown voltage degradation. Short-circuit detection detects a state in which the first semiconductor switching element M1 and the second semiconductor switching element M2 are energized simultaneously, a so-called arm short circuit, which can occur in situations such as noise malfunction, insufficient dead time for the upper and lower arms, or failure of the semiconductor switching element. Dead time detection detects the delay time from the generation of the on / off command signal generated by the gate signal generation unit 1 until the semiconductor switching element is actually turned on or off. By detecting the dead time and correcting it to an optimal dead time, the output performance of the power converter can be improved.

[0042] While the main breakdown voltage degradation diagnosis described in Embodiment 1 detects the steady state after the inverter stops, short-circuit detection and dead-time detection detect transient states during switching. Therefore, the main breakdown voltage degradation diagnosis does not require high responsiveness of the detection circuit, while short-circuit detection and dead-time detection require high detection accuracy. For this reason, short-circuit detection and dead-time detection require responsiveness of the detection circuit, but voltage amplitude accuracy is not required. These requirements are in a trade-off relationship. In other words, if the resistance value of the second resistor group 5 is increased to improve the detection accuracy of leakage current for main breakdown voltage degradation detection, even if the filter capacitor C1 is reduced, the small parasitic capacitance of the comparator in the voltage range comparator 7 increases the transition time of the detected voltage VdM, causing a problem in which short-circuit detection and dead-time detection are delayed.

[0043] In order to solve the above problems, in the second embodiment, the second resistor group 5 is composed of a resistor R1 (also referred to as the first resistor) on the arm midpoint side and a resistor R2 (also referred to as the second resistor) connected in series to the resistor R1. A speed-up capacitor C2 (also referred to as the second capacitor) is provided in parallel with the resistor R1 on the arm midpoint side of the second resistor group 5. Thereby, the steady-state convergence value of the detection voltage VdM is determined by the resistance ratio within the second resistor group 5. On the other hand, the transient convergence value of the detection voltage VdM is determined by the capacitance ratio of the speed-up capacitor C2 and the filter capacitor C1 (the first capacitor) (taking into account the input parasitic capacitance of the comparators CP1 and CP2 as necessary). Thus, it is possible to design so as to optimize the detection accuracy of the main breakdown voltage deterioration and the detection delay of the short-circuit detection and dead-time detection. Specifically, the resistance value Rs1 of the resistor R1 on the arm midpoint side of the second resistor group 5, the resistance value Rs2 of the resistor R2 connected in series to the resistor R1, the capacitance Cs1 of the filter capacitor C1 connected in parallel to the resistor R 2 and the capacitance Cs2 of the speed-up capacitor C2 connected in parallel to the resistor R 1 are set so as to satisfy Rs2 / (Rs1 + Rs2) < Cs2 / (Cs1 + Cs2), so that different detection events can be well handled. That is, it promotes the rapid transition of the detection voltage during transient times such as during short-circuit and dead-time detection to a low voltage level for short-circuit detection or dead-time detection determined by the capacitor voltage. On the other hand, the subsequent steady-state detection voltage can be set to a high voltage level for main breakdown voltage deterioration diagnosis determined by the resistance ratio. By doing so, the short-circuit detection and dead-time detection that require high speed and the main breakdown voltage deterioration diagnosis that requires high accuracy can be suitably realized with a common determination circuit.

[0044] The methods for detecting dead time and short circuits will be explained below with reference to the timing chart in Figure 7. Generally, semiconductor switching elements have a turn-on time (ton) required to switch from the off state to the on state, and a turn-off time (toff) required to switch from the on state to the off state. When the gate resistance value of the semiconductor switching element increases, the turn-on time (ton) and turn-off time (toff) increase. In addition, the turn-on time (ton) and turn-off time (toff) increase or decrease depending on variations in the electrical characteristics of the semiconductor switching element, such as the gate threshold voltage, and operating conditions such as the junction temperature. Taking this into account, the ON command signals SGH and SGL of the upper and lower arms generated by the gate signal generation unit 2 both have a sufficient dead time, which is a period that indicates the off state. On the other hand, since the output performance of the power converter decreases due to the presence of dead time, control that optimizes the dead time by detecting the actual turn-on time (ton) and turn-off time (toff) is sometimes applied. In this second embodiment, the dead time is optimized by using the voltage range comparator 7 used for detecting main voltage degradation to detect the time when the detected voltage VdM crosses the reference voltage VrefH or VrefL. For example, in Figure 7, after the ON command SGL for the lower arm is generated, the dead time from the generation of the ON command to the actual transition of the main terminal voltage can be detected by detecting the time t41 when the detected voltage VdM falls below the reference voltage VrefL due to a decrease in the arm midpoint voltage Vac. Based on the detected dead time, the output characteristics of the power converter can be improved by correcting the amount of dead time by correcting the ON command signals SGH and SGL for the upper and lower arms generated by the gate signal generation unit 2.

[0045] Next, the method for detecting a short circuit will be explained. Figure 7 assumes a state where the second semiconductor switching element M2 is destroyed and the main breakdown voltage is lost at time t42, when the lower arm is in the turn-off operation. In this case, an arm short circuit occurs when the first semiconductor switching element M1 is turned on after the ON command signal SGH is sent to the upper arm, which is the opposing arm, causing an excessive current to flow. As a result, while in a normal state the arm midpoint voltage Vac would rise to VB + Vf, the arm midpoint voltage Vac does not rise because the semiconductor switching element M1 is saturated with current, and as a result the detected voltage VdM remains below the reference voltage VrefL. In other words, a short circuit can be detected from the logical inconsistency between the ON command signal transmitted by the gate signal generation unit 2 and the detected voltage VdM. As a result, the short circuit detection signal FDS becomes Hi at time t43, when the filter delay in the abnormality determination unit 12 is reflected. In response to the detection of a short circuit by the abnormality determination unit 12 and the short circuit detection signal FDS becoming Hi, the gate signal generation unit 2 typically takes the action of turning off all ON command signals to stop the operation of the power converter. Furthermore, by increasing the off-gate resistance value when interrupting the short-circuit current, overvoltage damage can be reliably prevented.

[0046] To speed up short-circuit detection, in this second embodiment, the judgment reference voltage used for short-circuit detection when the upper arm turns on is set to VrefL. Similarly, it is assumed that the judgment reference voltage used for short-circuit detection when the lower arm turns on is set to VrefH. This is because, from the choice between judgment reference voltages VrefL and VrefH, the preferred one was selected to speed up short-circuit detection, and the reason is as follows. Now, let's assume that the state in Figure 6 where the first semiconductor switching element M1 of the upper arm turns on after time t42 is normal switching. In this case, in normal switching, the arm midpoint voltage Vac rises to VB + Vf, but if VrefH is adopted as the judgment reference voltage, the time at which the judgment reference value is exceeded is later compared to when VrefL is adopted. That is, it takes time to identify that it is normal switching, and therefore it is necessary to lock the short-circuit detection function or mask the detection signal with a low-pass filter during that period. As a result, the delay time from when a short circuit actually occurs until the short-circuit detection signal FDS is generated becomes large, and the performance of short-circuit protection deteriorates. Therefore, it is preferable to set the judgment reference voltage used for short-circuit detection when the upper arm is turned on as VrefL, and the judgment reference voltage used for short-circuit detection when the lower arm is turned on as VrefH.

[0047] Embodiment 3. Figure 8 is a circuit diagram showing the configuration of the power converter 110 according to Embodiment 3. The power converter 110 is an inverter that converts DC power from a DC power supply 60 into three-phase AC power and supplies it to an AC motor 70. The power converter 110 includes a power converter 30 that has multiple semiconductor switching elements and converts to three-phase AC of U, V, and W, and a semiconductor drive control unit 100A that has a gate control unit 1A that drives each semiconductor switching element in the power converter 30. The semiconductor drive control unit 100A includes an abnormality detection unit 10 with the same configuration as the abnormality detection unit 10 of Embodiment 1 for the U-phase arm pair composed of the first semiconductor switching element M1 and the second semiconductor switching element M2. The semiconductor switching elements M3 and M4 that constitute the V-phase arm pair, and the semiconductor switching elements M5 and M6 that constitute the W-phase arm pair are not provided with an abnormality detection unit 10.

[0048] In this third embodiment, the abnormality detection unit 10 has the same configuration as the abnormality detection unit 10 of the semiconductor drive control unit 100 mounted on the power converter according to the first embodiment. This unit can detect any main breakdown voltage degradation in any of the semiconductor switching elements constituting the power converter 30, thus providing an inexpensive power converter 110 that can achieve downtime-free operation.

[0049] The following explains the principle by which a single abnormality detection unit 10 provided in the U phase can detect main breakdown voltage degradation in any of the semiconductor switching elements constituting the power converter 30. Generally, AC motors 70 have high insulation characteristics ranging from several hundred megaohms to several gigaohms or more, so leakage current generated through the AC motor 70 is not dominant. Therefore, it does not worsen the detection accuracy of main breakdown voltage degradation of semiconductor switching elements, and the reference voltage of the abnormality detection unit 10 provided in the U phase can be set taking into account the insulation characteristics of the AC motor 70.

[0050] For example, if the main breakdown voltage of the semiconductor switching element M5 in the upper arm of the W phase deteriorates and the leakage current increases, when the power converter 30 stops switching and the potential of the midpoints of the arms of each phase (the connection points of the upper and lower arms) stabilizes, the potential of the midpoint of the W phase arm will be higher than under normal conditions. For example, if the resistance value between the ends of the second resistor group 5 provided in the abnormality detection unit 10 is equal to the resistance value between the ends of the third resistor group 6, the potential of the midpoint of the W phase arm when the main breakdown voltage is not deteriorated is near half the voltage VB / 2 of the DC voltage VB, whereas when the main breakdown voltage deteriorates, a change occurs in the direction of becoming greater than VB / 2. In this case, since the three phase windings are electrically connected within the AC motor 70, the potentials of the midpoints of the arms of the U phase and V phase will also be equal to the potential of the midpoint of the W phase arm. Therefore, as shown in the configuration of Figure 8, the abnormality detection unit 10 provided only in the U phase can detect if the main breakdown voltage deteriorates in any of the semiconductor switching elements constituting the power converter 30.

[0051] Furthermore, although the above description assumes that the insulation characteristics of the AC motor 70 are normal, if its insulation characteristics deteriorate for any reason, the potential at the arm midpoint will change in a direction that is less than half voltage VB / 2 of the DC voltage VB. Therefore, the power converter 110 of this embodiment can also detect when insulation degradation occurs in the driven AC motor 70. However, when the potential at the arm midpoint changes in a direction that is less than half voltage VB / 2 of the DC voltage VB, it may not be possible to determine whether it is insulation degradation of the AC motor 70 or main breakdown voltage degradation of the semiconductor switching element. To reliably determine which it is, for example, a switch can be installed between the arm midpoint and the motor, and the presence or absence of main breakdown voltage degradation of the semiconductor switching element can be checked with the motor disconnected, thereby determining whether it is main breakdown voltage degradation of the semiconductor switching element or insulation degradation of the motor.

[0052] Although the power converter 30 is shown outputting two levels of AC voltage (positive and negative), the configuration of this embodiment can also be applied to an inverter capable of multi-level voltage output by connecting any number of semiconductor switching elements in series and parallel.

[0053] Embodiment 4. Figure 9 shows the configuration of the power converter 120 according to Embodiment 4. The differences from Embodiment 3 will be explained below. The power converter 120 of this embodiment, like Embodiment 3, is an inverter that converts DC power from a DC power supply 60 into three-phase AC power and supplies it to an AC motor 70, and each semiconductor switching element is on / off controlled by a gate control unit 1B provided in the semiconductor drive control unit 200B. The power converter 120 according to Embodiment 4 differs from Embodiment 3 in that it is provided with abnormality detection units 20U, 20V, and 20W, which have the same configuration as the abnormality detection unit 20 in Embodiment 2, as abnormality detection units provided in the semiconductor drive control unit 200B, for detecting abnormalities in each arm pair of the U-phase, V-phase, and W-phase, respectively. The abnormality detection units 20U, 20V, and 20W, like the abnormality detection unit 20 in Embodiment 2, detect main breakdown voltage degradation of semiconductor switching elements and arm short-circuit detection or dead time detection based on the judgment result of their respective abnormality determination units. In Embodiment 3, the main breakdown voltage degradation of the semiconductor switching element could be determined by the detection voltage at any of the three phase arms, but arm short-circuit detection and dead time detection must be performed using the detection voltage at each pair of arms of the three phases. Therefore, the semiconductor drive control unit 200B of Embodiment 4 is equipped with three sets of abnormality detection units 20U, 20V, and 20W. When the first reference voltage and the second reference voltage are set to the same voltage in the abnormality detection units 20U, 20V, and 20W, for example, the outputs of the first reference voltage and the second reference voltage generated by the reference voltage generation circuit provided in the abnormality detection unit 20U may be input to the abnormality detection unit 20V and the abnormality detection unit 20W.

[0054] In this way, by integrating the functions of main breakdown voltage degradation, arm short circuit detection, and dead time detection of semiconductor switching elements, an inexpensive power converter 120 capable of high-precision anomaly detection can be obtained.

[0055] Embodiment 5. Figure 10 shows the configuration of the power converter 130 according to Embodiment 5. The differences from Embodiments 3 and 4 will be explained below. The power converter 130 of Embodiment 5 comprises a power converter 31 having an arm pair of semiconductor switching elements M7 and M8, a gate control unit 1C that drives the semiconductor switching elements M7 and M8 in the power converter 31, and a semiconductor drive control unit 100C having an abnormality detection unit 10C. In this case, the power converter 31 is a boost converter that boosts the DC voltage of the DC power supply 60 and supplies it to the DC load 70B. The abnormality detection unit 10C has a configuration similar to either the abnormality detection unit 10 with a main withstand voltage degradation diagnosis function shown in Embodiment 1, or the abnormality detection unit 20 with an arm short-circuit detection function and / or dead time detection function added as shown in Embodiment 2.

[0056] The power converter 31 comprises an arm pair formed by connecting semiconductor switching elements M7 and M8 in series, an input-side smoothing capacitor 41, an output-side smoothing capacitor 42, and a boost reactor 43. In this case as well, a power converter 130 can be obtained with an inexpensive configuration that has a high-precision main breakdown voltage degradation diagnosis function for semiconductor switching elements, or a main breakdown voltage degradation diagnosis function with an arm short-circuit detection function added, or even a dead time detection function added. Although a boost converter is shown in the above example, it can also be applied to a buck converter, or a buck-boost converter that combines a boost converter and a buck converter.

[0057] Embodiment 6. Figure 11 shows the configuration of the power converter 140 according to Embodiment 6. (The following figures are...) 8The differences from the power converter 110 according to Embodiment 3 shown above will be explained. The power converter 140 of this embodiment comprises a power converter in which a power converter 31, which is a boost converter as shown in Figure 10, is connected to the DC side of the power converter 30 shown in Figure 8, and a semiconductor drive control unit 100D having a gate control unit 1D that drives each semiconductor switching element. The semiconductor drive control unit 100D is equipped with two sets of abnormality detection units 10 and abnormality detection unit 10C in order to diagnose the main breakdown voltage degradation of the semiconductor switching elements of the power converter 30 and the power converter 31, respectively. The abnormality detection unit 10 has the same configuration as the abnormality detection unit 10 of Embodiment 1, and the abnormality detection unit 10C has the same configuration as the abnormality detection unit 10C of Embodiment 5.

[0058] In this case as well, a power conversion device 140 can be obtained that can achieve downtime-free operation through high-precision main breakdown voltage degradation diagnosis of semiconductor switching elements with an inexpensive configuration.

[0059] The power converter 140 boosts the DC voltage of the DC power supply 60 using a power converter 31, which is a boost converter. The boosted DC power is then converted to AC power by a power converter 30 and supplied to the AC motor 70. The power converter 140 operates as a boost inverter system and is applicable, for example, to electric vehicles. The power converter 30 in the power converter 140 may be an inverter capable of multi-level voltage output. Furthermore, the power converter 31 in the power converter 140 is not limited to a boost converter; it may also be a buck converter, or a buck-boost converter that combines a boost converter and a buck converter.

[0060] In embodiments 1 to 6 described above, the semiconductor switching element is shown as a MOSFET, but other semiconductor switching elements having control terminals, such as IGBTs, may also be used. Furthermore, the diode shown in parallel with the MOSFET is not limited to a body diode parasitic on the MOSFET, but may be a separate diode.

[0061] Furthermore, a wide-bandgap semiconductor material with a larger bandgap than Si may be used for at least one pair of arm semiconductor switching elements, thereby increasing the speed of the switching operation of the semiconductor switching elements and enabling lower losses and miniaturization of the power conversion device. As the wide-bandgap semiconductor material, silicon carbide (SiC), gallium nitride (GaN), gallium oxide-based material (GaO), or diamond can be used.

[0062] The abnormality detection unit in each of the above embodiments can be configured with logic circuits, or it can be configured with arithmetic processing by a processor. The gate drive unit can be configured with a circuit that combines ordinary integrated circuits and circuit elements such as resistors and capacitors. The gate signal generation unit can also be configured with logic circuits, integrated circuits, and other circuit elements such as resistors. Furthermore, for example, the gate signal generation unit 2, or the gate signal generation unit and the abnormality detection unit together, can be configured with a processing unit that includes an arithmetic processing unit 21 such as a CPU (Central Processing Unit), a storage device 22 that exchanges data with the arithmetic processing unit 21, and an input / output interface 23 that inputs and outputs signals between the arithmetic processing unit 21 and the outside, as shown in Figure 12.

[0063] While this application describes various exemplary embodiments and examples, the various features, aspects, and functions described in one or more embodiments are not limited to the application of a particular embodiment, but are applicable individually or in various combinations to the embodiments. Accordingly, countless variations not illustrated are envisioned within the scope of the art disclosed herein. For example, these include modifying, adding or omitting at least one component, or extracting at least one component and combining it with a component from another embodiment. [Explanation of Symbols]

[0064] 1, 1A, 1B, 1C, 1D Gate control unit, 2 Gate signal generation unit, 3 Arm pair, 4 Reference voltage generation circuit, 5 Second resistor group, 6 Third resistor group, 10, 10C, 20, 20U, 20V, 20W Anomaly detection unit, 11, 12 Anomaly determination unit, 100, 100A, 100C, 100D, 200, 200B Semiconductor drive control unit, M1 First semiconductor switching element, M2 Second semiconductor switching element, C Arm midpoint, C1 First capacitor, C2 Second capacitor, GA Negative terminal, PA Positive terminal, R1 First resistor, R2 Second resistor, VdM Detected voltage, VrefH First reference voltage, VrefL Second reference voltage

Claims

1. A power conversion device having a pair of arms in which one of the DC positive terminal and the negative terminal is designated as the first pole terminal and the other as the second pole terminal, a first semiconductor switching element is connected between the first pole terminal and the arm midpoint, and a second semiconductor switching element is connected between the arm midpoint and the second pole terminal, It includes an abnormality detection unit and a gate control unit, and a semiconductor drive control unit that controls the driving of the first semiconductor switching element and the second semiconductor switching element, The abnormality detection unit, A third group of resistors, each having at least one resistor, is connected in parallel to the first semiconductor switching element. A second resistor group, including a series configuration of multiple resistors, is connected in parallel with the second semiconductor switching element to divide the voltage applied to the second semiconductor switching element. A reference voltage generation circuit that generates a first reference voltage obtained by dividing the voltage between the first and second terminals, and a second reference voltage which is a different voltage from the first reference voltage obtained by dividing the voltage between the first and second terminals, The power converter has an abnormality determination unit that, after the power converter stops its power conversion operation, compares the detected voltage, which is the voltage divided by the second group of resistors, with the first reference voltage and the second reference voltage to determine whether the first semiconductor switching element or the second semiconductor switching element has deteriorated in main breakdown voltage. The resistance value across the ends of the second resistor group is set such that the current flowing through the second resistor group is greater than the parasitic leakage current value between the main terminals of the second semiconductor switching element connected in parallel with the second resistor group in its initial state. The resistance value across the ends of the third resistor group is set such that the current flowing through the third resistor group is greater than the parasitic leakage current value between the main terminals of the first semiconductor switching element connected in parallel with the third resistor group in its initial state. Power converter.

2. The power converter according to claim 1, wherein the abnormality determination unit determines that the first semiconductor switching element or the second semiconductor switching element has deteriorated in main breakdown voltage when the detected voltage is outside the range between the first reference voltage and the second reference voltage after the power converter has stopped its power conversion operation.

3. The power conversion device according to claim 1, wherein the abnormality determination unit determines that the arm pair is in an arm short-circuit state when the first semiconductor switching element or the second semiconductor switching element is turned on and the detected voltage is a voltage that is logically inconsistent with the detected voltage when the first semiconductor switching element and the second semiconductor switching element are normal.

4. The power conversion device according to claim 3, which has a plurality of arm pairs, and each arm pair has the abnormality detection unit.

5. A power conversion device having a plurality of arm pairs, each arm having a first semiconductor switching element connected between the first semiconductor switching element and the arm midpoint, and a second semiconductor switching element connected between the arm midpoint and the second semiconductor switching element, where one of the DC positive terminal and the negative terminal is designated as the first pole terminal and the other as the second pole terminal, It includes an abnormality detection unit and a gate control unit, and a semiconductor drive control unit that controls the driving of the first semiconductor switching element and the second semiconductor switching element of all arm pairs, The abnormality detection unit, A third group of resistors, each having at least one resistor, is connected in parallel to the first semiconductor switching element of one of the multiple arm pairs. A second resistor group, including a series of multiple resistors, is connected in parallel with the second semiconductor switching element of the first arm pair to divide the voltage applied to the second semiconductor switching element of the first arm pair, A reference voltage generation circuit that generates a first reference voltage obtained by dividing the voltage between the first and second terminals, and a second reference voltage which is a different voltage from the first reference voltage obtained by dividing the voltage between the first and second terminals, The power converter has an abnormality determination unit that, after the power converter stops its power conversion operation, compares the detected voltage, which is a voltage divided by the second group of resistors, with the first reference voltage and the second reference voltage to determine whether any of the semiconductor switching elements constituting the plurality of arm pairs have deteriorated in main breakdown voltage. The resistance value across the ends of the second resistor group is set such that the current flowing through the second resistor group is greater than the parasitic leakage current value between the main terminals of the second semiconductor switching element connected in parallel with the second resistor group in its initial state. The resistance value across the ends of the third resistor group is set such that the current flowing through the third resistor group is greater than the parasitic leakage current value between the main terminals of the first semiconductor switching element connected in parallel with the third resistor group in its initial state. Power converter.

6. The power converter according to claim 1 or 5, wherein the abnormality determination unit determines whether the main withstand voltage has deteriorated based on the time until the detected voltage deviates from the voltage between the first reference voltage and the second reference voltage after the power converter has stopped its power conversion operation, or by the amount of change per unit time of the detected voltage when the detected voltage deviates from the voltage between the first reference voltage and the second reference voltage.

7. The power conversion device according to any one of claims 1 to 5, wherein the abnormality determination unit determines whether the main breakdown voltage has deteriorated when the temperature of all semiconductor switching elements is higher than the ambient temperature.

8. The power conversion device according to any one of claims 1 to 5, wherein a capacitor is connected in parallel to at least one resistor of the second group of resistors.

9. The power conversion device according to claim 3 or 4, wherein the second resistor group is composed of a series of a first resistor with resistance value Rs1 and a second resistor with resistance value Rs2 connected to the first resistor, the second capacitor with capacitance Cs1 is connected in parallel to the second resistor, and the second capacitor with capacitance Cs2 is connected in parallel to the first resistor, satisfying the relationship Rs2 / (Rs1+Rs2) < Cs2 / (Cs1+Cs2).

10. The abnormality determination unit calculates a dead time based on the time from the ON command output by the gate signal generation unit provided in the gate control unit to the first semiconductor switching element or the second semiconductor switching element until the detected voltage crosses the first reference voltage or the second reference voltage, and corrects the amount of dead time due to the ON / OFF signals of the first semiconductor switching element and the second semiconductor switching element output by the gate signal generation unit based on the calculated dead time, as described in claim 9.

11. The power conversion device according to any one of claims 1 to 5, wherein the resistance value between the ends of the second resistor group is equal to the resistance value between the ends of the third resistor group.

12. The power converter according to any one of claims 1 to 5, wherein the semiconductor drive control unit changes the operation of the power converter so as to reduce the load on the semiconductor switching element after the abnormality determination unit determines that any of the semiconductor switching elements has deteriorated in main breakdown voltage.

13. The power conversion device according to any one of claims 1 to 5, wherein the power conversion device includes at least one of a power converter that performs power conversion between DC power and AC power, a boost converter that increases the DC voltage, and a buck converter that decreases the DC voltage.

14. The pair of arms constitutes a power conversion circuit that performs power conversion between DC power and AC power, and when an electric motor is connected as the AC load, the abnormality determination unit determines that, after the power conversion device stops its power conversion operation, the detected voltage is outside the voltage range between the first reference voltage and the second reference voltage, that either semiconductor switching element has deteriorated in main breakdown voltage or that the electric motor has deteriorated in insulation, according to claim 1 or 5.

15. The power conversion device according to any one of claims 1 to 5, wherein at least one pair of arms is composed of a semiconductor switching element made of a wide-bandgap semiconductor material with a bandgap larger than that of Si.

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