AtomicTrap-NeuroMemoryDrive (at-NMD): Non-destructive memory read technology
The neuromorphic circuit device integrates single-element STP/LTP and STDP operations with interference suppression and non-destructive readout, addressing interference and feedback limitations, achieving stable and accurate large-scale learning.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2025-12-19
- Publication Date
- 2026-03-16
AI Technical Summary
Conventional neuromorphic circuits face challenges in maintaining stable learning operations and accurate STDP waveforms due to interference between adjacent elements, require destructive methods for reading internal state variables, and struggle with precise pulse control, limiting large-scale learning performance and feedback control.
A neuromorphic circuit device and system that integrates single-element STP/LTP and STDP operations, employs interference suppression mechanisms, and enables non-destructive readout of internal state quantities, using a matrix array structure with insulating layers and local voltage control to stabilize learning and allow real-time feedback.
Stabilizes learning operations, enhances accuracy and reproducibility, and enables precise STDP control across large arrays, facilitating high-precision learning and scalable neuromorphic systems.
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of hardware implementation of artificial neural circuits, that is, neuromorphic circuit devices and neuromorphic circuit systems. In particular, the present invention utilizes the short-term plasticity (STP) and long-term plasticity (LTP) operations exhibited by a single neuromorphic element, as well as the spike-timing-dependent plasticity (STDP) operation, to realize learning operations in a circuit array composed of multiple elements, suppress interference between adjacent elements, and non-destructively read out internal state quantities. The present invention relates to neuromorphic circuit devices and circuit systems. Furthermore, the present invention is characterized in that it integrates the conductivity change mechanism at the single-element level on a circuit scale, enabling improvement of learning accuracy, ensuring circuit scale scalability, and enabling low-power operation. <Explanation of Terms> Single element: In this specification, a "single element" is the basic unit of a neuromorphic circuit device, and refers to a resistance change type element, a phase change memory element, or a three-terminal or two-terminal structure composed of a conductivity variable material that can exhibit short-term plasticity (STP) and long-term plasticity (LTP) in response to an input pulse. · Note: It includes both three-terminal structures having gates, sources, and drains and two-terminal structures. Short-term plasticity (STP): The phenomenon in which the conductivity of a single element transiently changes according to input pulse conditions (pulse width, number of applications, voltage, etc.) is referred to as "short-term plasticity (STP)". · Note: STP usually returns to the original conductive state in a short time after the input pulse stops. Long-term plasticity (LTP): The phenomenon in which the conductivity of a single element changes continuously depending on the input pulse conditions is called "long-term plasticity (LTP)". Note: LTP is characterized by permanently transitioning from the STP state after exceeding a certain number of application cycles or duration. STP⇔LTP transition conditions: The pulse conditions (number of pulses, duration, applied voltage) that define the transition from short-term plasticity to long-term plasticity, and vice versa, in a single element are called "STP⇔LTP transition conditions." Internal state variables: Physical quantities that represent the plasticity state of an element, such as the conductivity, channel current, charge storage amount, or ion distribution state of a single element, are called "internal state variables." • Note: In this invention, this refers to a state quantity that can be measured by non-destructive readout of low voltage and short pulses. Non-destructive readout: When measuring internal state variables, the operation of reading them without affecting the STP / LTP state or STDP characteristics of a single element, while preserving its original state, is called "non-destructive readout." Spike timing-dependent plasticity (STDP): The phenomenon in which the conductivity of a single element increases or decreases in accordance with the timing difference Δt of the input spikes is called "spike timing-dependent plasticity (STDP)". Note: This includes cases where conductivity increases when Δt > 0 (LTP) and decreases when Δt < 0 (LTD). Interference suppression means: When multiple single elements are arranged in a matrix array, the means of suppressing changes in the conductivity of non-selected elements due to electric fields and currents between adjacent elements is called "interference suppression means." • Note: This includes selective line control, pulse sequence optimization, wiring impedance design, local buffering, etc. Neuromorphic circuit devices / circuit systems: A circuit structure composed of a single element as the basic unit, equipped with STP / LTP / STDP operation, interference suppression, and non-destructive readout functions for internal state variables, is called a "neuromorphic circuit device," while a scaled structure that integrates multiple single elements to realize learning functions is called a "neuromorphic circuit system." [Background technology]
[0002] In conventional neuromorphic circuit technology, the short-term plasticity (STP) and long-term plasticity (LTP) behavior of individual elements has been widely reported. These elements can vary their conductivity in response to voltage and current pulses and possess learning capabilities as artificial synapses. However, much of this research has been limited to evaluations at the single-element level, and the operation and control of multiple elements at the circuit scale have not been sufficiently investigated. Specifically, in matrix array structures, mutual interference of electric fields and currents occurs between adjacent elements, and it is known that the STP / LTP operation and STDP waveforms inherently exhibited by individual elements are disrupted. This interference leads to problems such as a decrease in desirable learning characteristics and learning accuracy for the circuit as a whole, and it is particularly difficult to ensure the stability of learning operations in large arrays. Furthermore, in conventional neuromorphic circuits, methods involving rewriting or destruction are common when reading internal state variables (e.g., conductivity state or charge storage amount within the element), and non-destructive reading has not been adequately achieved. As a result, it is difficult to monitor state variables during operation, which imposes constraints on feedback control during learning and the application of precise learning protocols. Furthermore, precisely implementing STDP operation requires control of pulse width and timing accuracy. However, conventional technologies make it difficult to form an ideal STDP waveform due to inter-element interference, wiring capacitance within the array, and variations in resistance distribution. Against this backdrop, there is a strong demand for technologies that effectively utilize the excellent characteristics of single elements at a circuit scale while achieving interference suppression, non-destructive readout, and stable STDP operation. Detailed description of the invention
[0003] <Problems to be solved> While the short-term plasticity (STP), long-term plasticity (LTP), and spike timing-dependent plasticity (STDP) exhibited by individual elements have been confirmed in conventional neuromorphic circuit technology, several challenges remain when it comes to effectively utilizing these properties in circuits combining multiple elements. Firstly, in matrix arrays and large-scale circuits, electric field and current interference between adjacent elements disrupts the STP / LTP operation and STDP waveforms inherently exhibited by individual elements, impairing the stability of learning characteristics. In particular, when performing large-scale learning tasks, the accumulation of learning errors due to interference becomes significant, and conventional techniques have not been able to ensure sufficient learning performance at circuit scales. Secondly, in conventional circuits, reading internal state variables within an element (such as conductivity state or charge accumulation) often involves rewriting or destruction, making it difficult to observe state variables non-destructively. As a result, monitoring the learning state and feedback control during circuit operation cannot be adequately performed, limiting the application of precise learning protocols. Thirdly, in order to precisely control STDP operation, it is necessary to control the width, amplitude, and timing of the input pulse with high precision. However, conventional technology faces the challenge of difficulty in forming an ideal STDP waveform due to interference between elements, wiring capacitance, and variations in element characteristics. Based on the above challenges, the object of the present invention is to provide a neuromorphic circuit device and circuit system that can stably integrate STP / LTP and STDP operations, which have been confirmed at the single-element level, at the circuit scale, suppress adjacent element interference, and non-destructively read out internal state quantities. Furthermore, the present invention also aims to enable highly accurate and reproducible learning operations and STDP control by achieving interference suppression and non-destructive readout at the circuit scale. <Means for solving the problem> The following are examples of means for realizing the invention, but the present invention is not limited thereto and can be applied to modified structures and similar structures, including numerical values. The neuromorphic circuit device according to the present invention is constructed using a single element as its basic unit, which is capable of exhibiting short-term plasticity (STP) and long-term plasticity (LTP) depending on the input pulse conditions. The single element can be a metal oxide-based or organic-based resistive switching element, or a phase-change memory element, and the internal state quantities of each element correspond to conductivity, charge storage amount, or ion distribution state. This single element enables localized and reversible plastic operation. The system features an array structure in which multiple single elements are arranged in a matrix, and individual interference suppression circuits and common electrode control means are placed between each element to reduce interference between matrices and between adjacent elements. Specifically, by combining an insulating layer structure that reduces the electric field effect on adjacent elements, a local voltage control circuit, or a buffering element, the learning accuracy at the circuit scale is improved. This suppresses disturbances in STP / LTP operation due to interference between adjacent elements and makes it possible to maintain stable learning operation. A single element can control the transition from STP to LTP depending on pulse conditions such as input pulse width, number of pulse applications, and applied voltage. For example, it exhibits a transient STP state with short-duration, low-voltage pulse trains and transitions to LTP with long-duration, high-voltage pulse trains. Furthermore, the internal state quantities (conductivity and charge storage) of each element can be read non-destructively, without any change or rewriting of the state during reading. This facilitates monitoring of the learned state and feedback control during circuit operation. Furthermore, the present invention enables STDP operation in response to the timing difference of input spikes. Specifically, it controls the learning characteristics in which the conductivity of a single element increases or decreases according to the time difference (Δt) between the preceding and succeeding spikes. Since the STDP characteristics of a single element are optimized based on pulse width, amplitude, number of applications, and interference suppression conditions of surrounding elements, the reproducibility and accuracy of the learning operation are ensured even in matrix arrays. With these configurations, the present invention provides a neuromorphic circuit device and a circuit system that integrate single-element-level STP / LTP and STDP operations at the circuit scale, enable non-destructive readout of internal state quantities while suppressing adjacent element interference, and further enable the realization of highly accurate and stable learning operations through the combination of interference suppression and non-destructive readout at the circuit scale. <Technical concept of the present invention> Control of single-element plasticity operation: · The single element, which is the basic unit of the present invention, can control short-term plasticity (STP) and long-term plasticity (LTP) according to the input pulse width, number of applications, and applied voltage. · The conductivity change and internal state quantity (e.g., ion accumulation amount, electron trap state, redox state, etc.) of the single element change reversibly or irreversibly depending on the pulse conditions. · By clarifying the transition conditions from STP to LTP, the learning characteristics of a single element can be precisely controlled. <000008--1> Interference suppression by matrix array formation: · By arranging single elements in a matrix, a structure is introduced to suppress electric field interference and crosstalk between adjacent elements while constructing a neuromorphic circuit system. · Interference suppression is achieved by element insulation, common potential control, selective readout electrode structure, or pulse timing optimization. · This ensures the stability of the learning operation even when multiple elements are simultaneously driven and improves the reproducibility at the circuit scale. Non-destructive readout of internal state quantity: · The conductivity and internal state quantity of a single element can be measured non-destructively under readout pulse conditions. · This configuration enables state monitoring and real-time feedback control during learning, improving the learning accuracy of the entire circuit. · Reading is performed under low voltage and short pulse width conditions to minimize the impact on the STP / LTP state. Corresponding to STDP operation: ·Enable the STDP operation in which the conductivity change of a single element varies according to the timing difference (Δt) of input spikes. ·The STDP characteristics are stabilized at the circuit scale by the combination of the pulse response characteristics of a single element and the interference suppression structure. ·This enables advanced control of neuromorphic learning algorithms. Based on the above technical concept, the present invention realizes a neuromorphic circuit device and a circuit system that integrate plasticity control at the single-element level, interference suppression at the circuit scale, non-destructive readout, and STDP operation control. As a result, it is expected that the learning accuracy and reproducibility in a large-scale array will be significantly improved compared to the prior art. <Embodiment Example 1: Specific Configuration of a Single Element> As an embodiment for embodying the invention, the following is shown as an example, but the present invention is not limited thereto, and it is also applicable to modified structures and similar structures including numerical values. Structural Outline of a Single Element: The single element of this embodiment has a three-terminal structure using an oxide ion conductive material. It includes a gate, a source, and a drain, and has a structure similar to a MOSFET. The channel length can be formed in the range of 100 nm to 1 μm, and the channel width can be formed in the range of about 100 nm to 1 μm. Layer Structure and Physical Operation: The single element is composed of the following layer structure. ·Lower electrode: TiN, Pt, etc. ·Oxide layer: Ta2O5, HfO2, etc. ·Ion conductive layer: LiPON, Gd2O3+Li(+) mixture, etc. ·Upper electrode: Pt, Au, etc. Due to the ion movement in the oxide layer, the local conductivity in the channel region changes. This change in conductivity corresponds to the internal state quantity and corresponds to the manifestation of short-term changes (STP) and long-term changes (LTP). Plasticity Control by Pulse Conditions: STP operation: Input pulse width 10-100 μs, applied voltage 1-5 V, number of applications 1-10 times. • LTP operation: This is induced by increasing the number of application cycles from 10 to 1000 times under the same voltage conditions, or by extending the pulse width from 50 to 500 μs. This allows control of the STP⇔LTP transition depending on the input pulse width, frequency, and voltage conditions. Furthermore, by considering temperature and ion diffusion characteristics, the reproducibility of operation and lifespan can also be evaluated. Non-destructive readout of internal state variables: The internal state variables of a single element can be measured as channel current using a low-voltage scan (e.g., 0.05-0.1 V), and non-destructive readout is possible without affecting the conductive state. • Read current range: 1 nA to 100 μA • Readout pulse width: 1-10 μs • Measurement method: Channel current measurement using two or three terminals Example of operation (pulse conditions and response): • Pulse width 50 μs, voltage 3 V, number of applications 5 times → Conductivity change: approximately 5% (STP) • Pulse width 100 μs, voltage 3 V, number of applications 500 times → Conductivity change: approximately 80% (LTP) • Readout pulse 0.1 V, width 5 μs → Conductivity change almost 0% (non-destructive) The single element of this embodiment can achieve both STP / LTP plasticity control and non-destructive readout by combining material composition, layer structure, and pulse conditions. This makes it possible to verify learning operation at the single-element level and forms the basis for applications at the circuit scale. <Example of Embodiment 2: Array Configuration (Interference Suppression, STDP)> The following are examples of embodiments that embody the invention, but the present invention is not limited thereto and can be applied to modified structures and similar structures, including numerical values. Overview of the array configuration: In this embodiment, the aforementioned single element is used as the basic unit, and multiple single elements are arranged as an NxM matrix array. For example, a 16x16 array with N=M=16 can be considered. Each individual element can be driven independently, but electrical interactions with adjacent elements are considered to stabilize the learning operation at the circuit scale. Interference suppression means: To suppress interference between adjacent single elements (changes in conductivity in non-selected elements), the following measures are employed. • Selection line control: A selection signal line is provided for each row and column, and a sufficiently low applied voltage is supplied to all elements except the single element being accessed. • Pulse sequence optimization: The timing and voltage conditions of input spikes are optimized to minimize the impact on non-selected elements. For example, a positive pulse is applied to selected elements, and a near-ground voltage is applied to non-selected elements. • Wiring impedance design: By reducing wiring resistance and capacitive load, crosstalk and unwanted voltage application to adjacent components are prevented. As a result, the change in conductivity of non-selected elements is kept to less than 10% of the total, making it possible to maintain learning accuracy across the entire array. Implementing STDP operation: Each individual element exhibits time-dependent plasticity (STDP), where its conductivity increases or decreases depending on the timing difference Δt before and after the input spike. Specifically, this is as follows: • Δt > 0 (pre-spike → post-spike): Increased conductivity (LTP) • Δt < 0 (post-spike → pre-spike): Decreased conductivity (LTD) This response depends on pulse width, voltage conditions, and number of applications, and a unified STDP curve can be formed across the entire array. Specific examples of array operation: • Array size: 16 x 16 • Single-element input pulse width: 50 μs • Pulse voltage: 3 V Timing difference Δt: ±10 ms • Number of applications: 1 to 1000 times Under these conditions, the conductivity change of selected elements is suppressed to approximately 50-80% (LTP / STD), while the change of unselected elements is suppressed to less than 10%. This confirms that STDP learning can be accurately reproduced across the entire array. The effect of interference suppression: By introducing interference suppression measures, unintentional changes in conductivity caused by adjacent elements are limited, resulting in the following effects. • Improved learning accuracy for the entire array • Improved reproducibility of STP / LTP transitions • Stabilization of the STDP curve • Improved circuit scalability In the array configuration of this embodiment, STP / LTP and STDP operations, which are realized at the single-element level, can be stably realized at the circuit scale by combining them with interference suppression means. This makes it possible to utilize the performance of single elements while applying them to practical neuromorphic circuit systems. <Variations and Examples> The following are examples of embodiments that embody the invention, but the present invention is not limited thereto and can be applied to modified structures and similar structures, including numerical values. Variations of materials: The material used in the single element of the present invention is not limited to oxide ion conductors, but can be replaced with other materials such as those listed below. • Perovskite oxides: For example, SrTiO3 and BaTiO3 can be applied to the oxide electrode layer or ion conductive layer, and similar changes in conductivity due to ion transfer can be achieved. • Ion-conductive polymers: By being introduced as an electrolyte membrane, STP / LTP operation can be controlled at low voltage. Since they can also be applied to flexible substrates, they can be used in flexible neuromorphic circuits. These material deformations may cause some variation in the applied voltage and pulse width range, but the basic physical mechanisms of STP / LTP and STDP operation are maintained. Modified examples of single-element structures: The shape, layer thickness, and electrode material of the single element can also be changed. Specific examples are shown below. • Layer thickness variation: Even when the oxide layer thickness is set to 10-50 nm, the change in conductivity due to ion transfer is maintained, and the STP / LTP transition conditions can also be adjusted. • Change of electrode material: Operation can be maintained even when using Au, Pt, or Ag as the upper electrode and TiN or Al as the lower electrode. • Changing the single-element area: Even when the structure is changed within the range of 0.5 × 0.5 (μm²) to 5 × 5 (μm²), similar STP / LTP / STDP responses can be obtained by adjusting the pulse width and number of applications. This increases manufacturing process flexibility and design freedom, making it applicable to various process conditions and substrates. Variations of array configurations: Even in array configurations, interference suppression and non-destructive readout functions are maintained even when the size or structure is changed. Specifically, these are as follows: • Expandable array size: Can be expanded from 16x16 to large-scale arrays of 64x64 or more. By applying selective line control, pulse sequence optimization, and wiring impedance adjustment as interference suppression measures, the change in misconductivity of non-selected elements is maintained at 10% or less. • Changes to matrix spacing and wiring shape: Even when the distance between individual elements or the wiring layout is changed, the stability of array operation is ensured by selective signal control. • Multilayer array structure: Even when stacking multiple layers of single-element arrays, interference can be suppressed by introducing individual selective line control for each layer. Flexibility of operating conditions: Even in modified configurations, STP / LTP / STDP operation is maintained by adjusting the operating conditions within the following range. Pulse width: 10-200 μs • Applied voltage: 1-5 V (adjustable depending on the material) • Number of applications: 10 to 1000 times • Timing difference Δt: ±10 to ±50 ms This allows for flexible adaptation to variations in materials, structure, and array size, ensuring practicality as a circuit system. This embodiment and its modifications confirm that the following effects are maintained even when the physical structure, materials, and array configuration of a single element are flexibly changed. • Maintaining STP / LTP and STDP operation • Suppression of neighboring element interference • Non-destructive readout of internal state variables • Ensuring learning accuracy across the entire array This allows the present invention to be applied to practical neuromorphic circuit systems while accommodating diversity in materials and structures. <Effects of the Embodiment of the Invention> According to embodiments of the present invention, by integrating short-term plasticity (STP) and long-term plasticity (LTP) operations at the single-element level, learning functions at the circuit scale can be efficiently realized. This effectively solves problems that were present in conventional technologies. Furthermore, the effects obtained by the embodiments of the present invention are as follows, but the scope of the invention is not limited thereto, and other effects may also occur. Improved interference suppression: This invention features a structure that suppresses learning disturbances caused by electric field interference and signal crosstalk between adjacent elements, thereby stabilizing the learning characteristics of the entire array. This significantly reduces malfunctions that previously occurred due to the influence of adjacent elements. Achieving non-destructive readout: This invention features a structure that does not change the state when reading out the internal state variables (conductivity, charge accumulation, ion distribution, etc.) of a single element. This makes it possible to monitor the state of a single element and perform feedback control even during learning. As a result, the accuracy of the learning algorithm and the flexibility of circuit control are improved. Improving learning accuracy: By integrating single-element level STP / LTP control with circuit-scale interference suppression, it is possible to minimize errors in synaptic weight updates in neuromorphic circuits and improve learning accuracy. Improved circuit scalability: The interference suppression structure and non-destructive readout function enable stable learning operation even with large matrix arrays, thereby improving the scalability of neuromorphic systems. Improving the reproducibility of learned behavior: By integrating STP / LTP transition conditions at the single-element level with interference suppression at the circuit scale, highly reproducible learning results can be obtained even after multiple learning trials. High-precision learning using STDP control at circuit scale: The configuration of this invention enables time-delay-dependent plasticity (STDP) control at the circuit scale, allowing for the efficient implementation of highly accurate learning functions in time-series learning and pattern recognition processing—which were difficult with conventional single-element level plasticity operations—using a single neuromorphic circuit system. This significantly expands the potential applications for brain-inspired computing and spike neural network implementation. <Industrial applicability> The neuromorphic circuit device and circuit system according to the present invention integrate single-element STP / LTP and STDP operations, suppressing interference between adjacent elements, and enabling non-destructive reading of internal state quantities. Therefore, it can be widely used in the following industrial fields. Neuromorphic Computing: The circuit system of the present invention has a learning function that mimics the plasticity of biological neural circuits, and therefore can be applied to artificial intelligence chips, machine learning processors, robot control circuits, and the like. Interference suppression and non-destructive readout capabilities enable highly accurate learning on large arrays, which is expected to improve computational efficiency in actual AI inference and training processes. Applications as memory / storage elements: • Single-element STP / LTP operation can be used as an information storage method, making it a new type of learning memory that differs from conventional DRAM and flash memory and can be used industrially. • Its power-efficient, low-voltage operation makes it easy to integrate into mobile devices and IoT equipment. Sensor networks and signal processing: By utilizing the STDP response, it becomes possible to perform feature extraction and pattern recognition based on the time information of the input signal. For example, it can be applied to real-time learning and recognition processing applications such as audio signal processing, image recognition, and time-series data analysis. Manufacturing and industrial applications: • Oxide ion conductors, perovskite oxides, and ion-conductive polymers can be used as single-element materials, and can be applied to existing semiconductor manufacturing processes and printed electronics technologies. The flexibility of the layered structure and array configuration allows for mass production using existing IC fabs and stacking processes. Potential future applications: By forming these materials on flexible substrates and performing large-scale 3D stacking, a wide range of applications are expected, including next-generation neuromorphic systems, wearable AI devices, and hardware for edge AI. Furthermore, by adjusting the materials, structure, and operating conditions, it can be customized to suit the application, resulting in high industrial versatility. The neuromorphic circuit device and system of the present invention, through a circuit structure that combines the plastic operation of a single element, interference suppression function, and non-destructive readout function, can realize highly accurate and scalable learning circuits that were difficult to achieve with conventional technology. Therefore, it can be put into practical use in various industrial fields such as artificial intelligence hardware, learning memory, sensor networks, and edge computing devices.
Claims
1. A neuromorphic circuit device configured with a single element as the basic unit, capable of exhibiting short-term plasticity (STP) and long-term plasticity (LTP) depending on the input pulse conditions, and capable of non-destructively reading out internal state quantities, The single element has a function to control STP⇔LTP transitions and conductivity changes according to the width of the input pulse, the number of applications, the applied voltage, the pulse interval, and the duration. The circuit is a neuromorphic circuit device characterized by arranging a plurality of the single elements in a matrix and comprising interference suppression means for suppressing interference between adjacent single elements.
2. The neuromorphic circuit device according to claim 1, characterized in that the single element is capable of exhibiting spike timing-dependent plasticity (STDP) operation in which its conductivity increases or decreases in accordance with the timing difference Δt of the input spikes.
3. The neuromorphic circuit device according to claim 1 or 2, characterized in that the single element can control the amount of change in conductivity of STP and LTP according to the history of pulses applied in the past.
4. A circuit system comprising multiple single elements, which integrates STP / LTP and STDP operations by the single elements to perform neuromorphic learning, The circuit system is a neuromorphic circuit system characterized by comprising interference suppression means and non-destructive reading means for internal state quantities, and capable of controlling the STP / LTP transition and conductivity change of each individual element according to the input pulse conditions.
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