Multilayer structures made from indium phosphide or gallium arsenide
Multilayer structures with porous or electropolished indium phosphide or gallium arsenide layers address the challenges of VCSEL fabrication by enhancing refractive index contrast and thermal conductivity, resulting in high-performance VCSELs for various electronic applications.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- YALE UNIVERSITY
- Filing Date
- 2022-05-03
- Publication Date
- 2026-04-23
AI Technical Summary
Existing methods for fabricating vertical-cavity surface-emitting lasers (VCSELs) on indium phosphide substrates are challenging, particularly for long-wavelength applications, due to difficulties in forming mirrors with sufficient refractive index contrast and thermal conductivity, leading to high manufacturing costs and low yield.
The development of multilayer structures comprising indium phosphide or gallium arsenide layers with porous or electropolished regions, achieved through electrochemical etching, allows for the selective adjustment of refractive index and electrical/thermal properties, facilitating the fabrication of high-performance VCSELs.
The proposed multilayer structures enable the production of VCSELs with superior optical and electrical performance, offering advantages such as low operating voltage, compact form factor, and reduced manufacturing costs, suitable for applications in fiber-based communications and other electronic devices.
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Abstract
Description
[Technical Field]
[0001] Cross-reference of related applications This application claims priority and interest in U.S. Provisional Application No. 63 / 183,337, filed 3 May 2021, which is thus incorporated herein by reference in its entirety.
[0002] Field of Invention The present invention relates to multilayer structures comprising indium phosphide or gallium arsenide structures, which have porous or etched layers in the structure and can be used in electronic applications, such as photonic devices. [Background technology]
[0003] Background of the Invention Semiconductor laser diodes have found many applications in modern society. In the world of laser diodes, vertical-cavity surface-emitting lasers (VCSELs) are known to be superior to edge-emitting lasers (EELs) in terms of cost, manufacturability, flexibility, beam quality, and potential integration. To date, EELs are commercially available at wavelengths ranging from approximately 400 nm (violet) to approximately 2,000 nm (near-infrared).
[0004] VCSELs are commercially available only in the approximately 700 nm (red) to 1 μm range. Nevertheless, the 1,200 nm to 1,600 nm wavelength range is important because it is the range conventionally used in silica fibers for single-mode long-distance telecommunications. 1,550 nm is also important as the atmospheric radio transmission window for signal and energy.
[0005] VCSELs that emit light in the 1,200–1,600 nm (i.e., 1.2–1.6 μm) range are typically prepared epitaxially on indium phosphide (InP) substrates. For at least the past 20 years, the pursuit of long-wavelength VCSELs has followed one of three approaches, all of which involve preparing the active (emitting) region on an InP substrate. However, the methods for forming the vertical cavity, specifically the n-side reflection mirror, differ significantly. Despite urgent market demand, none of the three approaches have achieved mainstream large-scale manufacturing. The three representative approaches are as follows:
[0006] (1) Epitaxial distributed Bragg reflectors (DBRs) of InGaAs / InAlAs on InP (Ortsiefer, M., et al. (2005). 2.5-mW single-mode operation of 1.55-μm buried tunnel junction VCSELs. IEEE photonics technology letters, 17(8), 1596-1598): This technique has been attempted since the late 1990s. DBRs were formed from InGaAs and InAlAs alloys lattice-matched to the InP substrate. However, these two lattice-matched layers have very limited optical refractive index contrast (approximately 0.25), and therefore require a very large number of quarter-wavelength layers. InGaAs and InAlAs also both have low thermal conductivity (approximately 2 W / mk), making heat dissipation very difficult. VCSELs were fabricated using hybrid mirrors with good thermal conductivity and mounted as flip chips. Nevertheless, the combination of epitaxial processes and fabrication methods makes this process difficult and, to the best of the inventors' knowledge, has not been pursued since 2005.
[0007] (2) Epitaxial distributed Bragg reflector (DBR) of InP-based active region and wafer-bonded Al(Ga)As / GaAs (Caliman, A. et al. (2011). 8 mW fundamental mode output of wafer-fused VCSELs emitting in the 1550-nm band. Optics express, 19(18), 16996-17001.): This method combined Al(Ga)As / GaAs epitaxial DBR technology on a GaAs substrate with an InGaAs active region and pn layer on InP via wafer bonding. However, this process required multiple regrowth and chemical mechanical polishing (CMP) with precise thickness control to precisely control the resonator modes and mode gain. Precise, reproducible, and uniform control required two spacer regions, which often led to a decrease in device yield.
[0008] (3) Hybrid dielectric back mirror combined with top dielectric mirror (Spiga, S., et al. (2016). Single-mode high-speed 1.5-μm VCSELs. Journal of Lightwave Tech, 35(4), 727-733.): Another technique used since the early 2000s involved sandwiching an epitaxial InGaAs active region (prepared on an InP substrate) between top dielectric DBR mirrors, then removing the InP substrate, followed by depositing a hybrid dielectric back mirror, and then encapsulating the construct in a thermally conductive gold / BCB assembly. This technique yields a mirror with very high refractive index contrast and very low penetration depth of vertical lathing modes, enabling small mode volumes for short resonators and high modulation bandwidths. However, VCSELs, all of which are dielectrics, cannot be easily manufactured with good control or high yield, resulting in very high unit costs and negating many of the inherent advantages of using monolithic VCSELs.
[0009] Despite the methods described above, fabricating VCSELs on InP substrates remains extremely challenging. Consequently, the technological space for using long-wavelength VCSELs, particularly for defense and commercial applications, has remained largely unaddressed to date.
[0010] Therefore, a novel semiconductor structure is needed that can be used as a mirror, can be fabricated by a simple method, and can be used to fabricate VCSELs of a desired wavelength.
[0011] Therefore, an object of the present invention is to provide a structure that addresses and overcomes problems known to date in the manufacture of devices, such as VCSELs.
[0012] Another object of the present invention is to provide a novel method for preparing such structures. A further object of the present invention is to provide a method for using the described structure, for example, in a VCSELS. [Prior art documents] [Non-patent literature]
[0013] [Non-Patent Document 1] Ortsiefer, M., et al. (2005). 2.5-mW single-mode operation of 1.55-μm buried tunnel junction VCSELs. IEEE photonics technology letters, 17(8), 1596-1598 [Non-Patent Document 2] Caliman, A. et al. (2011). 8 mW fundamental mode output of wafer-fused VCSELs emitting in the 1550-nm band. Optics express, 19(18), 16996-17001. [Non-Patent Document 3] Spiga, S., et al. (2016). Single-mode high-speed 1.5-μm VCSELs. Journal of Lightwave Tech, 35(4), 727-733. [Overview of the Initiative] [Means for solving the problem]
[0014] Summary of the Invention Multilayer structures comprising indium phosphide (InP) or gallium arsenide (GaAs) layers are described herein, wherein the layers are porous or electropolished in the structure.
[0015] As an example, a non-restrictive example of a multilayer structure is: Multiple undoped or low-doped (see below) indium phosphide or gallium arsenide layers, as necessary, are present on a single-crystal substrate formed from indium phosphide, gallium arsenide, sapphire, silicon, or silicon carbide. It is equipped with, The multilayer comprises at least one layer of n-doped indium or gallium arsenide, which is located between at least two layers of undoped or low-doped indium or gallium arsenide, and the n-doped indium or gallium arsenide comprises at least one region or portion that is porous or electropolished as a result of electrochemical etching. If at least one layer of n-doped indium or gallium arsenide is porous, it contains multiple pores within the n-doped indium or gallium arsenide layer that are confined by an adjacent undoped or low-n-doped indium or gallium arsenide layer that is non-porous or substantially non-porous.
[0016] By electrochemically etching, selectively incorporating low refractive index materials, such as air, into selected regions of a multilayer structure has the effect of lowering the refractive index compared to bulk InP or GaAs. Therefore, it is possible to selectively adjust the refractive index of porous regions within a multilayer structure.
[0017] By electrochemical etching, porosity creation, or electropolishing, selectively incorporating air into select regions of the doped layer of a multilayer structure can affect its electrical properties compared to the equivalent bulk (non-porous) InP or GaAs. Therefore, it is possible to selectively tune the electrical properties of the porous regions within a multilayer structure.
[0018] By electrochemical etching, porosity creation, or electropolishing, selectively incorporating air into select regions of the doped layer of a multilayer structure can affect its thermal properties compared to the equivalent bulk (non-porous) InP or GaAs.
[0019] In a non-limiting example, a method for forming a multilayer structure, this method is: (a) The step of forming a first layer of undoped or low-doped indium or gallium arsenide on a substrate layer as needed, (b) A step of depositing a second layer of n-doprinide indium or gallium arsenide over the first layer, (c) A third layer of undoped or low-doped indium or gallium arsenide is deposited on top of the second layer, (d) Repeating steps (b) and (c) as necessary to form further alternating layers of n-doped indium or gallium arsenide and undoped or low-doped indium or gallium arsenide, (e) A step of depositing a capping layer over the entire multilayer structure, (f) The step of removing at least a portion of the capping layer to selectively expose at least one side wall of the multilayer structure, (g) The step of electrochemically (EC) etching an indium n-doped or gallium arsenide layer in the presence of an electrolyte and under an applied bias voltage to selectively porous or electropolish at least a portion of the existing indium n-doped or gallium arsenide layer. Includes, If the n-doped indium or gallium arsenide layer is porous, it contains multiple pores within the n-doped indium or gallium arsenide layer that are confined by adjacent undoped or low-n-doped indium or gallium arsenide layers that are non-porous or substantially non-porous.
[0020] Multilayer structures can be used in a variety of applications, including electronic, photonic, and optoelectronic applications. More specifically, applications for such multilayer structures include, among others, fiber-based communications, free-space communications, LiDAR, detection and distance measurement, night vision, and chemical detection. In particular, multilayer structures can be used to provide high-performance VCSELs with superior optical and electrical performance compared to already reported VCSELs. VCSELs have many advantages over the more commonly used end-emitting laser diodes (EELDs), such as superior beam quality, compact form factor, low operating voltage, cost-effective wafer-level testing, higher yield, and lower manufacturing costs. VCSELs generally have important applications in a variety of fields, including information processing, microdisplays, picoprojection, laser headlamps, high-resolution printing, biophotonics, spectroscopic exploration, and atomic clocks. [Brief explanation of the drawing]
[0021] [Figure 1]Figure 1 shows a non-limiting example of a process for electrochemically etching a multilayer structure having alternating n-doped indium and undoped indium layers. When the initial multilayer structure (the first structure) is subjected to the electrochemical etching process, either (1) selective porosity of the n-doped layers occurs (in the direction of the upper arrow, porosity indicated by the formation of nanopores in the doped layer with air pores inside), or (2) complete removal of the n-doped layer material from the n-doped layer (i.e., selective electropolishing) occurs (in the direction of the lower arrow, air channels are formed).
[0022] [Figure 2] Figure 2 shows a non-limiting representation of an electrochemically etched multilayer structure having alternating layers of undoped indium (indicated as u-InP) and n-doped indium (indicated as n+InP). The demonstrated n-doped indium is selectively porous, with the porosity progressing in the lateral / horizontal direction. The nanopores shown represent air pores.
[0023] [Figure 3] Figures 3A, 3B, and 3C are scanning electron microscope (SEM) images of an electrochemically etched multilayer structure having alternating layers of undoped indium (indicated as u-InP) and n-doped indium (indicated as n+InP). The n-doped indium layers were etched in hydrochloric acid at the different concentrations and bias voltages shown, demonstrating lateral / horizontal porosity or electropolishing.
[0024] [Figure 4-1]Figure 4A shows an electrochemical etching phase diagram illustrating the regions where etching is not performed, porosity is achieved, and electropolishing occurs, based on experimental electrochemical etching of indium n-dopedin (2 × 10¹⁹ cm⁻³) in oxalic acid (0.05 M and 0.3 M aqueous solutions) at 0.4 V, 0.6 V, and 1.0 V, or in hydrochloric acid (0.2 M, 1 M, and 2 M aqueous solutions) at 1.1 V and 1.7 V, as a function of doping concentration (y axis) and applied bias (V) (x axis). Figures 4B–4D are scanning electron microscope (SEM) images of multilayer structures electrochemically etched in oxalic acid (0.05 M and 0.3 M aqueous solutions) at 0.4 V, 0.6 V, and 1.0 V, where electropolishing of the doped InP layer is observed. Figures 4E–4G are scanning electron microscope (SEM) images of multilayer structures electrochemically etched in hydrochloric acid (0.2M, 1M, and 2M aqueous solutions) at 1.1V and 1.7V, where electropolishing of the doped InP layer was observed. [Figure 4-2] Figure 4A shows an electrochemical etching phase diagram illustrating the regions where etching is not performed, porosity is achieved, and electropolishing occurs, based on experimental electrochemical etching of indium n-dopedin (2 × 10¹⁹ cm⁻³) in oxalic acid (0.05 M and 0.3 M aqueous solutions) at 0.4 V, 0.6 V, and 1.0 V, or in hydrochloric acid (0.2 M, 1 M, and 2 M aqueous solutions) at 1.1 V and 1.7 V, as a function of doping concentration (y axis) and applied bias (V) (x axis). Figures 4B–4D are scanning electron microscope (SEM) images of multilayer structures electrochemically etched in oxalic acid (0.05 M and 0.3 M aqueous solutions) at 0.4 V, 0.6 V, and 1.0 V, where electropolishing of the doped InP layer is observed. Figures 4E–4G are scanning electron microscope (SEM) images of multilayer structures electrochemically etched in hydrochloric acid (0.2M, 1M, and 2M aqueous solutions) at 1.1V and 1.7V, where electropolishing of the doped InP layer was observed. [Figure 4-3]Figure 4A shows an electrochemical etching phase diagram illustrating the regions where etching is not performed, porosity is achieved, and electropolishing occurs, based on experimental electrochemical etching of indium n-dopedin (2 × 10¹⁹ cm⁻³) in oxalic acid (0.05 M and 0.3 M aqueous solutions) at 0.4 V, 0.6 V, and 1.0 V, or in hydrochloric acid (0.2 M, 1 M, and 2 M aqueous solutions) at 1.1 V and 1.7 V, as a function of doping concentration (y axis) and applied bias (V) (x axis). Figures 4B–4D are scanning electron microscope (SEM) images of multilayer structures electrochemically etched in oxalic acid (0.05 M and 0.3 M aqueous solutions) at 0.4 V, 0.6 V, and 1.0 V, where electropolishing of the doped InP layer is observed. Figures 4E–4G are scanning electron microscope (SEM) images of multilayer structures electrochemically etched in hydrochloric acid (0.2M, 1M, and 2M aqueous solutions) at 1.1V and 1.7V, where electropolishing of the doped InP layer was observed. [Figure 4-4] Figure 4A shows an electrochemical etching phase diagram illustrating the regions where etching is not performed, porosity is achieved, and electropolishing occurs, based on experimental electrochemical etching of indium n-dopedin (2 × 10¹⁹ cm⁻³) in oxalic acid (0.05 M and 0.3 M aqueous solutions) at 0.4 V, 0.6 V, and 1.0 V, or in hydrochloric acid (0.2 M, 1 M, and 2 M aqueous solutions) at 1.1 V and 1.7 V, as a function of doping concentration (y axis) and applied bias (V) (x axis). Figures 4B–4D are scanning electron microscope (SEM) images of multilayer structures electrochemically etched in oxalic acid (0.05 M and 0.3 M aqueous solutions) at 0.4 V, 0.6 V, and 1.0 V, where electropolishing of the doped InP layer is observed. Figures 4E–4G are scanning electron microscope (SEM) images of multilayer structures electrochemically etched in hydrochloric acid (0.2M, 1M, and 2M aqueous solutions) at 1.1V and 1.7V, where electropolishing of the doped InP layer was observed.
[0025] [Figure 5-1]Figure 5A shows an electrochemical etching phase diagram illustrating the regions where etching is not performed, porosity is achieved, and electropolishing occurs, based on experimental electrochemical etching of indium n-dopurinide (2 × 10¹⁹ cm⁻³) in hydrochloric acid (2 M and 3.3 M aqueous solutions) at 1.2 V and 1.5 V, or in KOH (8 M aqueous solution) at 0.4 V, 0.8 V, 1.2 V, 1.5 V, and 2.0 V, as a function of doping concentration (y axis) and applied bias (x axis). Figures 5B and 5C are scanning electron microscope (SEM) images of multilayer structures electrochemically etched in hydrochloric acid (2 M and 3.3 M aqueous solutions) at 1.2 V and 1.5 V, where porosity of the doped InP layer is observed. Figures 5D, 5E, 5F, 5G, and 5H are scanning electron microscope (SEM) images of multilayer structures electrochemically etched in KOH (8M aqueous solution) at 0.4V, 0.8V, 1.2V, 1.5V, and 2.0V, where, depending on the etching conditions, no etching, porosity, or electropolishing of the doped InP layer was observed. [Figure 5-2] Figure 5A shows an electrochemical etching phase diagram illustrating the regions where etching is not performed, porosity is achieved, and electropolishing occurs, based on experimental electrochemical etching of indium n-dopurinide (2 × 10¹⁹ cm⁻³) in hydrochloric acid (2 M and 3.3 M aqueous solutions) at 1.2 V and 1.5 V, or in KOH (8 M aqueous solution) at 0.4 V, 0.8 V, 1.2 V, 1.5 V, and 2.0 V, as a function of doping concentration (y axis) and applied bias (x axis). Figures 5B and 5C are scanning electron microscope (SEM) images of multilayer structures electrochemically etched in hydrochloric acid (2 M and 3.3 M aqueous solutions) at 1.2 V and 1.5 V, where porosity of the doped InP layer is observed. Figures 5D, 5E, 5F, 5G, and 5H are scanning electron microscope (SEM) images of multilayer structures electrochemically etched in KOH (8M aqueous solution) at 0.4V, 0.8V, 1.2V, 1.5V, and 2.0V, where, depending on the etching conditions, no etching, porosity, or electropolishing of the doped InP layer was observed. [Figure 5-3]Figure 5A shows an electrochemical etching phase diagram illustrating the regions where etching is not performed, porosity is achieved, and electropolishing occurs, based on experimental electrochemical etching of indium n-dopurinide (2 × 10¹⁹ cm⁻³) in hydrochloric acid (2 M and 3.3 M aqueous solutions) at 1.2 V and 1.5 V, or in KOH (8 M aqueous solution) at 0.4 V, 0.8 V, 1.2 V, 1.5 V, and 2.0 V, as a function of doping concentration (y axis) and applied bias (x axis). Figures 5B and 5C are scanning electron microscope (SEM) images of multilayer structures electrochemically etched in hydrochloric acid (2 M and 3.3 M aqueous solutions) at 1.2 V and 1.5 V, where porosity of the doped InP layer is observed. Figures 5D, 5E, 5F, 5G, and 5H are scanning electron microscope (SEM) images of multilayer structures electrochemically etched in KOH (8M aqueous solution) at 0.4V, 0.8V, 1.2V, 1.5V, and 2.0V, where, depending on the etching conditions, no etching, porosity, or electropolishing of the doped InP layer was observed. [Figure 5-4] Figure 5A shows an electrochemical etching phase diagram illustrating the regions where etching is not performed, porosity is achieved, and electropolishing occurs, based on experimental electrochemical etching of indium n-dopurinide (2 × 10¹⁹ cm⁻³) in hydrochloric acid (2 M and 3.3 M aqueous solutions) at 1.2 V and 1.5 V, or in KOH (8 M aqueous solution) at 0.4 V, 0.8 V, 1.2 V, 1.5 V, and 2.0 V, as a function of doping concentration (y axis) and applied bias (x axis). Figures 5B and 5C are scanning electron microscope (SEM) images of multilayer structures electrochemically etched in hydrochloric acid (2 M and 3.3 M aqueous solutions) at 1.2 V and 1.5 V, where porosity of the doped InP layer is observed. Figures 5D, 5E, 5F, 5G, and 5H are scanning electron microscope (SEM) images of multilayer structures electrochemically etched in KOH (8M aqueous solution) at 0.4V, 0.8V, 1.2V, 1.5V, and 2.0V, where, depending on the etching conditions, no etching, porosity, or electropolishing of the doped InP layer was observed. [Figure 5-5]Figure 5A shows an electrochemical etching phase diagram illustrating the regions where etching is not performed, porosity is achieved, and electropolishing occurs, based on experimental electrochemical etching of indium n-dopurinide (2 × 10¹⁹ cm⁻³) in hydrochloric acid (2 M and 3.3 M aqueous solutions) at 1.2 V and 1.5 V, or in KOH (8 M aqueous solution) at 0.4 V, 0.8 V, 1.2 V, 1.5 V, and 2.0 V, as a function of doping concentration (y axis) and applied bias (x axis). Figures 5B and 5C are scanning electron microscope (SEM) images of multilayer structures electrochemically etched in hydrochloric acid (2 M and 3.3 M aqueous solutions) at 1.2 V and 1.5 V, where porosity of the doped InP layer is observed. Figures 5D, 5E, 5F, 5G, and 5H are scanning electron microscope (SEM) images of multilayer structures electrochemically etched in KOH (8M aqueous solution) at 0.4V, 0.8V, 1.2V, 1.5V, and 2.0V, where, depending on the etching conditions, no etching, porosity, or electropolishing of the doped InP layer was observed.
[0026] [Figure 6] Figure 6 shows the phase diagram of electrochemical etching as a function of pore size and porosity (y-axis) and electrolyte concentration (x-axis).
[0027] [Figure 7] Figure 7 is a graph of the measured reflectance spectra of a distributed Bragg reflector structure of indium phosphide / nanoporous indium phosphide, demonstrating nearly uniform reflectance from just six pairs of 1 / 4λ layers.
[0028] [Figure 8] Figure 8 shows an electrochemical etching phase diagram illustrating the regions where etching is absent, porosity is present, and (electro) polishing occurs, as a function of HCl concentration (%) (y axis) and applied bias (V) (x axis).
[0029] [Figure 9-1]Figures 9A, 9B, and 9C show scanning electron microscope (SEM) images of multilayer structures electrochemically etched in 10% HCl at 1.6 V, 1.8 V, and 2.2 V, respectively, where porosity of the doped InP layer (5 × 10¹⁸ cm⁻³) is observed, and the structure is cleaved along the direction of porosity. [Figure 9-2] Figures 9A, 9B, and 9C show scanning electron microscope (SEM) images of multilayer structures electrochemically etched in 10% HCl at 1.6 V, 1.8 V, and 2.2 V, respectively, where porosity of the doped InP layer (5 × 10¹⁸ cm⁻³) is observed, and the structure is cleaved along the direction of porosity.
[0030] [Figure 10-1] Figures 10A, 10B, and 10C show scanning electron microscope (SEM) images of multilayer structures electrochemically etched in 5% HCl at 1.6 V, 1.8 V, and 2.0 V, respectively, where porosity of the doped InP layer (5 × 10¹⁸ cm⁻³) is observed, and the structure is cleaved along the direction of porosity. [Figure 10-2] Figures 10A, 10B, and 10C show scanning electron microscope (SEM) images of multilayer structures electrochemically etched in 5% HCl at 1.6 V, 1.8 V, and 2.0 V, respectively, where porosity of the doped InP layer (5 × 10¹⁸ cm⁻³) is observed, and the structure is cleaved along the direction of porosity.
[0031] [Figure 11-1] Figures 11A, 11B, and 11C show scanning electron microscope (SEM) images of multilayer structures electrochemically etched in 5% HCl at 1.6 V, 1.8 V, and 2.0 V, respectively, where porosity of the doped InP layer (5 × 10¹⁸ cm⁻³) is observed, and the structure is seen along the direction of porosity. [Figure 11-2]Figures 11A, 11B, and 11C show scanning electron microscope (SEM) images of multilayer structures electrochemically etched in 5% HCl at 1.6 V, 1.8 V, and 2.0 V, respectively, where porosity of the doped InP layer (5 × 10¹⁸ cm⁻³) is observed, and the structure is seen along the direction of porosity.
[0032] [Figure 12] Figure 12 is a graph of the measured reflectance spectra of two types of distributed Bragg reflector structures with low porosity (doping concentration 5 × 10¹⁸ cm⁻³) and high porosity (doping concentration 2 × 10¹⁹ cm⁻³) indium phosphide / nanoporous indium phosphide, demonstrating nearly uniform reflectance from just 8 pairs and 6 pairs of 1 / 4λ layers, respectively.
[0033] [Figure 13-1] Figure 13A shows a non-restrictive representation of a vertical cavity structure with a bottom-distributed Bragg reflector (DBR) mirror made of nanoporous InP. Figure 13B is a graph of the measured (experimental) and simulated reflectance spectra of a vertical cavity structure with a bottom-distributed Bragg reflector mirror made of nanoporous InP. Figures 13C and 13D are graphs of optical field simulations (λ=1661nm) of field intensity (left axis) and refractive index (right axis) as a function of thickness (nm, bottom axis) of the nanoporous InP DBR structure from 0 to 5000nm and 0 to 2000nm, respectively. [Figure 13-2] Figure 13A shows a non-restrictive representation of a vertical cavity structure with a bottom-distributed Bragg reflector (DBR) mirror made of nanoporous InP. Figure 13B is a graph of the measured (experimental) and simulated reflectance spectra of a vertical cavity structure with a bottom-distributed Bragg reflector mirror made of nanoporous InP. Figures 13C and 13D are graphs of optical field simulations (λ=1661nm) of field intensity (left axis) and refractive index (right axis) as a function of thickness (nm, bottom axis) of the nanoporous InP DBR structure from 0 to 5000nm and 0 to 2000nm, respectively.
[0034] [Figure 14-1] Figure 14A shows an unrestricted representation of a vertical cavity structure with a nanoporous InP bottom-distributed Bragg reflector (DBR) mirror and an upper dielectric DBR mirror. Figure 14B is a graph of the measured (experimental) reflectance spectra of the vertical cavity structure with a nanoporous InP bottom-distributed Bragg reflector mirror, with and without the upper dielectric DBR mirror. Figures 14C and 14D are graphs of optical field simulations (λ=1500nm) of field intensity (left axis) and refractive index (right axis) as a function of thickness (nm, bottom axis) of the present DBR structure from 0 to 5000nm and 0 to 2000nm, respectively. [Figure 14-2] Figure 14A shows an unrestricted representation of a vertical cavity structure with a nanoporous InP bottom-distributed Bragg reflector (DBR) mirror and an upper dielectric DBR mirror. Figure 14B is a graph of the measured (experimental) reflectance spectra of the vertical cavity structure with a nanoporous InP bottom-distributed Bragg reflector mirror, with and without the upper dielectric DBR mirror. Figures 14C and 14D are graphs of optical field simulations (λ=1500nm) of field intensity (left axis) and refractive index (right axis) as a function of thickness (nm, bottom axis) of the present DBR structure from 0 to 5000nm and 0 to 2000nm, respectively. [Modes for carrying out the invention]
[0035] Detailed description of the invention Multilayer structures made from indium phosphide (InP) or gallium arsenide (GaAs), comprising porous or etched (i.e., electropolished) layers within the structure, are described herein. Methods for manufacturing and using the multilayer structures are also described. For example, the structure can be used as a distributed Bragg reflector bottom mirror for high-performance VCSELs.
[0036] I. Definition
[0037] As used herein, "porous" refers to the volume ratio, expressed as a percentage, of air present in a porous medium, such as a III-nitride layer(s).
[0038] "Electropolishing," as used herein, means that the indium n-doprine or gallium arsenide is etched away completely or substantially (where "substantially etched away" means etching greater than 95%, 96%, 97%, 98%, or 99%), leaving a gap where the n-doped material originally existed. This gap becomes a low refractive index medium (i.e., air), which typically has a refractive index of about 1.
[0039] The terms "refractive index" or "ratio of refraction" are used interchangeably and refer to the ratio of the speed of light in a vacuum to the speed of light in a given medium, such as a III-nitride layer, following the formula n = c / v (where c is the speed of light in a vacuum and v is the phase velocity of light in the medium).
[0040] As used herein, "refractive index contrast" refers to the relative difference in refractive indices between two media that are in contact and forming an interface, having different ratios of refraction.
[0041] Numerical ranges include ranges for thickness, doping concentration, integer ranges, time ranges, voltage ranges, distance ranges, diameter ranges, concentration ranges, etc. Each range individually discloses the number of possible ranges that such ranges can reasonably encompass, as well as any subranges and combinations of subranges that are included within that range. For example, a layer may have a thickness in the range of approximately 1 nm to 10 nm, and the range also discloses thicknesses that can be independently selected from approximately 2, 3, 4, 5, 6, 7, 8, and 9 nm, as well as any range between these numbers (e.g., 3 nm to 8 nm), and any possible combination of ranges between these values.
[0042] The use of the term "approximately" is intended to describe values that are approximately + / - 10% greater than or less than the descriptive value that the term "approximately" modifies, and otherwise, the value may be in a range of approximately + / - 5% greater than or less than the descriptive value. When the term "approximately" is used before a range of numbers (i.e., approximately 1 to 5) or before a series of numbers (i.e., approximately 1, 2, 3, 4, etc.), it is intended to modify the minimum and maximum values of that range of numbers, and / or each of the numbers listed in the entire series, unless otherwise specified.
[0043] II. Multilayer structures comprising porous or etched InP or GaAs layers
[0044] Multilayer structures made from indium phosphide (InP) or gallium arsenide (GaAs), comprising porous or etched (i.e., electropolished) layers within the structure, are described in detail below.
[0045] As an example, a non-restrictive example of a multilayer structure is: Multiple undoped or low-doped (see below) indium phosphide or gallium arsenide layers, as necessary, are present on a single-crystal substrate formed from indium phosphide, gallium arsenide, sapphire, silicon, or silicon carbide. It is equipped with, The multilayer comprises at least one layer of n-doped indium or gallium arsenide, which is located between at least two layers of undoped or low-doped indium or gallium arsenide, and the n-doped indium or gallium arsenide comprises at least one region or portion that is porous or electropolished as a result of electrochemical etching. If at least one layer of n-doped indium or gallium arsenide is porous, it contains multiple pores within the n-doped indium or gallium arsenide layer that are confined by an adjacent undoped or low-n-doped indium or gallium arsenide layer that is non-porous or substantially non-porous (where “substantially non-porous” means that the porosity of the undoped (or low-doped) layer is less than 25%, 20%, 15%, 10%, 5%, 4%, 3%, 2%, or 1%). In some other cases, the multiple pores are aligned horizontally (i.e., parallel) to the plane direction of the n-doped indium or gallium arsenide layer.
[0046] In preferred embodiments, the multilayer structure is made from a single type of doped and undoped (or low-doped) material. For example, a multilayer structure made entirely of indium phosphide layers or entirely of gallium arsenide layers. However, in less preferred cases, a mixture of different types of materials is possible.
[0047] As shown in Figure 1, the multilayer structure is formed from alternating layers of n-doped and undoped (or low-doped) InP or GaAs. The n-doped layers are located between the undoped (or low-doped) layers. Well-doped n-doped layers can be selectively electrochemically etched, as described below, to selectively porosify the doped layers or selectively electropolish and remove (i.e., eliminate) the doped layers or regions within the doped layers. Undoped or low-doped layers are generally not electrochemically etched. The conditions for controlling the degree of porosity or enabling electropolishing are described in further detail below. As can be seen from Figure 1, porosity and electropolishing do not necessarily require the removal of the entire n-doped layer; in this process, only a small portion or region within the layer may be porosized or electropolished. As can be further seen from Figure 1, porosity and electropolishing result in the formation of a multilayer structure containing horizontally formed (air) holes or channels due to a selective lateral etching direction progressing from one or more sidewalls of the multilayer structure.
[0048] When a substrate is present, the substrate can be made of indium phosphide, gallium arsenide, sapphire, silicon, or silicon carbide with any suitable thickness. Preferably, the undoped or lightly doped layer is the first layer deposited on the substrate. In most cases, the multilayer structure is formed from only one type of either InP or GaAs which are semiconductor materials. Alternating layers of n-doped and undoped (or lightly doped) InP layers or GaAs layers are formed homoepitaxially and can be controllably n-doped using techniques known in the art. In some cases, the alternating layers can be grown by metalorganic chemical vapor deposition (MOCVD) on a suitable substrate (i.e., the c-plane of a sapphire substrate, a silicon substrate, or a silicon carbide substrate). The doped and undoped layers are preferably planar layers. The dimensions of the layer(s) can be of any size, area, or shape suitable for a particular application, regardless of being doped or undoped. In some cases, the area is about 0.1 - 100 cm 2 , 0.1 - 90 cm 2 , 0.1 - 80 cm 2 , 0.1 - 70 cm 2 , 0.1 - 60 cm 2 , 0.1 - 50 cm 2 , 0.1 - 40 cm 2 , 0.1 - 30 cm 2 , 0.1 - 20 cm 2 , 0.1 - 10 cm 2 , 0.1 - 5 cm 2 , or between 0.1 - 1 cm 2 is in the range of.
[0049] In electrochemical etching, InP or GaAs must be doped with an n-type dopant. Therefore, the doped layer, if present, is formed during deposition / formation. Exemplary dopants, but not limited to them, include n-type Ge and Si dopants. Examples of such dopant sources include silane (SiH4), germane (GeH4), and isobutylgermane (IBGe). For the formed n-type doped layer of InP or GaAs, the n-type doping concentration may be uniform throughout the layer, or the doping concentration may form a gradient (i.e., a layer with stepped dopant concentrations along its axis, e.g., width). The doping concentration should be at least about 1 × 10⁻⁶. 19 cm -3 Or, at doping concentration levels higher than that, it is considered high, or approximately 0.1 × 10⁻⁶ 19 cm -3 ~10×10 20 cm -3 It is within the range of . In some cases, high doping concentration levels are approximately 1 × 10⁻⁶. 19 cm -3 , 2×10 19 cm -3 , 3 x 10 19 cm -3 , 4×10 19 cm -3 , 5×10 19 cm -3 , 6×10 19 cm -3 , 7×10 19 cm -3 , 8×10 19 cm -3 , 9×10 19 cm -3 , or 10 x 10 19 cm -3 It is possible. The doping concentration is approximately 1 × 10⁻⁶. 18 cm -3 Larger than ~1 × 10 20 cm -3 Less than 2 × 10 18 cm -3 ~1 × 10 20 cm -3 Less than 3 x 1018 cm -3 ~1 × 10 20 cm -3 Less than 4 x 10 18 cm -3 ~1 × 10 20 cm -3 Less than, or 5 x 10 18 cm -3 ~1 × 10 20 cm -3 Doping concentration levels below 1 × 10⁻⁶ are considered moderate. In some cases, moderate doping levels are considered moderate. 19 cm -3 ~1 × 10 20 cm -3 The range is less than or approximately 0.5 × 10 19 cm -3 ~10×10 19 cm -3 This is within the range. In some cases, a moderate doping concentration level is approximately 1 × 10⁻⁶. 18 cm -3 , 2×10 18 cm -3 , 3 x 10 18 cm -3 , 4×10 18 cm -3 , 5×10 18 cm -3 , 6×10 18 cm -3 , 7×10 18 cm -3 , 8×10 18 cm -3 , 9×10 18 cm -3 , or 10 x 10 18 cm -3 This is possible. Moderate to high levels of n-type doping are subjected to electrochemical etching processes, and depending on the conditions used during the electrochemical etching process, result in controlled porosity and / or electropolishing of the doped layer.
[0050] As described above, the multilayer structure includes an undoped InP layer or a GaAs layer, and these layers are not affected (neither porous nor etched) when the multilayer structure is electrochemically etched. Generally, the multilayer structure includes an undoped layer of InP or GaAs. However, in some cases, the multilayer structure can include a lightly doped InP or GaAs layer, where the doping concentration is considered low at doping concentration levels in the range of less than about 20×10 17 cm -3 or about 0.5×10 17 cm -3 ~10×10 17 cm -3 In some cases, moderate doping concentration levels can be about 1×10 17 cm -3 , 2×10 17 cm -3 , 3×10 17 cm -3 , 4×10 17 cm -3 , 5×10 17 cm -3 , 6×10 17 cm -3 , 7×10 17 cm -3 , 8×10 17 cm -3 , 9×10 17 cm -3 , or 10×10 17 cm -3 and can be.
[0051] The number of alternating n-doped and undoped (or low-doped) InP or GaAs layers forming a multilayer structure before electrochemical etching is not particularly limited. In some cases, the alternating layers are formed such that an n-doped layer exists between all the undoped (or low-doped) layers of InP or GaAs. In some cases, there may be 3 to 10 alternating layers (formed from a pair of n-doped and undoped (or low-doped) layers of InP or GaAs). For example, Figure 1 has 6 pairs of alternating n-doped and undoped (or low-doped) layers (left side) at least before electrochemical etching. In some cases, the multilayer architecture includes at least 6 pairs of contacting n-doped and undoped (or low-doped) layers of InP or GaAs at least before electrochemical etching. In some other cases, the multilayer architecture includes at least 24 pairs, where there is a refractive index contrast of about 0.5 between the etched and unetched layers of InP or GaAs after etching to achieve a theoretical reflectivity of about 99.9%.
[0052] The thickness of either the n-doped or undoped (low-doped) layer before electrochemical etching may independently be in the range of approximately 50 to 500 nm (and a sub-range thereof). In some cases, the total thickness of the multilayer structure before or after electrochemical etching may be in the range of approximately 600 nm to approximately 8,000 nm or 600 nm to approximately 6,000 nm (and a sub-range thereof). The dimensions and / or shape of the layer or substrate may be any suitable shape / dimension required for the application.
[0053] After electrochemical etching, undoped or low-doped InP or GaAs layers in multilayer structures are typically unaffected (i.e., neither porous nor substantially porous, where "substantially not porous" means that the porosity of the undoped (or low-doped) layer is less than 25%, 20%, 15%, 10%, 10%, 5%, 4%, 3%, 2%, or 1%). In some cases of this method, unintentional porosity of the undoped (or low-doped) layer occurs, in which case even low-n-doped layers can become porous during EC etching.
[0054] After electrochemical etching, n-doped InP or GaAs layers in multilayer structures may become more porous compared to before electrochemical etching. Porosity can be considered high if the layer has at least a portion with a porosity between approximately 30% and 90% or higher. In some cases, the porosity is at least approximately 30%, 40%, 50%, 60%, 70%, 80%, or 90%, or higher. Porosity, by incorporating low refractive index materials such as air into the layer (or portion thereof), has the effect of reducing the refractive index compared to the bulk InP or GaAs before porosity.
[0055] With respect to the n-doped layer, electrochemical etching can produce different porosity and pore morphologies by varying the type and concentration of the electrolyte, the n-doping concentration of the layer, and the applied bias voltage, as will be discussed in more detail in Section III below.
[0056] Electrochemical etching can be used to selectively create pores in a lateral or horizontal direction in a multilayer structure. As shown in FIG. 1, these selective morphologies from the side surface of the multilayer structure. Without limitation, the lateral or horizontal pores formed during the electrochemical etching process can be of any suitable length. The porous InP or GaAs layer (or regions therein) provided within the multilayer structure is preferably nanoporous, but can be further defined as microporous, mesoporous or macroporous, or any combination thereof. The porous layer or region thereof can be further categorized as microporous (d < 2 nm), mesoporous (2 nm < d < 50 nm), or macroporous (d > 50 nm), where d is the average pore diameter. The morphology of the pores contained in the layer or region thereof can also be classified as circular, semi-circular, elliptical, or any combination thereof. The pores can have an average size (i.e., length) between about 5 - 100 nm, 5 - 75 nm, 5 - 50 nm, or 5 - 25 nm. In some cases, the average pore diameter can be about 5, 10, 20, 30, 40, 50, 60, 70, 80, 90, 100 nm or greater. In some cases, the average size of the pores can range between less than about 20 nm to greater than 50 nm, based on the original doping concentration, the etchant used, and the voltage applied during the electrochemical porosification process. The space between any adjacent pores (which also defines the wall thickness scale of the pores) can range between about 1 - 50 nm, 5 - 50 nm, 5 - 40 nm, 5 - 30 nm, 5 - 25 nm, 5 - 20 nm, 5 - 15 nm, or 5 - 10 nm.
[0057] In a given multilayer structure, all or part of the doped InP or GaAs layer may become porous during electrochemical etching. In some cases, the electrochemical etching proceeds from the sidewalls, and the degree of porosity of the layer is at least about 10%, 20%, 30%, 40%, 50%, 60%, 80%, or 90% of the longest planar dimension of the doped layer. In some other cases, if electropolishing occurs, the degree of electropolishing of the layer is at least about 10%, 20%, 30%, 40%, 50%, 60%, 80%, or 90% of the longest planar dimension of the doped layer. Porosity may occur uniformly or non-uniformly within each doped layer during the electrochemical etching process. Electropolishing may occur uniformly or non-uniformly within each doped layer during the electrochemical etching process.
[0058] As mentioned above, in some cases the doped layer is removed (completely removed) by electropolishing, thereby leaving little or no material between the previously present undoped (or lightly doped) layers of the doped InP or GaAs material. The dimensions of the voids formed as a result of electropolishing vary depending on the dimensions of the doped InP or GaAs layer and the extent to which the material is removed by electropolishing. As shown in Figure 1, electropolishing creates lateral or horizontal (air) holes or channels between the undoped layers from which the doped material has been removed.
[0059] a. Optical properties of multilayer structures
[0060] By electrochemically etching, selectively incorporating low refractive index materials, such as air, into selected regions of a multilayer structure has the effect of lowering the refractive index compared to bulk InP or GaAs. Therefore, it is possible to selectively adjust the refractive index of porous regions within a multilayer structure.
[0061] Before electrochemical etching, each layer of a multilayer structure formed from InP has a refractive index ratio of approximately 3.2. Electrochemical etching may selectively porosify the doped InP layers or completely electropolish them, thereby reducing the refractive index ratio to less than 3.2. In some cases, the refractive index ratio of the porosified InP layers is approximately 1.5–2.7. If the InP layers are removed by electropolishing, the refractive index ratio is approximately 1. Consequently, the refractive index contrast (Δn) between multiple InP layers after electrochemical etching may range from approximately 0.5 to approximately 2. In some cases, the refractive index contrast (Δn) is at least approximately 1.1, 1.2, 1.3, 1.4, or 1.5. In yet other cases, the refractive index contrast ratio (Δn) is at least approximately 1.5.
[0062] Before electrochemical etching, each layer of a multilayer structure formed from GaAs has a refractive index ratio of approximately 3.95. Electrochemical etching may selectively porosify the doped InP layer or completely electropolish it, thereby reducing the refractive index ratio to less than 3.95. In some cases, the refractive index ratio of the porous GaAs layer is approximately 1.5 to 3.4. If the GaAs layer is removed by electropolishing, the refractive index ratio is approximately 1. Consequently, the refractive index contrast (Δn) between multiple GaAs layers after electrochemical etching may range from approximately 0.5 to approximately 2.5. In some cases, the refractive index contrast (Δn) is at least approximately 1.1, 1.2, 1.3, 1.4, or 1.5. In yet other cases, the refractive index contrast ratio (Δn) is at least approximately 1.5.
[0063] As discussed in the following embodiments, continuous constructive or canceling interference can be produced by forming layers with alternating refraction ratios. When the thickness of each layer corresponds to one-quarter of the wavelength of light, a stack of alternating layers of the multilayer structure acts together as a reflective mirror, which can be used to support the long wavelengths required for infrared emitting VCSELs. In certain cases, the multilayer structure acts as a mirror, demonstrating reflectivity of at least about 99%, 99.1%, 99.2%, 99.3%, 99.4%, 99.5%, 99.6%, 99.7%, 99.8%, or 99.9%.
[0064] b. Electrical properties of multilayer structures
[0065] Selectively incorporating air into specific regions of the doped layer of a multilayer structure through electrochemical etching, porosity creation, or electropolishing can affect the electrical properties compared to the equivalent bulk (non-porous) InP or GaAs. Good electrical transport is essential for high device performance in electrically injected devices, especially those requiring high current densities.
[0066] In some cases, porosity is increased by approximately 5 × 10⁻¹⁰ units compared to equivalent bulk (non-porous) bulk InP or GaAs by porosity creation in the doped InP or GaAs layer, or by electropolishing in the doped InP or GaAs layer. 18 cm -3 Carrier (electron) concentrations exceeding 50, 60, 70, 80, 90, 95 cm³ 2 A multilayer structure is obtained that can maintain an electrical mobility of / V s or higher.
[0067] c. Thermal properties of multilayer structures
[0068] By electrochemical etching, porosity creation, or electropolishing, selectively incorporating air into select regions of the doped layer of a multilayer structure can affect its thermal properties compared to the equivalent bulk (non-porous) InP or GaAs.
[0069] In some cases, porosity of the doped InP or GaAs layer region, or electropolishing of the doped InP or GaAs layer region, can result in a multilayer structure in which the thermal conductivity of the multilayer structure is in the range of approximately 1–25, 2–20, 2–15, or 2–10 W / m·K overall. In some other cases, the average thermal conductivity is at least approximately 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, or 15 W / m·K.
[0070] III. Method for preparing multilayer structures
[0071] Unlike conventional photoelectrochemical (PEC) methods, conductivity-selective electrochemical (EC) etching utilizes electrically injected holes, rather than photogenerated holes, to oxidize indium doprine or gallium arsenide, enabling their selective porosity or electropolishing. This method does not require exposure to ultraviolet (UV) irradiation.
[0072] In one non-limiting example of a method for forming a multilayer structure, the method is: (a) The step of forming a first layer of undoped or low-doped indium or gallium arsenide on a substrate layer as needed, (b) A step of depositing a second layer of n-doprinide indium or gallium arsenide over the first layer, (c) A third layer of undoped or low-doped indium or gallium arsenide is deposited on top of the second layer, (d) Repeating steps (b) and (c) as necessary to form further alternating layers of n-doped indium or gallium arsenide and undoped or low-doped indium or gallium arsenide, (e) A step of depositing a capping layer over the entire multilayer structure, (f) The step of removing at least a portion of the capping layer to selectively expose at least one side wall of the multilayer structure, (g) The step of electrochemically (EC) etching an indium n-doped or gallium arsenide layer in the presence of an electrolyte and under an applied bias voltage to selectively porous or electropolish at least a portion of the existing indium n-doped or gallium arsenide layer. Includes, If an n-doped indium or gallium arsenide layer is porous, it contains multiple pores within the n-doped indium or gallium arsenide layer that are confined by an adjacent undoped or low-n-doped indium or gallium arsenide layer that is non-porous or substantially non-porous (where “substantially non-porous” means that the porosity of the undoped (or low-doped) layer is less than 25%, 20%, 15%, 10%, 5%, 4%, 3%, 2%, or 1%). In some other cases, the multiple pores are aligned horizontally (i.e., parallel) to the plane direction of the n-doped indium or gallium arsenide layer.
[0073] In a preferred embodiment of this method, the multilayer structure is fabricated from a single type of doped and undoped (or low-doped) material. For example, the multilayer structure may be made from layers of indium phosphide or layers of gallium arsenide. However, in less preferred cases of the method, the use of different types of materials (i.e., InP and GaAs together) is possible.
[0074] Regarding the method described above, the substrate, if present, may be a sapphire, silicon, or silicon carbide substrate, or preferably, it may be made from an undoped indium phosphide or gallium arsenide layer. The single crystal substrate may have any suitable thickness.
[0075] Undoped or low-doped indium or gallium arsenide layers, and n-doped indium or gallium arsenide layers, can be grown epitaxially or homoepitaxially, respectively, according to methods known in the art, such as metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).
[0076] In this method, the undoped or low-doped indium or gallium arsenide layer, and the n-doped indium or gallium arsenide layer, if present, may each be in the range of about 50 to 500 nm (and a sub-range thereof). The thickness of the substrate or substrate layer, if present, may each be independently in the range of about 50 to 500 nm (and a sub-range thereof), but may have any suitable size. The dimensions and / or shape of the above layers or substrate may be any suitable shape / dimension required for the application. Finally, the total thickness of the multilayer structure formed by this method is preferably in the range of about 600 nm to about 8,000 nm or about 600 nm to about 6,000 nm.
[0077] If an n-doped indium or gallium arsenide layer is present, its deposition requires the use of dopants during deposition / formation. Exemplary dopants, but not limited to them, include n-type Ge and Si dopants. Examples of such dopant sources include silane (SiH4), germane (GeH4), and isobutyl germane (IBGe). The doping concentration may be uniform throughout the doped III-nitride layer, or it may form a gradient (i.e., a stepped dopant concentration along the axis of the layer, e.g., its width). The doping concentration should be at least about 1 × 10⁻⁶. 19 cm -3 Or, at doping concentration levels higher than that, it is considered high, or approximately 0.1 × 10⁻⁶ 19 cm -3 ~10×10 20 cm -3 It is within the range of [value]. The doping concentration is approximately 1 × 10⁻⁶. 18 cm -3 Larger than ~1 × 10 20 cm -3 Less than 2 × 10 18 cm -3 ~1 × 10 20 cm -3 Less than 3 x 10 18 cm -3 ~1 × 1020 cm -3 Less than 4 x 10 18 cm -3 ~1 × 10 20 cm -3 Less than, or 5 x 10 18 cm -3 ~1 × 10 20 cm -3 Doping concentration levels below 1 × 10⁻⁶ are considered moderate. In some cases, moderate doping levels are considered moderate. 19 cm -3 ~1 × 10 20 cm -3 The range is less than or approximately 0.5 × 10 19 cm -3 ~10×10 19 cm -3 This ranges from moderate to high levels of n-type doping, which are subjected to electrochemical etching processes, resulting in controlled porosity and / or electropolishing of the doped layer, depending on the conditions used during the electrochemical etching process. As already described, multilayer structures comprise undoped InP or GaAs layers, which are unaffected (neither porous nor etched) when the multilayer structure is electrochemically etched. Generally, multilayer structures comprise undoped layers of InP or GaAs. In some cases of the methods described, the multilayer structure may comprise low-doped InP or GaAs layers, where the doping concentration is approximately 20 × 10⁻⁶. 17 cm -3 Less than or approximately 0.5 × 10 17 cm -3 ~10×10 17 cm -3 Doping concentration levels within the range of [specific range] are considered low.
[0078] In step (e), the capping layer is deposited throughout the multilayer structure, where the capping layer is made of silicon oxide (i.e., SiO2) or other suitable material, such as silicon nitride (SiN x), hafnium oxide (HfO2), and photoresist materials can be fabricated. Suitable photoresist materials are known in the art. The capping layer can have any suitable thickness required and may be in the range of 10 to 3000 nm. The capping layer can be grown epitaxially or homoepitaxially according to methods known in the art, such as metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE), plasma-excited chemical vapor deposition (PECVD), atomic layer deposition (ALD), physical vapor deposition (PVD), and sputtering.
[0079] In step (f), the removal of at least a portion of the capping layer to selectively expose at least one sidewall of the multilayer structure can allow the EC process in step (g) to proceed from the exposed sidewall(s). A suitable technique for removing the capping layer, such as a silicon dioxide layer, is inductively coupled plasma reactive ion etching (ICP-RIE), which can be used to selectively etch the capping layer to expose the doped layer(s) on the sidewall(s) of the multilayer structure. Alternatively, the capped structure can be physically cleaved to expose the doped layer(s) on the sidewall(s) of the multilayer structure.
[0080] Porosity and / or electropolishing occur during the electrochemical (EC) etching process of step (g) and can be controlled based on the electrolyte concentration, doping concentration, and applied bias voltage (discussed below). The applied bias voltage is typically a positive voltage in the range of about 0.1–10V, 1.0–5V, or 1.0–2.5V. In some cases, the applied bias is in the range of less than about 1V to at least about 10V, or higher, based on the original doping concentration and the type of etchant used. In some cases, porosity can be selectively minimized when lower relative doping concentrations are used, and in a non-limiting example, when etched together under the same conditions, 5 × 10⁻¹⁶ porosity can be minimized in the sample. 18 cm -3The doping concentration is 2 × 10 19 cm -3 Porosity is reduced compared to the doping concentration. This can be generally expected for all relative concentration differences, and the higher the doping concentration, the more porosity is produced compared to lower relative doping concentrations, with all other electrochemical etching parameters constant. In some cases, electrochemical etching conditions can selectively and controllly produce only porosity (introducing porosity between approximately 30% and 90%, or higher) or complete electropolishing (i.e., overall or near-overall removal (i.e., removal of 95%, 96%, 97%, 98%, or more than 99% of the doped material)) depending on the choice of electrolyte concentration, doping concentration, and applied bias voltage(s). The direction of the etching direction can be controlled using the electric field direction during the EC etching process, thereby controlling the direction of the pores etched into the doped InP or GaAs layer. For example, the EC etching direction during step (g) of the method may be a function of the electric field direction and may be determined by the electric field direction. EC etching preferably results in a transverse etching direction. The rate of lateral etching during step (g) may be approximately 0.1 μm / min, 0.2 μm / min, 0.3 μm / min, 0.4 μm / min, 0.5 μm / min, 0.6 μm / min, 0.7 μm / min, 0.8 μm / min, 0.9 μm / min, 1 μm / min, 2 μm / min, 3 μm / min, 4 μm / min, 5 μm / min, 6 μm / min, 7 μm / min, 8 μm / min, 9 μm / min, 10 μm / min, 20 μm / min, 30 μm / min, 40 μm / min, or 50 μm / min.
[0081] The EC etching in step (g) can be performed under an applied bias voltage for approximately 1 minute to 24 hours, 1 minute to 12 hours, 1 minute to 6 hours, 1 minute to 4 hours, 1 minute to 2 hours, 1 minute to 1 hour, or 1 minute to 30 minutes. In some cases, the EC etching in step (g) can be performed under an applied bias voltage for at least approximately 5 minutes, 10 minutes, 15 minutes, 20 minutes, 25 minutes, 30 minutes, 35 minutes, 40 minutes, 45 minutes, 50 minutes, 55 minutes, 60 minutes, 2 hours, 3 hours, 4 hours, 5 hours, 6 hours, 10 hours, 15 hours, 20 hours, 24 hours, or longer. The EC etching in step (g) can be performed under an applied bias voltage at room temperature or at temperatures in the range of approximately 10°C to approximately 50°C. The EC etching in step (g) can be performed under an applied bias voltage under ambient conditions or, if necessary, in an inert atmosphere (e.g., nitrogen or argon).
[0082] The EC etching performed in step (g) can be carried out in high-conductivity electrolytes (either salts or acids) of different types and concentrations. Examples of high-conductivity electrolytes, but not limited to them, include halide ions (fluoride ions, chloride ions, bromide ions, iodide ions), hydrochloric acid (HCl), sulfuric acid (H2SO4), hydrofluoric acid (HF), KOH, NaOH, Ba(OH)2, Ca(OH)2, Sr(OH)2, NH4OH, NaCl, NaF, nitric acid (HNO3), organic acids and their salts (e.g., oxalic acid and citric acid), and mixtures thereof. The electrolyte concentration in a high-conductivity electrolyte solution, typically in aqueous solution, can range between approximately 0.1 and 10 M. In some other cases, the electrolyte concentration in a high-conductivity electrolyte solution, typically in aqueous solution, can be defined as the percentage (volume / volume) of the electrolyte relative to the solvent in which the electrolyte is dissolved, e.g., water, and can range between approximately 0.1 and 30 vol%. In other cases, the electrolyte concentration in a highly conductive electrolyte solution, typically an aqueous solution, can be defined as the percentage (weight / volume) of the electrolyte relative to the solvent in which it is dissolved, such as water, and can range from approximately 0.1 to 30% by weight. The electrolytes listed above do not normally etch InP or GaAs at room temperature, but can etch InP or GaAs under the electrochemical anodic conditions applied during step (g).
[0083] As previously mentioned, electrochemical etching is thought to preferentially form horizontal pores, for example, by proceeding laterally from the edges of the exposed sidewall(s). Lateral etching results in the formation of pores resulting in porosity, typically nanopores, horizontally or primarily horizontally within the doped layer during step(g). The multilayer structure has a vertical axis from the bottom to the top layer, with alternating doped and undoped (or low-doped) InP or GaAs planar layers. When EC etching is induced, porosity in the n-doped layer occurs perpendicular to the vertical axis or primarily perpendicular. Primarily perpendicular, as used herein, refers to pores oriented in a vertical / horizontal plane at an average of approximately 20, 15, 10, or 5 degrees relative to the vertical axis. In other words, porosity occurs along or primarily along a horizontal direction parallel or nearly parallel to the planar direction of the doped layer. See Figure 2. For multilayer structures, after electrochemical etching, there should be very few pores, if any, that are vertically aligned with the vertical axis. Preferably, the pores are not aligned with the vertical axis of the multilayer structure. In some cases, no vertically aligned pores are formed in the doped layer during electrochemical etching, and only horizontal pores are formed (see Figure 2). In some cases, substantially non-porous undoped (or low-doped) InP or GaAs also have nanopores formed along crystallographic directions at a 45-degree angle from the vertical
[0001] and horizontal
[0111] . In some other cases, macroscopically, the nanopores formed in n-doped InP increase laterally during porosity, but microscopically, the generation of nanopores can occur along specific crystallographic directions (e.g., at +45° and -45° angles from the doped layer surface).
[0084] Electrochemical etching generally consists of oxide formation and removal steps (Quill, N., et al. (2013). ECS transactions, 58(8), 25-38). The presence of free holes at the InP or GaAs / electrolyte interface is important for oxidation, and the formed oxide is thought to be readily soluble in various electrolytes. Free holes are supplied by electric field-assisted tunneling, and their amount varies mainly depending on the anodic bias and doping concentration. In some cases, electrochemical (EC) etching conditions do not result in EC etching at low anodic bias and / or low doping concentrations (low doping is described above), while electropolishing (i.e., complete etching) is observed at high bias and / or high n-doping concentrations. Porosity is observed at moderate bias and / or doping concentrations.
[0085] Indium phosphide can demonstrate complex electrochemical (EC) etching behavior, particularly when high doping concentrations are used in InP layers. Figures 4A and 5A show exemplary EC etching phase diagrams experimentally induced by etching InP multilayer structures, such as those shown in Figure 1, in various electrolytes (various concentrations of HCl, oxalic acid, and KOH) at various applied voltages. When the doping concentration of the indium phosphide layer is 1 × 10⁻⁶, 19 cm -3 As the voltage approaches or exceeds a certain value, electrolyte concentration-dependent EC etching becomes dominant, affecting the porosity process. As shown in Figures 4A and 5A, doped InP tends to be primarily electropolished in electrolytes with concentrations less than approximately 2M at applied voltages in the range of approximately 0.1 to approximately 2V. Higher concentrations of electrolyte, e.g., above approximately 2M, enable porosity but also show voltage dependence, with either no etching occurring (i.e., below 0.5V) or electropolishing occurring (i.e., between 0.5V and 1V) at voltages below 1V, and porosity occurring at voltages above 1V. See, for example, Figures 5D to 5H. Therefore, the selection of electrolyte is important. +- This is one of the most important steps in making InP porous and achieving good EC etching selectivity. In general, the trends observed for InP could be predicted in equivalent multilayer architectures fabricated from GaAs.
[0086] Furthermore, it is thought that free holes generated at the pore tips are rapidly consumed and participate in InP oxidation, thereby shortening the hole diffusion length and potentially hindering EC etching of the walls between nanopores. In the case of heavily doped InP (n≧1×10 19 cm -3 Due to the small depletion width, the pore walls become extremely thin, and the nanoporosity can easily collapse depending on the electrolyte selection due to hole diffusion. A short hole diffusion length and / or a passivation layer formed on the pore walls are necessary for doped InP porosity. These conditions can be met by increasing the electrolyte concentration, and that concentration can be used to achieve selective porosity of doped InP (see Figure 6).
[0087] IV. How to use multilayer structures
[0088] Multilayer structures can be used in a variety of applications, including electronic, photonic, and optoelectronic applications. More specifically, applications for such multilayer structures include, among others, fiber-based communications, free-space communications, LiDAR, detection and distance measurement, night vision, and chemical detection.
[0089] In particular, multilayer structures are useful in laser diodes, such as vertical-cavity surface-emitting lasers (VCSELs), where the multilayer structure can act as a distributed Bragg reflector (DBR). A multilayer structure used as a DBR fabricated from indium phosphide should be able to provide a long-wavelength VCSEL (i.e., emitting in the infrared wavelength range of 900–2000 nm). A multilayer structure used as a DBR fabricated from gallium arsenide should be able to provide a VCSEL capable of emitting in the range of approximately 800–1100 nm. Multilayer structures can be incorporated into various devices, such as VCSELs, using techniques known in the art.
[0090] The multilayer structures fabricated and etched in these examples have high refractive index contrast, are lattice-matched, and epitaxially compatible, enabling the easy fabrication of mirrors and DBRs for VCSELs. When the multilayer structure is formed from InP, it can be used to fabricate long-wavelength VCSELs. The method described above enables the mass production of DBRs based on multilayer structures made from, for example, indium phosphide, and can be used to fabricate infrared VCSELs emitting in the 1200-2000 nm range.
[0091] When these multilayer structures are EC-etched, they can exhibit primarily or exclusively horizontal porosity in a layered, selective manner. This is particularly important in VCSEL applications because horizontal porosity can be achieved without adversely affecting the quality of the active region typically grown on top of the DBR layer.
[0092] In certain cases, the multilayer structure acts as a DBR in a vertical-cavity surface-emitting laser (VCSEL) exhibiting a stopband of 1100–2000 nm or approximately 1100–2000 nm for indium phosphide, with peak reflectances of at least approximately 99%, 99.1%, 99.2%, 99.3%, 99.4%, 99.5%, 99.6%, 99.7%, 99.8%, or 99.9%. In certain cases, the multilayer structure acts as a DBR in a vertical-cavity surface-emitting laser (VCSEL) exhibiting a stopband of 1250 nm or approximately 1250 nm, with peak reflectances of at least approximately 99%, 99.1%, 99.2%, 99.3%, 99.4%, 99.5%, 99.6%, 99.7%, 99.8%, or 99.9%. In some cases, the stopband has a wavelength width of approximately 800–1100 nm for gallium arsenide and has peak reflectances of at least approximately 99%, 99.1%, 99.2%, 99.3%, 99.4%, 99.5%, 99.6%, 99.7%, 99.8%, or 99.9%. Such properties can be tailored to the purpose by adjusting the properties of the multilayer structure, such as the number of layers, the thickness of the layers, and the degree of porosity of the doped layers by EC etching or electropolishing.
[0093] Multilayer structures can be used to provide high-performance VCSELs with superior optical and electrical performance compared to already reported VCSELs. VCSELs offer many advantages over the more commonly used end-emitting laser diodes (EELDs), such as superior beam quality, compact form factor, low operating voltage, cost-effective wafer-level testing, higher yield, and lower manufacturing costs. VCSELs generally have important applications in a variety of fields, including information processing, microdisplays, picoprojection, laser headlamps, high-resolution printing, biophotonics, spectroscopic exploration, and atomic clocks.
[0094] The present invention will be further understood by referring to the following non-limiting embodiments. [Examples]
[0095] (Example 1) Preparation and testing of InP multilayer structures (high doping).
[0096] material and method
[0097] The multilayer structure was formed from indium phosphide grown homoepitaxially on an n-InP substrate polished on one side by MOCVD. The doped layer was doped with germanium dopant at the doping concentrations listed below. The multilayer structure was n-doped (2 × 10⁻¹⁶). 19 cm -3 It consisted of alternating layers of InP layers and undoped InP layers. The base layer was only 1 × 10⁻⁶ 17 ~1 × 10 18 An n-doped InP layer with a doping concentration was formed, and a 300 nm undoped InP layer was formed on top of it. A 140 nm n-doped InP layer was deposited on the 300 nm layer. Next, a 110 nm undoped InP layer was deposited on the 140 nm layer. Doped InP (140 nm, 2 × 10 19 cm -3 Further layers of doped InP (110 nm) and undoped InP (110 nm) were deposited. The last InP layer was undoped. This structure is shown in Figure 1 (see left). The final multilayer structure had six doped InP layers (140 nm, 2 × 10) between the undoped InP layers. 19 cm -3 ) was provided. Next, a silicon dioxide capping layer was deposited on the entire multilayer structure, and the wafer was cleaved into thin rods to expose the sidewalls of the multilayer structure by removing selected portions of the silicon dioxide layer by plasma-excited chemical deposition and to expose the sidewalls of the doped InP layer for electrochemical etching.
[0098] Subsequently, the multilayer structures were electrochemically (EC) etched in aqueous solutions of various electrolyte concentrations (HCl, oxalic acid, and KOH) at different anodic voltages according to the method described above. The anodic voltage was applied for 5 to 20 minutes. In the tests performed, HCl demonstrated a rapid lateral etching rate (approximately 8 to 20 μm / min), while KOH showed a slower lateral etching rate (approximately 0.1 to 0.5 μm / min). The conditions tested and the observed results are presented in Table 1 below.
[0099] [Table 1]
[0100] The scanning electron microscope images shown above are presented in Figures 4B-4G and 5B-5H.
[0101] result
[0102] Electrochemical etching revealed that when porosity occurred, lateral etching produced horizontal and / or substantially horizontal pores. The porous layer was found to become nanoporous after etching.
[0103] Depending on the EC conditions used, including the selection and concentration of the electrolyte and the bias voltage, the doped InP layer could be electropolished. When using the HCl electrolyte, for example, doped InP was electropolished with HCl at a concentration of 2 molars (M) or less, while nanopores were formed even at relatively higher anode voltages with 2 and 3.3 M HCl (see Figures 4E-4G and 5B-5C). This EC etching behavior was also observed with KOH. It is thought that free holes generated at the pore tips are rapidly consumed and participate in InP oxidation, resulting in a shorter hole diffusion length and potentially hindering EC etching of the walls between nanopores. In the case of heavily doped InP (n≧1×10⁻⁶ 19 cm -3Due to the small depletion width, the pore walls become extremely thin, and therefore, the nanoporous structure can easily collapse depending on the electrolyte selection due to hole diffusion. A short hole diffusion length and / or a passivation layer formed on the pore walls are necessary for doped InP porosity. These conditions can be met by increasing the electrolyte concentration, and this concentration can be used to achieve selective porosity of doped InP (see Figure 6).
[0104] (Example 2) Reflectance measurement of InP multilayer structures
[0105] material and method
[0106] The multilayer structure of Example 1 was porousd in 3.3 M HCl at 1.5 V. The silicon dioxide layer of the etched structure was then removed using buffer oxide etching. The reflectance of the nanoporous InP multilayer structure was then measured using a commercially available Filmmetrics F40 EXR, which is capable of spot measuring the thickness and optical properties of the thin film in the spectral range of 400 to 1700 nm.
[0107] result
[0108] The refractive index of nanoporous InP layers varies depending on their porosity, and can be as low as 1 when the porosity is 100% (i.e., the doped InP is completely electropolished). Layers with alternating refractive index ratios (between high refractive index undoped InP layers and low refractive index layers that are porous or electropolished) can produce continuous constructive or canceling interference. If the thickness of each layer corresponds to 1 / 4 of the wavelength of light, a stack of these alternating layers can act as a reflective mirror, which could be used to achieve long-wavelength emitting VCSELs.
[0109] Figure 7 shows the measured reflectance of a distributed Bragg reflector (DBR) of InP / NP InP with six pairs of 1 / 4λ layers, where the reflectance of a porous InP multilayer structure in 3.3M HCl at 1.5V was measured using a commercially available Filmetrics F40 EXR capable of spot-measuring thin film thickness and optical properties in the spectral range of 400–1700 nm. Nearly 100% reflectance was achieved with a broad stopband centered at 1240 nm, due to the large refractive index contrast between the nanoporous InP layer (<1.7) and the undoped InP layer (3.19). The center wavelength and stopband of the nanoporous InP DBR can be easily adjusted by varying the porosity and layer thickness.
[0110] (Example 3) Preparation and testing of InP multilayer structures (low doping).
[0111] material and method
[0112] The multilayer structure was formed from indium phosphide grown homoepitaxially on an n-InP substrate polished on one side by MOCVD. The doped layer was doped with germanium dopant at the doping concentrations listed below. The multilayer structure was n-doped (5 × 10⁻¹⁶). 18 cm -3 It consisted of alternating layers of InP layers and undoped InP layers. The base layer was only 1 × 10⁻⁶ 17 ~1 × 10 18 An n-doped InP layer with a doping concentration was formed, and a 300 nm undoped InP layer was formed on top of it. A 140 nm n-doped InP layer was deposited on the 300 nm layer. Next, a 110 nm undoped InP layer was deposited on the 140 nm layer. Doped InP (140 nm, 5 × 10 18 cm -3 Further layers of doped InP (110 nm) and undoped InP (110 nm) were deposited. The last InP layer was undoped. This structure is shown in Figure 1 (see left). The final multilayer structure had six doped InP layers (140 nm, 5 × 10) between the undoped InP layers. 18cm -3 ) was provided. Next, a silicon dioxide capping layer was deposited on the entire multilayer structure, and the wafer was cleaved into thin rods to expose the sidewalls of the multilayer structure by removing selected portions of the silicon dioxide layer by plasma-excited chemical deposition and to expose the sidewalls of the doped InP layer for electrochemical etching.
[0113] Subsequently, the multilayer structures were electrochemically (EC) etched in aqueous solutions of electrolytes (HBr, H2SO4, KOH, and HCl) of various concentrations at different anodic voltages, according to the method described above. The anodic voltage was applied for 5 minutes to 1 hour. The conditions tested and the observed results are presented in Table 2 below.
[0114] [Table 2]
[0115] result
[0116] As shown in the observations in Table 2, the porous doped layer was found to become nanoporous after electrochemical etching. It was also found that, depending on the EC conditions used, including the choice of electrolyte, its concentration, and the applied bias voltage, the doped InP layer could be porous or removed by etching (electropolishing). Figures 9A-C, 10A-C, and 11A-C show SEM images of the doped layer in 10% HCl and 5% HCl electrolytes.
[0117] (Example 4) Reflectance measurement of the InP multilayer structure in Example 3
[0118] material and method
[0119] 5 x 10 18 cm -3The nanoporous InP multilayer structure of Example 3, having the doping concentration, was porousd by applying a bias of 1.8V to a Pt counter electrode for 4 minutes in a 5% HCl electrolyte. The reflectance of the structure was measured using a commercially available Filmetrics F40 EXR, which can spot measure the thickness and optical properties of thin films in the spectral range of 900-1800 nm. In addition, 2 × 10 19 cm -3 The reflectance of the nanoporous InP multilayer structure of Example 1 (poroused in 3.3 M HCl at 1.5 V for 15 minutes) with a higher doping concentration and higher porosity was also measured. result
[0120] Figure 12 shows the measured reflectances of two types of InP / NP InP distributed Bragg reflectors (DBRs) each having six pairs of 1 / 4λ layers. Here, the reflectance of the InP multilayer structures was measured using a commercially available Filmetrics F40 EXR, which can spot-measure the thickness and optical properties of thin films in the spectral range of 900–1800 nm. 2×10 19 cm -3 For samples with doping concentrations, nearly 100% reflectivity was achieved with a broad stopband centered at 1250 nm, due to the large refractive index contrast between the nanoporous InP layer (<1.7) and the undoped InP layer (3.19). The center wavelength and stopband of the DBR of nanoporous InP can be easily adjusted, for example, by changing the porosity by varying the doping concentration alone or by changing the doping concentration in combination with other parameters (applied bias voltage, electrolyte and its concentration), and by changing the layer thickness.
[0121] (Example 5) Vertical resonator with a nanoporous InP bottom DBR mirror
[0122] material and method
[0123] A vertical resonator was constructed using a nanoporous InP DBR structure prepared according to Example 3 (8% HCl electrolyte, Pt counter electrode biased to 1.8V for 4.5 minutes) having 12 pairs of 1 / 4λ layers as bottom mirrors on an undoped InP substrate. The vertical resonator portion of the structure included an n-InP bottom layer (approximately 930 nm), an InAlGaAs multiple quantum well (MQW) layer (81 nm), a p-InP layer (71 nm), and an InGaAs top tunnel junction layer (20 nm). The complete vertical resonator structure, including the resonator and bottom DBR mirrors, is shown in Figure 13A.
[0124] Reflectance measurements in a vertical resonator were performed using a Bruker Vertex 70 + Hyperion 2000 in the spectral range of 900–1900 nm.
[0125] Finally, a light field simulation (λ=1661nm) was also performed using MATLAB® software.
[0126] result
[0127] As shown in Figure 13B, two valleys (λ=1405 and 1661 nm) were observed in the experimental reflection spectrum. Simulations of the reflection spectrum based on the structure in Figure 13A, which showed the formation of a vertical resonator using NP InP DBR mirrors as partial reflector mirrors at the bottom and top semiconductor / air interfaces, demonstrated good agreement with the experimental results. From the reflection simulations, it was also possible to extract / simulate the optical field distribution, showing the field intensity and refractive index as a function of the thickness of the bottom DBR structure, as shown in Figures 13C and 13D. Furthermore, for the optical field simulations, a clear standing wave was observed in the resonator at a wavelength of 1661 nm, due to the presence of the nanoporous InP DBR mirrors.
[0128] (Example 6) Vertical resonator with a nanoporous InP bottom DBR mirror and an upper dielectric DBR mirror.
[0129] material and method
[0130] A vertical resonator was constructed using a nanoporous InP DBR structure prepared according to Example 3 (8% HCl electrolyte, Pt counter electrode biased at 1.8V for 4.5 minutes) having 12 pairs of 1 / 4λ layers as bottom mirrors on an undoped InP substrate. The vertical resonator portion of the structure included an n-InP bottom layer (approximately 930 nm), an InAlGaAs MQW layer (81 nm), a p-InP layer (71 nm), an InGaAs tunnel junction layer (20 nm), and an a-Si spacer (100 nm). Finally, an uppermost SiO2 (252 nm) / a-Si (107 nm) DBR mirror formed part of the structure. The complete vertical resonator structure, including the described resonator and the uppermost and bottom DBR mirrors, is shown in Figure 14A.
[0131] Reflectance measurements in a vertical resonator were performed using a Bruker Vertex 70 + Hyperion 2000 in the spectral range of 900–1900 nm.
[0132] Finally, a light field simulation (λ=1500nm) was also performed using MATLAB® software.
[0133] result
[0134] Note that an additional amorphous silicon (a-Si) layer was used to shift the resonator mode to 1500 nm (see Figures 14A and 14B). As shown in Figure 14B, a valley (λ=1500 nm) was observed in the experimental reflection spectrum when the topmost SiO2 / a-Si top layer DBR mirror was present. Two reflection spectra were obtained, one with the a-Si spacer and the topmost SiO2 / a-Si top layer DBR mirror, and one without. It was observed that the valley was deeper due to the higher reflectivity with the topmost dielectric DBR mirror on SiO2 / a-Si compared to the semiconductor / air interface. From the simulation, it was also possible to extract / simulate the optical field distribution showing the field intensity and refractive index as a function of the thickness of the present DBR structure, as shown in Figures 13C and 13D, respectively. Furthermore, for the optical field simulation, a clear standing wave was shown at the 1500 nm wavelength in the resonator due to the presence of nanoporous InP and silicon-based dielectric DBR mirrors.
[0135] Unless otherwise defined, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art in which the disclosed inventions pertain. Publications cited herein and materials from which they are cited are incorporated specifically by reference.
[0136] Those skilled in the art will be able to recognize or confirm many equivalents of specific embodiments of the present invention using very common experimental methods. Such equivalents are intended to be covered by the following claims. In a particular embodiment, for example, the following items are provided: (Item 1) Multiple undoped or low-n-doped indium phosphide or gallium arsenide layers present on a single-crystal substrate as needed, formed from indium phosphide, gallium arsenide, sapphire, silicon, or silicon carbide. A multilayer structure including, The multilayer structure comprises at least one layer of n-doped indium or gallium arsenide, which is located between at least two layers of undoped or low-doped indium or gallium arsenide, wherein the n-doped indium or gallium arsenide comprises at least one region or portion that is porous or electropolished due to electrochemical etching. If at least one layer of n-doped indium or gallium arsenide is porous, the n-doped indium or gallium arsenide layer contains a plurality of pores, which are confined by an adjacent undoped or low-n-doped indium or gallium arsenide layer that is non-porous or substantially non-porous. Multilayer structure. (Item 2) The multilayer structure according to item 1, wherein the plurality of undoped or low-doped indium or gallium arsenide layers are indium phosphide layers, and at least one of the n-doped indium or gallium arsenide layers is made from indium phosphide. (Item 3) The multilayer structure according to item 1, wherein the plurality of undoped or low-doped indium or gallium arsenide layers are gallium arsenide layers, and at least one of the n-doped indium or gallium arsenide layers is made from gallium arsenide. (Item 4) The multilayer structure according to any one of items 1 to 3, wherein the plurality of undoped or low-doped indium or gallium arsenide layers are undoped. (Item 5) The aforementioned multiple undoped or low-doped indium or gallium arsenide layers are 1 to 50 × 10 17 cm -3 A multilayer structure according to any one of items 1 to 3, which is low-n-doped, having an n-dopant concentration of less than or equal to that. (Item 6) The aforementioned indium n-doprinide or gallium arsenide layer comprises at least about 1 × 10⁻¹⁶ layers. 19 cm -3 , or approximately 0.1~10 × 10 19 cm -3 ~10×10 20 cm -3 A multilayer structure according to any one of items 1 to 5, having an n-dopant concentration in the range of . (Item 7) The multilayer structure according to any one of items 1 to 6, wherein if at least one layer of indium n-dopurine or gallium arsenide is porous, it has a porosity of at least about 30%, 40%, 50%, 60%, 70%, 80%, or 90%. (Item 8) The multilayer structure according to any one of items 1 to 7, wherein each of the plurality of undoped or low-doped indium or gallium arsenide layers independently has a thickness of about 50 nm to 500 nm. (Item 9) The multilayer structure according to any one of items 1 to 8, wherein at least one layer of indium n-dopurine or gallium arsenide has a thickness of about 50 nm to 500 nm. (Item 10) The multilayer structure according to any one of items 1 to 9, wherein the multilayer structure has a total thickness in the range of approximately 600 nm to approximately 8,000 nm or approximately 600 nm to approximately 6,000 nm. (Item 11) The aforementioned multiple undoped or low-doped indium or gallium arsenide layers are made from indium phosphide. If at least one layer of the indium n-doprinide or gallium arsenide is made from indium phosphide and is porous or electropolished, it has a refractive index of less than 3.2. A multilayer structure as described in any one of items 1 through 10. (Item 12) The multilayer structure according to item 11, wherein the refractive index contrast (Δn) between at least one layer of porous or electropolished n-doped indium and the undoped or low-doped indium layer is in the range of about 0.5 to about 2. (Item 13) The aforementioned multiple undoped or low-doped indium or gallium arsenide layers are made from gallium arsenide. If at least one layer of indium n-doprinide or gallium arsenide is made from gallium arsenide and is porous or electropolished, it has a refractive index of less than 3.95. A multilayer structure as described in any one of items 1 through 10. (Item 14) The multilayer structure according to item 11, wherein the refractive index contrast (Δn) between at least one layer of porous or electropolished n-doped gallium arsenide and the undoped or low-doped gallium arsenide layer is in the range of about 0.5 to about 2. (Item 15) The aforementioned multilayer structure is at least about 5 × 1018 cm -3 Carrier (electron) concentrations exceeding 50, 60, 70, 80, 90, or 95 cm⁻¹ 2 A multilayer structure according to any one of items 1 to 14, having an electrical mobility of / V s. (Item 16) The multilayer structure according to any one of items 1 to 15, wherein the multilayer structure has a thermal conductivity in the range of about 1 to 25, 2 to 20, 2 to 15, or 2 to 10 W / m·K. (Item 17) The multilayer structure according to any one of items 1 to 15, wherein the multilayer structure has a thermal conductivity of at least about 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 20, 30, 40, or 50 W / m·K. (Item 18) A method for fabricating a multilayer structure as described in any one of items 1 to 17, (a) The step of forming a first layer of undoped or low-doped indium or gallium arsenide on a substrate layer, if any, as needed, (b) A step of depositing a second layer of n-doprinide indium or gallium arsenide over the first layer, (c) A third layer of undoped or low-doped indium or gallium arsenide is deposited on the second layer, (d) Repeating steps (b) and (c) as necessary to form further alternating layers of the n-doped indium or gallium arsenide and the undoped or low-doped indium or gallium arsenide, (e) A step of depositing a capping layer over the entire multilayer structure, (f) The step of removing at least a portion of the capping layer to selectively expose at least one side wall of the multilayer structure, (g) The step of electrochemically (EC) etching an indium n-doped or gallium arsenide layer in the presence of an electrolyte and under an applied bias voltage to selectively porous or electropolish at least a portion of the existing indium n-doped or gallium arsenide layer. Includes, If the n-doped indium or gallium arsenide layer is porous, the n-doped indium or gallium arsenide layer contains a plurality of pores, which are confined by adjacent non-porous or substantially non-porous undoped or low-n-doped indium or gallium arsenide layers. method. (Item 19) The method according to item 18, wherein the undoped or low-doped indium or gallium arsenide layer, the n-doped indium or gallium arsenide layer, is grown epitaxially or homoepitaxially by metal-organic chemical vapor deposition (MOCVD). (Item 20) The capping layer is made of silicon dioxide, silicon nitride (SiN x ), hafnium oxide (HfO 2 ), or the method described in any one of items 18 to 19, made from a photoresist material. (Item 21) The method according to item 18, wherein the present undoped or low-doped indium or gallium arsenide layer is an indium phosphide layer, and the present n-doped indium or gallium arsenide layer is made from indium phosphide. (Item 22) The method according to item 18, wherein the present undoped or low-doped indium or gallium arsenide layer is a gallium arsenide layer, and the present n-doped indium or gallium arsenide layer is made from gallium arsenide. (Item 23) The method according to any one of items 18 to 22, wherein the existing undoped or low-doped indium or gallium arsenide layer is undoped. (Item 24) The existing undoped or low-doped indium or gallium arsenide layer is 1 to 50 × 10 17 cm -3 The method according to any one of items 18 to 22, which is low n-dope having an n-dopant concentration of less than or equal to that. (Item 25) The existing indium n-doprinide or gallium arsenide layer is at least about 1 × 10⁻¹⁶ 19 cm -3 , or approximately 0.1 × 1019 cm -3 ~10×10 20 cm -3 The method according to any one of items 18 to 24, having an n-dopant concentration in the range of . (Item 26) The method according to any one of items 18 to 25, wherein if the existing indium n-doprinide or gallium arsenide layer is porous, it has a porosity of at least about 30%, 40%, 50%, 60%, 70%, 80%, or 90%. (Item 27) The method according to any one of items 18 to 26, wherein the existing undoped or low-doped indium or gallium arsenide layers each independently have a thickness of about 50 nm to 500 nm. (Item 28) The method according to any one of items 18 to 27, wherein the existing indium n-doprinide or gallium arsenide layers each independently have a thickness of about 50 nm to 500 nm. (Item 29) The method according to any one of items 18 to 28, wherein the multilayer structure has a total thickness in the range of about 600 nm to about 8,000 nm or about 600 nm to about 6,000 nm. (Item 30) The method according to any one of items 18 to 29, wherein the existing indium n-dopurine or gallium arsenide layer is doped with an n-type dopant selected from a Ge dopant, a Si dopant, or a combination thereof. (Item 31) The aforementioned n-type dopant is silane (SiH 4 ), Germanic (GeH 4 The method according to item 30, obtained from a dopant source selected from isobutylgermane (IBGe) and combinations thereof. (Item 32) The method according to any one of items 18 to 31, wherein step (f) is carried out using inductively coupled plasma reactive ion etching (ICP-RIE) or by physically cleaving a portion of the capping layer. (Item 33) The electrolyte in step (g) is a halide ion, hydrochloric acid (HCl), sulfuric acid (H 2 SO 4 ), hydrofluoric acid (HF), KOH, NaOH, Ba(OH) 2 Ca(OH) 2 , Sr(OH) 2 NH 4 OH, NaCl, NaF, Nitric Acid (HNO 3 The method according to any one of items 18 to 32, comprising organic acids and their salts (e.g., oxalic acid and citric acid), and mixtures thereof. (Item 34) The method according to item 33, wherein the organic acid is oxalic acid or citric acid. (Item 35) The method according to any one of items 18 to 34, wherein the applied bias voltage in step (g) is in the range of about 0.1 to 10V, 1.0 to 5V, or 1.0 to 2.5V, and is applied for at least about 5 minutes, 10 minutes, 15 minutes, 20 minutes, 25 minutes, 30 minutes, 35 minutes, 40 minutes, 45 minutes, 50 minutes, 55 minutes, 60 minutes, 2 hours, 3 hours, 4 hours, 5 hours, 6 hours, 10 hours, 15 hours, 20 hours, or 24 hours. (Item 36) The method according to any one of items 18 to 35, wherein step (g) is performed at room temperature or at a temperature in the range of about 10°C to about 50°C. (Item 37) A device that includes a multi-layer architecture as described in any one of items 1 through 17. (Item 38) The device according to item 37, wherein the device is selected from the group consisting of light-emitting diodes, field-effect transistors, lasers, laser diodes, and biomedical devices. (Item 39) The device according to item 38, wherein the laser diode is a vertical-cavity surface-emitting laser (VCSEL), and the multilayer structure is a distributed Bragg reflector for the vertical-cavity surface-emitting laser (VCSEL). (Item 40) The device according to item 39, wherein the distributed Bragg reflector of the multilayer structure has a stopband of 900 nm or greater, with a peak reflectance of at least about 99%, 99.1%, 99.2%, 99.3%, 99.4%, 99.5%, 99.6%, 99.7%, 99.8%, or 99.9%. (Item 41) The device according to any one of items 39 to 40, wherein the vertical-cavity surface-emitting laser (VCSEL) emits light in the near-infrared wavelength range and / or the infrared wavelength range.
Claims
1. Multiple undoped or low-n-doped indium phosphide or gallium arsenide layers present on a single-crystal substrate as needed, formed from indium phosphide, gallium arsenide, sapphire, silicon, or silicon carbide. A multilayer structure including, The multilayer structure comprises at least one layer of n-doped indium or gallium arsenide, which is located between at least two layers of undoped or low-doped indium or gallium arsenide, wherein the n-doped indium or gallium arsenide comprises at least one region or portion that is porous or electropolished due to electrochemical etching. If at least one layer of n-doped indium or gallium arsenide is porous, the n-doped indium or gallium arsenide layer contains a plurality of pores, which are confined by an adjacent undoped or low-n-doped indium or gallium arsenide layer that is non-porous or substantially non-porous. Multilayer structure.
2. The multilayer structure according to claim 1, wherein the plurality of undoped or low-doped indium or gallium arsenide layers are indium phosphide layers, and at least one of the n-doped indium or gallium arsenide layers is made from indium phosphide.
3. The multilayer structure according to claim 1, wherein the plurality of undoped or low-doped indium or gallium arsenide layers are gallium arsenide layers, and at least one of the n-doped indium or gallium arsenide layers is made from gallium arsenide.
4. The multilayer structure according to any one of claims 1 to 3, wherein the plurality of undoped or low-doped indium or gallium arsenide layers are undoped.
5. The aforementioned multiple undoped or low-doped indium or gallium arsenide layers are 1 to 50 × 10 17 cm -3 The multilayer structure according to any one of claims 1 to 3, which is low-n doped, having an n-dopant concentration of less than or equal to that.
6. The aforementioned indium n-doprinide or gallium arsenide layer comprises at least about 1 × 10 19 cm -3 , or approximately 0.1 to 10 x 10 19 cm -3 ~10 x 10 20 cm -3 A multilayer structure according to any one of claims 1 to 3, having an n-dopant concentration in the range of .
7. The multilayer structure according to any one of claims 1 to 3, wherein if at least one layer of indium n-doprinide or gallium arsenide is porous, it has a porosity of at least about 30%, 40%, 50%, 60%, 70%, 80%, or 90%.
8. The multilayer structure according to any one of claims 1 to 3, wherein each of the plurality of undoped or low-doped indium or gallium arsenide layers independently has a thickness of about 50 nm to 500 nm.
9. The multilayer structure according to any one of claims 1 to 3, wherein at least one layer of indium n-dopurine or gallium arsenide has a thickness of about 50 nm to 500 nm.
10. The multilayer structure according to any one of claims 1 to 3, wherein the multilayer structure has a total thickness in the range of about 600 nm to about 8,000 nm or about 600 nm to about 6,000 nm.
11. The aforementioned multiple undoped or low-doped indium or gallium arsenide layers are made from indium phosphide. If at least one layer of the indium n-doprinide or gallium arsenide is made from indium phosphide and is porous or electropolished, it has a refractive index of less than 3.
2. A multilayer structure according to any one of claims 1 to 3.
12. The multilayer structure according to claim 11, wherein the refractive index contrast (Δn) between at least one layer of porous or electropolished n-doped indium and the undoped or low-doped indium layer is in the range of about 0.5 to about 2.
13. The aforementioned multiple undoped or low-doped indium or gallium arsenide layers are made from gallium arsenide. If at least one layer of indium n-doprinide or gallium arsenide is made from gallium arsenide and is porous or electropolished, it has a refractive index of less than 3.
95. A multilayer structure according to any one of claims 1 to 3.
14. The multilayer structure according to claim 11, wherein the refractive index contrast (Δn) between at least one layer of porous or electropolished n-doped gallium arsenide and the undoped or low-doped gallium arsenide layer is in the range of about 0.5 to about 2.
15. The multilayer structure has at least about 5×10 18 cm -3 excess carrier (electron) concentration and at least about 50, 60, 70, 80, 90, or 95 cm 2 / Vs of electrical mobility, the multilayer structure according to any one of claims 1 to 3.
16. The multilayer structure according to any one of claims 1 to 3, wherein the multilayer structure has a thermal conductivity in the range of about 1 to 25, 2 to 20, 2 to 15, or 2 to 10 W / m·K.
17. The multilayer structure according to any one of claims 1 to 3, wherein the multilayer structure has a thermal conductivity of at least about 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 20, 30, 40, or 50 W / m·K.
18. A method for producing a multilayer structure according to claim 1, (a) The step of forming a first layer of undoped or low-doped indium or gallium arsenide on a substrate layer, if any, as needed, (b) A step of depositing a second layer of n-doprinide indium or gallium arsenide over the first layer, (c) A third layer of undoped or low-doped indium or gallium arsenide is deposited on the second layer, (d) Repeating steps (b) and (c) as necessary to form further alternating layers of the n-doped indium or gallium arsenide and the undoped or low-doped indium or gallium arsenide, (e) A step of depositing a capping layer over the entire multilayer structure, (f) The step of removing at least a portion of the capping layer to selectively expose at least one side wall of the multilayer structure, (g) The step of electrochemically (EC) etching an indium n-doped or gallium arsenide layer in the presence of an electrolyte and under an applied bias voltage to selectively porous or electropolish at least a portion of the existing indium n-doped or gallium arsenide layer. Includes, If the n-doped indium or gallium arsenide layer is porous, the n-doped indium or gallium arsenide layer contains a plurality of pores, which are confined by adjacent non-porous or substantially non-porous undoped or low-n-doped indium or gallium arsenide layers. method.
19. The method according to claim 18, wherein the undoped or low-doped indium or gallium arsenide layer, and the n-doped indium or gallium arsenide layer are grown epitaxially or homoepitaxially by organometallic vapor deposition (MOCVD).
20. The capping layer is made of silicon dioxide, silicon nitride (SiN x ), hafnium oxide (HfO 2 The method according to any one of claims 18 to 19, wherein the method is made from a photoresist material.
21. The method according to claim 18, wherein the existing undoped or low-doped indium or gallium arsenide layer is an indium phosphide layer, and the existing n-doped indium or gallium arsenide layer is made from indium phosphide.
22. The method according to claim 18, wherein the existing undoped or low-doped indium or gallium arsenide layer is a gallium arsenide layer, and the existing n-doped indium or gallium arsenide layer is made from gallium arsenide.
23. The method according to any one of claims 18 to 19 or 21 to 22, wherein the existing undoped or low-doped indium or gallium arsenide layer is undoped.
24. The existing undoped or low-doped indium or gallium arsenide layer is 1 to 50 × 10 17 cm -3 The method according to any one of claims 18 to 19 or 21 to 22, which is low n-doping having an n-dopant concentration of less than or equal to.
25. The existing indium n-doprinide or gallium arsenide layer is at least about 1 × 10 19 cm -3 , or approximately 0.1 × 10 19 cm -3 ~10 x 10 20 cm -3 The method according to any one of claims 18 to 19 or 21 to 22, wherein the n-dopant concentration is in the range of .
26. The method according to any one of claims 18 to 19 or 21 to 22, wherein if the present indium n-doprinide or gallium arsenide layer is porous, it has a porosity of at least about 30%, 40%, 50%, 60%, 70%, 80%, or 90%.
27. The method according to any one of claims 18 to 19 or 21 to 22, wherein the existing undoped or low-doped indium or gallium arsenide layers each independently have a thickness of about 50 nm to 500 nm.
28. The method according to any one of claims 18 to 19 or 21 to 22, wherein the existing indium n-doprinide or gallium arsenide layers each independently have a thickness of about 50 nm to 500 nm.
29. The method according to any one of claims 18 to 19 or 21 to 22, wherein the multilayer structure has a total thickness in the range of about 600 nm to about 8,000 nm or about 600 nm to about 6,000 nm.
30. The method according to any one of claims 18 to 19 or 21 to 22, wherein the existing indium n-dopurine or gallium arsenide layer is doped with an n-type dopant selected from a Ge dopant, a Si dopant, or a combination thereof.
31. The aforementioned n-type dopant is silane (SiH 4 ), Germanic (GeH 4 The method according to claim 30, obtained from a dopant source selected from ), isobutylgermane (IBGe), and combinations thereof.
32. The method according to any one of claims 18 to 19 or 21 to 22, wherein step (f) is carried out using inductively coupled plasma reactive ion etching (ICP-RIE) or by physically cleaving a portion of the capping layer.
33. The electrolyte in step (g) is a halide ion, hydrochloric acid (HCl), sulfuric acid (H 2 SO 4 ), hydrofluoric acid (HF), KOH, NaOH, Ba(OH) 2 Ca(OH) 2 , Sr(OH) 2 NH 4 OH, NaCl, NaF, nitric acid (HNO 3 The method according to any one of claims 18 to 19 or 21 to 22, comprising ), organic acids and salts thereof (e.g., oxalic acid and citric acid), and mixtures thereof.
34. The method according to claim 33, wherein the organic acid is oxalic acid or citric acid.
35. The method according to any one of claims 18 to 19 or 21 to 22, wherein the applied bias voltage in step (g) is in the range of about 0.1 to 10 V, 1.0 to 5 V, or 1.0 to 2.5 V, and is applied for at least about 5 minutes, 10 minutes, 15 minutes, 20 minutes, 25 minutes, 30 minutes, 35 minutes, 40 minutes, 45 minutes, 50 minutes, 55 minutes, 60 minutes, 2 hours, 3 hours, 4 hours, 5 hours, 6 hours, 10 hours, 15 hours, 20 hours, or 24 hours.
36. The method according to any one of claims 18 to 19 or 21 to 22, wherein step (g) is carried out at room temperature or at a temperature in the range of about 10°C to about 50°C.
37. A device comprising the multilayer architecture described in claim 1.
38. The device according to claim 37, wherein the device is selected from the group consisting of light-emitting diodes, field-effect transistors, lasers, laser diodes, and biomedical devices.
39. The device according to claim 38, wherein the laser diode is a vertical cavity surface-emitting laser (VCSEL), and the multilayer structure is a distributed Bragg reflector for the vertical cavity surface-emitting laser (VCSEL).
40. The device according to claim 39, wherein the distributed Bragg reflector of the multilayer structure has a stopband of 900 nm or greater, with a peak reflectance of at least about 99%, 99.1%, 99.2%, 99.3%, 99.4%, 99.5%, 99.6%, 99.7%, 99.8%, or 99.9%.
41. The device according to any one of claims 39 to 40, wherein the vertical cavity surface-emitting laser (VCSEL) emits light in the near-infrared wavelength range and / or the infrared wavelength range.
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