Semiconductor testing equipment

Abstract

To prevent generation of inrush current and surge voltage during power module testing.SOLUTION: A power module 117 is arranged on a heating / cooling plate, a connection structure 218a is connected to an electrode terminal of the power module 117, and a gate driver circuit 113 is connected to a gate signal terminal g. A switch circuit 124a is connected to the connection structure 218a. A test current from the power supply device 121 is supplied to the power module 117 via the switch circuit 124a. Upon turned on, a switch circuit 124b short-circuits an output terminal of the power supply device 121. When a test current is supplied to the power module 117, an on-signal is applied to the gate signal terminal g of the power module 117, and then the switch circuit 124a is turned on. The switch circuit 124b is turned on before the switch circuit 124a is turned on, and the switch circuit 124b is turned off after the switch circuit 124a is turned off.SELECTED DRAWING: Figure 44

Description

【Technical Field】 【0001】 The present invention relates to a semiconductor test apparatus for performing a power cycle test on semiconductor devices such as SiC, IGBT, MOS-FET, GaN, bipolar transistors, etc., a test method for semiconductor devices, and the like. 【0002】 Provided are a semiconductor test apparatus and a test method for a semiconductor device that can efficiently reproduce stress close to a failure mode in the usage environment of the semiconductor device and can evaluate power semiconductor devices and the like with high reliability. 【Background Art】 【0003】 A power semiconductor is a semiconductor that can handle high voltages and large currents. For example, a combination of an inverter incorporating the latest power semiconductor and a motor, such as HEV / EV which is an "advanced technology", is currently seeing widespread popularity. In the future, this combination is expected to become the "core" and contribute to the electrification of various transportation equipment such as railways, ships, airplanes, and satellites. 【0004】 Power semiconductors range from small power supplies used for CPUs, memories, etc. to large power supplies for driving motors, so their sizes and types are very diverse. 【0005】 Furthermore, the development of new materials in wide-gap power semiconductors such as SiC (silicon carbide) and GaN (gallium nitride) is also progressing for further improvement in energy conversion efficiency. 【0006】 Since power semiconductors can handle a large amount of power, they also generate a large amount of heat by themselves and need to be cooled efficiently. Therefore, in terms of the reliability of mounting, it is necessary to consider many items. 【0007】 The lifespan of a power semiconductor device includes the lifespan due to thermal fatigue caused by the heat generated by the power semiconductor device itself, and the lifespan due to thermal fatigue caused by temperature changes in the external environment surrounding the power semiconductor device. Additionally, there is the lifespan due to voltage fatigue caused by the voltage applied to the gate insulating film of the power semiconductor device. 【0008】 Generally, life testing of power semiconductor devices involves repeatedly switching the semiconductor device on and off. For example, the test is performed by setting the voltage and current applied to the emitter terminal (source terminal), collector terminal (drain terminal), etc., of a transistor semiconductor device, and applying a periodic on / off signal (operated / deactivated signal) to the gate terminal. 【0009】 The current applied to semiconductor elements during testing is large, several hundred amperes, requiring low-resistance wiring to avoid overheating and voltage drop. Due to the large test current, the connections between the semiconductor elements and the wiring must be connected with low resistance. 【0010】 Many semiconductor devices under test are connected in multiple stages, and in the case of transistors, the inter-channel voltage can vary significantly depending on the test conditions. If the test signal applied to the semiconductor device is inappropriate, it may be damaged by the test signal itself. 【0011】 There are many types of semiconductor device tests, and the wiring connections must be modified to match the type of test. Modifying wiring connections is time-consuming and prone to connection failures and errors. Power semiconductor devices are also becoming smaller in packaging, and with this miniaturization, the area of ​​connection parts such as terminals on the package is also decreasing. [Prior art documents] [Patent Documents] 【0012】 [Patent Document 1] Japanese Patent Publication No. 2014-138488 [Overview of the Initiative] [Problems that the invention aims to solve] 【0013】 Conventional semiconductor testing equipment performs testing of power semiconductor elements (transistors, etc.) by switching transistor 117 on and off and simultaneously applying a constant current Id to the transistor's channel. 【0014】 The test items performed with semiconductor device test equipment (power cycle test equipment) are diverse, and it is necessary to change the setting conditions or test conditions according to the test item. 【0015】 Power semiconductors require a wide variety of reliability tests, but conventional semiconductor device testing equipment has the challenge of not being able to efficiently perform these diverse reliability tests. 【0016】 The semiconductor test equipment (power cycle test equipment) performs a wide variety of test items, and it is necessary to change the connection to transistor 117 (change the wiring) according to the test item. 【0017】 The constant current Id is often several hundred amperes or more, requiring the use of thick wires for the connecting wiring 211 and power supply wiring 212 that carry this current. Furthermore, a large current Id flows through the semiconductor electrode terminals. If there is contact resistance between the semiconductor element's connecting electrode terminals and the connecting wiring, the contact area overheats, potentially damaging the semiconductor element. 【0018】 In recent years, power semiconductor devices have also been undergoing miniaturization. Along with this miniaturization, the size of the connection electrodes for power semiconductor devices has also decreased. 【0019】 When the connection terminals of a power semiconductor element become smaller, it becomes difficult to connect them to the connection wiring on the connecting board. Furthermore, the connection resistance increases. Since large currents flow through power semiconductor elements, high connection resistance causes the connection point to overheat, potentially burning out the power semiconductor element. 【0020】 In a test apparatus for a power semiconductor device, it cannot be fixed by soldering or the like. In a test apparatus for a power semiconductor device, it is necessary to make the power semiconductor device to be tested detachable. 【0021】 Changing the connection of the thick wire wiring to correspond to the test items requires a long time and also requires a work space for changing the wiring connection, so there is a problem that the test apparatus becomes large. 【Means for Solving the Problems】 【0022】 The semiconductor device test apparatus of the present invention includes a power switching unit that supplies power to other devices during the period when one device is powered off, a plurality of power supply devices, a plurality of temperature measurement devices, and a noise control device. The semiconductor device of the present invention can arbitrarily set the period and the on time for turning on (operating) the semiconductor device. 【0023】 By changing or controlling any one of the cycle tc, on time ton, and off time toff of the power semiconductor device, the time and interval during which a predetermined current flows through the power semiconductor device are controlled. 【0024】 When the power semiconductor device is powered on for the on time ton1, the temperature of the power semiconductor device gradually rises. The temperature information of the power semiconductor device is acquired in real time and converted into temperature. When the power semiconductor device reaches the target temperature Ta, the on time for turning on the power semiconductor device is changed to ton2, and the on time of the power semiconductor device is controlled so that the temperature of the power semiconductor device becomes a constant value Ta. 【0025】 On the flat part of the back surface of the power semiconductor device 117, an electrode terminal 226 and a signal terminal 227 are formed or arranged on the side surface. Alternatively, an electrode terminal 226 and a signal terminal 227 are formed or arranged on the flat part of the back surface of the power semiconductor device 117. On the connection substrate 514, an electrode pattern 505 for connecting to the electrode terminal 226 and an electrode pattern 506 for connecting to the signal terminal 227 are formed. The power semiconductor device 117 is inserted into the sample hole 512 of the sample placement plate 511 and positioned with the electrode terminal 226 facing upward. 【0026】 An anisotropic conductive rubber 504 is disposed between the signal terminal 227 and the connection substrate 514. When the connection substrate 514 is pressed, the signal terminal 227 and the electrode pattern 506 are electrically connected. 【0027】 As described above, the anisotropic conductive rubber 504 is sandwiched between the electrode terminal 226 and the signal terminal 227 of the semiconductor device 117, and between the electrode pattern 506 and the signal terminal 227 of the connection substrate 514. The anisotropic conductive rubber 504 electrically connects the electrode pattern 506 and the signal terminal 227. A heat-resistant resist 523 is formed between the electrode pattern 505 and the electrode pattern 506. The electrode pattern is connected to the connection portion 507, and a test current is applied to the connection portion 507 to test the semiconductor device 117. 【Advantages of the Invention】 【0028】 In the semiconductor device test apparatus and the semiconductor test method of the present invention, the device state can be displayed in real time, and the temperature of the semiconductor device can be accurately measured. Further, the test can be stopped before the semiconductor device is completely destroyed, the thermal resistance can be measured in real time, and the K factor can be automatically measured. In the semiconductor device test apparatus of the present invention, the signal terminal 227 and the electrode pattern 506 are electrically connected by the anisotropic conductive rubber 504 during pressing. 【0029】 The power semiconductor device 117 to be tested can be removed by removing the anisotropic conductive rubber 504. Further, by matching the shape of the power semiconductor device 117 to be tested with the wiring pattern of the connection substrate 514 and considering the wiring connection pattern, various tests can be carried out. 【Brief Description of the Drawings】 【0030】 [Figure 1]These are explanatory diagrams and equivalent circuit diagrams of semiconductor devices. [Figure 2] These are plan and cross-sectional views of a semiconductor device. [Figure 3] This is an equivalent circuit diagram and explanatory diagram of a connection substrate in the semiconductor testing apparatus of the present invention. [Figure 4] These are explanatory diagrams and equivalent circuit diagrams of semiconductor devices. [Figure 5] These are plan and cross-sectional views of a semiconductor device. [Figure 6] This is an equivalent circuit diagram and explanatory diagram of a connection substrate in the semiconductor testing apparatus of the present invention. [Figure 7] These are explanatory diagrams and equivalent circuit diagrams of semiconductor devices. [Figure 8] These are explanatory diagrams and equivalent circuit diagrams of semiconductor devices. [Figure 9] This is an explanatory diagram of the sample placement plate in the semiconductor testing apparatus of the present invention. [Figure 10] This is an explanatory diagram of the connection substrate in the semiconductor testing apparatus of the present invention. [Figure 11] This is an explanatory diagram of the connection substrate in the semiconductor testing apparatus of the present invention. [Figure 12] This is an explanatory diagram of the connection substrate in the semiconductor testing apparatus of the present invention. [Figure 13] This is an explanatory diagram of the connection substrate in the semiconductor testing apparatus of the present invention. [Figure 14] This is an explanatory diagram of the pressing plate in the semiconductor testing apparatus of the present invention. [Figure 15] This is an explanatory diagram of a semiconductor device mounting method in the semiconductor testing apparatus of the present invention. [Figure 16] This is an explanatory diagram of a semiconductor device mounting method in the semiconductor testing apparatus of the present invention. [Figure 17] This is an explanatory diagram of a semiconductor device mounting method in the semiconductor testing apparatus of the present invention. [Figure 18] This is an explanatory diagram of a semiconductor device mounting method in the semiconductor testing apparatus of the present invention. [Figure 19] These are explanatory diagrams and equivalent circuit diagrams of semiconductor devices. [Figure 20]This is an explanatory diagram of the sample placement plate in the semiconductor testing apparatus of the present invention. [Figure 21] This is an explanatory diagram of a semiconductor device mounting method in the semiconductor testing apparatus of the present invention. [Figure 22] This is an explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 23] This is an explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 24] This is an explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 25] This is an explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 26] This is an explanatory diagram of a semiconductor device mounting method in the semiconductor testing apparatus of the present invention. [Figure 27] This is an explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 28] This is an equivalent circuit diagram and block diagram of the semiconductor testing apparatus of the present invention. [Figure 29] This is a diagram showing the configuration of the semiconductor testing apparatus of the present invention. [Figure 30] This is a diagram showing the configuration of the semiconductor testing apparatus of the present invention. [Figure 31] This is an explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 32] This is an explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 33] This is an explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 34] This is an explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 35] This is an explanatory diagram of a heat pipe in the semiconductor testing apparatus of the present invention. [Figure 36] This is an explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 37] This is an explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 38] This is an explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 39] This is an explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 40] This is an explanatory diagram of a heat pipe in the semiconductor testing apparatus of the present invention. [Figure 41] This is an explanatory diagram of a heat pipe in the semiconductor testing apparatus of the present invention. [Figure 42] This is an explanatory diagram of a heat pipe in the semiconductor testing apparatus of the present invention. [Figure 43] This is an explanatory diagram of a heat pipe in the semiconductor testing apparatus of the present invention. [Figure 44] This is an explanatory diagram of the test method for semiconductor devices according to the present invention. [Figure 45] This is an explanatory diagram of the test method for semiconductor devices according to the present invention. [Figure 46] This is an explanatory diagram of the test method for semiconductor devices according to the present invention. [Figure 47] This is an explanatory diagram of the test method for semiconductor devices according to the present invention. [Figure 48] This is an explanatory diagram of the test method for semiconductor devices according to the present invention. [Figure 49] This is an explanatory diagram of the test method for semiconductor devices according to the present invention. [Figure 50] This is an explanatory diagram of the test method for semiconductor devices according to the present invention. [Figure 51] This is an explanatory diagram of the test method for semiconductor devices according to the present invention. [Figure 52] This is an explanatory diagram of the test method for semiconductor devices according to the present invention. [Figure 53] This is an explanatory diagram of the sample placement plate in the semiconductor testing apparatus of the present invention. [Figure 54] This is an explanatory diagram of the connection substrate in the semiconductor testing apparatus of the present invention. [Figure 55] This is an explanatory diagram of a semiconductor device. [Figure 56] This is an explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 57] This is an explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 58] This is an explanatory diagram of the semiconductor device testing apparatus of the present invention. [Figure 59] This is an explanatory diagram of the semiconductor device testing apparatus of the present invention. [Figure 60] This is an explanatory diagram of the semiconductor device testing method of the present invention. [Figure 61]This is an explanatory diagram of the semiconductor device testing method of the present invention. [Figure 62] This is an explanatory diagram of the semiconductor device testing method of the present invention. [Figure 63] This is an explanatory diagram of the semiconductor device testing method of the present invention. [Figure 64] This is an explanatory diagram of the semiconductor device testing method of the present invention. [Figure 65] This is an explanatory diagram of the semiconductor device testing method of the present invention. [Figure 66] This is an explanatory diagram of the semiconductor device testing method of the present invention. [Figure 67] This is an explanatory diagram of the semiconductor device testing method of the present invention. [Figure 68] This is a structural diagram of the semiconductor device testing apparatus of the present invention. [Figure 69] This is a structural diagram of the semiconductor device testing apparatus of the present invention. [Figure 70] This is a structural diagram of the semiconductor device testing apparatus of the present invention. [Figure 71] This is a structural diagram of the semiconductor device testing apparatus of the present invention. [Figure 72] This is a structural diagram of the semiconductor device testing apparatus of the present invention. [Modes for carrying out the invention] 【0031】 The following describes a power semiconductor test apparatus, such as a power cycle test, and a test method for power semiconductor elements according to an embodiment of the present invention, with reference to the attached drawings. 【0032】 In the embodiments described in this specification, IGBTs are used as an example among power semiconductor devices. The present invention is not limited to IGBTs and can be applied to various power semiconductor devices such as SiC, MOSFETs, JFETs, and transistors. 【0033】 This invention is not limited to transistors; it can also be applied to two-terminal elements such as diodes. Furthermore, it can be applied to other power semiconductor elements such as thyristors and triacs. This invention is not limited to power semiconductor devices; it goes without saying that it can also be applied to low-power semiconductor devices and small-signal control semiconductor devices. 【0034】 This invention involves testing elements or components by applying current, voltage, etc. Therefore, the test subjects are not limited to power semiconductor elements. Needless to say, it can also be applied to power resistors, thermistors, positors, ZNRs, phototransistors, photodiodes, Schottky diodes, high-speed diodes, speakers, motors, mechanical relays, and the like. 【0035】 In the drawings illustrating embodiments for carrying out the invention, elements having the same function are denoted by the same reference numeral, and their descriptions may be omitted. Furthermore, the embodiments described herein can be combined with each other. 【0036】 Figure 1 shows an explanatory diagram and equivalent circuit diagram of the semiconductor device 117 to be tested. Figure 1(a) is an explanatory diagram schematically showing the semiconductor device 117 to be tested as viewed from the back side. Figure 1(b) is an equivalent circuit diagram of the semiconductor device. 【0037】 In Figure 1(a), a Small Outline Package (SOP) is shown as an example of the shape of a semiconductor device. Electrode terminals 226a and 226b are formed on the back surface of the SOP. In the SOP, signal terminals 227 are formed or arranged on the back surface (the side on which the electrode terminals 226 are formed) and the side surface of the package. 【0038】 A transistor is given as an example of the semiconductor element 117. The transistor 117 has a P terminal (collector terminal of the transistor 117) to which a large current is applied and an N terminal (emitter terminal of the transistor 117) to which a large current is applied. 【0039】 A plating film 524 (not shown) is formed on the electrode terminal 226. The plating film 524 is described as a Ni-P film, but a thin film of Ni or Ni-B may also be formed. The plating film 524 (not shown) can be made of any material that can bond well to the electrode pattern. Examples of materials other than nickel (Ni) include tin, silver, gold, copper, lead, zinc, or alloys thereof. 【0040】 The thickness of the plating film 524 (not shown) is preferably 1 μm or more and 20 μm or less. In particular, a thickness of 2 μm or more and 6 μm or less is preferred. It is preferable to form a gold plating film 525 (not shown) on the plating film 524. 【0041】 The plating film 524 formed on the electrode terminal 226 is made thicker than the plating film 524 formed on terminal 227. Alternatively, the plating film 524 is formed on the electrode terminal 226, but not on terminal 227. Alternatively, the plating film 524 formed on the signal terminal 227 is made thinner than the plating film 524 formed on the electrode terminal 226. 【0042】 The combined thickness of the plating film 524 (not shown) and the gold plating film 525 (not shown) is preferably 1 μm or more and 10 μm or less. In particular, it is preferable that the thickness be 2 μm or more and 6 μm or less. 【0043】 It is preferable to form a gold plating 525 (not shown) on the plating film 524. If the plating film 524 is not formed on the electrode terminal 226 or signal terminal 227, it is preferable to form a gold plating film 525 on the electrode terminal 226 or signal terminal 227. 【0044】 The thickness of the gold plating film 525 (not shown) shall be 0.01 μm or more. The gold plating film 525 (not shown) has the function of preventing or suppressing oxidation or contamination of the surface of the plating film 524. 【0045】 Figure 2 is a cross-sectional view of the semiconductor element 117 in Figure 1. Figure 2(b) is a cross-sectional view along line AA' in Figure 2(a). Figure 2(c) is a cross-sectional view along line BB' in Figure 2(a). Electrode terminals 226 are arranged on the surface of the semiconductor element 117 package, and signal line terminals are arranged on the side of the semiconductor element 117 package. 【0046】 Figure 3 is an explanatory diagram showing the connection state between the electrode terminal 226 of the semiconductor element 117 and the connection part 507, and the connection state between the signal terminal 227 and the connection pin 502 of the connector 202. 【0047】 The electrode terminal 226a and the connection part 507a are electrically connected by the connection wiring 503. The electrode terminal 226b and the connection part 507b are electrically connected by the connection wiring 503. Eight connection pins 502 are arranged inside the connector 202. 【0048】 Connection pin 502a and signal terminal 227d of semiconductor element 117 are electrically connected by signal wiring. Connection pin 502b and signal terminal 227c of semiconductor element 117 are electrically connected by signal wiring 508. Connection pin 502c and signal terminal 227b of semiconductor element 117 are electrically connected by signal wiring 508. Connection pin 502d and signal terminal 227a of semiconductor element 117 are electrically connected by signal wiring 508. Connection pin 502e and signal terminal 227h of semiconductor element 117 are electrically connected by signal wiring 508. Connection pin 502f and signal terminal 227f of semiconductor element 117 are electrically connected by signal wiring 508. Connection pin 502g and signal terminal 227g of semiconductor element 117 are electrically connected by signal wiring 508. Connection pin 502h and signal terminal 227e of semiconductor element 117 are electrically connected by signal wiring 508. 【0049】 Figure 4 shows an explanatory diagram and equivalent circuit diagram of the semiconductor element 117 to be tested. Figure 4(a) is an explanatory diagram schematically showing the semiconductor element 117 as viewed from the back. Figure 4(b) is an equivalent circuit diagram of the semiconductor element. 【0050】 In Figure 4(a), a QFN (Quad Flat No-lead package) is shown as an example of the shape of a semiconductor device. Electrode terminals 226a and 226b are formed on the back surface of the QFN. In the QFN, a signal terminal 227 is formed or located on the back surface of the package (the side on which the electrode terminals 226 are formed). 【0051】 A transistor is given as an example of the semiconductor element 117. The transistor 117 has a P terminal (collector terminal of the transistor 117) to which a large current is applied and an N terminal (emitter terminal of the transistor 117) to which a large current is applied. 【0052】 A plating film 524 (not shown) is formed on the electrode terminal 226. The plating film 524 is described as a Ni-P film, but a thin film of Ni or Ni-B may also be formed. The plating film 524 (not shown) can be made of any material that can bond well to the electrode pattern. Examples of materials other than nickel (Ni) include tin, silver, gold, copper, lead, zinc, or alloys thereof. 【0053】 The thickness of the plating film 524 (not shown) is preferably 1 μm to 20 μm. In particular, a thickness of 2 μm to 6 μm is preferred. It is preferable to form a gold plating film 525 (not shown) on the plating film 524. 【0054】 The plating film 524 formed on the electrode terminal 226 is made thicker than the plating film 524 formed on the signal terminal 227. Alternatively, the plating film 524 is formed on the electrode terminal 226, but not on the signal terminal 227. Alternatively, the plating film 524 formed on the signal terminal 227 is made thinner than the plating film 524 formed on the electrode terminal 226. 【0055】 The combined thickness of the plating film 524 (not shown) and the gold plating film 525 (not shown) is preferably 1 μm to 10 μm. In particular, a thickness of 2 μm to 6 μm is preferred. 【0056】 Furthermore, in either the SOP or QFN package configuration, it is also preferable to make the electrode terminal 226 portion higher (thicker) than the signal terminal 227 portion. An example is to make the electrode terminal 226 portion approximately 10 μm to 0.5 mm higher than the signal terminal 227 portion. 【0057】 Similar to the SOP shown in Figure 1, it is preferable to form a gold plating 525 (not shown) on the plating film 524. If the plating film 524 is not formed on the electrode terminal 226 or signal terminal 227, it is preferable to form the gold plating film 525 on the electrode terminal 226 or signal terminal 227. 【0058】 Furthermore, similar to the SOP in Figure 1, the thickness of the gold plating film 525 (not shown) shall be 0.01 μm or more. The gold plating film 525 (not shown) has the function of preventing or suppressing oxidation or contamination of the surface of the plating film 524. 【0059】 Figure 5 is a cross-sectional view of the semiconductor element 117 in Figure 4. Figure 4(b) is a cross-sectional view along line AA' in Figure 4(a). Figure 4(c) is a cross-sectional view along line BB' in Figure 4(a). Electrode terminals 226 are arranged on the surface of the semiconductor element 117 package, and signal line terminals are arranged on the side of the semiconductor element 117 package. 【0060】 In the example shown in Figure 4, as illustrated in Figure 4(b), two transistors 117 (transistor 117m and transistor 117s) are arranged or formed within the QFN. As illustrated in Figure 4(a), the electrode terminals 226a of the P terminal of transistor 117s, 226c of the O terminal of transistor 117m, and 226b of the N terminal of transistor 117m are formed or arranged on the back surface of the QFN. 【0061】 Transistor 117m has a collector terminal cm, a gate terminal gm, and an emitter terminal em. Transistor 117s has a collector terminal cs, a gate terminal gs, and an emitter terminal es. 【0062】 In the example shown in Figure 4, the semiconductor element (transistor) 117s has a diode Ds formed on it for temperature measurement. Diode Ds is formed using the same process as transistor 117. Diode Ds is used to measure the temperature information Tj of transistor 117s. Diode Ds is connected to the anode terminal as and the cathode terminal ks. The anode terminal as is the signal terminal 227a, and the cathode terminal ks is the signal terminal 227b. 【0063】 The semiconductor element (transistor) 117m has a diode Dm formed on it for temperature measurement. Diode Dm is formed using the same process as transistor 117. Diode Dm is used to measure the temperature information Tj of transistor 117m. Diode Dm is connected to the anode terminal am and the cathode terminal km. The anode terminal am is the signal terminal 227e, and the cathode terminal km is the signal terminal 227g. 【0064】 Transistor 117m has a collector terminal cm, a gate terminal gm, and an emitter terminal em. A signal Vgs is applied to the gate terminal gm to switch transistor 117 on and off. A constant current Icm is passed from the constant current circuit 118 to diode Dm at the anode terminal am and cathode terminal km. 【0065】 Transistor 117s has a collector terminal cs, a gate terminal gs, and an emitter terminal es. The gate terminal gs is short-circuited with the emitter terminal es, creating a diode connection, and the semiconductor device is tested in this state. 【0066】 Figure 5 is a cross-sectional view of the semiconductor element 117 in Figure 4. Figure 5(b) is a cross-sectional view along line AA' in Figure 4(a). Figure 5(c) is a cross-sectional view along line BB' in Figure 4(a). Electrode terminals 226 are arranged on the surface of the semiconductor element 117 package, and signal line terminals are arranged on the side of the semiconductor element 117 package. 【0067】 Figure 6 is an explanatory diagram showing the connection state between the electrode terminal 226 of the semiconductor element 117 and the connection part 507, and the connection state between the signal terminal 227 and the connection pin 502 of the connector 202. 【0068】 Electrode terminal 226a and connection part 507a are electrically connected by connection wiring 503. Electrode terminal 226b and connection part 507b are electrically connected by connection wiring 503. Electrode terminal 226c and connection part 507c are electrically connected by connection wiring 503. 【0069】 Inside the connector 202, eight connection pins 502 are arranged. Connection pin 502a is electrically connected to the signal terminal 227d of the semiconductor element 117 by a signal wire. Connection pin 502b is electrically connected to the signal terminal 227c of the semiconductor element 117 by a signal wire 508. Connection pin 502c is electrically connected to the signal terminal 227b of the semiconductor element 117 by a signal wire 508. Connection pin 502d is electrically connected to the signal terminal 227a of the semiconductor element 117 by a signal wire 508. Connection pin 502e is electrically connected to the signal terminal 227h of the semiconductor element 117 by a signal wire 508. Connection pin 502f is electrically connected to the signal terminal 227f of the semiconductor element 117 by a signal wire 508. Connection pin 502g is electrically connected to the signal terminal 227g of the semiconductor element 117 by a signal wire 508. The connection pin 502h and the signal terminal 227e of the semiconductor element 117 are electrically connected by the signal wiring 508. 【0070】 In the embodiments of the present invention, SOP and QFN are used as examples to describe the shapes of semiconductor elements, but the invention is not limited to these. Any shape is acceptable as long as it can connect the electrode terminals 226 and signal terminals 227 to the electrode patterns 505 and electrode designs 506 of the connection substrate 514 using a substantially planar connection portion such as anisotropic conductive rubber 504. For example, BGA (Ball Grid Array), COG (Chip On Glass), flip-chip bonding IC, pin grid array, etc., are also acceptable. 【0071】 Furthermore, the anisotropic conductive rubber 504 may be replaced with anisotropic conductive paste, anisotropic conductive adhesive, conductive paste, anisotropic conductive film, or conductive bonding material. Needless to say, the above points are also applicable to other embodiments. 【0072】 The P terminal is connected to electrode terminal 226a. The N terminal is connected to electrode terminal 226b. Electrode terminals 226 are formed planarly on the back surface of the SOP and QFN. A nickel (Ni) plating film is formed on the surface of electrode terminal 226 as needed. The electrode terminal 226 is electrically connected to the electrode pattern 505 of the connecting substrate 514 via the anisotropic conductive rubber 504. 【0073】 In the example shown in Figure 1, the semiconductor element (transistor) 117 has a diode Dm formed on it for temperature measurement. The diode Dm is formed using the same process as the transistor 117. The diode Dm is used to measure the temperature information Tj of the transistor 117. 【0074】 Diode Dm is connected to the anode terminal am and the cathode terminal km. The anode terminal am is signal terminal 227e, and the cathode terminal km is signal terminal 227g. 【0075】 Furthermore, the collector terminal cm of transistor 117 is connected to the signal terminal 227d, and the emitter terminal em of transistor 117 is connected to the signal terminal 227h. The gate terminal gm of transistor 117 is connected to the signal terminal 227f. The signal terminal 227 is formed or located on the side of the SOP. In addition, the back surface of the SOP is configured to allow electrical connection to the electrode pattern 506 of the connecting substrate 514. 【0076】 In the example in Figure 1, eight signal terminals 227 are located on the side of the SOP, and in the example in Figure 4, they are located on the back of the QFN. The signal terminals 227 are electrically connected to the electrode pattern 506 of the connection board 514 via anisotropic conductive rubber 504. The signal terminals 227, electrode terminals 226, and electrode patterns 505 and 506 of the connection board 514 are electrically connected simultaneously by a single sheet of anisotropic conductive rubber 504. Alternatively, only the signal terminals 227 and electrode pattern 506 are electrically connected via the anisotropic conductive rubber 504. 【0077】 An example of anisotropic conductive rubber 504 is a low-load compression type in which gold-plated metal wires are arranged at a narrow pitch on silicone rubber. An example of the metal wire diameter is 0.02 mm to 0.04 mm. An example of the thickness is 0.2 mm to 2 mm. The metal wire may be made of gold or a gold alloy. Gold-plated metal wires should preferably be of the non-magnetic type. Using a non-magnetic type allows for testing and evaluation of the semiconductor element 117 at high frequencies. 【0078】 An example of a configuration in which metal wires arranged on a sheet of silicone rubber or the like are arranged parallel to the thickness direction (perpendicular to the plane of the sheet). In particular, it is preferable to arrange the metal wires at an angle of 10° (DEG.) to 35° (DEG.) with respect to an axis perpendicular to the plane of the metal wire sheet. 【0079】 By tilting the metal wires relative to the vertical axis, the sheet gains good flexibility in the thickness direction. Furthermore, the metal wires penetrate the electrode pattern 505 and electrode terminal 226, and the electrode pattern 506 and signal terminal 227 at an angle, resulting in good electrical contact (electrical connection). High-precision contact can be achieved with low contact load. Additionally, the maintenance cycle is improved, allowing for repeated use over long periods. 【0080】 In addition to silicone rubber, butyl rubber, ethylene propylene rubber, ethylene vinyl acetate copolymer materials, epichlorohydrin rubber, acrylic rubber, etc., can also be used. 【0081】 The anisotropic conductive rubber 504 is not limited to anisotropic conductive rubber. For example, it can be replaced with anisotropic conductive film (ACF), anisotropic conductive adhesive, etc. For the sake of clarity, in this specification, 504 will be described as anisotropic conductive rubber 504. 【0082】 An anisotropic conductive film is a conductive film made by mixing fine metal particles with a thermosetting resin or thermoplastic resin and molding it into a film. In this semiconductor device, it is preferable to make the semiconductor element 117 to be tested detachable, so it is preferable to use an ACF (Acoustic Carbon Fiber) thermoplastic resin. 【0083】 The structure of the conductive particles is mainly a sphere with a diameter of 3-5 μm, consisting of a nickel layer on the inside, a gold plating layer, and an insulating layer on the outside. The ACF is placed between the electrode part and the electrode part of the component and heat-pressed using a heater or similar device. 【0084】 Anisotropic conductive adhesives can electrically connect and fix opposing electrodes in a single unit. They can also be used for materials that cannot be joined by soldering or materials that cannot withstand the high temperatures of soldering. The material of anisotropic conductive adhesive consists of an adhesive (binder) for fixing the electrodes together and conductive particles uniformly dispersed within this binder. 【0085】 The binder component must possess not only adhesive strength but also insulating properties that prevent electrical conduction between adjacent electrodes, and must be a reliable material in all aspects. As long as these basic properties are satisfied, any resin, such as synthetic rubber, thermoplastic resin, or thermosetting resin, can be used as a binder depending on the specifications. 【0086】 Examples of these conductive materials include metals (nickel or nickel-gold coated composites), metal-plated plastics or resin cores, or materials with an insulating coating that breaks down under heat or pressure. Furthermore, materials with a shape close to spherical are selected, and their particle size is chosen based on various specifications, particularly the distance between electrodes, with particle sizes ranging from a few micrometers to several tens of micrometers. 【0087】 Transistor 117 has a collector terminal cm, a gate terminal gm, and an emitter terminal em. A signal Vgs is applied to the gate terminal gm to switch transistor 117 on and off. A constant current Icm is passed from the constant current circuit 118 to diode Dm at the anode terminal am and cathode terminal km. 【0088】 Figure 7 shows an explanatory diagram and equivalent circuit diagram of the semiconductor element 117 being tested in another example. Figure 7(a) is an explanatory diagram schematically showing the semiconductor element 117 as viewed from the back. Figure 7(b) is an equivalent circuit diagram of the semiconductor element. Figure 7 shows an example of an SOP package. A transistor is given as an example of semiconductor element 117. However, as is the case with other examples, semiconductor element 117 is not limited to a transistor. 【0089】 For example, a wide variety of devices can be applied, such as the semiconductor elements, power resistors, positors, and thermistors shown in Figure 55. It goes without saying that devices with multiple elements, such as resistors and transistors, formed within a single SOP or QFN package can also be applied. 【0090】 In Figure 7(b), transistor 117 has a P terminal (collector terminal of transistor 117) to which a large current is applied and an N terminal (emitter terminal of transistor 117) to which a large current is applied. A diode Dm is formed or placed between the emitter terminal em of transistor Qm and the collector terminal cm of transistor Qm. The cathode terminal of diode Dm is connected to the collector terminal cm of transistor Qm, and the anode terminal of diode Dm is connected to the emitter terminal em of transistor Qm. 【0091】 In Figure 7(a), electrode terminals 226a and 226b are formed on the back surface of the SOP. Terminal P is connected to electrode terminal 226a. Terminal N is connected to electrode terminal 226b. Electrode terminal 226 is formed planarly on the back surface of the SOP. A nickel (Ni) plating film is formed on the surface of electrode terminal 226 as needed. In addition, gold plating is formed on the surface of electrode terminal 226 to prevent oxidation. The electrode terminal 226 is electrically connected to the electrode pattern 505 of the connecting substrate 514 via the anisotropic conductive rubber 504. 【0092】 In the example shown in Figure 7, the semiconductor element (transistor) 117 has a diode Dm formed on it for temperature measurement. The diode Dm is formed using the same process as the transistor 117. The diode Dm is used to measure the temperature information Tj of the transistor 117. 【0093】 Furthermore, the diode Dm may be a parasitic diode of a transistor. It goes without saying that obtaining temperature information Tj etc. using a parasitic diode Dm can also be applied to other embodiments of the present invention. 【0094】 The collector terminal cm of transistor 117 is connected to signal terminal 227d, and the emitter terminal em of transistor 117 is connected to signal terminal 227h. The gate terminal gm of transistor 117 is connected to signal terminal 227f. Signal terminal 227 is formed or located on the side of the QFN. Furthermore, signal terminal 227 is configured to be electrically connected to the electrode pattern 506 of the connection substrate 514 on the back surface of the QFN. 【0095】 In the example shown in Figure 7, as in the other examples, eight signal terminals 227 are arranged on the side and back of the SOP so that they can be connected to the electrode pattern 506. The signal terminals 227 are electrically connected to the electrode pattern 506 of the connection board 514 via anisotropic conductive rubber 504. The signal terminals 227, electrode terminals 226, and electrode patterns 505 and 506 of the connection board 514 are simultaneously electrically connected by a single sheet of anisotropic conductive rubber 504. 【0096】 Furthermore, it is not limited to the simultaneous electrical connection of the signal terminal 227, electrode terminal 226, and electrode patterns 505 and 506 of the connecting board 514 with a single piece of anisotropic conductive rubber 504. It goes without saying that the anisotropic conductive rubber 504 connecting the signal terminal 227 and the electrode pattern 506 of the connecting board 514 may be separate from the anisotropic conductive rubber 504 connecting the electrode terminal 226 and the electrode pattern 505 of the connecting board 514. The same applies to other embodiments of the present invention. 【0097】 Transistor 117 has a collector terminal cm, a gate terminal gm, and an emitter terminal em. A signal Vgs is applied to the gate terminal gm to switch transistor 117 on and off. The emitter terminal em and collector terminal cm are configured to allow a constant current Icm to flow from an external constant current circuit 118 to a diode Dm. 【0098】 Figure 8 is an explanatory diagram and equivalent circuit diagram of a semiconductor element 117 being tested in another example. The example in Figure 8 is configured by arranging or forming two semiconductor elements 117 of Figure 7(b) within a single QFN. As described above, it goes without saying that two or more semiconductor elements 117 may be arranged or formed within a single package such as a QFN. Multiple semiconductor elements 117 are arranged within the QFN, and signal terminals 227 and electrode terminals 226 are formed or arranged on the QFN or the like in accordance with the number of semiconductor elements 117. Figure 8(a) is a schematic diagram illustrating the semiconductor element 117 as viewed from the back. Figure 8(b) is an equivalent circuit diagram of the semiconductor element. 【0099】 In the example shown in Figure 8, as illustrated in Figure 8(b), two transistors 117 (transistor 117m and transistor 117s), as described in Figure 7(b), are arranged or formed within the QFN. 【0100】 As shown in Figure 8(a), the electrode terminals 226a of the P terminal of transistor 117s, 226c of the O terminal of transistor 117m, and 226b of the N terminal of transistor 117m are formed or arranged on the back surface of the QFN. 【0101】 Diode Ds is connected between the emitter terminal es and collector terminal cs of transistor 117s. Diode Dm is connected between the emitter terminal em and collector terminal cm of transistor 117m. 【0102】 Transistor 117m has a collector terminal cm, a gate terminal gm, and an emitter terminal em. Transistor 117s has a collector terminal cs, a gate terminal gs, and an emitter terminal es. 【0103】 In the example shown in Figure 8, the semiconductor element (transistor) 117s has a diode Ds formed on it for temperature measurement. The semiconductor element (transistor) 117m has a diode Dm formed on it for temperature measurement. 【0104】 Diodes Ds and Dm are formed using the same process as transistor 117. Diode Ds is used to measure the temperature information Tj of transistor 117s. Diode Dm is used to measure the temperature information Tj of transistor 117m. The present invention obtains the temperature information Tj of transistor 117 (transistor 117m or transistor 117s) using one of the diodes D (diode Dm or diode Ds) that is used to test transistors 117s and transistor 117m. 【0105】 Transistor 117m has a collector terminal cm, a gate terminal gm, and an emitter terminal em. The gate terminal gm is used to apply the signal Vgs, which turns transistor 117 on and off. Transistor 117s has a collector terminal cs, a gate terminal gs, and an emitter terminal es. 【0106】 When testing transistor 117m, the gate terminal gs is short-circuited to the emitter terminal es, and transistor 117s is connected in diode mode while testing transistor 117m. When testing transistor 117s, the gate terminal gm is short-circuited to the emitter terminal em, and transistor 117m is connected in diode mode while testing transistor 117s. It goes without saying that both transistors (transistor 117m and transistor 117s) may be tested simultaneously with both transistors in transistor operation mode. The same applies to other embodiments of the present invention. Figure 9 is a plan view and explanatory diagram of the sample placement plate 511 in the semiconductor testing apparatus of the present invention. 【0107】 The semiconductor element 117 to be tested is placed in the sample hole 512 of the sample placement plate 511. In this specification, the semiconductor element 117 will be described primarily using SOP-shaped packages and QFN-shaped packages as examples. 【0108】 The thickness of the sample placement plate 511 is thinner than the thickness of the semiconductor element 117 being tested. The sample placement plate is made of an insulating material. 【0109】 In Figure 9, fixing holes 510 are formed at the four corners of the sample placement plate 511. The fixing holes 510 are through holes. Two positioning holes 509 are formed in the sample placement plate 511. The positioning holes 509 are through holes. 【0110】 Figure 10 is a plan view and explanatory diagram of the connection board 514. As shown in Figure 10(a), fixing holes 510 are formed at the four corners of the connection board 514. The fixing holes 510 are through holes. Two positioning holes 509 are formed in the sample placement plate 511. The positioning holes 509 are through holes. 【0111】 Examples of materials for the heat-resistant substrate of the connecting substrate 514 include glass epoxy material, ceramic material, phenolic resin material, insulated aluminum material, polyimide film, and PET material. 【0112】 The connection board 514 has electrode patterns 505 corresponding to the electrode terminals 226 of the semiconductor element 117 to be tested, and electrode patterns 506 corresponding to the signal terminals 227 of the semiconductor element 117. A connector 202 is mounted on the connection board 514, and a control signal is applied to the terminals of the semiconductor element 117 via the connection pins 502 of the connector 202. 【0113】 A connecting portion 507 is formed or positioned on the connecting substrate 514. The basic material of the connecting portion 507 is thick copper with a nickel (Ni) plating on its surface. In addition to copper, silver, copper alloys, silver alloys, and gold alloys can also be used for the connecting portion 507. 【0114】 Figure 10(b) is a cross-sectional view of the connection substrate 514 along the CC' line in Figure 10(a). Electrode patterns 505, 506, signal wiring 508 (not shown), and connection wiring 503 (not shown) are formed on the heat-resistant substrate 526. A heat-resistant resist 523 is also formed between the electrode patterns 505 and 506. A two-component alkali-developable solder resist is exemplified; for example, the HRS-2-6 series heat-resistant / heat-dissipating resist from Yamashita Material Co., Ltd. is an example. Copper is an example of a material used for electrode patterns 505 and 506. A plating film 524 is formed on the surfaces of electrode patterns 505 and 506. The plating film 524 is exemplified by a thin film (Ni-P film) formed by Ni-P plating, and a gold plating film 525 is formed on the surface of the Ni-P film. 【0115】 The plating film 524 is described as a Ni-P film, but a thin film of Ni or Ni-B may also be formed. The plating film 524 may be made of any material that can bond well to the electrode pattern. Examples of materials other than nickel (Ni) include tin, silver, gold, copper, lead, zinc, or alloys thereof. The thickness of the plating film 524 is preferably 1 μm to 10 μm. In particular, a thickness of 2 μm to 6 μm is preferred. The thickness of the gold plating film 525 shall be 0.01 μm or more. The gold plating film 525 has the function of preventing or suppressing oxidation or contamination of the surface of the plating film 524. 【0116】 The combined thickness of the plating film 524 and the gold plating film 525 is preferably 1 μm to 10 μm. In particular, a thickness of 2 μm to 6 μm is preferred. 【0117】 Furthermore, it is preferable that the convex portion be formed with a thickness of 1 μm or more and 10 μm or less, which is the sum of the thickness of the plating film 524 and the gold plating film 525, relative to the flat surface of the heat-resistant resist 523. In particular, it is preferable that the convex portion be formed with a thickness of 2 μm or more and 6 μm or less. 【0118】 By forming a plating film 524, etc., on electrode pattern 505 and electrode pattern 506, a convex structure is created in which the electrode patterns 505, etc. protrude beyond the heat-resistant resist film 523. Consequently, the anisotropic conductive rubber 504 is deformed by the convex electrode patterns 505, etc. Due to the deformation of the anisotropic conductive rubber 504, the electrode terminal 226 and electrode pattern 505, and the signal terminal 227 and electrode pattern 506 are electrically connected effectively. 【0119】 Because large currents of several hundred amperes (A) or more flow through electrode pattern 505, the electrode area is formed to be large. Electrode pattern 506 is often used as a terminal to which the control signal of transistor 117 is applied. Therefore, large currents do not flow through it, and thus electrode pattern 506 has a relatively small area. 【0120】 By making multiple electrode patterns 506 common (by electrically connecting multiple electrode patterns 506), a large current can be applied. In this case, multiple signal terminals 227 to which the same signal is applied are formed or arranged. 【0121】 In Figure 10(b), a plating 524 of the same thickness is formed or placed on electrode pattern 505 and electrode pattern 506. In addition, a gold plating film 525 is formed on the plating film 524. 【0122】 In Figure 10(c), a plating 524 with a thicker film thickness is formed or placed on the electrode pattern 505 than on the electrode pattern 506. In other words, the plating film 524b is thicker than the plating film 524a. Furthermore, a gold plating film 525 of the same thickness is formed on the plating film 524. 【0123】 In the embodiment shown in Figure 10(c), the anisotropic conductive rubber 504 is sandwiched between the signal terminal 227 and the electrode pattern 506 to provide an electrical connection. The electrode terminal 226 and the electrode pattern 505 are directly connected in close contact to provide an electrical connection. 【0124】 Figure 10 shows an example in which the thickness of the plating film 524 was varied so that the electrode pattern 505 was more convex than the electrode pattern 506. Needless to say, in addition to varying the thickness of the plating film 525, the thickness of the electrode pattern 505 and electrode pattern 506 may also be varied so that the electrode pattern 505 is more convex than the electrode pattern 506. Figure 10 shows an embodiment in which the thickness of the connecting substrate 514 is uniform (flat). Figure 57 shows an embodiment in which the thickness of the connecting substrate 514 is varied. Figure 57(b) is a cross-sectional view taken along the CC' line in Figure 57(a). In Figure 57, the connecting substrate 514 has a placement recess 239 formed therein. 【0125】 The placement recess 239 is formed, for example, by scraping the heat-resistant resist 523 of the connecting substrate 514. Alternatively, the placement recess 239 can be formed using a molding die when forming the heat-resistant resist 523. 【0126】 An electrode pattern 506 is formed in the placement recess 239. Furthermore, as shown in Figure 57(b), the thickness of the electrode pattern 506 is thinner than the thickness of the electrode pattern 505. 【0127】 A plating film 524 is formed on electrode patterns 505 and 506, and gold plating 525 is formed on the plating film 524. In Figure 57(b), the plating film 525b and the plating film 525a are shown as having the same thickness, but as shown in Figure 10, it goes without saying that the thickness of the plating film 525b and the thickness of the plating film 525a may be different. Other points are the same as or similar to other embodiments of the present invention, so their explanation will be omitted. 【0128】 Figure 57(c) is an explanatory diagram showing the state in which semiconductor elements 117 such as SOP117 or QFN117 are attached to the electrode patterns 505 and 506 in Figures 57(a) and 57(b). 【0129】 Anisotropic conductive rubber 504a is inserted or placed in the placement recess 239. Anisotropic conductive rubber 504a is sandwiched between the signal terminal 227 and the electrode pattern 506. The electrode terminal 226 and the electrode pattern 505 are directly electrically connected. 【0130】 As explained in Figure 11, when the anisotropic conductive rubber 504a is pressed, an electrical connection is made between the signal terminal 227 and the electrode pattern 506 via the conductive wire 230. In Figure 13, a recessed area 239 is formed around the anisotropic conductive rubber 504a. 【0131】 In the embodiment shown in Figure 57, since the placement recess 239 is formed, even if the anisotropic conductive rubber 504a has thickness, it is contained within the placement recess 239, and the electrode pattern 505 and electrode terminal 226 are in close contact, enabling a tighter and better electrical connection. 【0132】 Figure 11(a) is an explanatory diagram showing the alignment of the electrode terminals 226 and electrode pattern 505 of the SOP and QFN, and the signal terminals 227 and electrode pattern 506 of the SOP and QFN, via the anisotropic conductive rubber 504. 【0133】 In the embodiment shown in Figure 11, a single anisotropic conductive rubber 504 can simultaneously electrically connect the electrode terminal 226 to the electrode pattern 505 and the signal terminal 226 to the electrode pattern 506. 【0134】 Alternatively, the first anisotropic conductive rubber 504 may be used to electrically connect the electrode terminal 226 and the electrode pattern 505, and the second anisotropic conductive rubber 504 may be used to electrically connect the signal terminal 226 and the electrode pattern 506. 【0135】 The area of ​​the electrode pattern 505a is larger than the area of ​​the electrode terminal 226a. The area of ​​the electrode pattern 505b is larger than the area of ​​the electrode terminal 226b. The area of ​​the electrode pattern 505c is larger than the area of ​​the electrode terminal 226c. 【0136】 As described above, by making the electrode area of ​​the electrode pattern 505 larger than the formation area of ​​the electrode terminal 226, alignment becomes easier, and connection with the anisotropic conductive rubber 504 also becomes easier. 【0137】 The area of ​​electrode pattern 506a is larger than the area of ​​signal terminal 227a. The area of ​​electrode pattern 506b is larger than the area of ​​signal terminal 227b. The area of ​​electrode pattern 506c is larger than the area of ​​signal terminal 227c. The area of ​​electrode pattern 506d is larger than the area of ​​signal terminal 227d. The area of ​​electrode pattern 506e is larger than the area of ​​signal terminal 227e. The area of ​​electrode pattern 506f is larger than the area of ​​signal terminal 227f. The area of ​​electrode pattern 506g is larger than the area of ​​signal terminal 227g. The area of ​​electrode pattern 506h is larger than the area of ​​signal terminal 227h. 【0138】 As described above, by making the electrode area of ​​the electrode pattern 506 larger than the formation area of ​​the signal terminal 227, alignment becomes easier, and connection with the anisotropic conductive rubber 504 also becomes easier. 【0139】 The SOP and QFN semiconductor elements 117 to be tested are placed in the sample holes 512 in the sample placement plate 511 with the electrode terminals 226 and signal terminals 227 facing upwards. Anisotropic conductive rubber 504 is placed on the electrode terminals 226 and signal terminals 227. A connection substrate 514 is placed on the anisotropic conductive rubber 504. 【0140】 It is preferable to use anisotropic conductive rubber 504 with a Shore hardness of 30 to 100. If the Shore hardness is less than 30, it will deform under pressure, and if the Shore hardness is greater than 100, the deformation under pressure will be small, resulting in poor electrical connection. 【0141】 The connection board 514 and the sample placement plate 511 are positioned by positioning pillars 518 inserted into positioning holes 509, thereby aligning the electrode terminals 226 with the electrode pattern 505 and the signal terminals 227 with the electrode pattern 506. 【0142】 By pressing downwards from the connection board 514 side, the anisotropic conductive rubber 504 deforms, and the electrode terminal 226 and electrode pattern 505, and the signal terminal 227 and electrode pattern 506 are electrically connected via the anisotropic conductive rubber 504. Figures 11(b) and 11(c) schematically illustrate the direction of the conductive wire 230. 【0143】 Anisotropic conductive rubber 504 consists of silicone rubber with gold-plated metal wires 230 arranged at a narrow pitch. The diameter of the metal wires is between 0.02 mm and 0.04 mm, and the thickness of the silicone rubber is between 0.2 mm and 2 mm. The silicone rubber becomes 10 μm or less in thickness when pressed. 【0144】 The arrangement pitch of the conductive wires 230 is exemplified as 0.05 mm to 0.4 mm. When arranging metal wires on a sheet of silicone rubber or the like, it is preferable to arrange the metal wires at an angle of 10° (DEG.) to 35° (DEG.) with respect to an axis perpendicular to the plane of the metal wire sheet. 【0145】 Figure 11(b) schematically illustrates the arrangement of the conductive wires 230 in the vertical direction relative to the paper. Figure 11(c) is a schematic diagram illustrating the arrangement direction of the conductive wires 230 within the cross-section of the anisotropic conductive rubber 504. 【0146】 By tilting the metal wire with respect to the vertical axis, the sheet gains good flexibility in the thickness direction. A non-magnetic type of gold-plated metal wire is preferable. Using a non-magnetic type allows for testing and evaluation of the semiconductor element 117 at high frequencies. 【0147】 As shown in Figure 11(b), the signal terminal 227 is rectangular in shape, and the anisotropic conductive rubber 504 is arranged such that the longitudinal direction of the conductive wire 230 substantially coincides with the longitudinal direction of the rectangular shape. 【0148】 The conductive wires 230 inside the anisotropic conductive rubber 504 are pressed into the electrode pattern 506 and the signal terminal 227, and into the electrode pattern 505 and the electrode terminal 226, thereby achieving good electrical connection. 【0149】 Figure 12 is a plan view and explanatory diagram of the connection board 514 when there are three electrode terminals 226 (electrode terminals 226a, 226b, and 226c) as shown in Figure 5. Three connection parts 507 (connection parts 507a, 507b, and 507c) are also formed or arranged. Other configurations and structures are the same as or similar to those described in Figure 10, so their explanation is omitted. 【0150】 Figure 13(a) is an explanatory diagram showing the alignment of the electrode terminals 226 and electrode pattern 505 of the SOP·QFN, and the signal terminal 227 and electrode pattern 506 of the SOP·QFN, via anisotropic conductive rubber 504, in the case of three electrode terminals 226 (electrode terminal 226a, electrode terminal 226b, electrode terminal 226c) as shown in Figure 5, etc. Figure 13(b) schematically illustrates a state in which the conductive wires 230 are arranged in the vertical direction relative to the paper surface. As shown in Figure 13(b), the anisotropic conductive rubber 504a is placed on the signal terminal 227. The anisotropic conductive rubber 504 is not placed on the electrode pattern 505. The anisotropic conductive rubber 504 is rectangular in shape, and one piece of anisotropic conductive rubber 504 covers (overlaps) multiple signal terminals 227. The conductive wires 230 within the anisotropic conductive rubber 504 are arranged oriented in the longitudinal direction of the rectangular shape of the anisotropic conductive rubber 504. 【0151】 The anisotropic conductive rubber 504 shown in Figure 13(b) expands and contracts when pressed, but because of its rectangular shape, it expands and contracts particularly easily in the longitudinal direction. Therefore, the conductive wire 230 moves easily in the longitudinal direction (orientation direction) of the conductive wire 230. This movement of the conductive wire 230 allows for good electrical connection between the signal terminal 227 and the electrode pattern 506. 【0152】 As described above, when the anisotropic conductive rubber 504 is rectangular in shape, the conductive wires 230 are arranged, oriented, or formed in the longitudinal direction of the anisotropic conductive rubber 504, as shown in Figure 13(b). Also, when the signal terminals 227 and electrode pattern 506 are rectangular in shape, the conductive wires 230 are arranged, oriented, or formed in the longitudinal direction of the signal terminals 227 and electrode pattern 506. 【0153】 Although conductive wires 230 are arranged, oriented, or formed in the longitudinal direction of the signal terminal 227 and electrode pattern 506, the direction of formation of the conductive wires 230 may be within ±45° (DEG.) of the longitudinal direction. Preferably, the direction of formation of the conductive wires 230 may be within ±20° (DEG.) of the longitudinal direction. 【0154】 Other configurations or structures are the same as or similar to those described in Figure 11, so their description is omitted. Furthermore, it goes without saying that the above matters can also be applied to other embodiments of this specification, such as the embodiment shown in Figure 57. 【0155】 Figure 14 shows a plan view and explanatory diagram of the pressing plate 515. It has good flatness and a structure or configuration that can insulate at least from the conductive part of the connecting substrate. Examples of materials for the pressing plate include copper, stainless steel, aluminum, and brass. Ceramics and phenolic resin are also examples. 【0156】 The pressing plate 515 is placed on the connecting substrate 514. By pressing down from the pressing plate 515, the connecting substrate 514 is uniformly pressed. The pressing action presses down on the anisotropic conductive rubber 504, which is positioned in close contact with the electrode patterns 505 and 506 of the connecting substrate 514. The anisotropic conductive rubber 504 electrically connects the electrode patterns 505 and the electrode terminals 226. In addition, the electrode patterns 506 and the signal terminals 227 are electrically connected. 【0157】 Fixing holes 510 are formed at the four corners of the pressing plate 515. The fixing holes 510 are through holes. Two positioning holes 509 are formed in the pressing plate 515. The positioning holes 509 are through holes. Figure 15 is an explanatory diagram of the connection state in which SOP117 or QFN117 and the connecting substrate 514 are connected by anisotropic conductive rubber 504. 【0158】 As shown in Figure 15, it is positioned on the positioning support plate 519. The positioning support plate 519 is made of a material with good thermal conductivity. Examples of materials for the positioning support plate 519 include copper, stainless steel, aluminum, brass, and ceramics. The surface plate 520, shown in Figure 16, etc., is also made of a material with good thermal conductivity, similar to the positioning support plate 519. This is to ensure good heat transfer from the heating / cooling plate 134. 【0159】 The SOP117 or QFN117 is in close contact with the positioning support plate 519. Additionally, if necessary, a thermally conductive grease is applied between the SOP117 or QFN117 and the positioning support plate 519. 【0160】 The SOP117 or QFN117 is fitted into the sample hole 512 of the sample placement plate 511. Furthermore, a variable mechanism is provided to adjust the size of the sample hole 512 to accommodate different SOP117 or QFN117 sizes, allowing for the clamping and securing of various SOP117 or QFN117s as needed. 【0161】 Anisotropic conductive rubber 504 is placed on the electrode terminals 226 and signal terminals 227 of the SOP117 or QFN117. The anisotropic conductive rubber 504 becomes electrically conductive in the vertical direction when pressed. 【0162】 The electrode patterns 505 and 506 of the connecting substrate 514 are positioned on the anisotropic conductive rubber 504. A heat-resistant resist 523 is formed or placed between the electrode terminals 226 and the signal terminals 227, etc. 【0163】 A plating film 524b is formed on electrode patterns 505 and 506, creating a convex shape of several micrometers above the surface of the heat-resistant resist 523. If the electrode patterns 505, etc., themselves are convex to the flat surface of the heat-resistant resist 523, etc., it is not necessary to create a convex shape with the plating film 524, etc. It is also preferable to create a convex shape with the plating film 524a on the signal terminals 227 and electrode terminals 226 of SOP117 or QFN117. 【0164】 As shown by the dotted line in Figure 15, the anisotropic conductive rubber 504 is pressed more firmly by the plating film 524, which electrically connects the electrode pattern 505 of the connecting substrate 514 to the electrode terminal 226, and the electrode pattern 506 to the signal terminal 227. 【0165】 In the embodiment shown in Figure 15, the electrode terminal 226 and the signal terminal 227 were electrically connected to the electrode pattern 505 or electrode pattern 506 using a common (single) anisotropic conductive rubber 504. 【0166】 However, the present invention is not limited thereto, and the electrode pattern 505 and the electrode terminal 226 may be electrically connected with the first anisotropic conductive rubber 504, and the electrode pattern 506 and the signal terminal 227 may be electrically connected with the second anisotropic conductive rubber 504. In the above cases as well, the matters described in Figures 11 and 13 are carried out. Figure 56 is an explanatory diagram showing the semiconductor element 117 connected to the connecting substrate 514. Basically, the state shown in Figure 15 applies. In Figure 56, an anisotropic conductive rubber 504a is placed between the electrode pattern 506 of the connecting substrate 514 and the signal terminal 227. 【0167】 A plating film 524 is formed on electrode patterns 505 and 506, and gold plating 525 is formed on the plating film 524. In Figure 56, the plating film 524 on electrode pattern 505 is formed to be thicker than the plating film 524a on electrode pattern 506. 【0168】 In Figure 56, because the plating film 524b is formed thickly, even with the thickness of the anisotropic conductive rubber 504, the electrode pattern 505 and the electrode terminal 226 are brought into close contact by pressure, resulting in a good electrical connection. 【0169】 An anisotropic conductive rubber 504 is sandwiched between the signal terminal 227 and the electrode pattern 506. The electrode terminal 226 and the electrode pattern 505 are directly electrically connected. As explained in Figure 13, the anisotropic conductive rubber 504 is pressed, and the conductive wire 230 electrically connects the signal terminal 227 and the electrode pattern 506. 【0170】 In the embodiment shown in Figure 56, even if the anisotropic conductive rubber 504 has thickness, the electrode pattern 505 and the electrode terminal 226 are in close contact, enabling a tighter and better electrical connection. It goes without saying that the configuration or structure of the arrangement recess 239 in Figure 57 can also be applied to Figure 56. 【0171】 Figures 16 and 17 are explanatory diagrams illustrating the mounting portion of the semiconductor element 117 to be tested in the semiconductor testing apparatus of the present invention. Figure 16(a) is a schematic explanatory diagram showing the mounting portion as viewed from above. Figure 16(b) is a cross-sectional view taken along line AA' in Figure 16(a). 【0172】 Figure 17 shows that a thick plating film 524 is formed on the electrode pattern 505. An anisotropic conductive rubber 504a is placed between the signal terminal 227 and the electrode pattern 506. The electrode pattern 505 and the electrode terminal 226 are in close contact, and an electrical connection is made by pressing them together. 【0173】 Two support columns 518 (column 518a and column 518b) are attached to the positioning support column plate 519. Column 518a is inserted into the positioning hole 509a of the sample placement plate 511, the positioning hole 509a of the connection substrate 514, and the positioning hole 509a of the pressing plate 515. Column 518b is inserted into the positioning hole 509b of the sample placement plate 511, the positioning hole 509b of the connection substrate 514, and the positioning hole 509b of the pressing plate 515. 【0174】 SOP117 and QFN117 are inserted into sample holes 512. By inserting the support column 518 into the positioning hole, the electrode pattern of the connection board 514 and the electrode terminals 226 and signal terminals 227 of the QFN are positioned. Pressing is applied from the pressing plate 515 side in direction B. Figure 18 is an explanatory diagram illustrating a method for attaching a test semiconductor element 117 to the semiconductor testing apparatus of the present invention. As shown in Figure 18(a), the sample placement plate 511 has sample holes 512, positioning holes 509, and fixing holes 510. 【0175】 As shown in Figure 18(b), the semiconductor element 117 is placed in the sample hole 512 of the sample placement plate 511. The QFN or SOP semiconductor element 117 is placed with its electrode terminals 226 facing upwards. Anisotropic conductive rubber 504 is placed on the electrode terminals 226. 【0176】 As shown in Figure 18(c), the connection substrate 514 is placed on the anisotropic conductive rubber 504. The connection portion 507 of the connection substrate 514 is positioned so that a current power supply can be connected to it. 【0177】 Next, as shown in Figure 18(d), the pressing plate 515 is placed on the connecting substrate 514. The sample placement plate 511, the connecting substrate 514, and the pressing plate 515 are positioned by positioning supports 518 inserted into positioning holes 509. 【0178】 Next, as shown in Figure 18(e), a fixing post (not shown) is inserted into the fixing hole 510, and a pressing device 516 is attached to the fixing post to press the anisotropic conductive rubber 504. 【0179】 Figure 9 shows a case where there is one sample hole 512 on the sample placement plate 511, but the present invention is not limited to this. Figure 19 shows an embodiment in which two semiconductor elements 117 are connected and a test is performed in the connected state. In the embodiment of Figure 9(b), two semiconductor elements 117 from Figure 1 are connected. The electrode terminal 226b of semiconductor element 117s and the electrode terminal 226a of semiconductor element 117m are connected by a connecting wire 503. The connecting wire 503 is formed on the connecting substrate 514. Other configurations are described in other embodiments in the specification, so their description is omitted here. 【0180】 In the embodiment shown in Figure 19, as shown in the sample placement plate 511 in Figure 20, sample holes 512a for semiconductor element 117s and sample holes 512b for semiconductor element 117m are formed on the sample placement plate 511. The present invention allows for testing of multiple semiconductor elements 117 by appropriately adjusting the number of sample holes 512 formed on the sample placement plate 511. 【0181】 Figure 27 is a diagram showing the configuration of the power cycle test apparatus (semiconductor test apparatus) of the present invention. The power cycle test apparatus has a chiller (cooling / heating device) 136, a heating / cooling plate 134, and a circulating water pipe 135 that circulates water between the heating / cooling plate 134 and the chiller 136. A transistor 117, which is the semiconductor element to be tested, is mounted on the heating / cooling plate 134. In practice, in order to accommodate the shapes of a wide variety of semiconductor elements 117, a surface plate 520 is attached to the heating / cooling plate 134, a positioning support plate 519 is attached to the surface plate 520, and the semiconductor element 117 is placed on the positioning support plate 519. 【0182】 The device fixing and connection device 610 includes a heating and cooling plate 134 and a circulating water pipe 135 that circulates water between the heating and cooling plate 134 and the chiller 136. A transistor 117, which is the semiconductor element to be tested, is mounted on the heating and cooling plate 134, and a sample connection circuit 203 (not shown) is configured or arranged therein. Heat from the heating / cooling plate 134 is transferred to the semiconductor element 117 via the surface plate 520 and the positioning support plate 519. 【0183】 The heat from the heating / cooling plate 134 is used to set the test conditions by changing the current Id, gate voltage Vgs, and voltage Vce so that the temperature information Tj of the transistor 117 under test reaches a predetermined value. 【0184】 When the temperature information Tj changes, it is determined that transistor 117 has deteriorated or its characteristics have changed, and the test of transistor 117 is stopped or the control method is changed. 【0185】 The current flowing through or applied to transistor 117 will be described as a constant current Id, but the present invention is not limited to this. It goes without saying that Id may be a current that changes with a predetermined period or time. Furthermore, it is not limited to current, but may also be voltage. 【0186】 The change in temperature information Tj determines or detects the change in the characteristics of transistor 117. In addition, the change in characteristics, reliability, and lifespan of transistor 117 are evaluated from the time it takes for the voltage Vce to reach a predetermined voltage, the time until transistor 117 fails, etc. 【0187】 In the semiconductor testing method of the present invention, external conditions are changed in accordance with the degradation or characteristic change of transistor 117. For example, if transistor 117 generates heat, the water temperature is lowered. Lowering the water temperature reduces the current flowing through transistor 117, which prevents the degradation and characteristic change of transistor 117 from progressing, and as a result, extends the lifespan of transistor 117. Therefore, the lifespan and reliability characteristics of transistor 117 under predetermined set conditions can be quantitatively measured and judged. 【0188】 The temperature of the transistor 117 is maintained at a specified or predetermined value by heating or cooling the circulating water in the chiller 136. Furthermore, the temperature of the transistor and other components is periodically changed, cooled, or heated in accordance with the test conditions. The temperature information Tj of the test transistor is also measured, and the chiller 136 is controlled to maintain the measured temperature information Tj at a constant value. 【0189】 A chiller is designed to maintain a constant temperature for equipment by circulating water or a heat transfer medium while controlling its temperature. While primarily used for cooling, it can also heat. It is configured to allow for various temperature control applications. 【0190】 The control rack 131 includes a power supply unit 132 that supplies test current and test voltage to the transistor 117, and a control circuit 133 that controls the transistor 117 or sets test conditions. 【0191】 The control circuit 133 receives temperature information Tj from the transistor 117 and controls the chiller 136 based on the temperature information Tj. Alternatively, it controls the chiller 136 to bring the temperature information Tj to a predetermined value. 【0192】 In this specification, the circulating water is used, but it is not limited to water. It may also be ethylene glycol, glycerin, Freon, etc., or forced air cooling may be used. The chiller 136 supplies the liquid in the circulating water pipe 135 to the heating and cooling plate 134 of the test unit, controlling the temperature within a range, for example, from -1°C to +100°C. The heating and cooling plate 134 has a sufficiently large heat capacity. 【0193】 In the above embodiment, a heating and cooling plate 134 was used, but the heating plate and the cooling plate may be separate components, and heating and cooling may be performed using heat sources and cold sources other than the heating and cooling plate. 【0194】 Figure 68 shows a voltage and current application jig (device) for a double-sided cooled sample (power semiconductor device). By using a double-sided cooled structure for semiconductor devices, it becomes possible to apply large currents. 【0195】 Figures 38 and 43 show the heat pipe 223 positioned on the back surface of the connecting structure 218. The present invention is not limited to this, and as shown in Figures 68 and 69, the heat pipe 223 may be positioned on the side surface of the connecting structure 218, and the side surface of the connecting structure 218 may be pressed and fixed from above with a pressing member 608. Voltage and current application fixtures (devices) suppress heat generation in contacts and wiring, and can reproduce test conditions according to the purpose. 【0196】 In Figure 68, the test current and control signals are supplied from the device fixing and connection device 610. The test current is applied to the connection structure 218. A terminal connection portion 609 for connecting to the connection terminal of a power semiconductor element is located at one end of the connection structure 218. A heat pipe 223 is located on the connection structure 218. A cooling fan 229 is located at the bottom or top of the connection structure 218. The airflow generated by the cooling fan 229 passes between the connection structure 218, the heat pipe 223, and the retaining member 608, suppressing temperature rise in the connection portion with the device 117, contacts, connection structure 218, etc. Within the device fixing / connection device 610, there is a connection structure 218 【0197】 As shown in Figures 27, 28, and 29, the device fixing and connection device 610 contains a heating and cooling plate 134, a semiconductor element 117 to be tested, a device for fixing or holding the semiconductor element 117 having a pressing head 530, a sample connection circuit 203, and the like. The cover of the device fixing and connection device 610 is made of a structure that can provide electrostatic and electromagnetic shielding, and the cover is grounded. 【0198】 The heat pipe 223 is in close contact with the connecting structure 218. Thermal conductive grease or heat dissipation silicone oil compound may be applied between the surface of the connecting structure 218 and the heat pipe 223. 【0199】 Although the material of the connecting structure 218 is described as copper, it is not limited to copper. Examples of materials for the connecting structure 218 include copper (coefficient of thermal expansion 16.8), brass (coefficient of thermal expansion 19), iron (coefficient of thermal expansion 12.1), and stainless steel (SUS304) (coefficient of thermal expansion 17.3). 【0200】 Examples of materials for the heat pipe 223 include materials with a high coefficient of thermal expansion, such as aluminum (coefficient of thermal expansion 23), tin (coefficient of thermal expansion 26.9), and lead (coefficient of thermal expansion 29.1). In particular, it is preferable to use copper (coefficient of thermal expansion 16.8) as the material for the connecting structure 218 and aluminum (coefficient of thermal expansion 23) as the material for the heat pipe. Alternatively, an alloy of aluminum with a second metal such as molybdenum may be used. 【0201】 Figure 69 is a perspective view of the side of Figure 68, viewed from the opposite direction. A circulating water pipe 135 for supplying or discharging circulating water is installed inside the device fixing / connecting device 610. The cooling fan 229 may be placed on the top of the connection structure 218, on the side, or in two or more directions such as top, bottom, left, or right. 【0202】 A retaining member 608 is attached to the support column 534 to fix and hold the connecting structure 218. The retaining member 608 can also be moved up and down on the support column 534, and can be held with a predetermined pressure. 【0203】 Figures 70, 71, and 72 show the apparatus used for high heat dissipation general-purpose semiconductor devices (TO packages, etc.) in the semiconductor device testing apparatus of the present invention. It is used when the power semiconductor device is in a TO-247 package. A current application circuit and an on / off pulse driver circuit applied to the gate terminal of the transistor are mounted or formed on the connection board 514. 【0204】 The connection board 514 can be custom-designed to match the semiconductor device being tested, and can accommodate various device shapes. For example, it can accommodate the chip shapes or structures of various semiconductor elements 117 as described in Figures 2, 5, 7, and 58. 【0205】 In Figure 72, a heating and cooling plate 134b is positioned below the positioning support plate 519a. The power semiconductor device 117 to be tested is placed on the positioning support plate 519a. The connection terminals of the power semiconductor device and the electrodes of the connection substrate 514 are electrically connected. A gate signal and test current from the connection substrate 514 are applied to the power semiconductor device 117. The device stand 611 is a stand on which semiconductor device elements 117 are placed, and is made of a resin material that suppresses static electricity, and has flexibility and spring properties. 【0206】 The pressing pillars 531 are positioned so that the connection terminals of the power semiconductor device 117 and the connection substrate 514 are in close contact, and by pressing, the connection terminals of the power semiconductor device and the connection substrate 514 are electrically connected properly. If the semiconductor element 117 has the configuration shown in Figures 2 and 5, the connection substrate 514 may have the configuration shown in Figures 10, 12, 54, and 57, and the electrode pattern 506 and signal terminal 227 may be connected using anisotropic conductive rubber 504. 【0207】 The positioning support plate 519b is placed on the upper surface of the power semiconductor device 117 to fix the power semiconductor device in place. The heating / cooling plate 134a cools or heats the power semiconductor device from the upper surface of the power semiconductor device 117. 【0208】 Figures 70 and 71 are configuration diagrams and explanatory diagrams for the mounting of the device element 117, respectively, of a jig for surface mount components used in the semiconductor element testing apparatus of the present invention. It can also accommodate surface mount devices such as QFN packages and SOP packages. 【0209】 A surface plate 520 made of a metal material with good thermal conductivity is placed on the heating / cooling plate 134b. A positioning support plate 519 is placed on the surface plate 520. The semiconductor element 117 is placed on the connection substrate 514 and also on the device stand 611. The connection terminals of the semiconductor element 117 are pressed by an insulating pressing plate 513, and the connection terminals of the conductive element 117 are connected to the electrodes of the connection substrate 514. The electrodes formed on the connecting substrate 514 are connected. The positioning support plate 519 presses and fixes the connecting substrate 514 so that it is flat. Figure 22 is an explanatory diagram of the semiconductor testing apparatus of the present invention. A heating and cooling plate 134 is placed on a base 522. The base 522 is exemplified by a vibration-damping surface plate. 【0210】 Figures 23 to 25 are explanatory diagrams illustrating the testing method for semiconductor elements 117, primarily when attached to an SOP117 or QFN117, using the semiconductor testing apparatus of the present invention. It goes without saying that this method can also be applied to semiconductor chips such as those shown in Figure 58. 【0211】 A surface plate 520 is attached to the base 522. The surface plate 520 is the plate to which the positioning support plate 519 is attached. By changing the surface plate 520, the positioning support plate 519 can be easily changed. 【0212】 The positioning support plate 519 needs to be modified to correspond to the shape of the sample placement plate 511 and the position of the positioning holes 509. In addition, the size and position of the sample holes 512 on the sample placement plate 511 are modified to correspond to the shapes of SOP117 and QFN117. 【0213】 As shown in Figure 23, the positioning support column 518 of the positioning support column plate 519 is inserted into the positioning hole 509 of the sample placement plate 511, thereby fixing the sample placement plate 511 in place. 【0214】 The thickness of the sample placement plate 511 is thinner than that of the SOP117 and QFN117. The SOP117 and QFN117 are positioned with the electrode terminals 226 of the sample hole 512 facing upwards. 【0215】 The positioning support plate 519 is made of a base material made of a metal material with good heat conductivity. Examples include copper, stainless steel, and aluminum. The surface of the positioning support plate 519 is plated with nickel (Ni) or silver (Ag). 【0216】 An anisotropic conductive rubber 504 (not shown) is placed on the electrode terminals 226 of SOP117 and QFN117. The anisotropic conductive rubber 504 is rectangular, and its area is the same as, or slightly larger than, the area including the area of ​​the electrode terminals 226 and signal terminals 227. The sample placement plate 511 is countersunk, and the anisotropic conductive rubber 504 is configured to fit precisely into the countersunk area. 【0217】 As shown in Figure 24, the connection substrate 514 is placed on the anisotropic conductive rubber 504. The electrode pattern 505 of the connection substrate 514 is arranged to correspond to the electrode terminals 226 of the SOP117 and QFN117, and the electrode pattern 506 of the connection substrate 514 is arranged to correspond to the signal terminals 227 of the SOP117 and QFN117. 【0218】 The support column 534 is attached to the base 522. An arm base 533 is attached to the support column 534. An arm 532 is attached to the arm base 533. The arm 532 is configured to be rotatable on its central axis. The length of the arm 532 is set and configured so that the position of the pressing head 530 is above the anisotropic conductive rubber 504, as shown in Figure 21. 【0219】 It goes without saying that the matters described above can also be applied to the apparatus of the present invention shown in Figures 68 and 72. Furthermore, it goes without saying that the configurations, components, structures, and operations of Figures 25, 68, and 72 can be applied in whole or in part to each other. 【0220】 A pressing column 531 is attached to the pressing head 530, and the arm 532 is attached to the pressing column 531. By sliding the pressing column 531, the position of the pressing head 530 moves up and down. The pressure on the anisotropic conductive rubber 504 is adjusted or set by moving the position of the pressing head 530 up and down. 【0221】 A rubber 517 is attached to the pressing head 530. The rubber 517 can be any elastic material or elastic object. By using an elastic material, the anisotropic conductive rubber 504 can be pressed uniformly and evenly. 【0222】 Examples of elastic materials or elastic objects include sponges, sea sponges, flexible plastics, air packs, liquid packs, gel packs, rubber metal, metal or resin springs, and leaf springs. 【0223】 As an example, pressure is applied using a pressure motor. Pressure motors are fluid machines that convert liquid pressure into mechanical motion. Among these, prime movers and actuators convert liquid pressure into rotational motion. Pressure cylinders convert liquid pressure into linear motion. 【0224】 A pump converts rotational energy into pressure energy. A pressure motor converts pressure energy into rotational energy, so its basic structure is similar to that of a pump. Unlike electric motors, it can operate stably even in high-temperature environments. Furthermore, even if the power source stops, it can continue to operate by storing pressure in an accumulator or similar device. A pressure sensor is installed to detect the pressure. 【0225】 Figure 25 illustrates how pressure is applied to the anisotropic conductive rubber 504 from the connecting substrate 514 using a pressing head 530. However, the connecting substrate 514 is often made of glass epoxy material or the like, and the connecting substrate 514 is thin and easily deformed when pressed. 【0226】 For this countermeasure, a pressing plate 515 shown in FIG. 14 is arranged on the connection substrate 514. The pressing plate 515 is composed of a material and thickness that have good thermal conductivity like a metal material, are smooth, and are difficult to bend. By applying pressure from above the pressing plate 515 with the pressing head 530, the anisotropic conductive rubber 504 can be uniformly pressured at a constant pressure. 【0227】 FIG. 21 is an explanatory diagram showing a state where pressure is applied to the anisotropic conductive rubber 504 using the pressing head 530. FIG. 21 shows a case where pressure is applied from above the connection substrate 514 via the rubber 517. The pressure is indicated by an arrow. 【0228】 Among the electrode patterns (electrode pattern 505, electrode pattern 506) and the plating film 524, at least one of them is convex with respect to the flat portion composed of the heat-resistant resist 523 or the like. Therefore, the convex portion is pressed by the anisotropic conductive rubber 504, and the electrode pattern 505 and the electrode terminal 226, and the electrode pattern 506 and the signal terminal 227 are electrically connected via the anisotropic conductive rubber 504. 【0229】 For the electrical connection state, a monitor terminal (not shown) for measuring the resistance between the electrode pattern 505 and the electrode terminal 226, and between the electrode pattern 506 and the signal terminal 227 is provided on the connection substrate 514. Press with the pressing head 530, monitor the resistance value of the monitor terminal, and when the resistance value becomes below a predetermined resistance value, maintain the pressing of the pressing head 530 as the connection is completed. 【0230】 FIG. 22 shows a case where pressure is applied by the pressing head 530 supported by the one-way arm 532 attached to the arm base 533. In this case, the pressing head 530 may be inclined. 【0231】 For this countermeasure, as shown in FIG. 26, an arm 532 is provided between the support columns 534a and 534b. That is, the support columns 534a, 534b, and the arm 532 are configured in a "gate" shape. 【0232】 The arm 532 is supported by the left and right columns (column 534a and column 534b). Therefore, the pressing column 531 that moves the pressing head 530 can be stably maintained. Since the anisotropic conductive rubber 504 can be uniformly pressed, a good electrical connection can be realized. 【0233】 FIG. 28 is a configuration diagram of a semiconductor test apparatus of the present invention (for example, a power cycle test apparatus for testing a power transistor). FIG. 44 is an equivalent circuit diagram or an explanatory diagram of the semiconductor test apparatus. 【0234】 The current power supply device 121 outputs a constant current Id with a large current for testing the transistor 117. The current power supply device 121 supplies power (current, voltage) in synchronization with a control signal from the control circuit board 111, and drives the load at a set constant current or constant voltage using the supplied power. The current power supply device 121 can set the maximum voltage value to be output. The current power supply device 121 constantly outputs at least one of current and voltage. 【0235】 The switch circuit 122a (SWa) turns on (supplies) or off (cuts off) the supply of the constant current output by the current power supply device 121. The switch circuit 122a is set or controlled to be on (output a constant current) or off (cut off a constant current) based on a signal from the control circuit board 111. Usually, the switch circuit 122a is turned on before the start of the test and is constantly maintained in the on state during the test of the semiconductor element. 【0236】 In FIG. 28, one current power supply device 121 is shown. The current power supply device 121 is not limited to one. For example, in the semiconductor test apparatus of the present invention, two or more current power supply devices 121 may be provided. The more the number of current power supply devices 121 increases, the more various current waveforms Id or voltage waveforms can be generated. 【0237】 In the embodiments of the present invention, the current power supply 121 is described, but the current power supply 121 is not limited to one that outputs a constant current. For example, a current power supply 121 that can set a maximum voltage can be used. An example is to configure it to output a predetermined constant current at a set maximum voltage under certain conditions. Another example is to configure it so that the output terminal voltage can be set to a predetermined maximum voltage when outputting a constant current. Needless to say, in the semiconductor test apparatus of the present invention, the current power supply 121 may not be a device that outputs only a constant current, but may be a power supply device that can output voltage and current. 【0238】 In the embodiments shown in Figure 28, etc., the current Id is described as being generated by the current power supply 121. However, the current Id can also be achieved by adjusting the applied voltage according to the on-resistance state of the transistor 117. Therefore, it goes without saying that the semiconductor testing apparatus of the present invention is not limited to the current power supply 121 that outputs current, but may also be configured with a voltage output power supply. 【0239】 The current Id can also be achieved by controlling the voltage value of the gate voltage of transistor 117. In this specification, it is described that a predetermined current is applied to transistor 117 by controlling the current power supply 121. However, this is not the only way, and it goes without saying that the voltage at the gate terminal g of transistor 117 and the voltage at the collector terminal c of transistor 117 may also be adjusted or controlled. 【0240】 In the embodiment of the semiconductor device testing method of the present invention, for the sake of ease of explanation, it is assumed that the constant current Id is generated by the current power supply 121. The constant current Id that flows through the transistor 117 is supplied by operating the current power supply 121. The current power supply 121 is turned on / off by a signal from the control circuit board 111. The device control circuit board 209 is timing-controlled by the control circuit board 111. 【0241】 The emitter terminal e of transistor 117 is grounded (connected to the ground line). The gate terminal g of transistor 117 is connected to the gate driver circuit 113. 【0242】 The sample connection circuit 203 contains or has a gate driver circuit 113, a variable resistor circuit 125, a constant current circuit 118, and an operational amplifier (buffer circuit) 116. The sample connection circuit 203 is positioned separately from the device control circuit board 209 so that it can be placed close to the transistor 117 to be tested. 【0243】 It is preferable to provide one sample connection circuit 203 for each transistor 117 to be tested, but it is not limited to this, and one sample connection circuit 203 containing multiple signal circuits may be provided for multiple transistors 117. 【0244】 The sample connection circuit 203 is connected to transistor 117 via connection pin 206 of connector 202. The distance between the gate driver circuit 113 and the gate terminal g of transistor 117 is short, less than 30 mm. If the distance between the gate driver circuit 113 and the gate terminal g of transistor 117 is long, noise and other interference will be superimposed on the gate terminal g, causing transistor 117 to malfunction and directly leading to its destruction. 【0245】 As shown in Figure 29, the device control circuit board 209 is located in chamber B of the semiconductor test apparatus housing 210. The housing 210 is a frame or main body of the semiconductor test apparatus, incorporating the power supply unit 132, drive circuit, and heating / cooling plate 134. The sample connection circuit 203 is located in chamber C1 of the semiconductor test apparatus housing 210 in order to be close to the transistor 117 to be tested. The sample connection circuit 203 is connected to a connector 208 located on the side of the housing 210. The wiring connected to the connection pin 206 of the connector 208 is connected to the device control circuit board 209 in chamber B. 【0246】 The enclosure 210 is not limited to a box shape; it could be, for example, a room. The image shows the power supply unit 121 being placed inside the room. Partition walls 214, 215, and 217 could be the walls of the room. 【0247】 As shown in Figure 29, the semiconductor element 117 (transistor, etc.) to be tested is placed in the C1 chamber. The transistor 117, etc., is placed and fixed on the heating and cooling plate 134. 【0248】 The device fixing and connection device 610 includes a heating and cooling plate 134 and a circulating water pipe 135 that circulates water between the heating and cooling plate 134 and the chiller 136. A transistor 117, which is the semiconductor element to be tested, is mounted on the heating and cooling plate 134, and a sample connection circuit 203 (not shown) is configured or arranged therein. 【0249】 In Figure 29, for the sake of illustration and ease of understanding, SOP117, QFN117, etc. are shown as being placed and fixed on the heating / cooling plate 134. In reality, as shown in Figure 16(b), a surface plate 520 with good thermal conductivity and a positioning support plate 519 are placed on the heating / cooling plate 134, and SOP117 and QFN117 are placed on the support plate 519. The same applies to Figures 27, 29, 30, 36, 38, 39, 43, etc. 【0250】 As shown in Figure 29, the connector 208 is located on the side of the housing 210, and the connector 208 is connected to the device control circuit board 209 located in chamber B by signal wiring 235. Control signals or output signals from the gate driver circuit 113, gate signal control circuit 112, temperature measurement circuit 115, variable resistor circuit 125, and operational amplifier circuit 116 are input and output from the device control circuit board 209. 【0251】 As necessary, as shown in FIG. 36, the transistor 117 and the like are sandwiched and fixed between the heating and cooling plate 134a and the heating and cooling plate 134b. As described above, in the present invention, the housing 210 is divided into a plurality of regions such as the C1 chamber. The C1 chamber is configured to be injected with dry air (dry gas, gas with a low dew point temperature). The C1 chamber is pressurized with air pressure, and the air injected into the C1 chamber is discharged through the opening 216 and the like. 【0252】 The connection structure 218 is inserted from the opening 216 of the partition wall 217 from the C2 chamber. By inserting the connection structure 218, the connection portion 507 of the transistor 117 and the connection structure 218 are electrically connected, and a constant current (test current) Id can be applied to the transistor 117. The connection structure 218 is formed of copper or a copper alloy, and the surface is plated with silver or nickel. 【0253】 The partition wall 217 has functions as an electrostatic shield and for holding the connection structure 218. Needless to say, when separately arranging or configuring an electrostatic shield functional component and a fixing or holding base for the connection structure 218, the partition wall 217 can be omitted. Also, when there is no partition wall 217, it is needless to say that the connection portion 507 of the transistor 117 may be positioned and fixed to the connection structure 218. 【0254】 The partition walls (partition walls 214, 215, 217) have functions of separating each chamber (C1 chamber, C2 chamber, A chamber, B chamber) and preventing outside air from flowing in. In particular, since the C1 chamber may experience dew condensation during a low-temperature test, dry air with a dew point of -20°C or lower is allowed to flow into the C1 chamber. The dry air that has flowed into the C1 chamber is discharged from the opening 216 to other chambers. However, if the opening of the opening 216 is large, a large amount of dry air is required. Therefore, the opening 216 is preferably sized such that the fork plug 205 as a connection member and the connection structure 218 can be inserted exactly. 【0255】 As shown in Figure 30, a fixing screw 221 is attached to the other end of the connecting structure 218, and the connecting wiring 211 is connected to the connecting structure 218. A fork plug 205, as shown in Figure 31, etc., is attached to the other end of the connecting wiring 211 as a connecting member. 【0256】 Figures 30, 38, and 43 show the arrangement of a retaining member 608 that secures the connecting structure 218. The retaining member 608 secures the connecting structure 218, and the terminal connection portion 609, consisting of connecting fittings 232 and 233, is stably fitted with the connection portion 507 of the device 117 to be tested. When separating the device 117 from the connecting structure 218, the retaining member 608 is removed first. 【0257】 The fixing screws 221 of the connecting structure 218 are not limited to screws; any type of screw that can electrically connect the connecting wiring 211 to the connecting structure 218 is acceptable. Furthermore, it goes without saying that the fixing screws 221 may also be made contact by pressure from a spring (not shown). 【0258】 The sample connection circuit 203 is connected to the device control circuit board 209 by the connection pins 206 of the connector 208. Each sample connection circuit 203 is individually positioned to correspond to each transistor 117 to be tested, and the sample connection circuits 203 are configured to be easily removable. Connectors 208 and 213 are not limited to connectors; any device that can electrically connect or disconnect wiring may be used. 【0259】 Figure 35 is an explanatory diagram of the connection structure 218 in the semiconductor testing apparatus of the present invention. A heat pipe 223 is in close contact with the recess 234 on the surface of the connection structure 218. Thermal conductive grease or heat dissipation silicone oil compound may be applied between the surface of the connection structure 218 and the heat pipe. 【0260】 The recess 234 is formed in the heat pipe fitting 231. The heat pipe 223 is positioned so as to fit into the recess 234. Positioning the heat pipe 223 in the recess reduces the risk of damage to the heat pipe 223. 【0261】 The heat pipe fitting 231 is made of a metal that is electrically conductive and has good thermal conductivity. Examples of such metals include copper and silver. Other materials such as carbon can also be used. 【0262】 For thermal conductive grease, it is preferable to use one that contains boron nitride. For heat dissipation silicone oil compound, it is preferable to use one that uses silicone oil as a base oil and is blended with a powder with good thermal conductivity such as alumina. A heat pipe 223 is a sealed container in which a small amount of liquid (working fluid) is vacuum-sealed, and which has a capillary structure (wick) on its inner wall. 【0263】 When a portion of the heat pipe is heated, the working fluid evaporates in the heated section (absorbing latent heat of vaporization), and the vapor moves at high speed (sonic speed) to the cooler section. The vapor condenses in the cooler section (releasing latent heat of vaporization), and the condensed working fluid recirculates to the heated section through the capillary action of the wick. As these phase changes are continuously repeated without external force, heat is transferred instantaneously, enabling high-speed and efficient heat transfer from the terminal portion of the semiconductor element. 【0264】 The heat pipe 223 is constructed by arranging multiple containers (copper pipes). The inside of each container is under a highly reduced pressure and contains a wick (capillary structure) and an appropriate amount of working fluid (pure water, etc.). In addition to pure water, methanol (methyl alcohol), acetone, sodium, mercury, fluorocarbon refrigerants, and ammonia may be used as the working fluid. Wick materials include aluminum, copper, stainless steel, sintered alloys, wire mesh, foamed metal, and ceramics. 【0265】 The connecting structure 218 is not limited to metal. For example, it may be made of non-metallic materials such as ceramic, graphite, or composite materials of graphite and copper or aluminum. In the case where current is directly passed through the connecting structure 218, the connecting structure 218 is made of a metallic material such as copper. The surface of the connecting structure 218 is preferably plated with silver, nickel, or the like. Figure 35 is an explanatory diagram of the configuration of the connecting structure 218. Figure 35(a) is a schematic diagram showing the back surface, and Figure 35(b) is a schematic diagram showing the side surface. 【0266】 The connection structure 218 mainly consists of a heat pipe fitting 231, a connecting fitting 232, and a connecting fitting 233. Connecting fittings 232 and 233, etc., constitute the terminal connection portion 609. The connection portion 507 of the semiconductor element is inserted into the terminal connection portion 609. 【0267】 Contact portions 225a and 225b are positioned between the connecting fittings 232 and 233. Platinum, gold, silver, tungsten, copper, nickel, or alloys combining these materials can be used as the contact portion 225. It is also preferable to use silver oxide contact materials (Ag+ZnO, Ag+SnO2, Ag+SnO2In2O3, Ag+, Ag+SnO2Sn2Bi2O7). 【0268】 The connector 233 is fixed to the heat pipe connector 231 with fixing screw 224a. The connector 232 is fixed to the connector 233 with fixing screw 224b. The connection portion 507 of the semiconductor element is fixed by tightening the fixing screw 224b. The connection wiring 211 is fixed to the left end of the heat pipe connector 231 with fixing screw 221. 【0269】 Figure 36 is an explanatory diagram showing the connection part 507 connected to the connecting structure 218. The connection part 507 is sandwiched between contact parts 225a and 225b. The connecting fitting 232 is fixed to the connection part 507 by fixing screws 224b. 【0270】 The transistor 117 is fixed to the heating / cooling plate 134a and further clamped by the heating / cooling plate 134b. The transistor 117 is properly maintained at the test temperature by the heating / cooling plate 134. A heat pipe 223 is mounted in the recess 234. 【0271】 A test constant current Id is applied from the connection structure 218 to the connection part 507. The constant current Id is large, several hundred amperes (A). The connection part 507 is usually relatively small in area, and there is contact resistance between the contact part 225 and the connection part 507. Therefore, when a large current flows through the connection part 507, heat is generated at the contact part 225. 【0272】 The heat generated is conducted to the transistor 117 being tested, causing it to overheat. This overheating may cause the transistor 117 to deteriorate or the connection part 507 to burn out. In addition, the electrode terminals 226 of the SOP117 and QFN117 also generate heat, and this heat is conducted to the connection board 514. This conducted heat raises the temperature of the connection part 507. Therefore, it is necessary to quickly dissipate the heat generated at the contact part 225. 【0273】 The connection structure 218 of the present invention has a heat pipe 223. Heat generated at the contact portion 225 is transferred by the heat pipe 223. Therefore, the heat at the contact portion 225 is quickly removed from the contact portion 225. In addition, the heat at the connection portion 507 and the connection substrate 514 are removed. 【0274】 A partition wall 217 is located between room C1 and room C2. As shown in Figure 37, an opening 216 is formed in the partition wall 217. A connecting structure 218a1 is inserted into opening 216a1, and a connecting structure 218b1 is inserted into opening 216b1. A connecting structure 218a2 is inserted into opening 216a2, and a connecting structure 218b2 is inserted into opening 216b2. A connecting structure 218an is inserted into opening 216an, and a connecting structure 218bn is inserted into opening 216bn. 【0275】 For example, in the semiconductor test apparatus shown in Figure 37, the P terminal of the transistor 117Q1 to be tested is electrically connected by being sandwiched between the connecting fittings 232 and 233 of the connection structure 218a1. Similarly, the N terminal of the transistor 117Q1 to be tested is electrically connected by being sandwiched between the connecting fittings 232 and 233 of the connection structure 218b1. 【0276】 Similarly, the P terminal of the transistor 117Q2 to be tested is sandwiched between the connecting fittings 232 and 233 of the connection structure 218a2, thereby making an electrical connection. In addition, the N terminal of the transistor 117Q2 to be tested is sandwiched between the connecting fittings 232 and 233 of the connection structure 218b2, thereby making an electrical connection. 【0277】 Similarly, the P terminal of the transistor 117Qn to be tested is sandwiched between the connecting fittings 232 and 233 of the connection structure 218an, thereby making an electrical connection. In addition, the N terminal of the transistor 117Qn to be tested is sandwiched between the connecting fittings 232 and 233 of the connection structure 218bn, thereby making an electrical connection. 【0278】 An electrostatic shielding plate or electrostatic shielding mesh is placed on the partition wall 217, shielding noise from the power supply unit 132 and the drive circuit system of room B, so that the noise is not applied to room C1. In addition, the noise generated by the on / off switching of transistor 117 is not applied to the drive circuit system of room B. 【0279】 Figure 38 is an explanatory diagram illustrating the connection between transistor 117 and connection structure 218. Transistor 117 is fixed to heating / cooling plate 134a. In reality, surface plate 520, positioning support plate 519, etc. are arranged or formed on heating / cooling plate 134a, but they are omitted for the sake of clarity and ease of drawing. 【0280】 Fixation is performed by a spring (not shown). For tight contact, thermal conductive grease or heat-dissipating silicone oil compound may be applied. If necessary, as shown in Figure 36, a heating and cooling plate 134b is also placed above the transistor 117 to allow the transistor 117 to be set to a predetermined temperature condition. Note that it is not limited to a spring, but any structure or mechanism that can fix the transistor may be used. 【0281】 Connector 202 is connected to the terminals of transistor 117 (emitter terminal e, gate terminal g, and collector terminal c). Signal wiring 222 is drawn out from connector 202. The control signal Vgs applied to the gate terminal g of transistor 117 and the constant current Ic from the constant current circuit 118 are applied to signal wiring 222. 【0282】 The connecting structure 218a is inserted into the opening 216a of the partition wall 217 from the C2 chamber side. Similarly, the connecting structure 218b is inserted into the opening 216b of the partition wall 217 from the C2 chamber side. When the connecting structure 218 is inserted, the connecting portion 507 is sandwiched between the connecting fittings 232 and 233. In this state, the connecting portion 507 of the transistor 117 and the connecting structure 218 are electrically connected by tightening the fixing screw 224b. 【0283】 The transistor 117 to be tested needs to be fixed in close contact with the heating / cooling plate 134 or the like. Also, since the electrode pattern 505 and electrode terminals 226 are positioned and electrically connected using anisotropic conductive rubber 504, it is difficult to remove it easily. 【0284】 The installation process for transistor 117 involves first fixing several transistors 117 to be tested to a heating / cooling plate 134, etc. Next, the transistor 117 to be tested first is selected and the connection structure 218 is attached to the connection part 507. 【0285】 The selected transistor 117 is electrically connected to the connection part 507 by inserting the connection structure 218 from the C2 chamber side into the opening 216 where the selected transistor 117 is located. 【0286】 Electrical connection to transistor 117 is easy, as it only requires selecting the position for inserting the connection structure 218. Furthermore, the test conditions and test content for transistor 117 can be easily changed by modifying the applied signal to the connection wiring 211 connected to the connection structure 218. 【0287】 As shown in Figure 36, the connection portion 507 is clamped under pressure by contact portions 225a and 225b. A connection wire 211 is connected to one end of the connection structure 218, and a constant current Id is applied to the transistor 117 from the connection wire 211. A heat pipe 223 is located on the back side of the connection structure 218. 【0288】 A current of several hundred amperes (A) flows through the connection point 507. Even if there is a small resistance in the contact point 225, the current of several hundred amperes (A) generates a large amount of heat, causing the connection point 507 to overheat. This overheating will also cause the transistor 117 to overheat, leading to degradation or destruction of the transistor 117. 【0289】 In this invention, the heat generated at the contact point 225 is transferred to the connecting wiring 211 side of the connecting structure 218 by the heat pipe 223. Therefore, the contact point 225 will not overheat. A cooling fan 229 is positioned below the connecting structure 218 to dissipate the heat from the heat pipe 223. Figure 38 is an explanatory diagram illustrating a method for cooling the connection structure 218 in the semiconductor testing apparatus of the present invention. 【0290】 As shown in Figure 38, a cooling fan 229 is positioned on the back surface of the connecting structure 218 to remove heat from the heat pipe 223. The rotation speed of the cooling fan 229 is controlled according to the overheating status of the connecting section 507 and the heat pipe 223. Figure 39 is an explanatory diagram illustrating the method of connecting the semiconductor element 117 and the connecting structure 218 in the semiconductor testing apparatus of the present invention. 【0291】 A partition wall 217 is provided between chamber C1 and chamber C2. As shown in Figure 37, an opening 216 is formed in the partition wall 217 corresponding to the position of the transistor 117, etc. to be tested. The opening 216 in the partition wall 217 and the fixing base (not shown) of the connecting structure 218 position and fix the connecting structure 218 horizontally or stably. 【0292】 As shown in Figure 39(a), the transistor 117 to be tested is positioned and fixed in close contact with the heating / cooling plate 134a. Thermal conductive grease and heat dissipation silicone oil compound are applied between the transistor 117 and the heating / cooling plate 134a. 【0293】 A detachable connector 202 is connected to the terminals of transistor 117 (emitter terminal e, gate terminal g, and collector terminal c). A signal wire 222 is connected to the connector 202, and the signal wire 222 is connected to the sample connection circuit 203. 【0294】 The signal wiring 222 between the sample connection circuit 203 and the connector 202 should be made as short as possible. If the signal wiring 222 is long, noise will be superimposed on it, causing the transistor 117 to malfunction. For example, if noise is superimposed on the gate terminal g of transistor 117, transistor 117 may turn on and be destroyed. The signal wiring 222 should be twisted wire or use shielded wiring such as coaxial cable. 【0295】 As shown in Figure 39(b), the connecting structure 218a is inserted into the opening 216a. By inserting the connecting structure 218a into the opening 216a, the connecting portion 507a of the transistor 117 is sandwiched between the connecting fittings 232 and 233 at the tip of the connecting structure 218a. After connecting the connecting structure 218a and the connecting portion 507a, tightening the fixing screw 224b1 enables good electrical connection between the contact portion 225 and the connecting portion 507. 【0296】 Similarly, the connecting structure 218b is inserted into the opening 216b. By inserting the connecting structure 218b into the opening 216b, the connecting portion 507b of the transistor 117 is sandwiched between the connecting fittings 232 and 233 at the tip of the connecting structure 218b. After connecting the connecting structure 218b and the connecting portion 507b, a good electrical connection can be achieved between the contact portion 225 and the connecting portion 507 by tightening the fixing screw 224b2. 【0297】 In the embodiment shown in Figure 38, the heat pipe 223 is attached to the recess 234 of the heat pipe fitting 231 of the connecting structure 218. However, the present invention is not limited to this. 【0298】 For example, the connecting structure 218 may be configured as shown in Figure 40. In Figure 40, Figure 40(a) is a simulated illustration of the back surface (bottom surface) of the connecting structure 218, and Figure 40(a) is a simulated illustration of the front surface (top surface) of the connecting structure 218. 【0299】 In Figure 40, the heat pipe 223a is positioned on the concave surface 234a. The heat pipe 223a is formed or positioned up to the connecting fitting 233. By forming or positioning it up to the connecting fitting 233, the heat generated at the connection 507 can be transferred more efficiently. 【0300】 As shown in Figure 40(b), the heat pipe 223b is positioned on the concave surface 234b. By positioning the heat pipe 223 on both sides of the connecting structure 218, the heat generated at the connection 507 can be transferred more efficiently. 【0301】 The embodiment shown in Figure 38 uses a cooling fan 229 to cool the heat pipe 223, but the present invention is not limited to this. For example, as shown in Figure 41, heat dissipation fins 228 may be formed or arranged so as to be in close contact with the heat pipe 223. The heat transferred within the heat pipe 223 is efficiently transferred to the heat dissipation fins 228, further enhancing the heat transfer and heat dissipation effects of the heat pipe 223. 【0302】 In Figure 41, the heat dissipation fins 228 are not formed or positioned in the area corresponding to the opening 216. The connecting structure 218 is inserted from the C2 chamber to the C1 chamber through the opening 216. To maintain the airtightness of the C1 chamber, the opening 216 is sized to be the cross-sectional area of ​​the connecting structure 218 + α. Therefore, if the heat dissipation fins 228 were formed or positioned on the connecting structure 218, it would not be possible to insert them into the opening 216. For this reason, the heat dissipation fins 228 are not formed or positioned on the side connected to the connection portion 507 of the transistor 117, with reference to the partition wall 217. 【0303】 As shown in Figure 42, a circulating water pipe 135 may be formed or arranged within the connecting structure 218 to cool the connecting structure 218. The refrigerant flowing through the circulating water pipe cools the connecting structure 218, and the heat transfer in the heat pipe 223 is efficiently transferred to the connecting structure 218. Therefore, the heat generated at the connection part 507 is efficiently dissipated. 【0304】 In the transistor 117 (SOP117, QFN117, semiconductor element 117) shown in Figure 1, as illustrated in Figure 3, electrode terminal 226a is connected to connection part 507a, and electrode terminal 226b is connected to connection part 507b. Therefore, connection part 507 had two terminals: connection part 507a (P) and connection part 507b (N). 【0305】 As shown in Figure 6, the connector 507 of the transistor 117 may have three terminals: connector 507a (P), connector 507b (N), and connector 507c. As shown in Figure 6, electrode terminal 226a is connected to connector 507a, electrode terminal 226b is connected to connector 507b, and electrode terminal 226c is connected to connector 507c. The semiconductor testing apparatus and semiconductor device testing method of the present invention can test a wide variety of semiconductor devices 117. 【0306】 The semiconductor element 117 in Figure 6, as shown in Figure 4, consists of two transistors, transistor 117m and transistor 117s, arranged in a single SOP or QFN package. 【0307】 The collector terminal c of transistor 117s is connected to connector 507a. The emitter terminal es of transistor 117s is connected to the collector terminal cm of transistor 117m, and the midpoint is connected to connector 507c. The emitter terminal em of transistor 117m is connected to connector 507b. 【0308】 Transistor 117m has its emitter terminal em, gate terminal gm, and collector terminal cm connected to it. Transistor 117s has its emitter terminal es, gate terminal gs, and collector terminal cs connected to it. 【0309】 Figure 43 is an explanatory diagram illustrating the connection state between a transistor 117 (semiconductor element 117) having three connection parts 507 (connection part 507a (P), connection part 507b (N), and connection part 507c (O)) and a connection structure 218. 【0310】 In Figure 43, a placement recess 239 is formed or configured on the connection substrate 514, and an anisotropic conductive rubber 504a is placed in the placement recess 239. The anisotropic conductive rubber 504a electrically connects the signal terminal 227 and the electrode pattern 506. A pressing plate 515 is placed on the connection substrate 514, and the pressing plate 515 is pressed by a pressing head 530 via rubber (elastic material) 517. 【0311】 In Figure 43, the connection between the connecting structure 218a and the connecting part 507a, and the connection between the connecting structure 218b and the connecting part 507b are the same as those described in Figures 38 and 39, so their explanation is omitted. 【0312】 In Figure 43, a heat pipe 223a is formed or arranged on the connecting structure 218a, and a heat pipe 223b is formed or arranged on the connecting structure 218b, whereas a heat pipe 223 is not formed or arranged on the connecting structure 218c. The connecting structure 218c is connected to the connecting portion 507c. 【0313】 No large current flows through the connection portion 507c(O) of the transistor 117. Therefore, the connection portion 507c does not overheat. There is no need to form a heat pipe 223 on the connection structure 218c. By forming the connection structure 218c thinner than the other connection structures 218 (connection structures 218a, connection structures 218b), the connection between the connection structure 218 and the connection portion 507 of the transistor 117 becomes easier. In addition, since the space for arranging the transistor 117 is limited, the number of transistors 117 that can be mounted on the heating and cooling plate 134 can be increased. 【0314】 It goes without saying that a heat pipe 223 may be formed or arranged on the connecting structure 218c. Other matters are the same as or similar to the embodiments in Figures 38 and 39, so their explanation will be omitted. 【0315】 Figure 58 is a schematic diagram of a thermal cycle test (thermal shock test) in an embodiment of the semiconductor device testing apparatus of the present invention. In Figure 58, wiring electrodes 607a, 607b, and 607c are formed on the insulating substrate 602. A semiconductor chip 601 is connected to the wiring electrode 607a with solder 605. 【0316】 The bonding terminal (not shown) of the semiconductor chip 601 and the wiring electrode 607b are electrically connected by an aluminum wire 606. A wiring electrode 607c is formed or arranged on the back surface of the insulating substrate 602 and connected to the copper base 604 by solder 605. 【0317】 The thermal cycle test (thermal shock test) shown in Figure 58 is a test that predicts the lifespan of a product or system against relatively mild temperature changes that occur during startup and shutdown. 【0318】 In power modules 117 (power semiconductor elements, power semiconductor chips, modules on which semiconductor elements are mounted), the case temperature (Tc) changes relatively slowly but significantly during startup and shutdown. When this stress is repeated, cracks in the die bond (jointing material such as solder) reach below the power semiconductor chip, leading to an increase in thermal resistance, thermal runaway, and ultimately the destruction of the power module. 【0319】 The semiconductor device testing apparatus of the present invention heats the power module 117 from the outside, heats it using the power module's own heat generation, or cools it from the outside. Furthermore, heating or cooling is performed using cooling water or hot water from a chiller. 【0320】 In the semiconductor device testing apparatus and semiconductor device testing method of the present invention, the temperature of the power semiconductor device (transistor, etc.) 117 is periodically changed in accordance with the test conditions, and is cooled to a constant temperature and heated to a constant temperature. Furthermore, the temperature information Tj of the transistor to be tested is measured, and the chiller 136 is controlled to maintain the measured temperature information Tj at a constant value. 【0321】 The chiller 136 is configured to maintain a constant temperature for equipment and other devices by circulating water or a heat transfer medium while controlling its temperature. While primarily used for cooling, it can also heat. It is configured to allow for various temperature control applications. 【0322】 The control rack 131 includes a power supply unit 132 that supplies test current and test voltage to power semiconductor elements 117 (transistors, etc.), and a control circuit that controls the transistors 117 or sets test conditions. 【0323】 The control circuit 132 receives the temperature information Tj from the transistor and controls the chiller based on the temperature information Tj. Alternatively, it controls the chiller 136 to set the temperature information Tj to a predetermined value. 【0324】 In this specification, the circulating water is used, but it is not limited to water. It may also be ethylene glycol, glycerin, Freon, etc., or forced air cooling may be used. The chiller 136 supplies the liquid in the circulating water pipe 135 to the cooling / heating heat sink of the test unit, controlling the temperature within a range, for example, from -1°C to +100°C. The cooling / heating heat sink 134 has a sufficiently large heat capacity. 【0325】 The power module 117 undergoes relatively gradual expansion and contraction due to heating or cooling. The semiconductor device testing apparatus of the present invention allows setting the temperature and period of cooling or heating. Durability testing of the semiconductor module can be performed by adjusting the temperature and period. The number of test cycles can be arbitrarily set from 100 to 100,000 cycles. Additionally, the cooling and heating times can be arbitrarily set. 【0326】 Figure 59 is a schematic diagram of a power cycle test in the semiconductor device test apparatus of the present invention. It is possible to perform tests on lifespan and reliability in operating patterns in which junction temperature changes occur frequently. 【0327】 The power cycle test involves temperature fluctuations depending on the operating conditions of the power semiconductor element 117. The test focuses on lifespan under operating patterns where case temperature changes (such as the molding resin of the semiconductor chip or the case of the module containing the semiconductor chip 601) are minimal, while junction temperature changes occur frequently. 【0328】 The heat generated by the semiconductor chip 601 is transferred to the aluminum wire 606, as shown by arrow A, and the heat generated by the semiconductor chip 601 is also transferred to the insulating substrate 602, as shown by arrow B. 【0329】 Power cycling tests are an essential test item for power semiconductor devices 117 and power semiconductor modules 117. In the structure of the power module 117, when the operation of the power semiconductor 117 causes a temperature change at the junction, the stress caused by the difference in the coefficients of linear expansion between the aluminum wire 606 and the power semiconductor chip (such as a silicon chip) 601 causes cracks to form at the junction. 【0330】 As the crack propagates, it can lead to failure due to delamination. Power semiconductors 117, especially those used in inverters, need to be considered from the equipment design stage due to this power cycle failure. 【0331】 The semiconductor device testing apparatus of the present invention allows for arbitrary setting of the rapid heat generation (expansion) temperature, change time, holding time, cooling (contraction) temperature, change time, and holding time associated with the operation of the power semiconductor device 117. Therefore, durability testing against stress due to differences in linear expansion coefficients, etc., can be easily implemented. 【0332】 The number of test cycles can be arbitrarily set from 100 to 100,000 cycles. Furthermore, the cooling time, heating time, holding time, and temperature change time can also be arbitrarily set. The following describes the test method for the semiconductor device of the present invention. Figures 44, 45, and 46 are explanatory diagrams of the test method for the semiconductor device of the present invention. 【0333】 The constant current circuit 118 supplies a constant current Ic to the diode Di of transistor 117. The operational amplifier circuit 116 buffers and outputs the terminal voltage Vi of diode Di. The terminal voltage Vi is applied to the temperature measurement circuit 115, which obtains the temperature information Tj of transistor 117 from the terminal voltage Vi and transfers it to the controller circuit board 11. The temperature information is output from the connector 213 of the device control circuit board 209 to the mother board 207 and sent to the control circuit board 111 (see Figure 28, etc.). 【0334】 The semiconductor device testing apparatus and semiconductor device testing method of the present invention implement noise control technology. The noise control technology includes an inrush current removal method and a surge voltage removal method. Figure 61 is an explanatory diagram of the inrush current removal method. Figure 62 is an explanatory diagram of the surge voltage removal method. 【0335】 Newer devices such as SiC / GaN exhibit low on-resistance and excellent high-speed switching performance. However, due to their characteristics, they are highly sensitive to switching noise (such as surges) during power cycling tests. Therefore, controlling noise is crucial for the test equipment or test method, as it can potentially damage the device. 【0336】 The noise control method, inrush current rejection method, surge voltage rejection method, etc., are specifically implemented using the test methods described in Figures 46, 48, 51, and 52, and the implementation circuit uses the configuration or operation shown in Figures 28, 29, 44, 45, 49, 50, and 51. Due to improvements in semiconductor device performance, or in response to the demand for higher functionality, the margin for circuit design using power semiconductor devices is decreasing. 【0337】 In particular, the low on-resistance and high switching speeds of new devices such as IGBTs, SiC, and GaN lead to increased switching noise, which can cause device failure due to noise (such as surges). The semiconductor device testing apparatus of the present invention incorporates technologies such as noise control, enabling the realization of test conditions unaffected by inrush current and surge voltage. 【0338】 In the inrush current removal method shown in Figure 61, as illustrated in Figures 44, 45, 49, 50, and 51, a switching circuit board 201 consisting of a MOS transistor or the like as a switching element is placed or connected between the drain terminal and source terminal (between channels) of the power semiconductor element 117 (power transistor) being tested. 【0339】 When the switch circuit 124b on the switch circuit board 201a is turned on, the drain and source terminals of transistor 117 are short-circuited. Due to the short circuit, no voltage or current is applied between the channels of transistor 117. In addition, when the switch circuit 124b is turned on, the output terminal of the current power supply 121 that supplies test current to transistor 117 is short-circuited, causing the charge to discharge. 【0340】 When the switch circuit 124b is turned on, current flows, discharging the charge from the current power supply 121. Alternatively, the current output by the current power supply 121 flows to ground via the switch circuit 124b. 【0341】 When an inrush current Is flows through a transistor under test, the transistor is destroyed by the generation of either the inrush current Is or the surge voltage Vs. To prevent the generation of inrush current Is or surge voltage Vs, the on / off control and on / off sequence of the switch circuit are controlled. 【0342】 As shown in Figure 61, in conventional examples, the current flowing between the channels of the transistor (drain current Id) was generated as an inrush current. In the present invention, by controlling the switch circuit 124, etc., no inrush current is generated. 【0343】 Similarly, surge voltage can be eliminated by controlling the switch circuit 124. As shown in Figure 62, in the conventional example, a surge voltage is generated between the drain terminal and source terminal of the transistor 117, but in the present invention, the surge voltage can be eliminated by controlling the switch circuit board 201. The semiconductor device testing apparatus (power cycle tester) and semiconductor device testing method of the present invention can perform saturated thermal resistance measurement. 【0344】 As a combined function of the power cycle tester, it is possible to measure saturated thermal resistance at any set current and / or voltage. It can also measure cycle time, number of cycles, and multiple devices simultaneously. 【0345】 Saturated thermal resistance, or thermal resistance of a semiconductor package, is the amount of heat generated per watt of power. A power cycle tester can measure the thermal saturation resistance from the junction temperature (Tj) and ambient temperature (Ta) when the package is thermally saturated at a specified power level. The test flow is as follows: 1. Input the Ic (Id) current and Vce (Vds) voltage as test conditions. 2. By initiating the saturated thermal resistance test, the ambient temperature (temperature before energization) and the junction temperature are measured. 3. Calculate the thermal resistance from steps 1 and 2 above. Display the thermal resistance value in the heat-saturated state. Rth = Tj - Ta / Pd however, Rth: Saturation thermal resistance (℃ / W) Tj: Junction temperature (°C) Ta: Temperature before energization (℃) 【0346】 The power cycle test machine allows for gate voltage settings that match the power control conditions. The gate voltage can be automatically varied to set the Vce voltage for the test conditions. The setting flow is as follows: 1. Specify the applied current: Ic (Id). 2. Specify the power level to be used for the test. 3. The gate voltage is automatically varied at the start of the test. It will present a gate voltage appropriate to the specified power. By using this gate voltage, testing can be easily performed with collector-emitter voltage (Vce) and drain-source voltage (Vds) that match the test conditions. 【0347】 Figure 63 is a graph showing the saturation thermal resistance transitions of eight devices (Dev1 to Dev8). The power cycle tester of the present invention can simultaneously measure the saturation thermal resistance transitions of numerous power devices and visualize them by displaying them on a screen or the like. It is also possible to print the results to a printer. 【0348】 The semiconductor device testing apparatus and semiconductor device testing method of the present invention can perform short-pulse power cycle testing. Figure 64 shows an example of a measurement waveform when measuring power cycle testing using current pulses. 【0349】 Figure 64(a) shows the gate voltage waveform applied to the gate terminal g of the semiconductor element 117 to be tested. The gate voltage is generated in the device control circuit board 209 and applied to the semiconductor element 117 from the sample connection circuit 203. The gate on time ta and period tc can be variably set in the device control circuit board 209. Also, 0(V) is the off voltage, but depending on the type of semiconductor element 117, it may be necessary to lower the off voltage level. In the semiconductor test apparatus of the present invention, in addition to the first off voltage of 0(V), the magnitude of the second off voltage Vt and the application time tn2 can be set. 【0350】 Figure 64(b) is a graph illustrating the current (voltage) waveform applied to the collector terminal c or drain (source) terminal of the semiconductor element 117 under test. The applied current (voltage) can be controlled by controlling the switch circuit 124a of the switch circuit board 201b, as shown in Figure 45. The length and timing of te time, td time, and tf time can be set and controlled by the operation timing of the switch circuit 124a, as shown in Figure 62(b). 【0351】 The semiconductor testing apparatus of the present invention can perform power cycle testing with current pulses as short as 10 ms (milliseconds). Even when applying a 10 ms pulsed current, the surge absorption circuit absorbs surge current / voltage generated at the current on / off timing, preventing damage to the test device. 【0352】 Furthermore, measurement data can be logged during 10ms pulse testing. For example, with a device equipped with a temperature-sensitive diode, accurate Tj measurement is possible even with the application of a 10ms pulse current. Therefore, it is possible to trace the process leading to the failure of the semiconductor device. 【0353】 The semiconductor device testing apparatus and semiconductor device testing method of the present invention can implement the testing methods of the JEITA, IEC, and AQG324 guidelines shown in Figure 65. The semiconductor device testing apparatus and semiconductor device testing method of the present invention can perform pulsed power cycle testing. Conventional semiconductor device testing equipment and semiconductor device testing methods could only perform tests that switched transistors on and off. 【0354】 For example, as shown in Figure 66(a), a predetermined current flows when a power semiconductor element (such as a transistor) is turned on. Then, as shown in Figure 66(b), the temperature of the power semiconductor element gradually rises from t1 when the current is applied. The current Ia becomes constant at time t2. At time t3, since the power semiconductor element is in the ON state, the temperature exceeds the target temperature Ta. 【0355】 To lower the temperature, it is necessary to change the cooling water temperature, etc. Changing the cooling water temperature takes time, and the specified test conditions cannot be maintained during the period when the temperature exceeds the target temperature. This invention allows pulse current to be applied not only during the on / off time of the transistor, but also while the transistor is on. 【0356】 Figure 67 is an explanatory diagram of the semiconductor device testing apparatus and semiconductor device testing method of the present invention. As shown in Figure 67(a), by changing or controlling the period Tc, on time ton, or off time toff of the power semiconductor device, the time and interval during which a predetermined current flows through the power semiconductor device can be controlled with high precision. 【0357】 Figure 67(a) shows an example where the on-time ton1 and off-time toff1 settings were implemented with the same period time tc, and then the settings were changed to on-time ton2 and off-time toff2 at time t4. 【0358】 As shown in Figure 67, the semiconductor testing apparatus of the invention can acquire temperature information Tj in real time and compare it with a target temperature Ta to perform testing on semiconductor devices. In Figures 64 and 67, ta, tc, and te are shown as occurring at the same time, but it goes without saying that they can also be varied over time. 【0359】 By turning on the power semiconductor element 17 (transistor, etc.), a predetermined current flows. As shown in Figure 67(b), the temperature of the power semiconductor element gradually rises. If the power semiconductor element 117 is in the off state, the temperature of the power semiconductor element 117 decreases. When the power semiconductor element 117 reaches the target temperature Ta, the power semiconductor element 117 is turned off, and when the power semiconductor element 117 exceeds the target temperature Ta, it is returned to the off state. This invention allows for the identification of fault locations caused by pulsed current application. The semiconductor device testing apparatus of this invention can also perform pulsed continuous current application tests. 【0360】 Conventional continuous current testing uses direct current, making it impossible to apply the desired current to samples that generate a lot of heat. The pulse current method of this invention, by changing the duty cycle, allows testing at a predetermined current density. 【0361】 The gate driver circuit 113 outputs an on-voltage Vg that turns on the gate of transistor 117 at a set frequency and a set on-voltage time. As an example, as shown in Figure 46(a), the on-off period of transistor 117 is tcycle, the on-time is ton, and the off-time is tooff. 【0362】 The transistor 117 is switched on and off based on the ON signal voltage Vgs in Figure 46(a). The gate driver circuit 113 is controlled by the gate signal control circuit 112. The current power supply 121 outputs a constant current Id, which is supplied to the transistor 117. 【0363】 The Vgs signal voltage output from the gate driver circuit 113 causes transistor 117 to switch on and off, and a current Id flows between the channels of transistor 117 during the period when transistor 117 is on. 【0364】 The gate driver circuit 113 has a variable resistor circuit 125 inside. The value of the variable resistor circuit 125 is configured to be set to a predetermined value or in steps between 0 (Ω) and 500 (Ω). The value of the variable resistor circuit 125 may be set by a control signal from the control circuit board 111 while observing the waveform of the gate terminal g. 【0365】 A resistor R (not shown) may be placed between the gate terminal g and the emitter terminal e or collector terminal c of transistor 117. By adjusting the value of resistor R, the slope angle of the rising and falling voltage waveforms of the gate signal can be adjusted. 【0366】 When the value of the variable resistor circuit 125 is large, the slope of the rising / falling waveform of the gate signal of transistor 117 applied to the gate terminal of transistor 117 becomes gentler. 【0367】 On the other hand, if the resistance value of the variable resistor circuit 125 is small, the slope of the rising / falling waveform of the gate signal becomes steeper. By changing the value of the variable resistor circuit 125 or setting it to a predetermined value, the on-time of the transistor 117 can be adjusted. 【0368】 The gate driver circuit 113 can set the slope of the rising waveform (rising time Tr) and the slope of the falling waveform (falling time Td) for the gate voltage applied to the gate terminal g of transistor 117. By adjusting the rising time Tr and the falling time Td separately, the on-time of transistor 117 can be arbitrarily adjusted. 【0369】 The resistance value of the variable resistor circuit 125 is set by the control circuit board 111. The setting is not limited to a constant value. The slope of the rising waveform (rising time Tr) and the falling waveform (falling time Td) of the gate driver circuit 113 may be changed. The resistance value at the rising and falling of the gate signal may also be changed. Furthermore, the resistance value may be controlled in real time. By controlling the variable resistor circuit 125, the on-time of the transistor 117 is stabilized. 【0370】 If the resistance value at the rising edge of the gate signal is reduced, the waveform of the on-voltage applied to the gate terminal of transistor 117 becomes steeper, causing transistor 117 to turn on quickly. If the resistance value at the rising edge of the gate signal is increased, the waveform of the on-voltage applied to the gate terminal of transistor 117 becomes gentler, causing transistor 117 to turn on more gradually. 【0371】 If the resistance value at the falling edge of the gate signal is reduced, the waveform of the on-voltage applied to the gate terminal of transistor 117 becomes steeper, causing transistor 117 to turn off quickly. If the resistance value at the falling edge of the gate signal is increased, the waveform of the on-voltage applied to the gate terminal of transistor 117 becomes gentler, causing transistor 117 to turn off more gradually. 【0372】 As described above, the value of the variable resistor circuit connected to the gate terminal of transistor 117, or the rise time / fall time of the gate driver circuit 113, can be controlled, adjusted, or set. Therefore, as a function of the gate driver circuit 113, the inrush current Is and surge voltage Vs generated in transistor 117 can be changed or modified. 【0373】 It goes without saying that the operation of transistor 117 can not only control the on-voltage of the gate terminal of transistor 117, but also change or set the value of the constant current Id or voltage Vm supplied to transistor 117 by the current power supply 121. 【0374】 The variable resistor circuit 125 of the gate driver circuit 113 is controlled by the control circuit board 111. The period time tcycle, on time ton, or off time toff of the gate signal output by the gate driver circuit 113 shown in Figure 46 is controlled by the gate signal control circuit 112, and the gate signal is applied to the gate terminal of transistor 117. The gate signal control circuit 112 is also controlled by the control circuit board 111. 【0375】 In Figures 44 and 45, the resistance value of the variable resistor circuit 125 of the gate driver circuit 113 is shown as variable, but this is not the only option. For example, the variable resistor circuit 125 could be an external resistor, and the resistor could be connected to the gate terminal of the transistor 117 using a connector (not shown). The value of the connected resistor is determined by observing the waveform at the gate terminal of transistor 117 and the waveform of the channel current Id. 【0376】 In Figures 44 and 45, a constant current circuit 118 is connected between the collector terminal c and the emitter terminal e of transistor 117. The constant current circuit 118 supplies a predetermined constant current Ic. This constant current Ic is used to monitor the temperature of transistor 117. 【0377】 For the purposes of this specification, an IGBT is used as an example, so the terminals of transistor 117 are the gate terminal g, the collector terminal c, and the emitter terminal e. In the case of a MOS transistor 117, the terminals of transistor 117 are the gate terminal g, the drain terminal d, and the source terminal s. 【0378】 A body diode or channel diode Di is formed on transistor 117. Note that diode Di may be a diode from another semiconductor chip mounted on the semiconductor chip on which transistor 117 is formed. 【0379】 Diode Di may utilize a diode (parasitic diode) that is formed incidentally during the formation of transistor 117. The parasitic diode is formed incidentally due to the layer structure of transistor 117. Structurally, diode Di is formed near the channel portion of transistor 117. 【0380】 Diode Di can be any element that does not operate when transistor 117 is running. For example, it is not limited to a diode; a transistor can also be used in diode connection. 【0381】 Furthermore, the method is not limited to semiconductors such as diodes; devices such as resistors may also be used. By applying a constant current Ic to a device such as a resistor, the terminal voltage of the resistor is measured. This voltage is measured as voltage Vi. 【0382】 As described above, the element used to acquire temperature can be not only semiconductor devices but also resistors and other devices. In other words, any device that can acquire a voltage value by passing an electric current through it, or a device that can acquire a current value by applying a voltage to it, can be used. 【0383】 The resistance of diode Di changes due to the heat generated by transistor 117. When a constant current Ic is passed through diode Di, the voltage across the terminals of diode Di changes in proportion to the change in its resistance. By monitoring or measuring the voltage across the terminals, the temperature of transistor 117, or the change in temperature, can be determined. To monitor the temperature of transistor 117 from the voltage of diode Di, it is necessary to obtain the temperature coefficient beforehand. 【0384】 The temperature coefficient is determined by setting the transistor 117 to a predetermined temperature in a constant temperature bath, passing a constant current Ic through the diode Di, and measuring the terminal voltage of the diode Di. By changing the predetermined temperature and measuring the terminal voltage of the diode Di, the terminal voltage of the diode as a function of temperature can be obtained. Therefore, the temperature coefficient K of the transistor 117 can be determined from the terminal voltage of the diode Di as a function of temperature. 【0385】 The temperature coefficient K may vary between different production lots of transistor 117, but generally it exhibits a constant value across production lots. Therefore, by sampling a transistor 117 from each production lot and determining its temperature coefficient K, this value can be used for other transistors 117. 【0386】 To obtain the temperature coefficient K accurately, the temperature coefficient K of each transistor 117 should be measured and tested individually, even within the same lot. The measurement of the temperature coefficient K is not limited to the use of a constant temperature chamber. For example, the temperature coefficient K can be obtained by changing the temperature of the water flowing through the heatsink on which the transistor 117 is mounted. 【0387】 During testing, a test current Id is intermittently applied to transistor 117. Immediately after the test current Id is turned off, or after a predetermined short period of time has elapsed, a constant current Ic for temperature measurement is supplied from constant current circuit 118. 【0388】 To prevent transistor 117 from overheating due to the constant current Ic, or to ensure that the constant current Ic has no effect, the constant current Ic is set to a value that is sufficiently smaller than the constant current Id flowing through the channel of transistor 117. The constant current Id is set to a current that does not generate enough heat to affect temperature measurement. 【0389】 Specifically, the constant current Ic is set to 1 / 1000 or less of the current Id that flows through transistor 117 during testing. Preferably, the current Ic that flows through transistor 117 is between 1 / 100000 and 1 / 10000 of the current Id. The constant current Ic is set to 0.1mA or more and 100mA or less. 【0390】 The channel current Id is varied, and the diode voltage Di (the voltage between the collector and emitter terminals of transistor 117) is measured to determine the temperature coefficient K. The determined temperature coefficient K is stored in the temperature measurement circuit 115. 【0391】 When measuring temperature, if the diode Di is formed on the same chip as the transistor 117, the saturation voltage Vn may change depending on the gate voltage Vgs. It is preferable that the gate voltage Vgs be zero (0) or a negative voltage. 【0392】 As shown in Figure 27, based on the temperature information Tj, the control circuit board 111 controls the chiller 136. The chiller 136 adjusts the temperature of the circulating water (circulating solution) and adjusts the temperature of the heating and cooling plate 134. 【0393】 In the embodiments described above, the temperature coefficient K was determined in advance, but the semiconductor testing method of the present invention is not limited to this. The temperature information Tj of transistor 117 is determined from the temperature coefficient and the diode terminal voltage, etc. The transistor 117 is positioned in close contact with the heating / cooling plate 134, and the temperature of the heating / cooling plate 134 is configured to be approximately the same as that of the transistor 117. 【0394】 The control circuit board 111 controls the chiller 136 to set the temperature of the heating and cooling plate 134 to a predetermined temperature, applies a constant current Ic to the transistor 117, and measures the terminal voltage of the diode Di. 【0395】 The temperature coefficient K is determined from the measurement results. The temperature of the heating / cooling plate 134 is set to multiple temperatures, and the temperature coefficient K is determined at each temperature to improve the accuracy of the temperature coefficient value. 【0396】 The temperature coefficient K is determined by heating the transistor 117 to a predetermined temperature using the heating and cooling plate 134, passing a constant current Ic through the diode Di, and measuring the terminal voltage. By changing the predetermined temperature and measuring the terminal voltage of the diode Di, the terminal voltage of the diode Di as a function of temperature can be obtained. Therefore, the temperature coefficient K of the transistor 117 can be determined from the terminal voltage of the diode Di as a function of temperature. 【0397】 During testing of transistor 117, the constant current Ic is applied to diode Di when the channel current Id is not flowing. In other words, when transistor 117 is not turned on, the constant current Ic is applied and the terminal voltage of diode Di is measured. 【0398】 The operational amplifier circuit (buffer circuit) 116 outputs the terminal voltage Vi (terminal c - terminal e) of the diode Di. Note that the operational amplifier circuit 116 is not limited to being composed of operational amplifier elements. Any circuit with high input impedance and low output impedance will suffice. The temperature measurement circuit 115 obtains the temperature information Tj of the transistor 117 being tested from the stored temperature coefficient K and voltage Vi. 【0399】 The requested temperature information Tj is sent to the control circuit board 111. When the temperature information Tj exceeds a predetermined set value, the control circuit board 111 determines that the transistor 117 is in a predetermined stress state or degradation state, and takes action such as changing the test control or stopping the test. 【0400】 In testing, the main area where transistors degrade is often the junction within transistor 117. The semiconductor itself does not degrade; rather, the junction (bonding, die bond, etc.) of transistor 117 deteriorates, increasing the resistance of the junction. This increased resistance leads to a higher voltage Vce, causing heat generation and raising the temperature of transistor 117. 【0401】 When a semiconductor degrades, it is often due to the degradation of the gate oxide (insulating film) of transistor 117. When the gate oxide degrades, a short circuit occurs in the oxide (insulating film), and the voltage Vce decreases. Alternatively, transistor 117 turns off, no current flows through transistor 117, and the voltage Vce rises to the maximum value of the power supply voltage. 【0402】 The temperature information Tj initially fluctuates between the lowest temperature T1 and the highest temperature T2. When the test stresses transistor 117, the Vce voltage of transistor 117 changes, and the temperature information Tj usually increases. Therefore, as shown in Figure 47(c), the lowest temperature rises above temperature T1, and the highest temperature approaches the temperature information Tm(Tjmax). In the semiconductor testing method of the present invention, the test is terminated under one of the following conditions. • If the temperature information Tj falls outside the specified range. • If the channel voltage Vce falls outside the specified voltage range. • When the thermal resistance falls outside the specified range. 【0403】 In the embodiments shown in Figures 44 and 45, the symbols for switch circuits Ssa124a and Sab124b are used. Any element can be used as a switch circuit for switch circuits Ssa124a and Sab124b as long as it has a small on-resistance when closed (turned on). Examples include transistors, mechanical relays, phototransistors, and photodiode switches. 【0404】 Figure 45 is an equivalent circuit diagram of a semiconductor test apparatus in a first embodiment of the present invention. In this embodiment, the switch circuits Ssa and Sab use power MOSFETs 124 as shown in Figure 45. Power MOSFETs have a small voltage between channels (Vsd). 【0405】 Furthermore, a switch circuit other than a power MOSFET may be used. It goes without saying that switch circuits Ssa and Sab can be power transistors, etc., not just power MOSFETs. Other examples include electromagnetic relays and electromagnetic switches. 【0406】 The channel voltage (Vsdb) of power MOSFET 124b when it is ON is selected to be less than or equal to the channel voltage (Vsda) of power MOSFET 124a when it is ON. In other words, the channel voltage (Vsdb) of power MOSFET 124b when it is ON is made smaller than the channel voltage (Vsda) of power MOSFET 124a when it is ON. This is to ensure that when the switch circuit 124b is ON, the terminals of the current power supply unit 121 are completely short-circuited, allowing the current Im to flow stably. The above points also apply when the switch circuit 124 is a power transistor or the like. In the case of a power transistor 124, the channel voltage is Vce. When the switch circuit 124a is turned on, the current Id output by the current power supply 121 can be supplied to the transistor 117 as a test current. 【0407】 The switch circuit 124 is mounted on the switch circuit board 201. The switch circuit 124 is connected to a conductor plate 204 (metal plate, conductive plate). The conductor plate 204 is, for example, a copper plate with a thickness of 5 mm and a width of 50 mm. Its length is the width of the circuit board plus the width required to connect the fork plug 205. 【0408】 Figure 31 illustrates the connection (contact) state between the fork plug 205 and the conductor plate 204. Two conductor plates 204 are attached to the switch circuit board 201. The switch circuit board 201 has a full-surface ground layer (not shown), and the full-surface ground layer and the conductor plates 204 are thermally connected. The heat from the conductor plates 204 is dissipated through the full-surface ground layer. The conductor plates 204 and the switch circuit board 201 are fastened together with screws. 【0409】 The switch circuit 124 is connected to two conductive plates. As shown in Figure 45, if the switch circuit 124 is a MOS transistor, the drain terminal and source terminal are connected to different conductive plates 204. If the switch circuit 124 is a bipolar transistor, the collector terminal and emitter terminal are connected to different conductive plates 204. When the switch circuit 124 is turned on (conductive), the two conductive plates 204 are electrically connected. An IGBT can also be used as the switch circuit 124. 【0410】 The fork plug 205 and the conductor plate 204 are electrically connected by mechanical mating. When the U-shaped portion of the fork plug 205 is inserted into the conductor plate 204, the U-shape expands slightly, ensuring a good connection between the fork plug 205 and the conductor plate 204. Due to this good connection or mating, the electrical resistance of the connection is extremely low, and even when a large current flows through the connection, no heat generation or voltage drop occurs. 【0411】 A connecting bolt 219 is attached to the fork plug 205. A connecting wire 211 is connected to the connecting bolt 219. A cross-section at AA' in Figure 31(a) is shown in Figure 31(b). The conductor plate 204 and the fork plug 205 are in contact at contact portions 220a and 220b formed on the fork plug 205. The surface of the contact portion 220 is silver-plated. The contact portion 220 is made of phosphor bronze and nickel alloy. Note that the connecting bolt 219 is not limited to a bolt; any type of bolt that can electrically connect the fork plug 205 and the wire is acceptable. The surface of the conductor plate 204 is silver-plated at least in the portion that comes into contact with the fork plug 205. 【0412】 Figure 30 is a configuration diagram of the semiconductor testing apparatus of the present invention. The connecting structure 218a is inserted into the opening 216a of the partition wall 217, and the connecting structure 218b is inserted into the opening 216b of the partition wall 217. 【0413】 The connecting structure 218a is connected to the connection part 507a of the transistor 117, and the connecting structure 218b is connected to the connection part 507b of the transistor 117. A circulating water pipe 135 is incorporated into the heating and cooling plate 134. 【0414】 A connector 202 is connected to the terminals of transistor 117, and a signal wire 222 connected to the connector 202 is connected to the sample connection circuit 203. The signal wire 235 of the sample connection circuit 203 is connected to the device control circuit board 209 via a connector 208. 【0415】 As shown in Figure 30 and other figures, the fork plug 205 and the conductor plate 204 come into contact when the fork plug 205 is inserted through the opening 216 of the partition wall 214. When contact is made, the U-shaped portion of the fork plug 205 is spread open by the conductor plate 204, and a firm contact is established. 【0416】 Figure 29 shows the arrangement of each component of the semiconductor testing apparatus of the present invention. The housing 210 of the semiconductor testing apparatus is separated into three parts. The lower part of the housing is separated into chamber A and chamber B. The power supply unit 132 is located in chamber A. Chamber A and chamber B are separated by a partition wall 215. 【0417】 Each chamber is shielded. The power supply 132, switch circuit board 201, and transistor 117 generate significant noise through repeated operation and deoperation. Since this noise can cause the circuit board and other components to malfunction, shielding is used to prevent such malfunctions. Shielding is achieved by placing conductive plates, metal plates, or metal films around each chamber. 【0418】 Chamber C1 contains a heating and cooling plate 134, a circulating water pipe 135, etc., as shown in Figure 27, and the transistor 117 to be tested is placed on the heating and cooling plate 134. 【0419】 A partition wall 214 is formed between chamber C1 and chambers A and B. A water leak sensor (not shown) is positioned around the heating and cooling plate in chamber C1. The system is configured to activate the water leak sensor if circulating water (cooling medium) or the like leaks, stopping the semiconductor testing equipment or issuing an alarm. 【0420】 Furthermore, drainage grooves are formed around the heating and cooling plate, so that if circulating water (cooling medium) leaks from the heating and cooling plate, it flows into the drainage grooves and is discharged outside the semiconductor testing apparatus. As described above, the partition wall 214 is configured to prevent circulating water (cooling medium) from leaking into the lower chambers A and B even if the circulating water pipe 135 is damaged. 【0421】 A partition wall 215 is formed between Room A, where the power supply unit 132 is located, and Room B, where the drive circuit system is located. Electrostatic shielding plates are placed on partition walls 214, 215, and 217 to shield noise from the power supply unit 132, preventing the noise from being applied to the drive circuit system in Room B. 【0422】 In the embodiments of the present invention, the fork plug 205 is inserted from chamber C2 and connected to the conductor plate 204 in chamber B. Pushing the fork plug 205 in from the top to the bottom is easy. However, the present invention is not limited to this. For example, the conductor plate 204 may be placed in chamber C2, and the fork plug 205 may be inserted from chamber B to make an electrical connection. Furthermore, the connecting structure 218 is inserted from the C2 chamber to connect the connection portion 507 of the semiconductor element 117 with the connecting structure 218. 【0423】 As shown in Figure 29, the connection structure 218 is inserted from chamber C2 to chamber C1 and electrically connected to the connection portion 507 of transistor 117. The fork plug 205 is also inserted from chamber C2 to chamber B, electrically connecting the fork plug 205 to the conductor plate 204. Transistor 117 is fixed to the heating / cooling plate 134, and the switch circuit board 201 is fixed at the position of the mother board 207. The connection structure 218 and the fork plug 205 are electrically connected by connection wiring 211. 【0424】 The position of the opening 216 can be selected using the connection structure 218, and the transistor 117 to be tested can be selected. By selecting the opening into which the fork plug 205 is inserted, the control switch circuit board 201 can be easily selected, and the test method and test conditions can be changed. Therefore, by using the connection structure 218 and the fork plug 205, the present invention allows for easy selection of the transistor 117 and quick changes to the test method, etc. 【0425】 Partitions 214, 215, and 217 can be wall-like structures, plate-like structures, film-like materials, mesh-like materials, wire mesh-like materials, etc. Phenolic resin (phenol resin, phenol-formaldehyde resin, carbolic acid resin) is one example. The partitions can be anything that separates the first and second parts of the semiconductor testing apparatus. 【0426】 As shown in Figure 28, a connector 213 is attached to the motherboard 207. The control circuit board 111, the device control circuit board 209, and the switch circuit board 201 are attached to the connector on the motherboard 207. The number of switch circuit boards 201 to be prepared according to the number of transistors 117 to be tested can be easily changed by changing the number of switch circuit boards 201 attached to the motherboard 207. 【0427】 The gate terminal g, collector terminal c, emitter terminal e, etc. of the semiconductor element 117 are electrically connected by anisotropic conductive rubber 504a. The electrical connection is made by a pressing head 530, etc., as shown in Figure 22. 【0428】 The motherboard 207 receives temperature information Tj, voltage Vi, control signals for the variable resistor circuit 125, and control signals for the constant current circuit 118. Power and ground wiring for each circuit are also formed and supplied to each circuit board via connector 213. The conductor plate 204 is positioned so as to protrude from the switch circuit board 201. The fork plug 205 is connected to this protruding portion. 【0429】 The fork plug 205a is connected to the conductor plate 204a of the switch circuit board 201a. The power wiring 212 is connected to the switch circuit board 201a via the opening 216 of the partition wall 215. The fork plug 205d is connected to the conductor plate 204c of the switch circuit board 201b. The power wiring 212 is connected to the switch circuit board 201b via the opening 216 of the partition wall 215. The fork plug 205b is connected to the conductor plate 204b of the switch circuit board 201a. The power wiring 212 is connected to the switch circuit board 201a via the opening 216 of the partition wall 215. 【0430】 As shown in Figure 44, etc., a switch circuit 124a is placed between the conductor plates 204d and 204c of the switch circuit board 201b, short-circuiting the conductor plates 204d and 204c. By short-circuiting, the current Id output by the current power supply 121 is supplied to the transistor 117 as a test current. 【0431】 A switch circuit 124b is positioned between conductor plates 204a and 204b of the switch circuit board 201a. When the switch circuit 124b is turned on, it short-circuits the conductor plates 204a and 204b. This short-circuit causes the current Id output by the current power supply 121 to flow to ground as a discharge current Im, short-circuiting the channels of transistor 117. Because the channels are short-circuited, no overvoltage or overcurrent is applied to transistor 117. 【0432】 A fork plug 205 is connected to conductor plate 204. A fork plug 205c is connected to conductor plate 204b. A fork plug 205b is connected to conductor plate 204a. A fork plug 205e is connected to conductor plate 204d. A fork plug 205d is connected to conductor plate 204c. 【0433】 Figure 31 is a diagram of the fork plug 205. Figure 31(a) shows the state in which the conductor plate 204 attached to the switch circuit board 201 and the fork plug 205 are connected. Figure 31(b) shows the state of connection between the conductor plate 204 and the fork plug 205 when viewed from the direction of the arrow in a cross-section along line AA' of Figure 31(a). 【0434】 The fork plug 205 is made of a metal such as aluminum, stainless steel, or copper. Its surface is nickel-plated and then silver-plated. The fork plug 205 has a threaded groove, allowing the connecting wire 211 to be attached to it using a connecting bolt 219. 【0435】 The convex contact portion 220 is made of phosphor bronze and copper alloy. The surface of the contact portion 220 is also silver-plated. The insertion force of the fork plug 205 into the conductor plate 204 is configured to be between 40 and 60 N. 【0436】 Platinum, gold, silver, tungsten, copper, nickel, or alloys combining these materials can be used as the contact portion 220. It is also preferable to use silver oxide contact materials (Ag+ZnO, Ag+SnO2, Ag+SnO2In2O3, Ag+, Ag+SnO2Sn2Bi2O7). 【0437】 Figure 28 shows two switch circuit boards 201, but more than two switch circuit boards 201 are required depending on the number of transistors 117 to be tested, and the switch circuit boards 201 are connected to the connector 213 on the motherboard 207. 【0438】 As shown in Figure 30, the fork plug 205c is inserted through an opening 216 in the partition wall 214 located between chamber C2 and chamber B, connecting the conductor plate 204b and the fork plug 205c. The transistor 117 to be tested and the heating / cooling plate 134 are placed in chamber C1, while the drive circuit for testing the transistor 117 is placed in chamber B. Since chambers C1, C2, and B are separated by the partition wall 214, even if refrigerant leaks from the heating / cooling plate 134, it will not leak into chamber B. A water leak sensor (not shown) is placed around the heating / cooling plate 134. In addition, a groove is formed to discharge the refrigerant outside the test apparatus if it leaks out. A static shield plate is placed on the partition wall 214 to prevent the drive circuit system of chamber B from malfunctioning due to noise generated by the transistor 117. 【0439】 Because the current flowing through the transistor 117 being tested is large, several hundred amperes, the connecting wires 211 used are also thick. As a result, the connecting wires 211 lack flexibility and are rigid, making it difficult to change their connections. 【0440】 In the semiconductor testing apparatus of the present invention, the switch circuit board 201 can be connected via a fork plug 205 inserted from the C2 chamber. Therefore, changing the connection to the switch circuit board 201 used depending on the test conditions of the transistor 117 does not require changing the wiring of the connection wiring 211, and only the position of the opening 216 into which the fork plug 205 is inserted needs to be changed. Furthermore, the switch circuit board 201 only requires changing the position of the connector 213 that connects to the motherboard 207. 【0441】 As shown in Figures 28, 29, 30, 31, 33, 34, 38, 44, and 45, the connecting wire 211b connected to transistor 117 is connected to fork plug 205c. The connecting wire 211a connected to transistor 117 is connected to fork plug 205e. 【0442】 Even if there are multiple transistors 117 being tested, the application is satisfied even if there is only one switch circuit board 201a. This is because the output current Id of the current power supply 121 can be passed to the ground line as Im. 【0443】 The switch circuit board 201b requires the same number of transistors 117 to be tested. For example, if there are 12 transistors 117 to be tested, it is preferable to prepare 12 switch circuit boards 201b. It is also cost-effective to make the switch circuit boards 201a and 201b the same specifications. 【0444】 Multiple transistors and other components are mounted on the switch circuit board 201 as switch circuits 124. The more switch circuits 124 there are, the smaller the impedance that short-circuits the two conductor boards 204. The number of switch circuits 124b mounted on the switch circuit board 201a is determined so that the on-resistance of each switch circuit 124b is smaller than the on-resistance of the transistor 117 being tested. 【0445】 Figures 33 and 34 illustrate the state in which the fork plug 205 is inserted into the opening 216 of the bulkhead 214. Figure 33 is a view of the bulkhead 214 from the front surface, and Figure 34 is a view of the bulkhead 214 from the back surface. 【0446】 In Figure 33, for example, a fork plug 205b and several fork plugs 205c (fork plugs 205c1 to 205c5) are connected to the conductor plate 204b. Fork plug 205e1 is connected to conductor plate 204d1, fork plug 205e2 to conductor plate 204d2, fork plug 205e3 to conductor plate 204d3, fork plug 205e4 to conductor plate 204d4, and fork plug 205e5 to conductor plate 204d5. 【0447】 A transistor 117 to be tested is connected between fork plug 205c and fork plug 205e. A number of switch circuit boards 201b equal to the number of transistors 117 to be tested are mounted on the mother board 207. The opening 216 is formed corresponding to the position of the conductor plate 204 on the switch circuit board 201. 【0448】 Although not shown in the diagram, significant noise is generated when the switch circuit 124 on the switch circuit board 201 is switched on and off. To counteract this, a metal plate is placed between the switch circuit boards 201 and the metal plate is grounded. 【0449】 In each drawing, one switch circuit 124 is shown on the switch circuit board 201. However, in reality, multiple switch circuits 124 are arranged between the conductor plates 204. By arranging multiple switch circuits 124 on the switch circuit board 201, it is possible to short-circuit between the conductor plates 204 (for example, between conductor plate 204c and conductor plate 204e) with low resistance. 【0450】 The heat generated by the switch circuit 124 is dissipated to the conductor plate 204. Additionally, a heat sink is attached to the switch circuit 124. The ground terminal of the switch circuit 124 is connected to the ground of the switch circuit board 201, and heat is also dissipated through the copper foil of the ground. 【0451】 As shown in Figure 29, two conductive plates 204 are attached to the switch circuit board 201, and the switch circuit 124 is arranged to short-circuit the two conductive plates 204. Figure 44 is an equivalent circuit diagram of the semiconductor test apparatus of the present invention in the first embodiment. 【0452】 As shown in Figures 29 and 30, a conductor plate 204a and a conductor plate 204b are attached to the switch circuit board 201a. Conductor plate 204a is connected to a fork plug 205a. The fork plug 205a is connected to the output terminal of the current power supply 121. Conductor plate 204b is connected to a fork plug 205b. The fork plug 205b is connected to the ground terminal of the current power supply 121. 【0453】 When switch circuit 124b is turned on, the output terminals of the current power supply 121 are short-circuited, and a short-circuit current Im flows. Therefore, the output current of the current power supply 121 is not supplied to transistor 117. When switch circuit 124b is open, the output current Id of the current power supply 121 is supplied to transistor 117. 【0454】 Conductor plates 204c and 204d are attached to the switch circuit board 201b. Conductor plate 204c is connected to fork plug 205d. Fork plug 205d is connected to the output terminal of the current power supply 121. Conductor plate 204d is connected to fork plug 205e. Fork plug 205e is connected to the collector terminal of transistor 117 to be tested. 【0455】 As shown in Figures 29, 30, 33, and 34, the fork plug 205e is inserted into the opening 216 in the bulkhead 214 and connected to the conductor plate 204d. Similarly, the fork plug 205c is inserted into the opening 216 in the bulkhead 214 and connected to the conductor plate 204d. 【0456】 A switch circuit 124a is placed on the switch circuit board 201b. When the switch circuit 124a is turned on, the output current Id from the current power supply 121 is supplied to the transistor 117 as a test current. 【0457】 The switch circuit board 201b is located in compartment B of the enclosure 210, and the transistor 117 to be tested is electrically connected to the switch circuit board 201b by a fork plug 205 inserted from compartment C2 through an opening 216 in the partition wall 214. 【0458】 As illustrated in Figures 29, 30, 33, and 34, the fork plug 205 and the conductor plate 204 are connected. In Figure 30, the switch circuit boards 201 are shown as being arranged in parallel. In reality, the switch circuit boards 201 are inserted and arranged in parallel in the board rack. A motherboard is located on the side of the board rack, and control signals to each circuit board are applied from the motherboard. 【0459】 Figure 46 is an explanatory diagram of the test method for the semiconductor device of the present invention in the first embodiment. In Figure 46, Vgs is the gate signal applied to the gate terminal of the transistor 117 to be tested. Id is the current that flows through the transistor 117 during the test. For the sake of simplicity, it is assumed that a constant current Ia flows when the transistor 117 is ON. 【0460】 Figure 46(c) shows that St1 is a timing signal that causes current Ic to flow through diode Di. When St1 is at a high level, current flows through diode Di of transistor 117. The operational amplifier circuit 116 acquires the terminal voltage of diode Di, and the temperature measurement circuit 115 converts the terminal voltage into temperature information Tj. The temperature information Tj is sent to the control circuit board 111, which then performs a test of transistor 117 (semiconductor element 117) according to the temperature information Tj. 【0461】 Id is the current flowing through the transistor 117 being tested, and is the current output by the current power supply 121. St1 and St2 are the time for which the measuring current is passed through the diode for temperature measurement, or the time for temperature measurement. Figure 46(e)Ssa shows the on / off signal of switch circuit 124a, and Figure 46(f)Sab shows the on / off signal of switch circuit 124b. 【0462】 In Figure 46(g), Vce is the voltage at terminal c of transistor 117 (channel voltage of transistor 117), and the temperature information Tj shows the measured temperature change of transistor 117. 【0463】 As shown in Figure 46(a), a gate signal Vgs is applied from the gate driver circuit 113 to the gate terminal g of transistor 117. The gate signal Vgs has a period time tcycle and an on-time ton. The period time tcycle and on-time ton can be set to arbitrary values ​​by the gate signal control circuit 112. The on-voltage Vg can also be set to an arbitrary voltage. 【0464】 Figure 46(d) shows St2, which is the timing signal for supplying current Ic to diodes Dsa and Dsb in the embodiment shown in Figure 49. When St2 is at a high level, current flows to diode Dsa or Dsb of transistor 117. This is the case where a constant current Ic is supplied to a device (diode) independent of transistor 117 to acquire temperature information Tj. 【0465】 The operational amplifier circuit 116 acquires the terminal voltage of diode Dsa or Dsb, and the temperature measurement circuit 115 converts the terminal voltage into temperature information Tj. The temperature information Tj is sent to the control circuit board 111, which performs a test of transistor 117 based on the temperature information Tj. Matters related to St2 are explained in Figure 49, etc. 【0466】 For ease of understanding, the measured temperature information Tj is explained as changing between T1 and T2, as shown in Figure 46(h). The temperature information Tj increases when current is passed through transistor 117 and decreases when the current is stopped. Furthermore, the temperature information Tj changes in accordance with the changes in the characteristics of transistor 117. 【0467】 Figure 46(e)Ssa shows the timing of the on / off control signal for the switch circuit Ssa. When Ssa is Von, the switch circuit Ssa closes (turns on). When it is 0, the switch circuit Ssa opens (turns off), and the application of current or voltage is interrupted. 【0468】 Figure 46(f)Ssb shows the timing of the on / off control signal for the switch circuit Ssb. When Ssb is Von, the switch circuit Ssb closes (turns on). When it is 0, the switch circuit Ssb opens (turns off). 【0469】 In Figure 46(g), Vce is the channel voltage of transistor 117 (voltage between the emitter and collector terminals). Surge voltage and surge current are generated when transistor 117 is switched on and off, and the Vce waveform changes in a complex manner over time due to changes in the on-resistance of transistor 117. Furthermore, the Vce waveform of transistor 117 changes as current Ic flows through diode Di. 【0470】 In this specification and its drawings, for the sake of clarity and ease of explanation, it is assumed that when transistor 117 is ON, the voltage is Vn, and when the transistor is OFF, the voltage is Ve. The gate signal is applied to the gate terminal of transistor 117, which is being tested with period tcycle, on time ton, and off time toff. 【0471】 The gate signal Vgs is the off voltage when transistor 117 is N-channel, and Vg is the on voltage when the ground voltage is 0 (V). When transistor 117 is P-channel, the potentials of the on voltage and off voltage are changed. 【0472】 During the tn2 period before transistor 117 is turned on, the Vt voltage is set to a negative value than the off voltage. Similarly, during the tn1 period after transistor 117 is turned off, the Vt voltage is set to a negative value than the off voltage. The Vt voltage is a voltage lower than 0(V) and higher than -4(V). Therefore, Vt is a voltage that is greater than or equal to -4(V) and lower than 0(V). 【0473】 Furthermore, if transistor 117 is SiC, the off-voltage is set to the Vt voltage, and if it is an IGBT, the off-voltage is set to 0 (V). As described above, the semiconductor testing apparatus of the present invention is configured so that the off-voltage supplied to transistor 117 can be changed according to the type of transistor 117 being tested. 【0474】 When the Vt voltage is applied, the temperature of transistor 117 is measured by setting St1 (St2) to a high level. A constant current Ic is passed through diode Di during the period when the Vt voltage is applied. Also, a constant current Ic is passed through St1 (St2) during the period when it is at a high level. 【0475】 By applying the Vt voltage to the gate terminal of transistor 117, the off state of transistor 117 is stabilized, enabling stable measurement of temperature information Tj. Furthermore, noise is less likely to be introduced during the measurement of temperature information Tj, improving the measurement accuracy of temperature information Tj. 【0476】 By applying the Vt voltage to the gate terminal of transistor 117, the leakage current of transistor 117 is reduced, improving the accuracy and stability of the Vi voltage measurement. 【0477】 The gate signal Vgs is set to the Vt voltage during the time intervals of tn1 and tn2. For example, the time intervals of tn1 and tn2 are between 0.2ms and 2ms. Transistor 117 is turned off at 0(V). 【0478】 Therefore, three voltages, Vg, 0(V), and Vt, are applied to the gate terminal g of transistor 117. During the period when Vt is applied, current is passed through the transistor's diode Di to measure the temperature information Tj. 【0479】 When a constant current Ic is applied to the diode Di, the switch circuit Ssa is turned off to control the current from the current power supply 121 so that it is not applied to the transistor 117. 【0480】 By applying a constant current Ic to diode Di, the terminal voltage of diode Di is obtained, and the operational amplifier circuit 116 outputs a voltage Vi corresponding to the terminal voltage. The voltage Vi is input to the temperature measurement circuit 115, which then determines the temperature information Tj corresponding to the temperature of transistor 117. 【0481】 The temperature information Tj is transmitted to the control circuit board 111, and the control circuit board 111 controls the test of the transistor 117 (semiconductor element 117) based on the temperature information Tj, such as continuing, stopping, or changing the conditions of the test of the transistor 117. 【0482】 Figure 46(e) Ssa is the timing signal that controls the on / off state of switch circuit 124a. Figure 46(f) Ssb is the timing signal that controls the on / off state of switch circuit 124b. 【0483】 The switch circuit 124a turns on after a delay of tm2 time, following the Vgs signal of transistor 117 becoming Vg. The tm2 time can be changed and set by the control circuit board 111. 【0484】 Switch circuit 124b turns on tb2 hours before switch circuit 124a turns on. Switch circuit 124b remains in the ON state for tb1 hours after switch circuit 124a turns on. tb2 hours and tb1 hours can be changed independently. In particular, the setting of tb1 is important. The time of tb1 should be set or changed appropriately by observing the waveform of the Vce voltage of transistor 117. 【0485】 The switch circuit 124a turns off tm1 hours before the Vgs signal of transistor 117 becomes Vt. The tm1 time can be changed and set by the control circuit board 111. 【0486】 Switch circuit 124b turns on ta2 hours before switch circuit 124a turns off. Switch circuit 124b remains on until ta1 hours after switch circuit 124a turns off. ta2 hours and ta1 hours can be independently changed. In particular, the setting of ta1 is important. The time of ta1 should be set or changed appropriately by observing or measuring the waveform of the Vce voltage of transistor 117. 【0487】 When the switch circuit Ssb is turned on, the output terminal of the current power supply 121 is short-circuited to ground (earth line), and the charge is discharged. As the charge is discharged, the terminal voltage of the current power supply 121 becomes 0 (V) (ground voltage). In addition, the current Id output by the current power supply 121 is discharged to ground as current Im. Therefore, current Ia is not applied to transistor 117, and the collector voltage of transistor 117 does not rise. 【0488】 The tb2 time is set by observing or measuring the time when the output voltage of the current power supply 121 is 0(V) or close to 0(V), or when the output voltage of the current power supply 121 is lower than the collector voltage of the transistor 117. 【0489】 At the time when the above voltage relationship reaches a predetermined value (after tb2 has elapsed), the switch circuit 124a is turned on, and the current Id from the current power supply 121 is applied. However, at this time, since the switch circuit 124b is on, the current Id from the current power supply 121 flows to ground (earth line) as current Im through the switch circuit 124b. Therefore, no constant current Id flows through transistor 117. After switch circuit 124a is turned on, and after tb1 time has elapsed, switch circuit 124b is turned off, and the test current Id is supplied to transistor 117. The test current Id is supplied to the transistor 117 in synchronization with the switch circuit 124a, as shown in Figure 46. 【0490】 As described above, by operating the switch circuits 124a and 124b, no surge voltage Vs or inrush current Is is applied to transistor 117. Alternatively, the surge voltage Vs or inrush current Is is suppressed, allowing for proper testing of transistor 117. 【0491】 When the test current Id to transistor 117 is stopped, switch circuit 124b is turned on before switch circuit 124a is turned off ta2. Through switch circuit Ssb, the constant current Id output by the current power supply 121 flows to ground as current Im and is not supplied to transistor 117. 【0492】 The ta2 time is set by observing the time when the output voltage of the current power supply 121 is 0(V) or close to 0(V), or the time when the output voltage of the current power supply 121 is lower than the collector voltage of the transistor 117. 【0493】 Switch circuit 124a is turned off when the above voltage relationship reaches a predetermined value (after ta2 has elapsed). After switch circuit 124a is turned off, switch circuit 124b is turned off after ta1 time has elapsed. 【0494】 As described above, by operating or controlling the switch circuits 124a and 124b in this manner, no surge voltage Vs or inrush current Is is applied to the transistor 117. Alternatively, the surge voltage Vs or inrush current Is is suppressed, allowing for proper testing of the transistor 117. 【0495】 When a constant current Id is supplied to transistor 117, the temperature information Tj increases. When the constant current Id to transistor 117 stops, the temperature information Tj decreases. The temperature information Tj fluctuates between T1 and T2. If the characteristics of transistor 117 change due to the test, the temperature information Tj will gradually increase. To apply a constant current Id to transistor 117, the current power supply 121 is operated to apply current Id to transistor 117. 【0496】 As shown in Figures 44, 45, 47, 49, and 50, the resistance value of the variable resistor circuit 125 of the gate driver circuit 113 can also be set. By increasing the resistance value, the rising / falling waveform of the gate signal Vgs can be changed as shown by the dotted or dashed line in Figure 47(a). 【0497】 By changing or setting the gate signal Vgs, the current Id flowing through transistor 117 can also be changed as shown by the dotted or dashed lines in Figure 47(b). By changing the rising and falling waveforms of the current Id, surge voltage or inrush current can be adjusted or suppressed. 【0498】 As shown in Figure 47(c), the temperature information Tj changes from a solid line to a dotted line, and then from a dotted line to a dashed line, as the characteristics of transistor 117 change during the test. The test is stopped when the temperature information Tj reaches the level of Tm. Alternatively, the test is stopped when the rate of change of the temperature information Tj reaches a predetermined value. The test conditions are also changed. 【0499】 As shown in Figure 48, when the switch circuit Ssa (switch circuit 124a) is in the off state, the St1 signal is set to H and the temperature information Tj is measured. The St1 signal is set to H level when the gate signal is Vt. During the tn2 period, the St1 signal is set to H level during the tc2 period and the temperature information Tj is measured. During the tn1 period, the temperature information Tj is measured during the tc1 period. 【0500】 The temperature information Tj measured during period tc2 is the temperature information Tj at the time when transistor 117 has cooled down. The temperature information Tj measured during period tc1 is the temperature information Tj immediately after the current Id to transistor 117 is stopped. The decision to stop the test, change conditions, or modify the control system will be based on the temperature information Tj measured during period tc2 and the temperature information Tj measured during period tc1. 【0501】 If the temperature information Tj measured during period tc1 has a larger rate of change compared to the temperature information Tj measured during period tc2, or if there is a large difference in the absolute value between the temperature information Tj measured during period tc1 and the temperature information Tj measured during period tc2, the test will be controlled and modified in accordance with the measured temperature information Tj. 【0502】 Furthermore, if the temperature information Tj measured during the tc2 period differs from the standard value and a predetermined value, the system determines whether there is a problem with the connection status of transistor 117 or the test equipment, and makes a decision such as "do not start the test." During the tc2 or tc1 period, Vi is measured multiple times, and the temperature information Tj for Vi is determined. 【0503】 The embodiment shown in Figure 49 is a semiconductor testing apparatus according to a second embodiment of the present invention. In Figure 49, the transistor 117 is provided with a separate diode Ds (diode Dsa, diode Dsb) for temperature measurement. Note that the diode Ds is formed using the same process as the transistor 117. 【0504】 In the embodiment shown in Figure 49, the temperature information Tj is measured at the timing of the St2 signal shown in Figure 46(d). When the switch circuit Ssa (switch circuit 124a) is in the off state, the St2 signal is set to H and the temperature information Tj is measured. During the tn2 period, the temperature information Tj is measured by setting it to H level during the tc2 period. During the tc1 period, the temperature information Tj may be measured during either the ton period or the tn1 period. The temperature information Tj measured during the tc2 period and the temperature information Tj measured during the tc1 period are averaged to obtain the temperature information Tj. 【0505】 Furthermore, during the tc2 or tc1 period, Vi is measured multiple times to obtain temperature information Tj for Vi. The operation of the other signals or switch circuits in Figure 46 is the same as or similar to that of the embodiment described in Figure 28, etc. The above examples were embodiments in which temperature information Tj is measured by a diode added to or formed on the transistor 117. In the embodiment shown in Figure 49, a diode Ds that is not connected to (independent of) the transistor 117 is formed. 【0506】 Diode Dsa is formed to allow a constant current Ic to flow. Diode Dsb is formed to allow a constant current Ic' to flow. The constant current circuit 118(Pc) generates constant currents Ic and Ic'. 【0507】 Diodes Dsa and Dsb are diodes used for temperature measurement. The structures of diodes Dsa and Dsb are similar to or identical to diode Di shown in Figure 28. 【0508】 The diodes Di and Dsb operate or have the same configuration, except that diode Di is connected to the terminals (terminals c and e) of transistor 117, while diodes Dsa and Dsb are not connected to the terminals of transistor 117 but to independent terminals, and that the temperature information Tj is measured for diode Di at timing St1 in Figure 46(c), while the temperature information Tj is measured for diodes Dsa and Dsb at timing St2 in Figure 46(d). 【0509】 In the embodiment shown in Figure 49, the diode Ds is separated from the path through which the constant current Id flows. Even when the current Id is flowing through the transistor 117, the constant current Ic can still flow through the diode. Therefore, the time for measuring the temperature information Tj can be freely set. As shown in Figure 46(d), the positions of tc1 and tc2 can be set. 【0510】 However, in the case of tc2, as shown in Figure 46(d), the gate signal is placed or set during the period of Vt. The temperature information Tj measured during the period of tc2 is used as the value before the transistor 117 operates. The period of tc1 is preferably just before the constant current Id of the transistor 117 is stopped. Alternatively, it may be immediately after the constant current Id is stopped. The time immediately before and immediately after is preferably within 1 millisecond. In Figure 46(d), St2 is a timing signal that controls the current Ic (or current Ic') flowing through the diode Ds (Dsa, Dsb). 【0511】 When St2 is at a high level, current flows through the diode Ds (Dsa, Dsb) of transistor 117. The operational amplifier circuit 116 acquires the terminal voltage of diode Ds, and the temperature measurement circuit 115 converts the terminal voltage into temperature information Tj. 【0512】 The temperature information Tj is sent to the control circuit board 111, and the control circuit board 111 performs, stops, or modifies the test of transistor 117 according to the temperature information Tj. 【0513】 When St2 is at a high level, the constant current circuit 118 flows a constant current Ic, which flows through diode Dsa. Additionally, the constant current circuit 118 flows a constant current Ic', which flows through diode Dsb. 【0514】 Constant currents Ic and Ic' are currents of the same magnitude. However, if the threshold voltages of diodes Dsa and Dsb are different, or if the characteristics of diodes Dsa and Dsb are different, it is preferable to make the magnitudes of constant currents Ic and Ic' different. 【0515】 The operational amplifier circuit 116 acquires the terminal voltage of diode Dsa or Dsb, and the temperature measurement circuit 115 converts the terminal voltage into temperature information Tj. The temperature information Tj is sent to the control circuit board 111, which performs a test of transistor 117 based on the temperature information Tj. 【0516】 The temperature information Tj obtained by applying a constant current Ic and the temperature information Tj obtained by applying a constant current Ic' are averaged or weighted to obtain a single temperature information Tj value. Using this temperature information Tj, the control circuit board 111 performs, stops, or changes the control of the transistor 117. Other matters are the same or similar to those described or depicted in this specification and the drawings, and therefore their explanations are omitted. 【0517】 It goes without saying that the present invention can be modified in various ways without departing from its essence. It goes without saying that the matters and contents described herein and in the drawings can be combined with each other. 【0518】 Figure 50 is an explanatory diagram of a semiconductor testing apparatus in an embodiment of the present invention. The difference from Figure 28 is that the diode-connected transistor 117s is positioned in the path of the current Id that flows through the transistor 117m being tested. Other parts are the same and will not be explained. 【0519】 Transistor 117s is, for example, a transistor with the same specifications as transistor 117m, which is being tested. The gate terminal g2 and emitter terminal e2 of transistor 117s are connected, and transistor 117s can be considered equivalently as a diode. The gate terminal g2 and emitter terminal e2 of transistor 117s are connected to the O terminal of connection 507. The collector terminal c2 of transistor 117s is connected to the P terminal of connection 507. 【0520】 The terminals of transistor 117s (gate terminal g2, emitter terminal e2, collector terminal c2) are connected to connector 202b, as shown in Figure 43, and connector 202b is connected to sample connection circuit 203 by signal wiring 222b. The connections of the terminals of transistor 117s (gate terminal g2, emitter terminal e2, collector terminal c2) are made within sample connection circuit 203. 【0521】 When the switch circuit 124b is turned on, a current Im flows, discharging the charge from the current power supply 121. Alternatively, the current Id output by the current power supply 121 flows to ground via the switch circuit 124b. 【0522】 When an inrush current Is flows through the transistor 117m being tested, the transistor 117m is destroyed by the generation of the inrush current Is or surge voltage Vs. To prevent the generation of inrush current Is or surge voltage Vs, the on / off control and on / off sequence of switch circuits 124a and 124b are controlled. 【0523】 When testing transistor 117m with a faster period tcycle, it is necessary to switch switch circuits 124a and 124b on and off at high speed. In this case, an inrush current Is or surge voltage Vs may occur depending on the on / off timing of switch circuit 124. 【0524】 If the voltage Vm at the collector terminal of transistor 117 is higher than the voltage Vp at the output of the current power supply, then current Im will flow towards ground and either no current or only a small amount will flow through transistor 117m. 【0525】 To create the relationship Vm > Vp, in the embodiment shown in Figure 50, the diode-connected transistor 117s is placed in the path of the current Id. When current flows through transistor 117s, the channel voltage of transistor 117s is added to the voltage Vm. Therefore, the voltage Vp becomes lower than the voltage Vm, and no inrush current is applied to transistor 117m. Transistor 117m will not be destroyed by the inrush current Is or surge voltage Vs. 【0526】 Figure 60 shows the channel (Vce, Vds) voltage or waveform diagram of a transistor during power cycle testing of multiple semiconductor devices (such as power transistors). Figures 51 and 52 illustrate specific circuit configurations and test methods. 【0527】 The present invention provides a semiconductor device testing apparatus and a semiconductor device testing method for simultaneous testing of multiple devices. As an example of the simultaneous testing method, the present invention employs a time-share system. Figure 60 shows the waveforms when power cycling is performed on four devices using one semiconductor device test apparatus of the present invention. During times 2(s) to 4(s), the first device is turned on, while the other devices (second, third, and fourth devices) are turned off. Between times 4(s) and 6(s), the second device is turned on, while the other devices (first device, third device, and fourth device) are turned off. Between times 6(s) and 8(s), the third device is turned on, while the other devices (first device, second device, and fourth device) are turned off. Between 8(s) and 10(s), the fourth device is turned on, while the other devices (the first, second, and third devices) are turned off. Next, after 4.5(s) (13.5(s)), the first device turns on again, and thereafter, the second device, third device, and fourth device turn on in sequence. 【0528】 In Figure 60, for example, the second device is shown to turn on simultaneously with the first device turning off. However, in reality, the second device turns on after a predetermined time interval (1 to 100 ms) following the first device turning off. The predetermined time tw can be set to a predetermined value or any arbitrary time. 【0529】 The same applies to the operating intervals with other devices, and the predetermined time tw between each device can be set arbitrarily. The same applies to Figure 52, etc. 【0530】 In the semiconductor device testing apparatus and semiconductor testing method of the present invention, the on-time ton and off-time toff of each device can be set to predetermined values. When each semiconductor device is a transistor element, the test period tc (tcycle), on-time ton or off-time toff, and predetermined time tw can be easily adjusted or set by the pulse time and period applied to the gate terminal of the transistor. When multiple devices are tested using multiple semiconductor device test equipment, the test results will include variations between the equipment, making accurate comparison of the devices impossible. 【0531】 In the semiconductor device testing apparatus and semiconductor device testing method of the present invention, while one device is powered off (OFF), another device is powered on (ON). The power is repeatedly turned on (ON) and off (OFF) at regular intervals, applying thermal stress to the semiconductor device. 【0532】 By testing multiple devices simultaneously (sequentially) using the same equipment (power supply, temperature measurement, control, bypass, and other test environments), it is possible to speed up device testing and accurately compare device performance. 【0533】 Figure 51 is an explanatory diagram of a semiconductor testing apparatus in an embodiment of the present invention. In Figure 51, a plurality of transistors 117 (transistors 117Q1 to 117Qn) to be tested are connected in parallel to the current power supply 121. 【0534】 In the embodiment shown in Figure 51, it is necessary to arrange multiple transistors 117 on the positioning support plate 519. Therefore, as shown in Figure 53, positioning holes 512 (positioning holes 512a, 512b, 512c, 512d, and 512e in Figure 53) are formed on the sample placement plate 511, corresponding to the number of transistors 117 (SOP117, QFN117) to be tested. SOP117, QFN117, etc., are placed in each of these positioning holes. 【0535】 Furthermore, as shown in Figure 54, electrode patterns 505 and 506 corresponding to the number of SOP117 and QFN117 are formed on the connection substrate 514. Anisotropic conductive rubber 504 is placed on the electrode patterns, and pressing multiple SOP117 and QFN117 is performed with a single pressing head. 【0536】 In this embodiment, there is one switch circuit board 201a and n switch circuit boards 201b (switch circuit boards 201b1 to 201bn). There are n transistors 117Q (transistors 117Q1 to 117Qn) that are tested simultaneously or sequentially. 【0537】 The collector terminal of transistor Q1 is connected to fork plug 205e1, and the emitter terminal of transistor Q1 is connected to fork plug 205c1. 【0538】 The collector terminal of transistor Q2 is connected to fork plug 205e2, and the emitter terminal of transistor Q2 is connected to fork plug 205c2. 【0539】 The collector terminal of transistor Q3 is connected to fork plug 205e3, and the emitter terminal of transistor Q3 is connected to fork plug 205c3. 【0540】 Similarly, the collector terminal of transistor Qn is connected to fork plug 205en, and the emitter terminal of transistor Qn is connected to fork plug 205cn. 【0541】 The current Ic from the constant current circuit 118 is supplied to the diode Ds of the transistor 117Q1 when the switch circuit Ssa1 is turned on. The terminal voltage of diode Ds is applied to the operational amplifier (buffer) 116 and output as the Vi1 voltage from the operational amplifier circuit 116. 【0542】 The current Ic from the constant current circuit 118 is supplied to the diode Ds of the transistor 117Q2 when the switch circuit Ssa2 is turned on. The terminal voltage of diode Ds is applied to the operational amplifier (buffer) 116 and output as the Vi2 voltage from the operational amplifier circuit 116. 【0543】 Similarly, the current Ic from the constant current circuit 118 is supplied to the diode Ds of the transistor 117Qn when the switch circuit Ssan is turned on. The terminal voltage of diode Ds is applied to the operational amplifier (buffer) 116 and output as the Vin voltage from the operational amplifier circuit 116. Voltage Vin is selected from voltage Vi1 by selector 127, output as Vi, and input to temperature measurement circuit 115. 【0544】 The temperature measurement circuit 115 obtains temperature information Tj and outputs it to the control circuit board 111. In the embodiment shown in Figure 51, there is only one constant current circuit 118, but this is not the only option. A constant current circuit 118 may be placed on each transistor 117Q. Alternatively, a temperature measurement circuit 115 may be formed or placed on each transistor 117Q. Voltage data Vi and temperature information Tj are sent to the control circuit board 111 via the wiring on the motherboard 207. 【0545】 The connector 507 (P terminal) of transistor 117Q1 is connected to the connection structure 218a1. The connector 507 (N terminal) of transistor 117Q1 is connected to the connection structure 218b1. 【0546】 The connector 507 (P terminal) of transistor 117Q2 is connected to the connection structure 218a2. The connector 507 (N terminal) of transistor 117Q2 is connected to the connection structure 218b2. 【0547】 Similarly, the connection point 507 (P terminal) of transistor 117Qn is connected to the connection structure 218an. The connection point 507 (N terminal) of transistor 117Qn is connected to the connection structure 218bn. Note that n is a positive number greater than or equal to 1. The connecting structure 218 is inserted through an opening 216 provided in the partition wall 217. The insertion of the connecting structure 218 is carried out from room C2 towards room C1. 【0548】 The fork plug 205 is inserted into chamber B from chamber C2 through an opening 216 formed in the partition wall 214. By being inserted, the fork plug 205 connects to the conductor plate 204 of the switch circuit board 201. The switch circuit board 201 can be selected by the position of the opening 216 into which the fork plug 205 is inserted. 【0549】 By changing the position of the switch circuit board 201 connected to connector 213 on motherboard 207, the switch circuit board 201 to be selected by the fork plug 205 can be selected. 【0550】 Two conductor plates 204 are arranged on the switch circuit board 201. The conductor plates 204 are positioned such that the conductor plate 204 closer to the C2 chamber is connected (in contact) with the fork plug 205. 【0551】 In the embodiments of the present invention, the fork plug 205 and the conductor plate 204 are electrically connected by contact, but the invention is not limited to this. Any configuration that allows the electrically connected state to be changed between a connected state and a disconnected state by mechanical operation is acceptable. Furthermore, any configuration that can stably maintain the connected state is acceptable. 【0552】 For example, instead of the fork plug 205, a rotary connector, rotary joint, high-current connector, etc. may be used. Instead of the conductor plate 204, a rotary connector, rotary joint, high-current connector may be used, or a cylindrical conductor rod, a square conductor rod, a comb-shaped conductor plate, etc. may be used. 【0553】 Figure 52 is an explanatory diagram of a semiconductor device test method in an embodiment of the present invention illustrating the operation shown in Figure 51. It is possible to perform a semiconductor test by simultaneously turning on transistors 117Q (transistors 117Q1 to 117Qn). In this case, a constant current Id must be supplied to all transistors 117Q (transistors 117Q1 to 117Qn). Therefore, the current power supply 121 must be able to output a current of Id × n (where n is a positive number greater than or equal to 1) if there are n transistors 117Q. Consequently, a high-capacity current power supply 121 is required. 【0554】 If the transistors 117Q are sequentially turned on and a constant current Id is applied to them during the test, the constant current output by the current power supply 121 can be Id. Figure 52 shows an embodiment of the test method of a semiconductor test apparatus that performs the test by sequentially turning on the transistors 117Q. The semiconductor element changes depending on the number of times the constant current Id is turned on and off. 【0555】 Therefore, by performing the test by sequentially turning on semiconductor elements (transistor 117Q, etc.) as shown in Figure 52, the test can be carried out efficiently, and the maximum output current capacity of the current power supply 121 can be reduced. 【0556】 In Figure 52, the explanation assumes that only one transistor 117Q is turned on, but this is not the only option. For example, multiple transistors 117Q may be turned on simultaneously. In this case, the maximum constant current output by the current power supply 121 is equal to the number of transistors 117Q turned on × Id. 【0557】 In the embodiments of the present invention, only one current power supply unit 121 is shown, but the invention is not limited to this. A separate current power supply unit 121b may be installed. Alternatively, two or more current power supply units 121 may be installed. By installing multiple current power supply units 121, the current Id flowing through the transistor 117 can be made into various waveforms. The same applies to the embodiments of the present invention. 【0558】 As shown in Figure 52(a), when switch circuits St1 (151s1) to Stn (151sn) are turned on, constant currents Id1 to Idn flow through transistor 117. For example, the application time of constant current Id is ton, and constant currents Id1 and Id2 are applied to transistor 117 sequentially at intervals of time t cycles. When transistor 117 is turned on, the channel voltage of transistor 117Q changes sequentially (Figure 52(c)). 【0559】 Therefore, for example, constant currents Id1 and Id2 do not overlap in time. Thus, the output capacitance of the current power supply 121 only needs to be the output capacitance required to test one transistor 117Q. 【0560】 The constant currents Id(Id1~Idn) are controlled so that they do not overlap. Preferably, there should be an interval of 1 microsecond or more between each current Id(Id1~Idn). The driving method and control method described in Figure 46 are implemented for each transistor 117Q. 【0561】 The constant current Ic supplied to each transistor 117Q is supplied to the diode Ds of each transistor 117Q by sequentially turning on the switch circuit Ssa (Ssa1 to Ssan). 【0562】 The voltage Vi (Vi1~Vin) corresponding to the terminal voltage of diode Ds is selected by selector 127 in synchronization with the switch circuit Ssa (Ssa1~Ssan). For example, when current Ic is supplied to transistor 117Q1, selector 127 selects the terminal voltage of diode Ds of transistor 117Q1. When current Ic is supplied to transistor 117Q3, selector 127 selects the terminal voltage of diode Ds of transistor 117Q3. The selected voltage Vi is supplied to the temperature measurement circuit 115. Other configurations and operations are the same as those described in other embodiments, so their explanation will be omitted. In the embodiments of the present invention, transistor 117 has been described using an IGBT as an example, but is not limited thereto. 【0563】 For example, it goes without saying that an N-channel JFET (Figure 55(a)), a P-channel JFET (Figure 55(b)), an N-channel MOSFET (Figure 55(c)), a P-channel MOSFET (Figure 55(d)), an N-channel bipolar FET (Figure 55(e)), or a P-channel bipolar FET (Figure 55(f)) would also be acceptable. 【0564】 Furthermore, the invention is not limited to three-terminal devices, but may also be a two-terminal element such as a diode as shown in Figure 55(g). In the case of a two-terminal element, a gate signal Vgs is not required. It goes without saying that the semiconductor testing apparatus and semiconductor element testing method of the present invention can be applied by testing with a constant current Id supplied by the current power supply 121. 【0565】 Furthermore, it goes without saying that the semiconductor testing apparatus and semiconductor testing method of the present invention can be applied not only to transistors and diodes, but also to other semiconductor elements such as thyristors and triacs, varistors and diacs, or modules in which transistors, diodes, resistors, etc., are mixed or integrated. 【0566】 Furthermore, the present invention is not limited to semiconductor elements, but can also be applied to resistive elements such as concrete resistors and enamel resistors, variable resistors, nonlinear resistive elements such as thermistors and positors, and biased pressure elements such as transformers. 【0567】 Although the present invention has been specifically described above based on embodiments, it goes without saying that the present invention is not limited thereto and can be modified in various ways without departing from its essence. It goes without saying that the matters and contents described in this specification and the drawings can be combined with each other. 【0568】 For example, the switch circuits 124a and 124b shown in Figure 45 can be applied to other embodiments. It goes without saying that the configurations or operations shown in Figures 51 and 52 can also be applied to other embodiments such as Figures 49 and 50. 【0569】 For example, it goes without saying that the apparatus of the present invention, its operation, and its configuration, as illustrated in Figures 25, 68, and 72, can be combined in part or in whole with one another. For example, it goes without saying that the present invention, as described in Figures 2, 5, 7, 58, etc., can be combined in part or in whole with each other. 【0570】 For example, it goes without saying that the test methods, inspection methods, and test apparatus driving methods of the present invention, as described in Figures 46, 47, 48, 49, 50, 51, 53, 60, 61, 62, 63, 64, 65, 66, and 67, can be combined in part or in whole with one another. [Industrial applicability] 【0571】 The present invention provides a semiconductor testing apparatus and semiconductor testing method that can be easily modified according to the test content of semiconductor elements such as transistors and the number of semiconductor elements being tested simultaneously, and that can effectively address noise generated during testing. [Explanation of symbols] 【0572】 111 Control circuit board (controller) 112 Gate signal control circuit 113 Gate driver circuit 115 Temperature measurement circuit (not shown) 116 Operational Amplifier Circuit (Buffer Amplifier) 117 Power Transistors 121 Constant current circuit 122 Switch Circuit 123 Switch Circuit 124 Switch Circuit 125 Variable Resistor Circuit 126 Variable Resistor Circuit 127 Changeover switch circuit 128 Current detection circuit 129 Voltage detection circuit 130 Constant Current Setting Circuit 131 Control Rack 132 Power supply 133 Control Circuit 134 Heating and Cooling Plate 135 Circulating water pipe 136 Chiller 137 Short Circuit 138 Isolated DC-DC Converter Circuit 201 Switch Circuit Board 202 Connector 203 Sample Connection Circuit 204 Conductor Plate 205 Fork Plug 206 connection pins 207 Motherboard 208 connector 209 Device control circuit board 210 cabinets 211 Connection Wiring 212 Power wiring 213 Connector 214 Bulkhead 215 Bulkhead 216 Opening 217 Bulkhead 218 Connection Structures 219 connecting bolts 220 Contact area 221 Fixing screws 222 Signal Wiring 223 Heat Pipe 224 Fixing screws 225 Contact point 226 Electrode terminal 227 Signal terminals 228 heat dissipation fins 229 Cooling Fan 230 conductive wires 231 Heat pipe fittings 232 Connecting fittings 233 Connecting fittings 234 recess 235 Signal Wiring 239 Placement recess 301 Test Circuit Module 302 Voltage Selection Circuit 502 connection pins 503 Connection Wiring 504 Anisotropic conductive rubber 505 Electrode Pattern 506 electrode pattern 507 Connection part 508 Signal Wiring 509 Positioning holes 510 fixing hole 511 Sample placement plate 512 sample holes 514 Connection board 515 Pressure Plate 516 Pressing tool 517 Rubber (elastic material) 518 Positioning support 519 Positioning support plate 520 Surface Plate 521 Sample Plate 522 base 523 Heat-resistant resist 524 Ni-P plating film 525 Heat-resistant substrate 525 gold plating film 530 Pressing head 531 Pressing column 532 Arm 533 Arm stand 534 Post 601 Semiconductor Chips 602 Insulating substrate 604 Copper base 605 solder 606 Aluminum Wire 607 Wiring electrode 608 Retaining member 609 Terminal connection section 610 Device Fixing and Connection Devices 611 devices

Claims

[Claim 1] A semiconductor test apparatus for testing a power module having a gate signal terminal, a first electrode terminal, and a second electrode terminal, A connection structure connected to the first electrode terminal, A heating and cooling plate for cooling or heating the power module, A first switch circuit connected to the aforementioned connection structure, A power supply device that supplies a test current or test voltage to the power module via the first switch circuit, A second switch circuit that short-circuits the output terminals of the power supply and at least one of the first electrode terminal and the second electrode terminal, The gate signal terminal is equipped with a gate driver circuit that applies a gate signal, In the first operation of initiating the supply of the test current or test voltage to the power module, After the gate driver circuit changes the voltage applied to the gate signal terminal from an off voltage to an on voltage, the first switch circuit is changed from off to on. Before changing the first switch circuit from off to on, change the second switch circuit from off to on, After changing the first switch circuit from off to on, the second switch circuit is changed from on to off. In a second operation that stops supplying the test current or test voltage to the power module, Before the gate driver circuit changes the voltage applied to the gate signal terminal from an on voltage to an off voltage, the first switch circuit is changed from on to off. Before changing the first switch circuit from on to off, change the second switch circuit from off to on. A semiconductor testing apparatus characterized by changing the first switch circuit from on to off, and then changing the second switch circuit from on to off. [Claim 2] A semiconductor test apparatus for testing a power module having a gate signal terminal, a first electrode terminal, and a second electrode terminal, A connection structure connected to the first electrode terminal, A heating and cooling plate for cooling or heating the power module, A first switch circuit connected to the aforementioned connection structure, A power supply device that supplies a test current or test voltage to the power module via the first switch circuit, A second switch circuit that short-circuits the output terminals of the power supply and at least one of the first electrode terminal and the second electrode terminal, The gate signal terminal is equipped with a gate driver circuit that applies a gate signal, The power module is located in the first chamber. The first switch circuit and the second switch circuit are arranged in the second chamber. In the first operation of initiating the supply of the test current or test voltage to the power module, After the gate driver circuit changes the voltage applied to the gate signal terminal from an off voltage to an on voltage, the first switch circuit is changed from off to on. Before changing the first switch circuit from off to on, change the second switch circuit from off to on, After changing the first switch circuit from off to on, the second switch circuit is changed from on to off. In a second operation that stops supplying the test current or test voltage to the power module, Before the gate driver circuit changes the voltage applied to the gate signal terminal from an on voltage to an off voltage, the first switch circuit is changed from on to off. Before changing the first switch circuit from on to off, change the second switch circuit from off to on. A semiconductor testing apparatus characterized by changing the first switch circuit from on to off, and then changing the second switch circuit from on to off. [Claim 3] A semiconductor test apparatus for testing a power module having a gate signal terminal, a first electrode terminal, and a second electrode terminal, A connection structure connected to the first electrode terminal, A heating and cooling plate for cooling or heating the power module, A first switch circuit connected to the aforementioned connection structure, A power supply device that supplies a test current or test voltage to the power module via the first switch circuit, A second switch circuit that short-circuits the output terminals of the power supply and at least one of the first electrode terminal and the second electrode terminal, A gate driver circuit that applies a gate signal to the gate signal terminal, The first switch circuit is mounted on a switch circuit board with a conductor plate attached, In the first operation of initiating the supply of the test current or test voltage to the power module, After the gate driver circuit changes the voltage applied to the gate signal terminal from an off voltage to an on voltage, the first switch circuit is changed from off to on. Before changing the first switch circuit from off to on, change the second switch circuit from off to on, After changing the first switch circuit from off to on, the second switch circuit is changed from on to off. In a second operation that stops supplying the test current or test voltage to the power module, Before the gate driver circuit changes the voltage applied to the gate signal terminal from an on voltage to an off voltage, the first switch circuit is changed from on to off. Before changing the first switch circuit from on to off, change the second switch circuit from off to on. A semiconductor testing apparatus characterized by changing the first switch circuit from on to off, and then changing the second switch circuit from on to off. [Claim 4] A semiconductor test apparatus for testing a power module having a gate signal terminal, a first electrode terminal, and a second electrode terminal, A connection structure connected to the first electrode terminal, A heating and cooling plate for cooling or heating the power module, A first switch circuit connected to the aforementioned connection structure, A power supply device that supplies a test current or test voltage to the power module via the first switch circuit, A second switch circuit that short-circuits the output terminals of the power supply and at least one of the first electrode terminal and the second electrode terminal, A gate driver circuit that applies a gate signal to the gate signal terminal, The power module includes a constant current circuit that applies a constant current between the first electrode terminal and the second electrode terminal when the test current or test voltage is not supplied to the power module, The system includes a voltage output circuit that outputs the terminal voltage between the first electrode terminal and the second electrode terminal while the constant current is applied. In the first operation of initiating the supply of the test current or test voltage to the power module, After the gate driver circuit changes the voltage applied to the gate signal terminal from an off voltage to an on voltage, the first switch circuit is changed from off to on. Before changing the first switch circuit from off to on, change the second switch circuit from off to on, After changing the first switch circuit from off to on, the second switch circuit is changed from on to off. In a second operation that stops supplying the test current or test voltage to the power module, Before the gate driver circuit changes the voltage applied to the gate signal terminal from an on voltage to an off voltage, the first switch circuit is changed from on to off. Before changing the first switch circuit from on to off, change the second switch circuit from off to on. A semiconductor testing apparatus characterized by changing the first switch circuit from on to off, and then changing the second switch circuit from on to off. [Claim 5] A semiconductor test apparatus for testing a power module having a gate signal terminal, a first electrode terminal, and a second electrode terminal, A connection structure connected to the first electrode terminal, A heating and cooling plate for cooling or heating the power module, A first switch circuit connected to the aforementioned connection structure, A power supply device that supplies a test current or test voltage to the power module via the connection structure, A second switch circuit that short-circuits the output terminals of the power supply and at least one of the first electrode terminal and the second electrode terminal, A gate driver circuit that applies a gate signal to the gate signal terminal, The device comprises a voltage output circuit that outputs the terminal voltage between the first electrode terminal and the second electrode terminal, The gate driver circuit varies the gate signal so that the power determined by the terminal voltage and the test current becomes the specified power. In the first operation of initiating the supply of the test current or test voltage to the power module, After the gate driver circuit changes the voltage applied to the gate signal terminal from an off voltage to an on voltage, the first switch circuit is changed from off to on. Before changing the first switch circuit from off to on, change the second switch circuit from off to on, After changing the first switch circuit from off to on, the second switch circuit is changed from on to off. In a second operation that stops supplying the test current or test voltage to the power module, Before the gate driver circuit changes the voltage applied to the gate signal terminal from an on voltage to an off voltage, the first switch circuit is changed from on to off. Before changing the first switch circuit from on to off, change the second switch circuit from off to on. A semiconductor testing apparatus characterized by changing the first switch circuit from on to off, and then changing the second switch circuit from on to off. [Claim 6] The semiconductor testing apparatus according to claim 1, claim 2, claim 3, claim 4, or claim 5, characterized in that a resistor circuit is arranged between the gate driver circuit and the gate signal terminal, and the resistance value of the resistor circuit can be changed. [Claim 7] The heating and cooling plate comprises a first heating and cooling plate and a second heating and cooling plate, The semiconductor testing apparatus according to claim 1, 2, 3, 4, or 5, characterized in that the power module is arranged between the first heating / cooling plate and the second heating / cooling plate. [Claim 8] A liquid circulating water pipe is connected to the heating and cooling plate, The system further comprises a leak sensor for detecting the leaked liquid, The semiconductor testing apparatus according to claim 1, 2, 3, 4, or 5, characterized in that the semiconductor testing apparatus is stopped or an alarm is issued upon operation of the water leak sensor. [Claim 9] The semiconductor testing apparatus according to claim 1, claim 2, claim 3, claim 4, or claim 5, characterized in that a cooling fan is arranged at the lower or upper part of the connecting structure. [Claim 10] The semiconductor testing apparatus according to claim 4 or 5, characterized in that the test is stopped, the control method is changed, or the test conditions are changed based on the terminal voltage.

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