Wiring boards and mounting structures
The wiring board design addresses stress and capacitance issues by strategically arranging differential pair conductors with varying land and via-hole configurations, improving electrical reliability through reduced capacitance and noise interference.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- KYOCERA CORP
- Filing Date
- 2022-07-27
- Publication Date
- 2026-06-18
AI Technical Summary
Conventional wiring boards experience increased stress and capacitance between differential pair conductors due to laminated via-hole conductors, leading to potential malfunctions from noise mixing.
The wiring board design includes a configuration where differential pair conductors are arranged with specific land and via-hole conductors positioned at varying distances and layers, with some conductors extending longer in a direction to reduce overlap and capacitance, and others intersecting or aligning with via-hole conductor directions to minimize stress and noise interference.
This configuration effectively reduces capacitance and noise mixing between differential pair conductors, enhancing electrical reliability and reducing the risk of malfunctions.
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